* frags.c (frag_var): Change offset parameter to offsetT.
(frag_variant): Likewise.
* frags.h (frag_variant, frag_var): Update declarations.
* config/tc-m68k.c (struct m68k_it): Change foff field to
offsetT.
(add_frag): Change off parameter to offsetT.
* Several files: Add casts to calls to frag_var.
* config/te-delta.h (COFF_COMMON_ADDEND): Define.
* config/obj-coff.c (fixup_segment): Check COFF_COMMON_ADDEND when
storing the value of a common symbol.
* config/obj-elf.h (struct elf_obj_sy): Define.
(OBJ_SYMFIELD_TYPE): Define to elf_obj_sy struct. Change all
users.
* config/obj-elf.c (obj_elf_symver): Just record the name.
(obj_symbol_new_hook): Initialized versioned_name field.
(elf_frob_symbol): If there is a versioned_name, either rename the
symbol, or add an alias with that name.
start-sanitize-tic80
* config/tc-tic80.c (md_pseudo_table): Add entry for bss, which takes
an additional alignment argument.
(find_opcode): Allow O_symbol relocs for any 32 bit field, not just
base relative ones.
(build_insn): Handle O_symbol relocs for any 32 bit field, not just
base relative ones.
end-sanitize-tic80
* itbl-lex.l: Fix indentation mistakes from indent program.
* itbl-ops.h: Add include for ansidecl.h.
Add PARAMS around function arguments.
Add declaration for itbl_have_entries.
* itbl-ops.c: Add PARAMS around function arguments.
* Makefile.in: Add itbl build rules.
Add dependancies for itbl files to mips target.
* as.c: Add itbl support.
Add new option "--insttbl" for dynamically extending instruction set.
* as.h: Declare insttbl_file_name;
the name of file defining extensions to the basic instruction set
* configure.in, configure: Add itbl-parse.o, itbl-lex.o, and
itbl-ops.o to extra_objects for mips configuration.
Add include file link from itbl-cpu.h to
config/itbl-${target_cpu_type}.h.
* config/tc-mips.c: Allow copz instructions.
Add notes for future additions to the itbl support.
Add debug macros.
(macro): Call itbl_assemble to assemble itbl instructions.
See if an unknown register is specified in an itbl entry.
description.
start-sanitize-tic80
* config/tc-tic80.h (NEED_FX_R_TYPE): Define.
* config/tc-tic80.c (find_opcode): Add code to support O_symbol
operands.
(build_insn): Grab a frag early so we can use the address in
fixups. Take one's complement of BITNUM values before insertion
in opcode. Add code to support O_symbol operands.
(md_apply_fix): Replace unimplemented warning with implementation.
(md_pcrel_from): Ditto.
(tc_coff_fix2rtype): Ditto.
end-sanitize-tic80
These changes are related to Ian's gas/libgloss changes of Dec 13/Dec 18.
* tc-mips.c (mips_ip): If configured for an embedded ELF system,
don't set the section alignment to 2**4.
* mips/ddb.ld: Align the location counter before setting _gp, and
before setting edata. Remove ALIGN from _gp computation.
* mips/idt.ld, mips/pmon.ld: Before setting _gp, use ALIGN(8) instead
of ALIGN(16). Remove ALIGN from _gp computation.
like all the other targets.
* doc/internals.texi (CPU backend): Add missing word in
md_flush_pending_output description. Fix typo in md_convert_frag
description.
start-sanitize-tic80
* config/tc-tic80: Minor comment additions/changes.
end-sanitize-tic80
does not actually work, though:
* configure.in (i386-sequent-bsd*): New target.
* configure: Rebuild.
* config/tc-dynix.h: New file.
* config/tc-i386.h: Define TARGET_FORMAT if TE_DYNIX.
tc-mn10200.h, tc-mn10300.h, tc-sh.h, tc-v850.h, tc-vax.h, tc-w65.h}:
Add default definition of zero for TARGET_BYTES_BIG_ENDIAN.
* config/{tc-arm.h, tc-hppa.h, tc-i386.h, tc-mips.h, tc-ns32k.h,
tc-ppc.h, tc-sparc.h}: Move definition of TARGET_BYTES_BIG_ENDIAN
to a location consistent with the rest of the target include files.
* config/tc-i386.c: Remove misleading comment.
* doc/internals.texi (CPU backend): Add description of function
md_undefined_symbol.
start-sanitize-tic80
* config/tc-tic80.c: Add code to insert predefined symbols into the
symbol table so they can be parsed by the standard expression parser.
Remove custom code that use to parse them.
* config/tc-tic80.h: Move definition of TARGET_BYTES_BIG_ENDIAN
to a location consistent with the rest of the target include files.
end-sanitize-tic80
(DVIPS): Set to dvips.
(ps, as.ps, gasp.ps): New targets.
(internals.info, gasp.dvi, internals.dvi): Set both TEXINPUTS
and MAKEINFO env variables.
(internals.ps): Use DVIPS macro.
(clean): Remove core and backup files.
(distclean): Remove temporary files from building internals.
(clean-dvi): Ditto.
* doc/internals.texi (Frags): Fix typo.
(GAS processing): Ditto.
(CPU backend): Ditto.
* ecoff.c (init_file): Use TARGET_BYTES_BIG_ENDIAN value directly.
* mpw-config.in: Define TARGET_BYTES_BIG_ENDIAN as 1.
* read.c: Remove ugly hack that dealt with config files not
correctly defining TARGET_BYTES_BIG_ENDIAN.
(target_big_endian): Use TARGET_BYTES_BIG_ENDIAN directly.
* config/arm-big.mt: Define TARGET_BYTES_BIG_ENDIAN to 1.
* config/arm-lit.mt: Define TARGET_BYTES_BIG_ENDIAN to 0.
* config/mips-big.mt: Define TARGET_BYTES_BIG_ENDIAN to 1.
* config/mips-lit.mt: Define TARGET_BYTES_BIG_ENDIAN to 0.
* config/ppc-lit.mt: Define TARGET_BYTES_BIG_ENDIAN to 1.
* config/ppc-sol.mt: Replace TARGET_BYTES_LITTLE_ENDIAN
with TARGET_BYTES_BIG_ENDIAN defined to 0.
* config/tc-arm.h: Remove use of TARGET_BYTES_LITTLE_ENDIAN
and simplify. Test value of TARGET_BYTES_BIG_ENDIAN, not just
whether it is defined or not.
* config/tc-mips.h: Remove use of TARGET_BYTES_LITTLE_ENDIAN.
* config/tc-ppc.h: Remove use of TARGET_BYTES_LITTLE_ENDIAN
and simplify. Test value of TARGET_BYTES_BIG_ENDIAN, not just
whether it is defined or not.
start-sanitize-tic80
* config/tic80.h (TARGET_FORMAT): Define to coff-tic80.
(TARGET_BYTES_BIG_ENDIAN): Define to 0.
end-sanitize-tic80
(prev_nop_frag_holds): New static variable.
(prev_nop_frag_required): New static variable.
(prev_nop_frag_since): New static variable.
(append_insn): If we aren't reordering, and prev_nop_frag is not
NULL, and we don't need any nops, then decrease the size of
prev_nop_frag. Don't insert nops because of instructions in
noreorder sections. Remember whether the previous instructions
where in noreorder sections even when not reordering.
(mips_no_prev_insn): Add preserver parameter. Change all
callers. Refer prev_nop_frag variables when appropriate.
(mips_emit_delays): Set up prev_nop_frag.
(s_mipsset): Clear prev_nop_frag if reordering.
extended instruction in a delay slot when not reordering. Set
prev_insn_valid even if not reordering.
(md_convert_frag): Warn if an extended instruction appears in a
delay slot.
symbol table.
(mips16_ip): First parse the expression, and then see whether it
came up with a register, rather than trying to first see whether
we are looking at a register.
(md_apply_fix): Handle BFD_RELOC_MIPS16_GPREL.
* config/tc-mips.c (append_insn): Output jump instruction as a
pair of 2 byte instructions, rather than as a single 4 byte
instruction.
start-sanitize-r5900
* config/tc-mips.c (md_begin): Correct test of mips_5900.
(mips_ip): Don't check INSN_ISA for a macro.
end-sanitize-r5900
instruction registers, opcodes and formats. Build internal table
for new instructions and provide callbacks for assembler and
disassembler.
* itbl-lex.l, itbl-parse.y: Lex and yacc parsers for instruction
spec table.
* itbl-ops.h: New file. Header file for itbl support.
* config/itbl-mips.h: New file. Mips specific definitions for
itbl support.
* config/tc-d10v.h (md_do_align): Add this hook to call
d10v_cleanup() when a ".align" is detected. Fixes PR11487.
* config/tc-d10v.c (find_opcode): Correctly calculate
branch displacement when .aligns are present.
(labels, current_label): New static variables.
(md_assemble): Mark current_label as text, and clear it.
(m68k_frob_label): New function.
(m68k_flush_pending_output): New function.
(m68k_frob_symbol): New function.
* config/tc-m68k.h (tc_frob_label): Define.
(md_flush_pending_output): Define.
(tc_frob_symbol): Don't warn, just call m68k_frob_symbol.
(tc_frob_coff_symbol): Likewise.
PR 11417.
to avoid warnings with the native HP compiler.
(fix_new_hppa): Similarly for the r_type argument.
(pa_build_unwind_subspace, hppa_elf_mark_end_of_function): Enclose
in an #if OBJ_ELF to keep gcc -Wall quiet.
(md_apply_fix): Always initialize "result".
Minor maintenance.
* config/tc-mn10200.c (md_assemble): Generate relocations.
mn10200 has relocs now!
* config/obj-elf.c (elf_file_symbol): When using ECOFF debugging,
pass on the new file hook.
* config/tc-alpha.c (alpha_fix_adjustable): Not quite the same as
!alpha_force_relocation, as local LITERALs can be adjusted to be
relative to the section.
immediate value.
(md_assemble): If the size is 'B', set fx_signed.
(md_apply_fix_2): Use fx_signed when checking for overflow.
* write.h (struct fix): Add fx_signed field.
* write.c (fix_new_internal): Initialize fx_no_overflow and
fx_signed fields.
(fixup_segment): Use fx_signed when checking for overflow.
* config/obj-coff.c (fixup_segment): Check fx_no_overflow and
fx_signed when checking for overflow.
* config/tc-m68k.c (m68k_index_width_default): New static
variable.
(m68k_ip): Use m68k_index_width_default to set the size of a base
register whose size was not given.
(md_longopts): Add --base-size-default-16 and
--base-size-default-32.
(md_parse_option): Handle new options.
(md_show_usage): Mention new options.
* doc/c-m68k.texi (M68K-Opts): Document new options.
includes config.h instead of host.h, tc.h instead of tp.h, and
targ-env.h instead of target-environment.h.
Also, obj-format.h includes targ-cpu.h instead of
target-processor.h.
start-sanitize-tic80
(Laying groundwork, that will be incrementally fleshed out,
for TIc80 support)
* configure.in (case ${generic_target}): Add tic80-*-coff entry.
* configure: Rebuild with autoconf.
* config/obj-coff.h (coff/tic80.h): Include if TC_TIC80 defined.
(TARGET_FORMAT): Define to "coff-tic80".
* config/tc-tic80.c: New file for TIc80 support.
* config/tc-tic80.h: New file for TIc80 support.
end-sanitize-tic80
(struct insn_label_list): Define.
(insn_labels, free_insn_labels): New static variables.
(mips_clear_insn_labels): New static function.
(append_insn): Mark all mips16 text labels, and make them odd.
Handle all labels after emitting a nop, not just one. Call
mips_clear_insn_labels rather than just clearing insn_label.
(mips_emit_delays): Add insns parameter, and use it to decide
whether to mark mips16 labels. Handle all labels, not just one.
Force mips16 labels to be odd. Change all callers.
(mips16_immed): Don't check for an odd branch target.
(md_apply_fix): Don't check mips16 mode for a branch reloc.
(mips16_extended_frag): Ignore the low bit in a branch target.
(md_convert_frag): Likewise.
(mips_no_prev_insn): Call mips_clear_insn_labels rather than just
clearing insn_label.
(mips_align, mips_flush_pending_output, s_cons): Likewise.
(s_float_cons, s_gpword): Likewise.
(s_align): Use insn_labels rather than insn_label.
(s_cons, s_float_cons, s_gpword): Likewise.
(mips_frob_file_after_relocs): New function.
(mips_define_label): Rewrite to add to insn_labels list.
* config/tc-mips.h (tc_frob_file_after_relocs): Define.
* ecoff.c (ecoff_build_symbols): If the size of a function comes
out odd, increment it.
(RELAX_MIPS16_ENCODE): Add dslot and jal_dslot arguments, and
store them. Adjust other RELAX_MIPS16 macros.
(RELAX_MIPS16_DSLOT): Define.
(RELAX_MIPS16_JAL_DSLOT): Define.
(append_insn): Pass new arguments to RELAX_MIPS16_ENCODE. Correct
handling of whether previous instruction has a fixup. Set
prev_insn_reloc_type.
(mips_no_prev_insn): Clear prev_insn_reloc_type.
(mips16_extended_frag): Use the right base address for a PC
relative add or load.
(md_convert_frag): Likewise. If a PC relative add or load is
used, record the alignment for the section.
system, don't set the section alignment to 2**4.
(s_change_sec): Likewise.
(append_insn): Call record_alignment for the section.
(md_section_align): Don't align the section size for an embedded
ELF system.
arguments, and store them. Adjust other RELAX_MIPS16 macros.
(RELAX_MIPS16_USER_SMALL): Define.
(RELAX_MIPS16_USER_EXT): Define.
(mips16_small, mips16_ext): New static variables.
(append_insn): Pass mips16_small and mips16_ext to
RELAX_MIPS16_ENCODE.
(mips16_ip): Set mips16_small and mips16_ext.
(mips16_immed): Don't check mips16_autoextend.
(mips16_extended_frag): Check USER_SMALL and USER_EXT.
* config/tc-d10v.c (md_assemble): Check to see if prev_seg
is initialized before using it.
(d10v_cleanup): No longer uses its argument, so make it void.
* config/tc-d10v.h (d10v_cleanup): Change prototype.
(tc_fix_adjustable): Don't adjust relocs against weak symbols or
pc-relative relocs.
* config/tc-mn10300.c (md_begin): Set linkrelax.
(md_assemble): Create fixups as needed.
(md_apply_fix3): Gut. It shouldn't ever get called anymore.
First stab at fixups/relocs.
the extension part of the instruction if necessary.
(mn10300_insert_operand): Accept pointer to extension word
argument. Make insn a pointer argument too. Return type
is now void. All callers changed.
So we can correct insert operands into any instruction except those
which have 32bit operands.
* config/tc-v850.c: Fix some indention problems.
(md_relax_table): Define for D9->D99 branch displacement
relaxing.
(md_convert_frag): Do something useful instead of aborting.
(md_estimate_size_before_relax): Likewise.
(md_assemble): Note if the matching instruction has a relaxable
operand. If it does, allocate frag with frag_var and don't
do any fixups.
So we can do 9bit displacement to 22bit displacement relaxing.
hacks to improve parsing of complex hi, lo, zda, etc
expressions.
(md_assemble): Don't demand and eat a trailing ')' after finding
a v850 relocation prefix. Sign extend the constant in a
BFD_RELOC_LO16 expression. Do eat a trailing ')' after a complete
operand.
(parse_cons_expression_v850): Don't eat a trailing ')' after
finding a v850 relocation prefix.
Trying to get nec's sample code to assemble. Why oh why didn't JT try
to assemble any of their code...
