Wed Dec 4 15:42:41 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* tc-d10v.c (md_assemble, d10v_cleanup): Fix bug with multiple sections.
This commit is contained in:
Martin Hunt
parent
996bee906f
commit
fa1e3be84c
1 changed files with 17 additions and 53 deletions
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@ -75,8 +75,8 @@ static unsigned long do_assemble PARAMS ((char *str, struct d10v_opcode **opcode
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static unsigned long d10v_insert_operand PARAMS (( unsigned long insn, int op_type,
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offsetT value, int left, fixS *fix));
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static int parallel_ok PARAMS ((struct d10v_opcode *opcode1, unsigned long insn1,
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struct d10v_opcode *opcode2, unsigned long insn2));
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struct d10v_opcode *opcode2, unsigned long insn2,
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int exec_type));
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struct option md_longopts[] = {
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{NULL, no_argument, NULL, 0}
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@ -279,7 +279,6 @@ md_convert_frag (abfd, sec, fragP)
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asection *sec;
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fragS *fragP;
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{
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printf ("call to md_convert_frag \n");
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abort ();
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}
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@ -354,7 +353,6 @@ get_reloc (op)
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{
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int bits = op->bits;
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/* printf("get_reloc: bits=%d address=%d\n",bits,op->flags & OPERAND_ADDR); */
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if (bits <= 4)
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return (0);
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@ -532,12 +530,6 @@ build_insn (opcode, opers, insn)
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{
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/* now create a fixup */
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/*
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printf("need a fixup: ");
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print_expr_1(stdout,&opers[i]);
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printf("\n");
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*/
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if (fixups->fc >= MAX_INSN_FIXUPS)
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as_fatal ("too many fixups");
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@ -588,7 +580,6 @@ write_long (opcode, insn, fx)
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char *f = frag_more(4);
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insn |= FM11;
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/* printf("INSN: %08x\n",insn); */
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number_to_chars_bigendian (f, insn, 4);
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for (i=0; i < fx->fc; i++)
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@ -598,11 +589,6 @@ write_long (opcode, insn, fx)
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where = f - frag_now->fr_literal;
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if (fx->fix[i].size == 2)
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where += 2;
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/*
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printf("fix_new_exp: where:%x size:%d\n ",where,fx->fix[i].size);
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print_expr_1(stdout,&(fx->fix[i].exp));
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printf("\n");
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*/
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if (fx->fix[i].reloc == BFD_RELOC_D10V_18)
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fx->fix[i].operand |= 4096;
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@ -640,7 +626,6 @@ write_1_short (opcode, insn, fx)
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else
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insn = FM00 | (insn << 15) | NOP; /* left container */
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/* printf("INSN: %08x\n",insn); */
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number_to_chars_bigendian (f, insn, 4);
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for (i=0; i < fx->fc; i++)
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{
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@ -650,12 +635,6 @@ write_1_short (opcode, insn, fx)
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if (fx->fix[i].size == 2)
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where += 2;
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/*
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printf("fix_new_exp: where:%x size:%d\n ",where, fx->fix[i].size);
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print_expr_1(stdout,&(fx->fix[i].exp));
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printf("\n");
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*/
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if (fx->fix[i].reloc == BFD_RELOC_D10V_18)
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fx->fix[i].operand |= 4096;
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@ -705,7 +684,7 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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switch (exec_type)
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{
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case 0: /* order not specified */
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if ( Optimizing && parallel_ok (opcode1, insn1, opcode2, insn2))
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if ( Optimizing && parallel_ok (opcode1, insn1, opcode2, insn2, exec_type))
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{
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/* parallel */
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if (opcode1->unit == IU)
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@ -734,7 +713,7 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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if (opcode1->exec_type & SEQ || opcode2->exec_type & SEQ)
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as_fatal ("One of these instructions may not be executed in parallel.");
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if ( !parallel_ok (opcode1, insn1, opcode2, insn2)
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if ( !parallel_ok (opcode1, insn1, opcode2, insn2, exec_type)
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&& (opcode1->exec_type & PARONLY) == 0
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&& (opcode2->exec_type & PARONLY) == 0)
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as_fatal ("Two instructions may not be executed in parallel with each other.");
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@ -775,7 +754,6 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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as_fatal("unknown execution type passed to write_2_short()");
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}
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/* printf("INSN: %08x\n",insn); */
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f = frag_more(4);
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number_to_chars_bigendian (f, insn, 4);
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@ -795,12 +773,6 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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if (fx->fix[i].reloc == BFD_RELOC_D10V_18)
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fx->fix[i].operand |= 4096;
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/*
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printf("fix_new_exp: where:%x reloc:%d\n ",where,fx->fix[i].operand);
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print_expr_1(stdout,&(fx->fix[i].exp));
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printf("\n");
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*/
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fix_new_exp (frag_now,
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where,
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fx->fix[i].size,
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@ -819,9 +791,10 @@ write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
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/* Check 2 instructions and determine if they can be safely */
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/* executed in parallel. Returns 1 if they can be. */
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static int
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parallel_ok (op1, insn1, op2, insn2)
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parallel_ok (op1, insn1, op2, insn2, exec_type)
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struct d10v_opcode *op1, *op2;
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unsigned long insn1, insn2;
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int exec_type;
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{
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int i, j, flags, mask, shift, regno;
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unsigned long ins, mod[2], used[2];
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@ -834,6 +807,11 @@ parallel_ok (op1, insn1, op2, insn2)
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|| (op1->unit == MU && op2->unit == MU))
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return 0;
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/* If the first instruction is a branch and this is auto parallazation,
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don't combine with any second instruction. */
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if (exec_type == 0 && (op1->exec_type & BRANCH) != 0)
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return 0;
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/* The idea here is to create two sets of bitmasks (mod and used) */
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/* which indicate which registers are modified or used by each instruction. */
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/* The operation can only be done in parallel if instruction 1 and instruction 2 */
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@ -939,8 +917,6 @@ md_assemble (str)
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static int etype=0; /* saved extype. used for multiline instructions */
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char *str2;
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/* printf("md_assemble: str=%s\n",str); */
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if (etype == 0)
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{
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/* look for the special multiple instruction separators */
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@ -966,8 +942,7 @@ md_assemble (str)
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/* if two instructions are present and we already have one saved
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then first write it out */
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if (prev_opcode)
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write_1_short (prev_opcode, prev_insn, fixups->next);
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d10v_cleanup(0);
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/* assemble first instruction and save it */
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prev_insn = do_assemble (str, &prev_opcode);
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@ -1000,16 +975,15 @@ md_assemble (str)
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{
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if (extype)
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as_fatal("Unable to mix instructions as specified");
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if (prev_opcode)
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{
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write_1_short (prev_opcode, prev_insn, fixups->next);
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prev_opcode = NULL;
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}
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d10v_cleanup(0);
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write_long (opcode, insn, fixups);
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prev_opcode = NULL;
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return;
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}
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if (prev_opcode && ((prev_seg != now_seg) || (prev_subseg != now_subseg)))
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d10v_cleanup(0);
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if (prev_opcode && (write_2_short (prev_opcode, prev_insn, opcode, insn, extype, fixups) == 0))
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{
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/* no instructions saved */
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@ -1044,8 +1018,6 @@ do_assemble (str, opcode)
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expressionS myops[6];
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unsigned long insn;
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/* printf("do_assemble: str=%s\n",str); */
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/* Drop leading whitespace */
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while (*str == ' ')
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str++;
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@ -1078,7 +1050,6 @@ do_assemble (str, opcode)
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input_line_pointer = save;
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insn = build_insn ((*opcode), myops, 0);
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/* printf("sub-insn = %lx\n",insn); */
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return (insn);
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}
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@ -1270,7 +1241,6 @@ tc_gen_reloc (seg, fixp)
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return NULL;
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}
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reloc->addend = fixp->fx_addnumber;
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/* printf("tc_gen_reloc: addr=%x addend=%x\n", reloc->address, reloc->addend); */
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return reloc;
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}
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@ -1290,7 +1260,6 @@ md_pcrel_from_section (fixp, sec)
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{
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if (fixp->fx_addsy != (symbolS *)NULL && !S_IS_DEFINED (fixp->fx_addsy))
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return 0;
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/* printf("pcrel_from_section: %x\n", fixp->fx_frag->fr_address + fixp->fx_where); */
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return fixp->fx_frag->fr_address + fixp->fx_where;
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}
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@ -1329,8 +1298,6 @@ md_apply_fix3 (fixp, valuep, seg)
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}
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}
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/* printf("md_apply_fix: value=0x%x type=0x%x where=0x%x size=%d line=%d\n", value, fixp->fx_r_type,fixp->fx_where,fixp->fx_size, fixp->fx_line); */
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op_type = fixp->fx_r_type;
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if (op_type & 2048)
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{
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@ -1367,9 +1334,7 @@ md_apply_fix3 (fixp, valuep, seg)
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bfd_putb16 ((bfd_vma) value, (unsigned char *) where);
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else
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{
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/* printf(" insn=%x value=%x where=%x pcrel=%x\n",insn,value,fixp->fx_where,fixp->fx_pcrel); */
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insn = d10v_insert_operand (insn, op_type, (offsetT)value, left, fixp);
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/* printf(" new insn=%x\n",insn); */
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bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
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}
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break;
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@ -1385,7 +1350,6 @@ md_apply_fix3 (fixp, valuep, seg)
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return 0;
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}
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/* d10v_cleanup() is called after the assembler has finished parsing the input
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file or after a label is defined. Because the D10V assembler sometimes saves short
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instructions to see if it can package them with the next instruction, there may
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@ -1397,7 +1361,7 @@ d10v_cleanup (done)
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segT seg;
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subsegT subseg;
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if ( prev_opcode && (done || (now_seg == prev_seg) && (now_subseg == prev_subseg)))
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if (prev_opcode)
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{
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seg = now_seg;
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subseg = now_subseg;
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