* mips-tdep.c (mips_xfer_register): New function.
(mips_n32n64_extract_return_value): Rewrite.
(mips_gdbarch_init): For N32 and N64, set extract_return_value
instead of deprecated_extract_return_value.
From matthew green <mrg@redhat.com>
* config/tc-ppc.c (PPC_OPCODE_CLASSIC): Enable this everywhere
PPC_OPCODE_PPC is, except for BookE architectures.
(md_parse_option): Add support for -mspe.
(md_show_usage): Add -mspe.
(md_parse_option): Add support for -me500 and
-me500x2 to generate code for Motorola e500 core complex.
(md_show_usage): Add -me500 and -me500x2.
(PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI,
PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS,
PPC_APUINFO_BRLOCK): New macros.
(ppc_cleanup): New function.
(ppc_apuinfo_section_add): New function.
(APUID): New macro.
(md_assemble): Collect info and write the APUinfo section.
* config/tc-ppc.h (md_cleanup): Define.
(ppc_cleanup): Export.
(ELF_TC_SPECIAL_SECTIONS): Add .PPC.EMB.apuinfo section.
From matthew green <mrg@redhat.com>
* ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
instructions.
(PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
e500x2 Integer select, branch locking, performance monitor,
cache locking and machine check APUs, respectively.
(PPC_OPCODE_EFS): New opcode type for efs* instructions.
(PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
conditionally.
(JB_PC, JB_ELEMENT_SIZE): Rename to MIPS_LINUX_JB_PC and
MIPS_LINUX_JB_ELEMENT_SIZE.
* mips-linux-tdep.c (supply_gregset, fill_gregset): Use alloca
for MAX_REGISTER_RAW_SIZE arrays.
(mips_linux_get_longjmp_target): Use MIPS_LINUX_JB_PC and
MIPS_LINUX_JB_ELEMENT_SIZE.
(TM_FILE): Set to tm-i386.h.
* config/i386/i386v.mt (TM_FILE): Set to tm-i386.h.
* config/i386/tm-i386v.h: Remove file.
* config/i386/tm-ptx.h [!SEQUENT_PTX4]: Include "i386/tm-i386.h"
instead of "i386/tm-i386v.h".
(START_INFERIOR_TRAPS_EXPECTED): Remove define.
* config/i386/tm-symmetry: Include "i386/tm-i386.h" instead of
"i386/tm-i386v.h".
(START_INFERIOR_TRAPS_EXPECTED): Remove define.
* config/i386/tm-vxworks.h: Include "i386/tm-i386.h" instead of
"i386/tm-i386.h".
multiple-inclusion.
(i386_register_u_addr): Remove prototype.
(register_u_addr): New prototype.
(REGISTER_U_ADDR): Redefine accordingly.
* i386v-nat.c: Improve several comments.
(i386_register_u_addr): Change signature and rename to
register_u_addr. Use FP_REGNUM_P. Rewrite slightly to get rid of
ubase variable.
* ada-lang.h: run through gdb_indent.sh
* ada-tasks.c: run through gdb_indent.sh
* ada-typeprint.c: run through gdb_indent.sh
* ada-valprint.c: run through gdb_indent.sh
* config/ia64/ia64.mt: New file.
* config/alpha/alpha.mt: New file.
* MAINTAINERS: Change the alpha target to alpha-elf and IA-64 to
ia64-linux-gnu. Mention that ia64-elf is broken.
* configure.tgt: Add alpha*-*-* and ia64*-*-* patterns.
* config/ia64/ia64.mt: New file.
* config/alpha/alpha.mt: New file.
* MAINTAINERS: Change the alpha target to alpha-elf and IA-64 to
ia64-linux-gnu. Mention that ia64-elf is broken.
* configure.tgt: Add alpha*-*-* and ia64*-*-* patterns.
procfs appears to be broken when debugging on multi-processor
machines. So enable software single stepping in order to avoid
using the procfs interface to do next/step operations, using
internal breakpoints instead.
* infrun.c (handle_inferior_event): Readjust the stop_pc by
DECR_PC_AFTER_BREAK when hitting a single step breakpoint, to
make this pc address equal to the value it would have if the
system stepping capability was used. Also set a new flag used
to ensure that we don't readjust the PC one more time later.
* breakpoint.c (bpstat_stop_status): Do not adjust the PC
address by DECR_PC_AFTER_BREAK when software single step is
in use for this architecture, as this has already been taken
care of in handle_inferior_event().
