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Author SHA1 Message Date
Nick Clifton
13761a1136 * archures.c: Add some more MSP430 machine numbers. 
* config.bfd (msp430): Define targ_selvecs.
	* configure.in: Add bfd_elf32_msp430_ti_vec.
	* cpu-msp430.c: Add some more MSP430 machine numbers.
	* elf32-msp430.c Add support for MSP430X relocations.
	Add support for TI compiler generated relocations.
	Add support for sym_diff relocations.
	Add support for relaxing out of range short branches into long
	branches.
	Add support for MSP430 attribute section.
	* reloc.c: Add MSP430X relocations.
	* targets.c: Add bfd_elf32_msp430_ti_vec.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.

	* readelf.c: Add support for MSP430X architecture.

	* readelf.exp: Expect -wi test to fail for the MSP430.

	* config/tc-msp430.c: Add support for the MSP430X architecture.
	Add code to insert a NOP instruction after any instruction that
	might change the interrupt state.
	Add support for the LARGE memory model.
	Add code to initialise the .MSP430.attributes section.
	* config/tc-msp430.h: Add support for the MSP430X architecture.
	* doc/c-msp430.texi: Document the new -mL and -mN command line
	options.
	* NEWS: Mention support for the MSP430X architecture.

	* gas/all/gas.exp: Skip the DIFF1 test for the MSP430.
	Expect the FORWARD test to pass for the MSP430.
	Skip the REDEF tests for the MSP430.
	Expect the 930509A test to fail for the MSP430.
	* gas/all/sleb128-4.d: Skip for the MSP430.
	* gas/elf/elf.exp: Set target_machine to msp430 for the MSP430.
	Skip the EHOPT0 test for the MSP430.
	Skip the REDEF and EQU-RELOC tests for the MSP430.
	* gas/elf/section2.e-msp430: New file.
	* gas/lns/lns-big-delta.d: Remove expectation of 20-bit
	addresses.
	* gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430.
	* gas/msp430/msp430x.s: New test.
	* gas/msp430/msp430x.d: Expected disassembly.
	* gas/msp430/msp430.exp: Run new test.
	* gas/msp430/opcode.d: Update expected disassembly.

	* msp430.h: Add MSP430X relocs.
	Add some more MSP430 machine numbers.
	Add values used by .MSP430.attributes section.

	* msp430.h: Add patterns for MSP430X instructions.

	* Makefile.am: Add emsp430X.c
	* Makefine.in: Regenerate.
	* configure.tgt (msp430): Add msp430X emulation.
	* ldmain.c (multiple_definition): Only disable relaxation if it
	was enabled by the user.
	* ldmain.h (RELAXATION_ENABLED_BY_USER): New macro.
	* emulparams/msp430all.sh: Add support for MSP430X.
	* emultempl/generic.em: (before_parse): Enable relaxation for the
	MSP430.
	* scripttempl/msp430.sc: Reorganize sections.  Add .rodata
	section.
	* scripttempl/msp430_3.sc: Likewise.
	* NEWS: Mention support for MSP430X.

	* ld-elf/flags1.d: Expect this test to pass on the MSP430.
	* ld-elf/init-fini-arrays.d: Expect this test to fail on the
	MSP430.
	* ld-elf/merge.d: Expect this test to pass on the MSP430.
	* ld-elf/sec64k.exp: Skip these tests for the MSP430.
	* ld-gc/pr13683.d: Expect this test to fail on the MSP430.
	* ld-srec/srec.exp: Expect these tests to fail on the MSP430.
	* ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to
	fail on the MSP430.

	* msp430-dis.c: Add support for MSP430X instructions.
 2013-05-02 21:06:15 +00:00
Nick Clifton
81f5558e3d * elf32-h8300 (h8_relax_section): Add new relaxation of mov 
@(disp:32,ERx) to mov @(disp:16,ERx).
	(R_H8_DISP32A16): New reloc.
	Comments added and corrected.
	* reloc.c (BFD_RELOC_H8_DISP32A16): New reloc.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

	* ld.texinfo (H8/300): Add description of relaxation of
	mov @(disp:32,ERx) to mov @(disp:16,ERx).

	* ld-h8300/h8300.exp: Add new relax-7 test on ELF.
	* ld-h8300/relax-2.s: Add other direction and .w/.l variants of
	mov insns.
	* ld-h8300/relax-2.d: Update expected disassembly.
	* ld-h8300/relax-7a.s: New: tests for mov @(disp:32,ERx) -> mov
	@(disp:16,ERx).
	* ld-h8300/relax-7b.s: New: Likewise.
	* ld-h8300/relax-7.d: New: expected disassembly.

	* config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
	@(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
	R_H8_DISP32A16.
	* config/tc-h8300.h: Remove duplicated defines.
 2013-03-21 16:08:07 +00:00
Nick Clifton
abb3f6cca7 * elf-bfd.h (elfcore_write_s390_tdb): Add prototype. 
* elf.c (elfcore_write_s390_tdb): New function.
	(elfcore_write_register_note): Call it.
	(elfcore_grok_s390_tdb): New function.
	(elfcore_grok_note): Call it.

	* readelf.c (get_note_type): Add NT_S390_TDB.
 2013-03-08 17:13:31 +00:00
Sandra Loosemore
36591ba149 2013-02-06 Sandra Loosemore <sandra@codesourcery.com> 
Andrew Jenner <andrew@codesourcery.com>

	Based on patches from Altera Corporation.

	bfd/
	* Makefile.am (ALL_MACHINES): Add cpu-nios2.lo.
	(ALL_MACHINES_CFILES): Add cpu-nios2.c.
	(BFD_BACKENDS): Add elf32-nios2.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-nios2.c.
	* Makefile.in: Regenerated.
	* configure.in: Add entries for bfd_elf32_bignios2_vec and
	bfd_elf32_littlenios2_vec.
	* configure: Regenerated.
	* config.bfd: Add cases for nios2.
	* archures.c (enum bfd_architecture): Add bfd_arch_nios2.
	(bfd_mach_nios2): Define.
	(bfd_nios2_arch): Declare.
	(bfd_archures_list): Add bfd_nios2_arch.
	* targets.c (bfd_elf32_bignios2_vec): Declare.
	(bfd_elf32_littlenios2_vec): Declare.
	(_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and
	bfd_elf32_littlenios2_vec.
	* elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA.
	* reloc.c (enum bfd_reloc_code_real): Add Nios II relocations.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Regenerated.
	* cpu-nios2.c: New file.
	* elf32-nios2.c: New file.

	opcodes/
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and
	nios2-opc.c.
	* Makefile.in: Regenerated.
	* configure.in: Add case for bfd_nios2_arch.
	* configure: Regenerated.
	* disassemble.c (ARCH_nios2): Define.
	(disassembler): Add case for bfd_arch_nios2.
	* nios2-dis.c: New file.
	* nios2-opc.c: New file.

	include/
	* dis-asm.h (print_insn_big_nios2): Declare.
	(print_insn_little_nios2): Declare.

	include/elf
	* nios2.h: New file.

	include/opcode/
	* nios2.h: New file.

	gas/
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
	(TARGET_CPU_HFILES): Add config/tc-nios2.h.
	* Makefile.in: Regenerated.
	* configure.tgt: Add case for nios2*-linux*.
	* config/obj-elf.c: Conditionally include elf/nios2.h.
	* config/tc-nios2.c: New file.
	* config/tc-nios2.h: New file.
	* doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
	* doc/Makefile.in: Regenerated.
	* doc/all.texi: Set NIOSII.
	* doc/as.texinfo (Overview): Add Nios II options.
	(Machine Dependencies): Include c-nios2.texi.
	* doc/c-nios2.texi: New file.
	* NEWS: Note Altera Nios II support.

	gas/testsuite/
	* gas/nios2/add.d: New.
	* gas/nios2/add.s: New.
	* gas/nios2/align_fill.d: New.
	* gas/nios2/align_fill.s: New.
	* gas/nios2/align_text.d: New.
	* gas/nios2/align_text.s: New.
	* gas/nios2/and.d: New.
	* gas/nios2/and.s: New.
	* gas/nios2/branch.d: New.
	* gas/nios2/branch.s: New.
	* gas/nios2/break.d: New.
	* gas/nios2/break.s: New.
	* gas/nios2/bret.d: New.
	* gas/nios2/bret.s: New.
	* gas/nios2/cache.d: New.
	* gas/nios2/cache.s: New.
	* gas/nios2/call26.d: New.
	* gas/nios2/call26.s: New.
	* gas/nios2/call.d: New.
	* gas/nios2/call.s: New.
	* gas/nios2/cmp.d: New.
	* gas/nios2/cmp.s: New.
	* gas/nios2/comments.d: New.
	* gas/nios2/comments.s: New.
	* gas/nios2/complex.d: New.
	* gas/nios2/complex.s: New.
	* gas/nios2/ctl.d: New.
	* gas/nios2/ctl.s: New.
	* gas/nios2/custom.d: New.
	* gas/nios2/custom.s: New.
	* gas/nios2/etbt.d: New.
	* gas/nios2/etbt.s: New.
	* gas/nios2/flushda.d: New.
	* gas/nios2/flushda.s: New.
	* gas/nios2/illegal.l: New.
	* gas/nios2/illegal.s: New.
	* gas/nios2/jmp.d: New.
	* gas/nios2/jmp.s: New.
	* gas/nios2/ldb.d: New.
	* gas/nios2/ldb.s: New.
	* gas/nios2/ldh.d: New.
	* gas/nios2/ldh.s: New.
	* gas/nios2/ldw.d: New.
	* gas/nios2/ldw.s: New.
	* gas/nios2/lineseparator.d: New.
	* gas/nios2/lineseparator.s: New.
	* gas/nios2/mov.d: New.
	* gas/nios2/movia.d: New.
	* gas/nios2/movia.s: New.
	* gas/nios2/movi.d: New.
	* gas/nios2/movi.s: New.
	* gas/nios2/mov.s: New.
	* gas/nios2/mul.d: New.
	* gas/nios2/mul.s: New.
	* gas/nios2/nios2.exp: New.
	* gas/nios2/nor.d: New.
	* gas/nios2/nor.s: New.
	* gas/nios2/or.d: New.
	* gas/nios2/or.s: New.
	* gas/nios2/ret.d: New.
	* gas/nios2/ret.s: New.
	* gas/nios2/rol.d: New.
	* gas/nios2/rol.s: New.
	* gas/nios2/rotate.d: New.
	* gas/nios2/rotate.s: New.
	* gas/nios2/stb.d: New.
	* gas/nios2/stb.s: New.
	* gas/nios2/sth.d: New.
	* gas/nios2/sth.s: New.
	* gas/nios2/stw.d: New.
	* gas/nios2/stw.s: New.
	* gas/nios2/sub.d: New.
	* gas/nios2/sub.s: New.
	* gas/nios2/sync.d: New.
	* gas/nios2/sync.s: New.
	* gas/nios2/trap.d: New.
	* gas/nios2/trap.s: New.
	* gas/nios2/tret.d: New.
	* gas/nios2/tret.s: New.
	* gas/nios2/warn_noat.l: New.
	* gas/nios2/warn_noat.s: New.
	* gas/nios2/warn_nobreak.l: New.
	* gas/nios2/warn_nobreak.s: New.
	* gas/nios2/xor.d: New.
	* gas/nios2/xor.s: New.

	ld/
	* Makefile.am (enios2elf.c): New rule.
	* Makefile.in: Regenerated.
	* configure.tgt: Add case for nios2*-*-*.
	* emulparams/nios2elf.sh: New file.
	* NEWS: Note Altera Nios II support.

	ld/testsuite/
	* ld-nios2/emit-relocs-1a.s: New.
	* ld-nios2/emit-relocs-1b.s: New.
	* ld-nios2/emit-relocs-1.d: New.
	* ld-nios2/emit-relocs-1.ld: New.
	* ld-nios2/gprel.d: New.
	* ld-nios2/gprel.s: New.
	* ld-nios2/hilo16.d: New.
	* ld-nios2/hilo16.s: New.
	* ld-nios2/hilo16_symbol.s: New.
	* ld-nios2/imm5.d: New.
	* ld-nios2/imm5.s: New.
	* ld-nios2/imm5_symbol.s: New.
	* ld-nios2/nios2.exp: New.
	* ld-nios2/pcrel16.d: New.
	* ld-nios2/pcrel16_label.s: New.
	* ld-nios2/pcrel16.s: New.
	* ld-nios2/relax_callr.d: New.
	* ld-nios2/relax_callr.ld: New.
	* ld-nios2/relax_callr.s: New.
	* ld-nios2/relax_cjmp.d: New.
	* ld-nios2/relax_cjmp.s: New.
	* ld-nios2/relax_jmp.ld: New.
	* ld-nios2/relax_section.d: New.
	* ld-nios2/relax_section.s: New.
	* ld-nios2/relax_ujmp.d: New.
	* ld-nios2/relax_ujmp.s: New.
	* ld-nios2/reloc.d: New.
	* ld-nios2/reloc.s: New.
	* ld-nios2/reloc_symbol.s: New.
	* ld-nios2/s16.d: New.
	* ld-nios2/s16.s: New.
	* ld-nios2/s16_symbol.s: New.
	* ld-nios2/u16.d: New.
	* ld-nios2/u16.s: New.
	* ld-nios2/u16_symbol.s: New.
	* ld-elf/indirect.exp: Skip on targets that don't support
	-shared -fPIC.
	* ld-elfcomm/elfcomm.exp: Build with -G0 for nios2.
	* ld-plugin/lto.exp: Skip shared library tests on targets that
	don't support them.  Skip execution tests on non-native targets.

	binutils/
	* readelf.c: Include elf/nios2.h.
	(dump_relocations): Add case for EM_ALTERA_NIOS2.
	(get_nios2_dynamic_type): New.
	(get_dynamic_type): Add case for EM_ALTERA_NIOS2.
	(is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases.
	* NEWS: Note Altera Nios II support.
	* MAINTAINERS: Add Nios II maintainers.
 2013-02-06 23:22:26 +00:00
Nick Clifton
78c8d46ca4 Add support for V850E3V5 architecture 2013-01-24 11:14:05 +00:00
H.J. Lu
e1ec603fec Define R_386_SIZE32/R_X86_64_SIZE32/R_X86_64_SIZE64 
* i386.h (R_386_SIZE32): Fill it.
	* x86-64.h (R_X86_64_SIZE32): Likewise.
	(R_X86_64_SIZE64): Likewise.
 2013-01-16 20:31:57 +00:00
Nick Clifton
a3c629886c * common.h: Fix case of "Meta". 
* metag.h: New file.

	* dis-asm.h (print_insn_metag): New declaration.

	* metag.h: New file.

	* Makefile.am: Add Meta.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* configure.in: Add Meta.
	* disassemble.c: Add Meta support.
	* metag-dis.c: New file.

	* Makefile.am: Add Meta.
	* Makefile.in: Regenerate.
	* archures.c (bfd_mach_metag): New.
	* bfd-in2.h: Regenerate.
	* config.bfd: Add Meta.
	* configure: Regenerate.
	* configure.in: Add Meta.
	* cpu-metag.c: New file.
	* elf-bfd.h: Add Meta.
	* elf32-metag.c: New file.
	* elf32-metag.h: New file.
	* libbfd.h: Regenerate.
	* reloc.c: Add Meta relocations.
	* targets.c: Add Meta.

	* Makefile.am: Add Meta.
	* Makefile.in: Regenerate.
	* config/tc-metag.c: New file.
	* config/tc-metag.h: New file.
	* configure.tgt: Add Meta.
	* doc/Makefile.am: Add Meta.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi: Add Meta.
	* doc/as.texiinfo: Document Meta options.
	* doc/c-metag.texi: New file.

	* gas/metag/labelarithmetic.d: New file.
	* gas/metag/labelarithmetic.s: New file.
	* gas/metag/metacore12.d: New file.
	* gas/metag/metacore12.s: New file.
	* gas/metag/metacore21-invalid.l: New file.
	* gas/metag/metacore21-invalid.s: New file.
	* gas/metag/metacore21.d: New file.
	* gas/metag/metacore21.s: New file.
	* gas/metag/metacore21ext.d: New file.
	* gas/metag/metacore21ext.s: New file.
	* gas/metag/metadsp21-invalid.l: New file.
	* gas/metag/metadsp21-invalid.s: New file.
	* gas/metag/metadsp21.d: New file.
	* gas/metag/metadsp21.s: New file.
	* gas/metag/metadsp21ext.d: New file.
	* gas/metag/metadsp21ext.s: New file.
	* gas/metag/metafpu21.d: New file.
	* gas/metag/metafpu21.s: New file.
	* gas/metag/metafpu21ext.d: New file.
	* gas/metag/metafpu21ext.s: New file.
	* gas/metag/metag.exp: New file.
	* gas/metag/tls.d: New file.
	* gas/metag/tls.s: New file.

	* Makefile.am: Add Meta.
	* Makefile.in: Regenerate.
	* configure.tgt: Add Meta.
	* emulparams/elf32metag.sh: New file.
	* emultempl/metagelf.em: New file.

	* ld-elf/merge.d: Mark Meta as xfail.
	* ld-gc/start.d: Skip this test on Meta.
	* ld-gc/personality.d: Skip this test on Meta.
	* ld-metag/external.s: New file.
	* ld-metag/metag.exp: New file.
	* ld-metag/pcrel.d: New file.
	* ld-metag/pcrel.s: New file.
	* ld-metag/shared.d: New file.
	* ld-metag/shared.r: New file.
	* ld-metag/shared.s: New file.
	* ld-metag/stub.d: New file.
	* ld-metag/stub.s: New file.
	* ld-metag/stub_pic_app.d: New file.
	* ld-metag/stub_pic_app.r: New file.
	* ld-metag/stub_pic_app.s: New file.
	* ld-metag/stub_pic_shared.d: New file.
	* ld-metag/stub_pic_shared.s: New file.
	* ld-metag/stub_shared.d: New file.
	* ld-metag/stub_shared.r: New file.
	* ld-metag/stub_shared.s: New file.

	* binutils/readelf.c: (guess_is_rela): Add EM_METAG.
	(dump_relocations): Add EM_METAG.
	(get_machine_name): Correct case for Meta.
	(is_32bit_abs_reloc): Add support for Meta ADDR32 reloc.
	(is_none_reloc): Add support for Meta NONE reloc.
 2013-01-10 09:49:22 +00:00
Yufeng Zhang
652451f8f2 include/elf/ 
2013-01-08  Yufeng Zhang  <yufeng.zhang@arm.com>

	* common.h (NT_ARM_TLS, NT_ARM_HW_BREAK, NT_ARM_HW_WATCH): New macro
	definitions.

bfd/

2013-01-08  Yufeng Zhang  <yufeng.zhang@arm.com>

	* elf-bfd.h (elfcore_write_aarch_tls): Add prototype.
	(elfcore_write_aarch_hw_break): Likewise.
	(elfcore_write_aarch_hw_watch): Likewise.
	* elf.c (elfcore_grok_aarch_tls): New function.
	(elfcore_grok_aarch_hw_break): Likewise.
	(elfcore_grok_aarch_hw_watch): Likewise.
	(elfcore_grok_note): Call the new functions to handle the
	corresponding notes.
	(elfcore_write_aarch_tls): New function.
	(elfcore_write_aarch_hw_break): Likewise.
	(elfcore_write_aarch_hw_watch): Likewise.
	(elfcore_write_register_note): Call the new functions to handle the
	corresponding pseudo sections.

binutils/

2013-01-08  Yufeng Zhang  <yufeng.zhang@arm.com>

	* readelf.c (get_note_type): Handle NT_ARM_TLS, NT_ARM_HW_BREAK
	and NT_ARM_HW_WATCH.
 2013-01-08 18:09:12 +00:00
Nick Clifton
e407c74b5b * archures.c: Add support for MIPS r5900 
* bfd-in2.h: Add support for MIPS r5900
	* config.bfd: Add support for Sony Playstation 2
	* cpu-mips.c: Add support for MIPS r5900
	* elfxx-mips.c: Add support for MIPS r5900 (extension of r4000)

	* config/tc-mips.c: Add support for MIPS r5900
	Add M_LQ_AB and M_SQ_AB to support large values for instructions lq and sq.
	* config/tc-mips.c (can_swap_branch_p, get_append_method): Detect some conditional short loops to fix a bug on the r5900 by NOP in the branch delay slot.
	* config/tc-mips.c (M_MUL): Support 3 operands in multu on r5900.
	* config/tc-mips.c (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
	* config/tc-mips.c (s_mipsset): Force 32 bit floating point on r5900.
	* configure.in: Detect CPU type when target string contains r5900 (e.g. mips64r5900el-linux-gnu).

	* config/tc-mips.c (mips_ip): Check parameter range of instructions mfps and mtps on r5900.

	* elf/mips.h: Add MIPS machine variant number for r5900 which is compatible with old Playstation 2 software.
	* opcode/mips.h: Add support for r5900 instructions including lq and sq.

	* configure.tgt: Support ELF files for Sony Playstation 2 (for ps2dev and ps2sdk).
	* emulparams/elf32lr5900n32.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI n32.
	* emulparams/elf32lr5900.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI o32.
	* Makefile.am: Add linker scripts for Sony Playstation 2 ELF files.

	* opcodes/mips-dis.c: Add names for CP0 registers of r5900.
	* opcodes/mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for instructions sq and lq.

	* opcodes/mips-opc.c: Add support for MIPS r5900 CPU.
	Add support for 128 bit MMI (Multimedia Instructions).
	Add support for EE instructions (Emotion Engine).
	Disable unsupported floating point instructions (64 bit and undefined compare operations).
	Enable instructions of MIPS ISA IV which are supported by r5900.
	Disable 64 bit co processor instructions.
	Disable 64 bit multiplication and division instructions.
	Disable instructions for co-processor 2 and 3, because these are not supported (preparation for later VU0 support (Vector Unit)).
	Disable cvt.w.s because this behaves like trunc.w.s and the correct execution can't be ensured on r5900.
	Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This will confuse less developers and compilers.
 2013-01-04 17:22:53 +00:00
Nick Clifton
752937aa0c Add copyright notices 2012-12-10 12:48:03 +00:00
H.J. Lu
34b6002876 Update DF_1_XXX from Solaris 
binutils/

	* readelf.c (process_dynamic_section): Correct DF_1_CONFALT.
	Also dump DF_1_ENDFILTEE, DF_1_DISPRELDNE, DF_1_NODIRECT,
	DF_1_IGNMULDEF, DF_1_NOKSYMS, DF_1_NOHDR, DF_1_EDITED,
	DF_1_NORELOC, DF_1_SYMINTPOSE, DF_1_GLOBAUDIT and DF_1_SINGLETON.

include/elf/

	* common.h (DF_1_CONLFAT): Renamed to ...
	(DF_1_CONFALT): This.
	(DF_1_ENDFILTEE): New.
	(DF_1_DISPRELDNE): Likewise.
	(DF_1_DISPRELPND): Likewise.
	(DF_1_NODIRECT): Likewise.
	(DF_1_IGNMULDEF): Likewise.
	(DF_1_NOKSYMS): Likewise.
	(DF_1_NOHDR): Likewise.
	(DF_1_EDITED): Likewise.
	(DF_1_NORELOC): Likewise.
	(DF_1_SYMINTPOSE): Likewise.
	(DF_1_GLOBAUDIT): Likewise.
	(DF_1_SINGLETON): Likewise.
 2012-11-16 12:49:20 +00:00
Nick Clifton
de863c7475 2012-11-09 Nick Clifton <nickc@redhat.com> 
* Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo.
	(ALL_MACHINES_CFILES): Add cpu-v850-rh850.c.
	* archures.c (bfd_arch_info): Add bfd_v850_rh850_arch.
	* config.bfd: Likewise.
	* configure.in: Add bfd_elf32_v850_rh850_vec.
	* cpu-v850.c: Update printed description.
	* cpu-v850_rh850.c: New file.
	* elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI
	relocs.
	(v850_elf_perform_relocation): Likewise.
	(v850_elf_final_link_relocate): Likewise.
	(v850_elf_relocate_section): Likewise.
	(v850_elf_relax_section): Likewise.
	(v800_elf_howto_table): New.
	(v850_elf_object_p): Add support for RH850 ABI values.
	(v850_elf_final_write_processing): Likewise.
	(v850_elf_merge_private_bfd_data): Likewise.
	(v850_elf_print_private_bfd_data): Likewise.
	(v800_elf_reloc_map): New.
	(v800_elf_reloc_type_lookup): New.
	(v800_elf_reloc_name_lookup): New.
	(v800_elf_info_to_howto): New.
	(bfd_elf32_v850_rh850_vec): New.
	(bfd_arch_v850_rh850): New.
	* targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.

	* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
	(guess_is_rela): Add EM_V800.
	(dump_relocations): Likewise.
	(get_machine_name): Update EM_V800.
	(get_machine_flags): Add support for RH850 ABI flags.
	(is_32bit_abs_reloc): Add support for RH850 ABI reloc.

	* config/tc-v850.c (v850_target_arch): New.
	(v850_target_format): New.
	(set_machine): Use v850_target_arch.
	(md_begin): Likewise.
	(md_show_usage): Document new switches.
	(md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and
	-m4byte-align.
	* config/tc-v850.c (TARGET_ARCH) Use v850_target_arch.
	(TARGET_FORMAT): Use v850_target_format.
	* doc/c-v850.texi: Document new options.

	* v850.h: Add RH850 ABI values.

	* Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c.
	* Makefile.in: Regenerate.
	* configure.tgt (v850*-*-*): Make v850_rh850 the default
	emulation. Add vanilla v850 as an extra emulation.
	* emulparams/v850_rh850.sh: New file.
	* scripttempl/v850_rh850.sc: New file.

	* configure.in: Add bfd_v850_rh850_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Likewise.
 2012-11-09 17:36:19 +00:00
Nick Clifton
708e2187a3 2012-11-09 Nick Clifton <nickc@redhat.com> 
* elf32-rx.c (describe_flags): New function.  Returns a buffer
	containing a description of the E_FLAG_RX_... values set.
	(rx_elf_merge_private_bfd_data): Use it.
	(rx_elf_print_private_bfd_data): Likewise.
	(elf32_rx_machine): Skip EF_RX_CPU_RX check.
	(elf32_rx_special_sections): Define.
	(elf_backend_special_sections): Define.

2012-11-09  Nick Clifton  <nickc@redhat.com>

	* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.

2012-11-09  Nick Clifton  <nickc@redhat.com>

	* config/obj-elf.c (obj_elf_change_section): Allow init array
	sections to have the SHF_EXECINSTR attribute for the RX target.
	* config/tc-rx.c (elf_flags): Initialise with E_FLAG_RX_ABI.
	(enum options): Add OPTION_USES_GCC_ABI and OPTION_USES_RX_ABI.
	(md_longopts): Add -mgcc-abi and -mrx-abi.
	(md_parse_option): Add support for OPTION_USES_GCC_ABI and
	OPTION_USES_RX_ABI.
	* doc/as.texinfo (RX Options): Add mention of remaining RX
	options.
	* doc/c-rx.texi: Document -mgcc-abi and -mrx-abi.

2012-11-09  Nick Clifton  <nickc@redhat.com>

	* rx.h (EF_RX_CPU_RX): Add comment.
	(E_FLAG_RX_ABI): Define.

2012-11-09  Nick Clifton  <nickc@redhat.com>

	* emultempl/rxelf.em (no_flag_mismatch_warnings): Initialise to
	true.
	(PARSE_AND_LIST_LONGOPTS): Add flag-mismatch-warnings.
	(PARSE_AND_LIST_ARG_CASES): Add support for
	--flag-mismatch-warnings.
 2012-11-09 17:00:44 +00:00
Maciej W. Rozycki
c266cd0290 * mips.h (EF_MIPS_32BITMODE): Move next to lower-order bits. 2012-11-08 18:25:23 +00:00
Tom Tromey
ff826ef3e2 binutils 
* readelf.c (get_note_type): Handle NT_386_TLS, NT_386_IOPERM.
include/common/elf
	* common.h (NT_386_TLS, NT_386_IOPERM): New defines.
 2012-11-01 14:57:22 +00:00
Nick Clifton
3bfcb6528e bfd: 
* elf32-arm.c (elf32_arm_print_private_bfd_data): Recognise and
        display the new ARM hard-float/soft-float ABI flags for EABI_VER5
        (elf32_arm_post_process_headers): Add the hard-float/soft-float
        ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5.

binutils:
        * readelf.c (decode_ARM_machine_flags): Recognise and display the
        new ARM hard-float/soft-float ABI flags for EABI_VER5. Split out
        the code for EABI_VER4 and EABI_VER5 to allow this.

elfcpp:
        * arm.h: New enum for EABI soft- and hard-float flags.

gold:
        * gold.cc (Target_arm::do_adjust_elf_header): Add the
        hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC
        in EABI_VER5.

include:
        * elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
        (EF_ARM_ABI_FLOAT_HARD): Likewise.

ld/testsuite:
        * ld-arm/eabi-hard-float.s: New test source.
        * ld-arm/eabi-soft-float.s: New test source.
        * ld-arm/eabi-hard-float.d: New test.
        * ld-arm/eabi-soft-float.d: New test.
        * ld-arm/eabi-soft-float-ABI4.d: New test.
        * ld-arm/eabi-soft-float-r.d: New test.
        * ld-arm/arm-elf.xp: Use the new tests.

binutils:
	PR binutils/14779
	* configure.in: Add checks for wchar.h and mbstate_t.
	* config.in: Regenerate.
	* configure: Regenerate.
	* readelf.c: Conditionally include wchar.h.
	(print_symbol): Conditionally use mbstate_t.
 2012-10-30 12:44:58 +00:00
Tom Tromey
9ece1fa991 binutils 
* readelf.c (get_note_type): Handle NT_SIGINFO, NT_FILE.
	(print_core_note): New function.
	(process_note): Call it.
include/common/elf
	* common.h (NT_SIGINFO, NT_FILE): New defines.
 2012-10-23 17:46:44 +00:00
Walter Lee
e5b95258d9 Add support for constructing pc-relative addresses to the plt, by 
adding the necessary assembly operators and relocations.

bfd:
	* reloc.c (Add BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): new relocations.
	* elfxx-tilegx.c (tilegx_elf_howto_table): Handle new relocations.
	(tilegx_reloc_map): Ditto.
	(reloc_to_create_func): Ditto.
	(tilegx_elf_check_relocs): Ditto.
	(tilegx_elf_gc_sweep_hook): Ditto.
	(tilegx_elf_relocate_section): Ditto.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

gas:
	* tc-tilegx.c (O_hw0_plt): Define operator.
	(O_hw1_plt): Ditto.
	(O_hw1_last_plt): Ditto.
	(O_hw2_last_plt): Ditto.
	(md_begin): Handle new operators.
	(emit_tilegx_instruction): Ditto.
	(md_apply_fix): Ditto.
	* doc/c-tilegx.texi: Document new operators.

include/elf:
	* tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation.
	(R_TILEGX_IMM16_X1_HW0_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW1_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW1_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW2_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW2_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW3_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW3_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL): Ditto.
	(R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL	): Ditto.
	(R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto.
 2012-08-28 02:43:22 +00:00
Nick Clifton
a06ea96464 Add support for 64-bit ARM architecture: AArch64 2012-08-13 14:52:54 +00:00
Iain Sandoe
cefc6d46de * common.h (AT_L1I_CACHESHAPE, AT_L1D_CACHESHAPE, 
AT_L2_CACHESHAPE, AT_L3_CACHESHAPE): New defines.
 2012-06-28 09:12:27 +00:00
Nick Clifton
40551fb82e PR 13503 
* reloc.c: Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenrate.
	* elf32-avr.c (elf_avr_howto_table): Rename R_AVR_8_HHI8 to
	R_AVR_8_HLO8.
	(avr_reloc_map): Ditto.

	* config/tc-avr.c (avr_cons_fix_new): Rename R_AVR_8_HHI8 to
	R_AVR_8_HLO8.
	(exp_mod_data) Ditto. And replace "hhi8" with "hlo8".
	(md_apply_fix): Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO.

	* avr.h (RELOC_NUMBERS): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8.
 2012-05-16 14:52:16 +00:00
Nick Clifton
6927f98292 * config/tc-m68hc11.c: Add S12X and XGATE co-processor support. 
Add option to offset S12 addresses into XGATE memory space.
	Tweak target flags to match other tools. (i.e. -m m68hc11).
	* doc/as.texinfo: Mention new options.
	* doc/c-m68hc11.texi: Document new options.
	* NEWS: Mention new support.

	* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
	* config.bfd: Likewise.
	* cpu-m9s12x.c: New.
	* cpu-m9s12xg.c: New.
	* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
	Add option to offset S12 addresses into XGATE memory space.
	Fix carry bug in IMM16 (IMM8 low/high) relocate.
	* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
	(ALL_MACHINES_CFILES): Likewise.
	* reloc.c: Add S12X relocs.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

	* gas/m68hc11/insns9s12x.s: New
	* gas/m68hc11/insns9s12x.d: New
	* gas/m68hc11/hexprefix.s: New
	* gas/m68hc11/hexprefix.d: New
	* gas/m68hc11/9s12x-exg-sex-tfr.s: New
	* gas/m68hc11/9s12x-exg-sex-tfr.d: New
	* gas/m68hc11/insns9s12xg.s: New
	* gas/m68hc11/insns9s12xg.d: New
	* gas/m68hc11/9s12x-mov.s: New
	* gas/m68hc11/9s12x-mov.d: New
	* gas/m68hc11/m68hc11.exp: Updated
	* gas/m68hc11/*.d: Brought in line with changed objdump output.
	* gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
	* gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
	* gas/elf/dwarf2-1.d: Skip for hc11/12 targets.
	* gas/elf/dwarf2-2.d: Likewise.

	* ld-m68hc11/xgate-link.s: New.
	* ld-m68hc11/xgate-link.d: New.
	* ld-m68hc11/xgate-offset.s: New.
	* ld-m68hc11/xgate-offset.d: New.
	* ld-m68hc11/xgate1.s: New.
	* ld-m68hc11/xgate1.d: New.
	* ld-m68hc11/xgate2.s: New.
	* ld-m68hc11/m68hc11.exp: Updated.
	* ld-m68hc11/*.d: Brought in line with changed objdump output.
	* ld-gc/gc.exp: Update CFLAGS for m68hc11.
	* ld-plugin/plugin.exp: Likewise.
	* ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.

	* configure.in: Add S12X and XGATE co-processor support to m68hc11
	target.
	* disassemble.c: Likewise.
	* configure: Regenerate.
	* m68hc11-dis.c: Make objdump output more consistent, use hex
	instead of decimal and use 0x prefix for hex.
	* m68hc11-opc.c: Add S12X and XGATE opcodes.
	* dis-asm.h (print_insn_m9s12x): Prototype.
	(print_insn_m9s12xg): Prototype.

	* m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
	R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
	(E_M68HC11_XGATE_RAMOFFSET): Define.

	* m68hc11.h: Add XGate definitions.
	(struct m68hc11_opcode): Add xg_mask field.
 2012-05-15 12:55:51 +00:00
James Lemke
b9c361e0ad Add support for PowerPC VLE. 
2012-05-14  Catherine Moore  <clm@codesourcery.com>

	* NEWS:  Mention PowerPC VLE port.

2012-05-14  James Lemke <jwlemke@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>

	bfd/
	* bfd.c (bfd_lookup_section_flags): Add section parm.
	* ecoff.c (bfd_debug_section): Remove flag_info initializer.
	* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
	(bfd_elf_lookup_section_flags): Add section parm.
	* elf32-ppc.c (is_ppc_vle): New function.
	(ppc_elf_modify_segment_map): New function.
	(elf_backend_modify_segment_map): Define.
	(has_vle_insns): New define.
	* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
	* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
	Move in logic to omit / include a section.
	* libbfd-in.h (bfd_link_info): Add section parm.
	(bfd_generic_lookup_section_flags): Likewise.
	* reloc.c (bfd_generic_lookup_section_flags): Likewise.
	* section.c (bfd_section): Move out section_flag_info.
	(BFD_FAKE_SECTION): Remove flag_info initializer.
	* targets.c (_bfd_lookup_section_flags): Add section parm.

2012-05-14  Catherine Moore  <clm@codesourcery.com>

	bfd/
	* archures.c (bfd_mach_ppc_vle): New.
	* bfd-in2.h: Regenerated.
	* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
	* elf32-ppc.c (split16_format_type): New enumeration.
	(ppc_elf_vle_split16): New function.
	(HOWTO): Add entries for R_PPC_VLE relocations.
	(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
	(ppc_elf_section_flags): New function.
	(ppc_elf_lookup_section_flags): New function.
	(ppc_elf_section_processing): New function.
	(ppc_elf_check_relocs): Handle PPC_VLE relocations.
	(ppc_elf_relocation_section): Likewise.
	(elf_backend_lookup_section_flags_hook): Define.
	(elf_backend_section_flags): Define.
	(elf_backend_section_processing): Define.
	* elf32-ppc.h (ppc_elf_section_processing): Declare.
	* libbfd.h: Regenerated.
	* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
	BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
	BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
	BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
	BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
	BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
	BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
	BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
	BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	gas/
	* config/tc-ppc.c (insn_validate): New func of existing code to call..
	(ppc_setup_opcodes): ..from 2 places here.
	Revise for second (VLE) opcode table.
	Add #ifdef'd code to print opcode tables.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	gas/
	* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
	for the VLE conditional branches.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>

	gas/
	* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
	(PPC_VLE_SPLIT16D): New macro.
	(PPC_VLE_LO16A): New macro.
	(PPC_VLE_LO16D): New macro.
	(PPC_VLE_HI16A): New macro.
	(PPC_VLE_HI16D): New macro.
	(PPC_VLE_HA16A): New macro.
	(PPC_VLE_HA16D): New macro.
	(PPC_APUINFO_VLE): New definition.
	(md_chars_to_number): New function.
	(md_parse_option): Check for combinations of little
	endian and -mvle.
	(md_show_usage): Document -mvle.
	(ppc_arch): Recognize VLE.
	(ppc_mach): Recognize bfd_mach_ppc_vle.
	(ppc_setup_opcodes): Print the opcode table if
	* config/tc-ppc.h (ppc_frag_check): Declare.
	* doc/c-ppc.texi: Document -mvle.
	* NEWS:  Mention PowerPC VLE port.

2012-05-14  Catherine Moore  <clm@codesourcery.com>

	gas/
	* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
	(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
	* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
	* dwarf2dbg.c (scale_addr_delta): Handle values of 1
	for DWARF2_LINE_MIN_INSN_LENGTH.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>

	gas/testsuite/
	* gas/ppc/ppc.exp: Run new tests.
	* gas/ppc/vle-reloc.d: New test.
	* gas/ppc/vle-reloc.s: New test.
	* gas/ppc/vle-simple-1.d: New test.
	* gas/ppc/vle-simple-1.s: New test.
	* gas/ppc/vle-simple-2.d: New test.
	* gas/ppc/vle-simple-2.s: New test.
	* gas/ppc/vle-simple-3.d: New test.
	* gas/ppc/vle-simple-3.s: New test.
	* gas/ppc/vle-simple-4.d: New test.
	* gas/ppc/vle-simple-4.s: New test.
	* gas/ppc/vle-simple-5.d: New test.
	* gas/ppc/vle-simple-5.s: New test.
	* gas/ppc/vle-simple-6.d: New test.
	* gas/ppc/vle-simple-6.s: New test.
	* gas/ppc/vle.d: New test.
	* gas/ppc/vle.s: New test.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>
	include/elf/
	* ppc.h (SEC_PPC_VLE): Remove.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
	    James Lemke  <jwlemke@codesourcery.com>

	include/elf/
	* ppc.h (R_PPC_VLE_REL8): New reloction.
	(R_PPC_VLE_REL15): Likewise.
	(R_PPC_VLE_REL24): Likewise.
	(R_PPC_VLE_LO16A): Likewise.
	(R_PPC_VLE_LO16D): Likewise.
	(R_PPC_VLE_HI16A): Likewise.
	(R_PPC_VLE_HI16D): Likewise.
	(R_PPC_VLE_HA16A): Likewise.
	(R_PPC_VLE_HA16D): Likewise.
	(R_PPC_VLE_SDA21): Likewise.
	(R_PPC_VLE_SDA21_LO): Likewise.
	(R_PPC_VLE_SDAREL_LO16A): Likewise.
	(R_PPC_VLE_SDAREL_LO16D): Likewise.
	(R_PPC_VLE_SDAREL_HI16A): Likewise.
	(R_PPC_VLE_SDAREL_HI16D): Likewise.
	(R_PPC_VLE_SDAREL_HA16A): Likewise.
	(R_PPC_VLE_SDAREL_HA16D): Likewise.
	(SEC_PPC_VLE): Remove.
	(PF_PPC_VLE): New program header flag.
	(SHF_PPC_VLE): New section header flag.
	(vle_opcodes, vle_num_opcodes): New.
	(VLE_OP): New macro.
	(VLE_OP_TO_SEG): New macro.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>

	include/opcode/
	* ppc.h (PPC_OPCODE_VLE): New definition.
	(PPC_OP_SA): New macro.
	(PPC_OP_SE_VLE): New macro.
	(PPC_OP): Use a variable shift amount.
	(powerpc_operand): Update comments.
	(PPC_OPSHIFT_INV): New macro.
	(PPC_OPERAND_CR): Replace with...
	(PPC_OPERAND_CR_BIT): ...this and
	(PPC_OPERAND_CR_REG): ...this.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	ld/
	* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
	Pass it to callback.
	(walk_wild_section_general): Pass section_flag_list to callback.
	(lang_add_section): Add sflag_list parm.
	Move out logic to keep / omit a section & call bfd_lookup_section_flags.
	(output_section_callback_fast): Add sflag_list parm.
	Add new parm to lang_add_section calls.
	(output_section_callback): Likewise.
	(check_section_callback): Add sflag_list parm.
	(lang_place_orphans): Add new parm to lang_add_section calls.
	(gc_section_callback): Add sflag_list parm.
	(find_relro_section_callback): Likewise.
	* ldlang.h (callback_t): Add flag_info parm.
	(lang_add_section): Add sflag_list parm.
	* emultempl/armelf.em (elf32_arm_add_stub_section):
	Add lang_add_section parm.
	* emultempl/beos.em (gld*_place_orphan): Likewise.
	* emultempl/elf32.em (gld*_place_orphan): Likewise.
	* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
	* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
	* emultempl/mipself.em (mips_add_stub_section): Likewise.
	* emultempl/mmo.em (mmo_place_orphan): Likewise.
	* emultempl/pe.em (gld_*_place_orphan): Likewise.
	* emultempl/pep.em (gld_*_place_orphan): Likewise.
	* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
	* emultempl/spuelf.em (spu_place_special_section): Likewise.
	* emultempl/vms.em (vms_place_orphan): Likewise.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	ld/testsuite/
	* ld-powerpc/powerpc.exp: Create ppceabitests.
	* ld-powerpc/vle-multiseg.s: New.
	* ld-powerpc/vle-multiseg-1.d: New.
	* ld-powerpc/vle-multiseg-1.ld: New.
	* ld-powerpc/vle-multiseg-2.d: New.
	* ld-powerpc/vle-multiseg-2.ld: New.
	* ld-powerpc/vle-multiseg-3.d: New.
	* ld-powerpc/vle-multiseg-3.ld: New.
	* ld-powerpc/vle-multiseg-4.d: New.
	* ld-powerpc/vle-multiseg-4.ld: New.
	* ld-powerpc/vle-multiseg-5.d: New.
	* ld-powerpc/vle-multiseg-5.ld: New.
	* ld-powerpc/vle-multiseg-6.d: New.
	* ld-powerpc/vle-multiseg-6.ld: New.
	* ld-powerpc/vle-multiseg-6a.s: New.
	* ld-powerpc/vle-multiseg-6b.s: New.
	* ld-powerpc/vle-multiseg-6c.s: New.
	* ld-powerpc/vle-multiseg-6d.s: New.
	* ld-powerpc/powerpc.exp: Run new tests.

2012-05-14  Catherine Moore  <clm@codesourcery.com>

	ld/
	* NEWS:  Mention PowerPC VLE port.

2012-05-14  Catherine Moore  <clm@codesourcery.com>

	ld/testsuite/
	* ld-powerpc/apuinfo.rd: Update for VLE.
	* ld-powerpc/vle-reloc-1.d: New.
	* ld-powerpc/vle-reloc-1.s: New.
	* ld-powerpc/vle-reloc-2.d: New.
	* ld-powerpc/vle-reloc-2.s: New.
	* ld-powerpc/vle-reloc-3.d: New.
	* ld-powerpc/vle-reloc-3.s: New.
	* ld-powerpc/vle-reloc-def-1.s: New.
	* ld-powerpc/vle-reloc-def-2.s: New.
	* ld-powerpc/vle-reloc-def-3.s: New.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	opcodes/
	* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
	(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
	(vle_opcd_indices): New array.
	(lookup_vle): New function.
	(disassemble_init_powerpc): Revise for second (VLE) opcode table.
	(print_insn_powerpc): Likewise.
	* ppc-opc.c: Likewise.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>
	    Nathan Froyd <froydnj@codesourcery.com>

	opcodes/
	* ppc-opc.c (insert_arx, extract_arx): New functions.
	(insert_ary, extract_ary): New functions.
	(insert_li20, extract_li20): New functions.
	(insert_rx, extract_rx): New functions.
	(insert_ry, extract_ry): New functions.
	(insert_sci8, extract_sci8): New functions.
	(insert_sci8n, extract_sci8n): New functions.
	(insert_sd4h, extract_sd4h): New functions.
	(insert_sd4w, extract_sd4w): New functions.
	(insert_vlesi, extract_vlesi): New functions.
	(insert_vlensi, extract_vlensi): New functions.
	(insert_vleui, extract_vleui): New functions.
	(insert_vleil, extract_vleil): New functions.
 	(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 	(BI16, BI32, BO32, B8): New.
	(B15, B24, CRD32, CRS): New.
 	(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
	(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
	(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
	(SH6_MASK): Use PPC_OPSHIFT_INV.
	(SI8, UI5, OIMM5, UI7, BO16): New.
	(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
	(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
	(ALLOW8_SPRG): New.
	(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
	(OPVUP, OPVUP_MASK OPVUP): New
	(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
	(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
	(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
	(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 	(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
	(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
	(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
	(SE_IM5, SE_IM5_MASK): New.
	(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
	(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
	(BO32DNZ, BO32DZ): New.
	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
	(PPCVLE): New.
	(powerpc_opcodes): Add new VLE instructions.  Update existing
	instruction to include PPCVLE if supported.
	* ppc-dis.c (ppc_opts): Add vle entry.
	(get_powerpc_dialect): New function.
	(powerpc_init_dialect): VLE support.
	(print_insn_big_powerpc): Call get_powerpc_dialect.
	(print_insn_little_powerpc): Likewise.
	(operand_value_powerpc): Handle negative shift counts.
	(print_insn_powerpc): Handle 2-byte instruction lengths.
 2012-05-14 19:45:30 +00:00
Nick Clifton
99700d6feb PR 13503 
* reloc.c: Add new ENUM for BFD_RELOC_AVR_8_LO,
	BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HHI.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenrate.
	* elf32-avr.c (elf_avr_howto_table): Add entries for
	R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8.
	(avr_reloc_map): Add RELOC mappings for R_AVR_8_LO8, R_AVR_8_HI8,
	R_AVR_8_HHI8.

	* config/tc-avr.c (exp_mod_pm): Remove variable.
	(exp_mod_data_t): New typedef.
	(pexp_mod_data, exp_mod_data): New variables.
	(avr_parse_cons_expression): Scan through exp_mod_data[] to find
	data expression modifiers "pm", "gs", "lo8", hi8", "hhi8", "hh8"
	and set pexp_mod_data accordingly to be used in avr_cons_fix_new.
	(avr_cons_fix_new): Handle new data expression modifiers shipped
	in pexp_mod_data.
	(md_apply_fix): Handle BFD_RELOC_AVR_8_LO, BFD_RELOC_AVR_8_HI,
	BFD_RELOC_AVR_8_HHI.

	* elf/avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8,
	R_AVR_8_HI8, R_AVR_8_HHI8.
 2012-05-11 12:59:23 +00:00
Nick Clifton
f6c1a2d592 Add support for Motorola XGATE embedded CPU 2012-05-03 13:12:08 +00:00
David S. Miller
4d29644716 Add new ELF_SPARC_HWCAP_* defines for features found on SPARC-T4. 
include/elf/

	* sparc.h: Add new ELF_SPARC_HWCAP_* defines for crypto,
	pause, and compare-and-branch instructions.
 2012-04-27 18:00:52 +00:00
Nick Clifton
0a22ae8eb5 * mn10300.h (elf_mn10300_reloc_type): Add R_MN10300_TLS_GD, 
R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE,
	R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD,
	R_MN10300_TLS_DTPOFF and R_MN10300_TLS_TPOFF.

	* elf-m10300.c (elf32_mn10300_link_hash_entry): Add tls_type
	field.
	(elf32_mn10300_link_hash_table): Add tls_ldm_got entry;
	(elf_mn10300_tdata): Define.
	(elf_mn10300_local_got_tls_type): Define.
	(elf_mn10300_howto_table): Add entries for R_MN10300_TLS_GD,
	R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE,
	R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD,
	R_MN10300_TLS_DTPOFF, R_MN10300_TLS_TPOFF relocs.
	(mn10300_reloc_map): Likewise.
	(elf_mn10300_tls_transition): New function.
	(dtpoff, tpoff, mn10300_do_tls_transition): New functions.
	(mn10300_elf_check_relocs): Add TLS support.
	(mn10300_elf_final_link_relocate): Likewise.
	(mn10300_elf_relocate_section): Likewise.
	(mn10300_elf_relax_section): Likewise.
	(elf32_mn10300_link_hash_newfunc): Initialise new field.
	(_bfd_mn10300_copy_indirect_symbol): New function.
	(elf32_mn10300_link_hash_table_create): Initialise new fields.
	(_bfd_mn10300_elf_size_dynamic_sections): Add TLS support.
	(_bfd_mn10300_elf_finish_dynamic_symbol): Likewise.
	(_bfd_mn10300_elf_reloc_type_class): Allocate an
	elf_mn10300_obj_tdata structure.
	(elf_backend_copy_indirect_symbol): Define.
	* reloc.c (BFD_MN10300_TLS_GD, BFD_MN10300_TLS_LD,
	BFD_MN10300_TLS_LDO, BFD_MN10300_TLS_GOTIE, BFD_MN10300_TLS_IE,
	BFD_MN10300_TLS_LE, BFD_MN10300_TLS_DPTMOD,
	BFD_MN10300_TLS_DTPOFF, BFD_MN10300_TLS_TPOFF): New relocations.
	(BFD_RELOC_MN10300_32_PCREL, BFD_RELOC_MN10300_16_PCREL): Move to
	alongside other MN10300 relocations.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

	* config/tc-mn10300.c (other_registers): Add SSP and USP.
	(md_assemble): Add support for TLS relocs.
	(mn10300_parse_name): Likewise.

	* readelf.c (is_16bit_abs_reloc): Add detection of R_MN10300_16.
 2012-03-07 17:52:00 +00:00
Walter Lee
6f7be9592d Improve TLS support on TILE-Gx/TILEPro: 
- Add support for TLS LE references.
- Support linker optimization of TLS references.
- Delete relocations of GOT/tp relative offsets beyond 32-bits.

This brings binutils in line with the support expected in gcc 4.7, for
TILE-Gx/TILEPro.

bfd/
	* reloc.c: Add BFD_RELOC_TILEPRO_TLS_GD_CALL,
	BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD,
	BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD,
	BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD,
	BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD,
	BFD_RELOC_TILEPRO_TLS_IE_LOAD, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE,
	BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE,
	BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO,
	BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO,
	BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI,
	BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI,
	BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA,
	BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA,
	BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE,
	BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE,
	BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE,
	BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE,
	BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE,
	BFD_RELOC_TILEGX_TLS_GD_CALL, BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD,
	BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD,
	BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD,
	BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD, BFD_RELOC_TILEGX_TLS_IE_LOAD,
	BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD,
	BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD,
	BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD, BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD.
	Delete BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT,
	BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT,
	BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT,
	BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD,
	BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE,
	BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE.
	* elf32-tilepro.c (tilepro_elf_howto_table): Update tilepro
	relocations.
	(tilepro_reloc_map): Ditto.
	(tilepro_info_to_howto_rela): Ditto.
	(reloc_to_create_func): Ditto.
	(tilepro_tls_translate_to_le): New.
	(tilepro_tls_translate_to_ie): New.
	(tilepro_elf_tls_transition): New.
	(tilepro_elf_check_relocs): Handle new tls relocations.
	(tilepro_elf_gc_sweep_hook): Ditto.
	(allocate_dynrelocs): Ditto.
	(tilepro_elf_relocate_section): Ditto.
	(tilepro_replace_insn): New.
	(insn_mask_X1): New.
	(insn_mask_X0_no_dest_no_srca): New
	(insn_mask_X1_no_dest_no_srca): New
	(insn_mask_Y0_no_dest_no_srca): New
	(insn_mask_Y1_no_dest_no_srca): New
	(srca_mask_X0): New
	(srca_mask_X1): New
	(insn_tls_le_move_X1): New
	(insn_tls_le_move_zero_X0X1): New
	(insn_tls_ie_lw_X1): New
	(insn_tls_ie_add_X0X1): New
	(insn_tls_ie_add_Y0Y1): New
	(insn_tls_gd_add_X0X1): New
	(insn_tls_gd_add_Y0Y1): New
	* elfxx-tilegx.c (tilegx_elf_howto_table): Update tilegx
	relocations.
	(tilegx_reloc_map): Ditto.
	(tilegx_info_to_howto_rela): Ditto.
	(reloc_to_create_func): Ditto.
	(tilegx_elf_link_hash_table): New field disable_le_transition.
	(tilegx_tls_translate_to_le): New.
	(tilegx_tls_translate_to_ie): New.
	(tilegx_elf_tls_transition): New.
	(tilegx_elf_check_relocs): Handle new tls relocations.
	(tilegx_elf_gc_sweep_hook): Ditto.
	(allocate_dynrelocs): Ditto.
	(tilegx_elf_relocate_section): Ditto.
	(tilegx_copy_bits): New.
	(tilegx_replace_insn): New.
	(insn_mask_X1): New.
	(insn_mask_X0_no_dest_no_srca): New.
	(insn_mask_X1_no_dest_no_srca): New.
	(insn_mask_Y0_no_dest_no_srca): New.
	(insn_mask_Y1_no_dest_no_srca): New.
	(insn_mask_X0_no_operand): New.
	(insn_mask_X1_no_operand): New.
	(insn_mask_Y0_no_operand): New.
	(insn_mask_Y1_no_operand): New.
	(insn_tls_ie_ld_X1): New.
	(insn_tls_ie_ld4s_X1): New.
	(insn_tls_ie_add_X0X1): New.
	(insn_tls_ie_add_Y0Y1): New.
	(insn_tls_ie_addx_X0X1): New.
	(insn_tls_ie_addx_Y0Y1): New.
	(insn_tls_gd_add_X0X1): New.
	(insn_tls_gd_add_Y0Y1): New.
	(insn_move_X0X1): New.
	(insn_move_Y0Y1): New.
	(insn_add_X0X1): New.
	(insn_add_Y0Y1): New.
	(insn_addx_X0X1): New.
	(insn_addx_Y0Y1): New.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

gas/
	* tc-tilepro.c (O_tls_le): Define operator.
	(O_tls_le_lo16): Ditto.
	(O_tls_le_hi16): Ditto.
	(O_tls_le_ha16): Ditto.
	(O_tls_gd_call): Ditto.
	(O_tls_gd_add): Ditto.
	(O_tls_ie_load): Ditto.
	(md_begin): Delete old operators; handle new operators.
	(emit_tilepro_instruction): Ditto.
	(md_apply_fix): Ditto.
	* tc-tilegx.c (O_hw1_got): Delete operator.
	(O_hw2_got): Ditto.
	(O_hw3_got): Ditto.
	(O_hw2_last_got): Ditto.
	(O_hw1_tls_gd): Ditto.
	(O_hw2_tls_gd): Ditto.
	(O_hw3_tls_gd): Ditto.
	(O_hw2_last_tls_gd): Ditto.
	(O_hw1_tls_ie): Ditto.
	(O_hw2_tls_ie): Ditto.
	(O_hw3_tls_ie): Ditto.
	(O_hw2_last_tls_ie): Ditto.
	(O_hw0_tls_le): Define operator.
	(O_hw0_last_tls_le): Ditto.
	(O_hw1_last_tls_le): Ditto.
	(O_tls_gd_call): Ditto.
	(O_tls_gd_add): Ditto.
	(O_tls_ie_load): Ditto.
	(O_tls_add): Ditto.
	(md_begin): Delete old operators; handle new operators.
	(emit_tilegx_instruction): Ditto.
	(md_apply_fix): Ditto.
	* doc/c-tilegx.texi: Delete old operators; document new operators.
	* doc/c-tilepro.texi: Ditto.

include/elf/
	* tilegx.h (R_TILEGX_IMM16_X0_HW1_GOT): Delete.
	(R_TILEGX_IMM16_X1_HW1_GOT): Ditto.
	(R_TILEGX_IMM16_X0_HW2_GOT): Ditto.
	(R_TILEGX_IMM16_X1_HW2_GOT): Ditto.
	(R_TILEGX_IMM16_X0_HW3_GOT): Ditto.
	(R_TILEGX_IMM16_X1_HW3_GOT): Ditto.
	(R_TILEGX_IMM16_X0_HW2_LAST_GOT): Ditto.
	(R_TILEGX_IMM16_X1_HW2_LAST_GOT): Ditto.
	(R_TILEGX_IMM16_X0_HW1_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X1_HW1_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X0_HW2_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X1_HW2_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X0_HW3_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X1_HW3_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD): Ditto.
	(R_TILEGX_IMM16_X0_HW1_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X1_HW1_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X0_HW2_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X1_HW2_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X0_HW3_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X1_HW3_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE): Ditto.
	(R_TILEGX_IMM16_X0_HW0_TLS_LE): New relocation.
	(R_TILEGX_IMM16_X1_HW0_TLS_LE): Ditto.
	(R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE): Ditto.
	(R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE): Ditto.
	(R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE): Ditto.
	(R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE): Ditto.
	(R_TILEGX_TLS_GD_CALL): Ditto.
	(R_TILEGX_IMM8_X0_TLS_GD_ADD): Ditto.
	(R_TILEGX_IMM8_X1_TLS_GD_ADD): Ditto.
	(R_TILEGX_IMM8_Y0_TLS_GD_ADD): Ditto.
	(R_TILEGX_IMM8_Y1_TLS_GD_ADD): Ditto.
	(R_TILEGX_TLS_IE_LOAD): Ditto.
	(R_TILEGX_IMM8_X0_TLS_ADD): Ditto.
	(R_TILEGX_IMM8_X1_TLS_ADD): Ditto.
	(R_TILEGX_IMM8_Y0_TLS_ADD): Ditto.
	(R_TILEGX_IMM8_Y1_TLS_ADD): Ditto.
	* tilepro.h (R_TILEPRO_TLS_GD_CALL): New relocation.
	(R_TILEPRO_IMM8_X0_TLS_GD_ADD): Ditto.
	(R_TILEPRO_IMM8_X1_TLS_GD_ADD): Ditto.
	(R_TILEPRO_IMM8_Y0_TLS_GD_ADD): Ditto.
	(R_TILEPRO_IMM8_Y1_TLS_GD_ADD): Ditto.
	(R_TILEPRO_TLS_IE_LOAD): Ditto.
	(R_TILEPRO_IMM16_X0_TLS_LE): Ditto.
	(R_TILEPRO_IMM16_X1_TLS_LE): Ditto.
	(R_TILEPRO_IMM16_X0_TLS_LE_LO): Ditto.
	(R_TILEPRO_IMM16_X1_TLS_LE_LO): Ditto.
	(R_TILEPRO_IMM16_X0_TLS_LE_HI): Ditto.
	(R_TILEPRO_IMM16_X1_TLS_LE_HI): Ditto.
	(R_TILEPRO_IMM16_X0_TLS_LE_HA): Ditto.
	(R_TILEPRO_IMM16_X1_TLS_LE_HA): Ditto.

include/opcode/
	* tilegx.h (tilegx_mnemonic): Add TILEGX_OPC_LD4S_TLS,
	TILEGX_OPC_LD_TLS.
	* tilepro.h (tilepro_mnemonic): Add TILEPRO_OPC_LW_TLS,
	TILEPRO_OPC_LW_TLS_SN.

opcodes/
	* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
	* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
	TILEPRO_OPC_LW_TLS_SN.
 2012-02-25 22:24:21 +00:00
H.J. Lu
8b40760ade Move ELF header entries to elf/ChangeLog 2012-01-31 20:00:16 +00:00
DJ Delorie
9cea966c22 [bfd] 
* elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX.
	(rl78_reloc_map): Add BFD_RELOC_RL78_RELAX.
	(rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR,
	and R_RL78_RH_SADDR.
	(rl78_elf_finish_dynamic_sections): Only validate PLT section if
	we didn't relax anything, as relaxing might remove a PLT reference
	after we've set up the table.
	(elf32_rl78_relax_delete_bytes): New.
	(reloc_bubblesort): New.
	(rl78_offset_for_reloc): New.
	(relax_addr16): New.
	(rl78_elf_relax_section): Add support for relaxing long
	instructions into short ones.

[gas]
	* config/rl78-defs.h (rl78_linkrelax_addr16): Add.
	(rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove.
	* config/rl78-parse.y: Tag all addr16 and branch patterns with
	relaxation markers.
	* config/tc-rl78.c (rl78_linkrelax_addr16): New.
	(rl78_linkrelax_branch): New.
	(OPTION_RELAX): New.
	(md_longopts): Add relax option.
	(md_parse_option): Add OPTION_RELAX.
	(rl78_frag_init): Support relaxation.
	(rl78_handle_align): New.
	(md_assemble): Support relaxation.
	(md_apply_fix): Likewise.
	(md_convert_frag): Likewise.
	* config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New.
	(HANDLE_ALIGN): New.
	(rl78_handle_align): Declare.

	* config/rl78-parse.y (rl78_bit_insn): New.  Set it for all bit
	insn patterns.
	(find_bit_index): New.  Strip .BIT suffix off relevent
	expressions for bit insns.
	(rl78_lex): Exclude bit suffixes from expression parsing.

[include/elf]
	* rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New.
	(RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
 2011-12-23 01:49:37 +00:00
Ulrich Weigand
355b81d949 include/elf/ChangeLog: 
* common.h (NT_S390_LAST_BREAK): Define.
	(NT_S390_SYSTEM_CALL): Likewise.

bfd/ChangeLog:

	* elf-bfd.h (elfcore_write_s390_last_break): Add prototype.
	(elfcore_write_s390_system_call): Likewise.
	* elf.c (elfcore_write_s390_last_break): New function.
	(elfcore_write_s390_system_call): Likewise.
	(elfcore_write_register_note): Call them.
	(elfcore_grok_s390_last_break): New function.
	(elfcore_grok_s390_system_call): Likewise.
	(elfcore_grok_note): Call them.
 2011-12-06 14:09:12 +00:00
DJ Delorie
99c513f6ac [.] 
* configure.ac (rl78-*-*) New case.
	* configure: Regenerate.

[bfd]
	* Makefile.am (ALL_MACHINES): Add cpu-rl78.lo.
	(ALL_MACHINES_CFILES): Add cpu-rl78.c.
	(BFD32_BACKENDS): Add elf32-rl78.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-rl78.c.
	(Makefile.in): Regenerate.
	* archures.c (bfd_architecture): Define bfd_arch_rl78.
	(bfd_archures_list): Add bfd_rl78_arch.
	* config.bfd: Add rl78-*-elf.
	* configure.in: Add bfd_elf32_rl78_vec.
	* reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations.
	* targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.
	* cpu-rl78.c: New file.
	* elf32-rl78.c: New file.

[binutils]
	* readelf.c: Include elf/rl78.h
	(guess_is_rela): Handle EM_RL78.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(is_32bit_abs_reloc): Likewise.
	* NEWS: Mention addition of RL78 support.
	* MAINTAINERS: Add myself as RL78 port maintainer.

[gas]
	* Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
	(TARGET_CPU_HFILES): Add rc-rl78.h.
	(EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
	(rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
	* Makefile.in: Regenerate.
	* configure.in: Add rl78 case.
	* configure: Regenerate.
	* configure.tgt: Add rl78 case.
	* config/rl78-defs.h: New file.
	* config/rl78-parse.y: New file.
	* config/tc-rl78.c: New file.
	* config/tc-rl78.h: New file.
	* NEWS: Add Renesas RL78.

	* doc/Makefile.am (c-rl78.texi): New.
	* doc/Makefile.in: Likewise.
	* doc/all.texi: Enable it.
	* doc/as.texi: Add it.

[include]
	* dis-asm.h (print_insn_rl78): Declare.

[include/elf]
	* common.h (EM_RL78, EM_78K0R): New.
	* rl78.h: New.

[include/opcode]
	* rl78.h: New file.

[ld]
	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c.
	(+eelf32rl78.c): New rule.
	* Makefile.in: Regenerate.
	* configure.tgt: Add rl78-*-* case.
	* emulparams/elf32rl78.sh: New file.
	* NEWS: Mention addition of Renesas RL78 support.

[opcodes]
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and
	rl78-dis.c.
	(MAINTAINERCLEANFILES): Add rl78-decode.c.
	(rl78-decode.c): New rule, built from rl78-decode.opc and opc2c.
	* Makefile.in: Regenerate.
	* configure.in: Add bfd_rl78_arch case.
	* configure: Regenerate.
	* disassemble.c: Define ARCH_rl78.
	(disassembler): Add ARCH_rl78 case.
	* rl78-decode.c: New file.
	* rl78-decode.opc: New file.
	* rl78-dis.c: New file.
 2011-11-02 03:09:11 +00:00
Nick Clifton
cfb8c0921c bfd: 
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
	(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
	(BFD32_BACKENDS): Add elf32-epiphany.lo .
	(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
	* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
	* archures.c (bfd_arch_epiphany): Add.
	(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
	(bfd_epiphany_arch): Declare.
	(bfd_archures_list): Add &bfd_epiphany_arch.
	* config.bfd (epiphany-*-elf): New target case.
	* configure.in (bfd_elf32_epiphany_vec): New target vector case.
	* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
	(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
	(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
	(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
	* targets.c (bfd_elf32_epiphany_vec): Declare.
	(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
	* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
	* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
	* readelf.c (include "elf/epiphany.h")
	(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
	(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
	(is_16bit_abs_reloc, is_none_reloc): Likewise.
	* po/binutils.pot: Regenerate.
cpu:
	* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
	* NEWS: Mention addition of Adapteva Epiphany support.
	* config/tc-epiphany.c, config/tc-epiphany.h: New files.
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
	(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
	* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
	* configure.in: Also set using_cgen for epiphany.
	* configure.tgt: Handle epiphany.
	* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
	* doc/all.texi: Set EPIPHANY.
	* doc/as.texinfo: Add EPIPHANY-specific text.
	* doc/c-epiphany.texi: New file.
	* po/gas.pot: Regenerate.
gas/testsuite:
	* gas/epiphany: New directory.
include:
	* dis-asm.h (print_insn_epiphany): Declare.
	* elf/epiphany.h: New file.
	* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
	* NEWS: Mention addition of Adapteva Epiphany support.
	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
	(eelf32epiphany.c): New rule.
	* Makefile.in: Regenerate.
	* configure.tgt: Handle epiphany-*-elf.
	* po/ld.pot: Regenerate.
	* testsuite/ld-srec/srec.exp: xfail epiphany.
	* emulparams/elf32epiphany.sh: New file.
opcodes:
	* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
	(TARGET_LIBOPCODES_CFILES): Add  epiphany-asm.c, epiphany-desc.c,
	epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
	(CLEANFILES): Add stamp-epiphany.
	(EPIPHANY_DEPS): Set.  Make CGEN-generated Epiphany files depend on it.
	(stamp-epiphany): New rule.
	* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
	* configure.in: Handle bfd_epiphany_arch.
	* disassemble.c (ARCH_epiphany): Define.
	(disassembler): Handle bfd_arch_epiphany.
	* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
	* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
	* epiphany-opc.h: Likewise.
 2011-10-25 11:18:16 +00:00
Alan Modra
3b421ab3bc include/elf/ 
* ppc64.h (R_PPC64_TOCSAVE): Add.
bfd/
	* elf64-ppc.c (ppc64_elf_howto_table): Add R_PPC64_TOCSAVE entry.
	(struct ppc_link_hash_table): Add tocsave_htab.
	(struct tocsave_entry): New.
	(tocsave_htab_hash, tocsave_htab_eq, tocsave_find): New functions.
	(ppc64_elf_link_hash_table_create): Create tocsave_htab..
	(ppc64_elf_link_hash_table_free): ..and delete it.
	(build_plt_stub): Always put STD_R2_40R1 first.
	(ppc64_elf_size_stubs): Check for R_PPC64_TOCSAVE following reloc
	on plt call.  If present add prologue nop location to tocsave_htab.
	(ppc64_elf_relocate_section): Convert prologue nop to std.  Skip
	first insn of plt call stub when R_PPC64_TOCSAVE present.
 2011-10-10 13:21:07 +00:00
Nick Clifton
d4cb0ea0ca * readelf.c (get_machine_dlags): Add support for RX's PID mode. 
* ld-scripts/phdrs.exp: Expect to fail for the RX.

	* elf32-rx.c: Add support for PID mode.
	(rx_elf_relocate_section): Add checks for unsafe PID relocations.
	Include addend in R_RX_SYM relocations.

	* config/rx-defs.h (rx_pid_register): New.
	(rx_gp_register): New.
	* config/rx-parse.y (rx_lex): Add support for %gpreg and %pidreg.
	(displacement): Add PID support.
	* config/tc-rx.c (rx_pid_mode): New.
	(rx_num_int_regs): New.
	(rx_pid_register): New.
	(rx_gp_register): New.
	(options): Add -mpid and -mint-register= options.
	(md_longopts): Likewise.
	(md_parse_option): Likewise.
	(md_show_usage): Likewise.
	(rx_pid_symbol): New.
	(rx_pidreg_symbol): New.
	(rx_gpreg_symbol): New.
	(md_begin): Support PID.
	(rx_validate_fix_sub): Support PID.
	(tc_gen_reloc): Support PID.
	* doc/c-rx.texi: Document PID support.

	* rx.h (E_FLAG_RX_PID): New.
 2011-10-05 14:13:31 +00:00
David S. Miller
9e8c70f96b Annotate sparc objects with cpu hardware capabilities used. 
bfd/

	* elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): New.
	* elfxx-sparc.h: Declare it.
	* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Call it.
	* elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise.

binutils/

	* readelf.c (display_sparc_hwcaps): New.
	(display_sparc_gnu_attribute): New.
	(process_sparc_specific): New.
	(process_arch_specific): When EM_SPARC, EM_SPARC32PLUS,
	or EM_SPARCV9 invoke process_sparc_specific.

gas/

	* config/tc-sparc.c (hwcap_seen): New bitmask, defined when
	not TE_SOLARIS.
	(sparc_ip): When not TE_SOLARIS, accumulate hwcap bits from
	sparc_opcode->flags of instruction into hwcap_seen.
	(sparc_md_end): Create Tag_GNU_Sparc_HWCAPS attribute if
	hwcap_seen is non-zero and not TE_SOLARIS.

gas/testsuite/

	* gas/sparc/hpcvis3.s: Update for fixed fchksum16 mnemonic.
	* gas/sparc/hpcvis3.d: Likewise.

include/elf/

	* sparc.h (Tag_GNU_Sparc_HWCAPS): New object attribute.
	(ELF_SPARC_HWCAP_*): New HWCAPS bitmask values.

include/opcode/

	* sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int.
	(F_MUL32, F_DIV32, F_FSMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
	F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
	F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING): New flag bits.

opcodes/

	* sparc-opc.c (sparc_opcodes): Annotate table with HWCAP flag
	bits.  Fix "fchksm16" mnemonic.
 2011-09-21 20:49:16 +00:00
H.J. Lu
505b88fb5d Add R_X86_64_RELATIVE64. 
2011-08-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/13082
	* x86-64.h (R_X86_64_RELATIVE64): New.
 2011-08-12 20:33:34 +00:00
Richard Sandiford
df58fc944d bfd/ 
2011-02-25  Chao-ying Fu  <fu@mips.com>
            Ilie Garbacea  <ilie@mips.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Catherine Moore  <clm@codesourcery.com>
	    Richard Sandiford  <rdsandiford@googlemail.com>

	* archures.c (bfd_mach_mips_micromips): New macro.
	* cpu-mips.c (I_micromips): New enum value.
	(arch_info_struct): Add bfd_mach_mips_micromips.
	* elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New
	prototype.
	(_bfd_mips_elf_relax_section): Likewise.
	(_bfd_mips16_elf_reloc_unshuffle): Rename to...
	(_bfd_mips_elf_reloc_unshuffle): ... this.  Handle microMIPS
	ASE.
	(_bfd_mips16_elf_reloc_shuffle): Rename to...
	(_bfd_mips_elf_reloc_shuffle): ... this.  Handle microMIPS ASE.
	(gprel16_reloc_p): Handle microMIPS ASE.
	(literal_reloc_p): New function.
	* elf32-mips.c (elf_micromips_howto_table_rel): New variable.
	(_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE.
	(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
	and _bfd_mips_elf_reloc_shuffle changes.
	(mips_elf_gprel32_reloc): Update comment.
	(micromips_reloc_map): New variable.
	(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
	(mips_elf32_rtype_to_howto): Likewise.
	(mips_info_to_howto_rel): Likewise.
	(bfd_elf32_bfd_is_target_special_symbol): Define.
	(bfd_elf32_bfd_relax_section): Likewise.
	* elf64-mips.c (micromips_elf64_howto_table_rel): New variable.
	(micromips_elf64_howto_table_rela): Likewise.
	(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
	and _bfd_mips_elf_reloc_shuffle changes.
	(micromips_reloc_map): Likewise.
	(bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE.
	(bfd_elf64_bfd_reloc_name_lookup): Likewise.
	(mips_elf64_rtype_to_howto): Likewise.
	(bfd_elf64_bfd_is_target_special_symbol): Define.
	* elfn32-mips.c (elf_micromips_howto_table_rel): New variable.
	(elf_micromips_howto_table_rela): Likewise.
	(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
	and _bfd_mips_elf_reloc_shuffle changes.
	(micromips_reloc_map): Likewise.
	(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
	(bfd_elf32_bfd_reloc_name_lookup): Likewise.
	(mips_elf_n32_rtype_to_howto): Likewise.
	(bfd_elf32_bfd_is_target_special_symbol): Define.
	* elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro.
	(LA25_LUI_MICROMIPS_2): Likewise.
	(LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise.
	(LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise.
	(TLS_RELOC_P): Handle microMIPS ASE.
	(mips_elf_create_stub_symbol): Adjust value of stub symbol if
	target is a microMIPS function.
	(micromips_reloc_p): New function.
	(micromips_reloc_shuffle_p): Likewise.
	(got16_reloc_p, call16_reloc_p): Handle microMIPS ASE.
	(got_disp_reloc_p, got_page_reloc_p): New functions.
	(got_ofst_reloc_p): Likewise.
	(got_hi16_reloc_p, got_lo16_reloc_p): Likewise.
	(call_hi16_reloc_p, call_lo16_reloc_p): Likewise.
	(hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE.
	(micromips_branch_reloc_p): New function.
	(tls_gd_reloc_p, tls_ldm_reloc_p): Likewise.
	(tls_gottprel_reloc_p): Likewise.
	(_bfd_mips16_elf_reloc_unshuffle): Rename to...
	(_bfd_mips_elf_reloc_unshuffle): ... this.  Handle microMIPS
	ASE.
	(_bfd_mips16_elf_reloc_shuffle): Rename to...
	(_bfd_mips_elf_reloc_shuffle): ... this.  Handle microMIPS ASE.
	(_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE.
	(mips_tls_got_index, mips_elf_got_page): Likewise.
	(mips_elf_create_local_got_entry): Likewise.
	(mips_elf_relocation_needs_la25_stub): Likewise.
	(mips_elf_calculate_relocation): Likewise.
	(mips_elf_perform_relocation): Likewise.
	(_bfd_mips_elf_symbol_processing): Likewise.
	(_bfd_mips_elf_add_symbol_hook): Likewise.
	(_bfd_mips_elf_link_output_symbol_hook): Likewise.
	(mips_elf_add_lo16_rel_addend): Likewise.
	(_bfd_mips_elf_check_relocs): Likewise.
	(mips_elf_adjust_addend): Likewise.
	(_bfd_mips_elf_relocate_section): Likewise.
	(mips_elf_create_la25_stub): Likewise.
	(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
	(_bfd_mips_elf_gc_sweep_hook): Likewise.
	(_bfd_mips_elf_is_target_special_symbol): New function.
	(mips_elf_relax_delete_bytes): Likewise.
	(opcode_descriptor): New structure.
	(RA): New macro.
	(OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise.
	(b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables.
	(beq_insn_32): Likewise.
	(b_insn_16, bz_insn_16): New variables.
	(BZC32_REG_FIELD): New macro.
	(bz_rs_insns_32, bz_rt_insns_32): New variables.
	(bzc_insns_32, bz_insns_16):Likewise.
	(BZ16_REG, BZ16_REG_FIELD): New macros.
	(jal_insn_32_bd16, jal_insn_32_bd32): New variables.
	(jal_x_insn_32_bd32): Likewise.
	(j_insn_32, jalr_insn_32): Likewise.
	(ds_insns_32_bd16, ds_insns_32_bd32): Likewise.
	(jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise.
	(JR16_REG): New macro.
	(ds_insns_16_bd16): New variable.
	(lui_insn): Likewise.
	(addiu_insn, addiupc_insn): Likewise.
	(ADDIUPC_REG_FIELD): New macro.
	(MOVE32_RD, MOVE32_RS): Likewise.
	(MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise.
	(move_insns_32, move_insns_16): New variables.
	(nop_insn_32, nop_insn_16): Likewise.
	(MATCH): New macro.
	(find_match): New function.
	(check_br16_dslot, check_br32_dslot): Likewise.
	(check_br16, check_br32): Likewise.
	(IS_BITSIZE): New macro.
	(check_4byte_branch): New function.
	(_bfd_mips_elf_relax_section): Likewise.
	(_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16
	and microMIPS modules together.
	(_bfd_mips_elf_print_private_bfd_data):	Handle microMIPS ASE.
	* reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation.
	(BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise.
	(BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise.
	(BFD_RELOC_MICROMIPS_GPREL16): Likewise.
	(BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise.
	(BFD_RELOC_MICROMIPS_HI16_S): Likewise.
	(BFD_RELOC_MICROMIPS_LO16): Likewise.
	(BFD_RELOC_MICROMIPS_LITERAL): Likewise.
	(BFD_RELOC_MICROMIPS_GOT16): Likewise.
	(BFD_RELOC_MICROMIPS_CALL16): Likewise.
	(BFD_RELOC_MICROMIPS_GOT_HI16): Likewise.
	(BFD_RELOC_MICROMIPS_GOT_LO16): Likewise.
	(BFD_RELOC_MICROMIPS_CALL_HI16): Likewise.
	(BFD_RELOC_MICROMIPS_CALL_LO16): Likewise.
	(BFD_RELOC_MICROMIPS_SUB): Likewise.
	(BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise.
	(BFD_RELOC_MICROMIPS_GOT_OFST): Likewise.
	(BFD_RELOC_MICROMIPS_GOT_DISP): Likewise.
	(BFD_RELOC_MICROMIPS_HIGHEST): Likewise.
	(BFD_RELOC_MICROMIPS_HIGHER): Likewise.
	(BFD_RELOC_MICROMIPS_SCN_DISP): Likewise.
	(BFD_RELOC_MICROMIPS_JALR): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_GD): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_LDM): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

binutils/
2011-02-25  Chao-ying Fu  <fu@mips.com>
            Maciej W. Rozycki  <macro@codesourcery.com>

	* readelf.c (get_machine_flags): Handle microMIPS ASE.
	(get_mips_symbol_other): Likewise.

gas/
2011-02-25  Maciej W. Rozycki  <macro@codesourcery.com>
            Chao-ying Fu  <fu@mips.com>
	    Richard Sandiford  <rdsandiford@googlemail.com>

	* config/tc-mips.h (mips_segment_info): Add one bit for
	microMIPS.
	(TC_LABEL_IS_LOCAL): New macro.
	(mips_label_is_local): New prototype.
	* config/tc-mips.c (S0, S7): New macros.
	(emit_branch_likely_macro): New variable.
	(mips_set_options): Add micromips.
	(mips_opts): Initialise micromips to -1.
	(file_ase_micromips): New variable.
	(CPU_HAS_MICROMIPS): New macro.
	(hilo_interlocks): Set for microMIPS too.
	(gpr_interlocks): Likewise.
	(cop_interlocks): Likewise.
	(cop_mem_interlocks): Likewise.
	(HAVE_CODE_COMPRESSION): New macro.
	(micromips_op_hash): New variable.
	(micromips_nop16_insn, micromips_nop32_insn): New variables.
	(NOP_INSN): Handle microMIPS ASE.
	(mips32_to_micromips_reg_b_map): New macro.
	(mips32_to_micromips_reg_c_map): Likewise.
	(mips32_to_micromips_reg_d_map): Likewise.
	(mips32_to_micromips_reg_e_map): Likewise.
	(mips32_to_micromips_reg_f_map): Likewise.
	(mips32_to_micromips_reg_g_map): Likewise.
	(mips32_to_micromips_reg_l_map): Likewise.
	(mips32_to_micromips_reg_n_map): Likewise.
	(mips32_to_micromips_reg_h_map): New variable.
	(mips32_to_micromips_reg_m_map): Likewise.
	(mips32_to_micromips_reg_q_map): Likewise.
	(micromips_to_32_reg_h_map): New variable.
	(micromips_to_32_reg_i_map): Likewise.
	(micromips_to_32_reg_m_map): Likewise.
	(micromips_to_32_reg_q_map): Likewise.
	(micromips_to_32_reg_b_map): New macro.
	(micromips_to_32_reg_c_map): Likewise.
	(micromips_to_32_reg_d_map): Likewise.
	(micromips_to_32_reg_e_map): Likewise.
	(micromips_to_32_reg_f_map): Likewise.
	(micromips_to_32_reg_g_map): Likewise.
	(micromips_to_32_reg_l_map): Likewise.
	(micromips_to_32_reg_n_map): Likewise.
	(micromips_imm_b_map, micromips_imm_c_map): New macros.
	(RELAX_DELAY_SLOT_16BIT): New macro.
	(RELAX_DELAY_SLOT_SIZE_FIRST): Likewise.
	(RELAX_DELAY_SLOT_SIZE_SECOND): Likewise.
	(RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros.
	(RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise.
	(RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise.
	(RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
	(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise.
	(RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
	(RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
	(RELAX_MICROMIPS_TOOFAR32): Likewise.
	(RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
	(RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
	(INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE.
	(mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p,
	fsize and insns.
	(mips_mark_labels): New function.
	(mips16_small, mips16_ext): Remove variables, replacing with...
	(forced_insn_size): ... this.
	(append_insn, mips16_ip): Update accordingly.
	(micromips_insn_length): New function.
	(insn_length): Return the length of microMIPS instructions.
	(mips_record_mips16_mode): Rename to...
	(mips_record_compressed_mode): ... this.  Handle microMIPS ASE.
	(install_insn): Handle microMIPS ASE.
	(reglist_lookup): New function.
	(is_size_valid, is_delay_slot_valid): Likewise.
	(md_begin): Handle microMIPS ASE.
	(md_assemble): Likewise.  Update for append_insn interface change.
	(micromips_reloc_p): New function.
	(got16_reloc_p): Handle microMIPS ASE.
	(hi16_reloc_p): Likewise.
	(lo16_reloc_p): Likewise.
	(jmp_reloc_p): New function.
	(jalr_reloc_p): Likewise.
	(matching_lo_reloc): Handle microMIPS ASE.
	(insn_uses_reg, reg_needs_delay): Likewise.
	(mips_move_labels): Likewise.
	(mips16_mark_labels): Rename to...
	(mips_compressed_mark_labels): ... this.  Handle microMIPS ASE.
	(gpr_mod_mask): New function.
	(gpr_read_mask, gpr_write_mask): Handle microMIPS ASE.
	(fpr_read_mask, fpr_write_mask): Likewise.
	(insns_between, nops_for_vr4130, nops_for_insn): Likewise.
	(fix_loongson2f_nop, fix_loongson2f_jump): Likewise.
	(MICROMIPS_LABEL_CHAR): New macro.
	(micromips_target_label, micromips_target_name): New variables.
	(micromips_label_name, micromips_label_expr): New functions.
	(micromips_label_inc, micromips_add_label): Likewise.
	(mips_label_is_local): Likewise.
	(micromips_map_reloc): Likewise.
	(can_swap_branch_p): Handle microMIPS ASE.
	(append_insn): Add expansionp argument.  Handle microMIPS ASE.
	(start_noreorder, end_noreorder): Handle microMIPS ASE.
	(macro_start, macro_warning, macro_end): Likewise.
	(brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables.
	(mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise.
	(BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros.
	(MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise.
	(macro_build): Handle microMIPS ASE.  Update for append_insn
	interface change.
	(mips16_macro_build): Update for append_insn interface change.
	(macro_build_jalr): Handle microMIPS ASE.
	(macro_build_lui): Likewise.  Simplify.
	(load_register): Handle microMIPS ASE.
	(load_address): Likewise.
	(move_register): Likewise.
	(macro_build_branch_likely): New function.
	(macro_build_branch_ccl): Likewise.
	(macro_build_branch_rs): Likewise.
	(macro_build_branch_rsrt): Likewise.
	(macro): Handle microMIPS ASE.
	(validate_micromips_insn): New function.
	(expr_const_in_range): Likewise.
	(mips_ip): Handle microMIPS ASE.
	(options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS.
	(md_longopts): Add mmicromips and mno-micromips.
	(md_parse_option): Handle OPTION_MICROMIPS and
	OPTION_NO_MICROMIPS.
	(mips_after_parse_args): Handle microMIPS ASE.
	(md_pcrel_from): Handle microMIPS relocations.
	(mips_force_relocation): Likewise.
	(md_apply_fix): Likewise.
	(mips_align): Handle microMIPS ASE.
	(s_mipsset): Likewise.
	(s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers.
	(s_dtprel_internal): Likewise.
	(s_gpword, s_gpdword): Likewise.
	(s_insn): Handle microMIPS ASE.
	(s_mips_stab): Likewise.
	(relaxed_micromips_32bit_branch_length): New function.
	(relaxed_micromips_16bit_branch_length): New function.
	(md_estimate_size_before_relax): Handle microMIPS ASE.
	(mips_fix_adjustable): Likewise.
	(tc_gen_reloc): Handle microMIPS relocations.
	(mips_relax_frag): Handle microMIPS ASE.
	(md_convert_frag): Likewise.
	(mips_frob_file_after_relocs): Likewise.
	(mips_elf_final_processing): Likewise.
	(mips_nop_opcode): Likewise.
	(mips_handle_align): Likewise.
	(md_show_usage): Handle microMIPS options.
	* symbols.c (TC_LABEL_IS_LOCAL): New macro.
	(S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check.

	* doc/as.texinfo (Target MIPS options): Add -mmicromips and
	-mno-micromips.
	(-mmicromips, -mno-micromips): New options.
	* doc/c-mips.texi (-mmicromips, -mno-micromips): New options.
	(MIPS ISA): Document .set micromips and .set nomicromips.
	(MIPS insn): Update for microMIPS support.

gas/testsuite/
2011-02-25  Maciej W. Rozycki  <macro@codesourcery.com>
            Chao-ying Fu  <fu@mips.com>
	    Richard Sandiford  <rdsandiford@googlemail.com>

	* gas/mips/micromips.d: New test.
	* gas/mips/micromips-branch-delay.d: Likewise.
	* gas/mips/micromips-branch-relax.d: Likewise.
	* gas/mips/micromips-branch-relax-pic.d: Likewise.
	* gas/mips/micromips-size-1.d: Likewise.
	* gas/mips/micromips-trap.d: Likewise.
	* gas/mips/micromips.l: New stderr output.
	* gas/mips/micromips-branch-delay.l: Likewise.
	* gas/mips/micromips-branch-relax.l: Likewise.
	* gas/mips/micromips-branch-relax-pic.l: Likewise.
	* gas/mips/micromips-size-0.l: New list test.
	* gas/mips/micromips-size-1.l: New stderr output.
	* gas/mips/micromips.s: New test source.
	* gas/mips/micromips-branch-delay.s: Likewise.
	* gas/mips/micromips-branch-relax.s: Likewise.
	* gas/mips/micromips-size-0.s: Likewise.
	* gas/mips/micromips-size-1.s: Likewise.
	* gas/mips/mips.exp: Run the new tests.

	* gas/mips/dli.s: Use .p2align.
	* gas/mips/elf_ase_micromips.d: New test.
	* gas/mips/elf_ase_micromips-2.d: Likewise.
	* gas/mips/micromips@abs.d: Likewise.
	* gas/mips/micromips@add.d: Likewise.
	* gas/mips/micromips@alnv_ps-swap.d: Likewise.
	* gas/mips/micromips@and.d: Likewise.
	* gas/mips/micromips@beq.d: Likewise.
	* gas/mips/micromips@bge.d: Likewise.
	* gas/mips/micromips@bgeu.d: Likewise.
	* gas/mips/micromips@blt.d: Likewise.
	* gas/mips/micromips@bltu.d: Likewise.
	* gas/mips/micromips@branch-likely.d: Likewise.
	* gas/mips/micromips@branch-misc-1.d: Likewise.
	* gas/mips/micromips@branch-misc-2-64.d: Likewise.
	* gas/mips/micromips@branch-misc-2.d: Likewise.
	* gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
	* gas/mips/micromips@branch-misc-2pic.d: Likewise.
	* gas/mips/micromips@branch-misc-4-64.d: Likewise.
	* gas/mips/micromips@branch-misc-4.d: Likewise.
	* gas/mips/micromips@branch-self.d: Likewise.
	* gas/mips/micromips@cache.d: Likewise.
	* gas/mips/micromips@daddi.d: Likewise.
	* gas/mips/micromips@dli.d: Likewise.
	* gas/mips/micromips@elf-jal.d: Likewise.
	* gas/mips/micromips@elf-rel2.d: Likewise.
	* gas/mips/micromips@elfel-rel2.d: Likewise.
	* gas/mips/micromips@elf-rel4.d: Likewise.
	* gas/mips/micromips@jal-svr4pic.d: Likewise.
	* gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise.
	* gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise.
	* gas/mips/micromips@li.d: Likewise.
	* gas/mips/micromips@loc-swap-dis.d: Likewise.
	* gas/mips/micromips@loc-swap.d: Likewise.
	* gas/mips/micromips@mips1-fp.d: Likewise.
	* gas/mips/micromips@mips32-cp2.d: Likewise.
	* gas/mips/micromips@mips32-imm.d: Likewise.
	* gas/mips/micromips@mips32-sf32.d: Likewise.
	* gas/mips/micromips@mips32.d: Likewise.
	* gas/mips/micromips@mips32r2-cp2.d: Likewise.
	* gas/mips/micromips@mips32r2-fp32.d: Likewise.
	* gas/mips/micromips@mips32r2-sync.d: Likewise.
	* gas/mips/micromips@mips32r2.d: Likewise.
	* gas/mips/micromips@mips4-branch-likely.d: Likewise.
	* gas/mips/micromips@mips4-fp.d: Likewise.
	* gas/mips/micromips@mips4.d: Likewise.
	* gas/mips/micromips@mips5.d: Likewise.
	* gas/mips/micromips@mips64-cp2.d: Likewise.
	* gas/mips/micromips@mips64.d: Likewise.
	* gas/mips/micromips@mips64r2.d: Likewise.
	* gas/mips/micromips@pref.d: Likewise.
	* gas/mips/micromips@relax-at.d: Likewise.
	* gas/mips/micromips@relax.d: Likewise.
	* gas/mips/micromips@rol-hw.d: Likewise.
	* gas/mips/micromips@uld2-eb.d: Likewise.
	* gas/mips/micromips@uld2-el.d: Likewise.
	* gas/mips/micromips@ulh2-eb.d: Likewise.
	* gas/mips/micromips@ulh2-el.d: Likewise.
	* gas/mips/micromips@ulw2-eb-ilocks.d: Likewise.
	* gas/mips/micromips@ulw2-el-ilocks.d: Likewise.
	* gas/mips/cache.d: Likewise.
	* gas/mips/daddi.d: Likewise.
	* gas/mips/mips32-imm.d: Likewise.
	* gas/mips/pref.d: Likewise.
	* gas/mips/elf-rel27.d: Handle microMIPS ASE.
	* gas/mips/l_d.d: Likewise.
	* gas/mips/l_d-n32.d: Likewise.
	* gas/mips/l_d-n64.d: Likewise.
	* gas/mips/ld.d: Likewise.
	* gas/mips/ld-n32.d: Likewise.
	* gas/mips/ld-n64.d: Likewise.
	* gas/mips/s_d.d: Likewise.
	* gas/mips/s_d-n32.d: Likewise.
	* gas/mips/s_d-n64.d: Likewise.
	* gas/mips/sd.d: Likewise.
	* gas/mips/sd-n32.d: Likewise.
	* gas/mips/sd-n64.d: Likewise.
	* gas/mips/mips32.d: Update immediates.
	* gas/mips/micromips@mips32-cp2.s: New test source.
	* gas/mips/micromips@mips32-imm.s: Likewise.
	* gas/mips/micromips@mips32r2-cp2.s: Likewise.
	* gas/mips/micromips@mips64-cp2.s: Likewise.
	* gas/mips/cache.s: Likewise.
	* gas/mips/daddi.s: Likewise.
	* gas/mips/mips32-imm.s: Likewise.
	* gas/mips/elf-rel4.s: Handle microMIPS ASE.
	* gas/mips/lb-pic.s: Likewise.
	* gas/mips/ld.s: Likewise.
	* gas/mips/mips32.s: Likewise.
	* gas/mips/mips.exp: Add the micromips arch.  Exclude mips16e
	from micromips.  Run mips32-imm.

	* gas/mips/jal-mask-11.d: New test.
	* gas/mips/jal-mask-12.d: Likewise.
	* gas/mips/micromips@jal-mask-11.d: Likewise.
	* gas/mips/jal-mask-1.s: Source for the new tests.
	* gas/mips/jal-mask-21.d: New test.
	* gas/mips/jal-mask-22.d: Likewise.
	* gas/mips/micromips@jal-mask-12.d: Likewise.
	* gas/mips/jal-mask-2.s: Source for the new tests.
	* gas/mips/mips.exp: Run the new tests.

	* gas/mips/mips16-e.d: Add --special-syms to `objdump'.
	* gas/mips/tmips16-e.d: Likewise.
	* gas/mips/mipsel16-e.d: Likewise.
	* gas/mips/tmipsel16-e.d: Likewise.

	* gas/mips/and.s: Adjust padding.
	* gas/mips/beq.s: Likewise.
	* gas/mips/bge.s: Likewise.
	* gas/mips/bgeu.s: Likewise.
	* gas/mips/blt.s: Likewise.
	* gas/mips/bltu.s: Likewise.
	* gas/mips/branch-misc-2.s: Likewise.
	* gas/mips/jal.s: Likewise.
	* gas/mips/li.s: Likewise.
	* gas/mips/mips4.s: Likewise.
	* gas/mips/mips4-fp.s: Likewise.
	* gas/mips/relax.s: Likewise.
	* gas/mips/and.d: Update accordingly.
	* gas/mips/elf-jal.d: Likewise.
	* gas/mips/jal.d: Likewise.
	* gas/mips/li.d: Likewise.
	* gas/mips/relax-at.d: Likewise.
	* gas/mips/relax.d: Likewise.

include/elf/
2011-02-25  Chao-ying Fu  <fu@mips.com>
            Maciej W. Rozycki  <macro@codesourcery.com>

	* mips.h (R_MICROMIPS_min): New relocations.
	(R_MICROMIPS_26_S1): Likewise.
	(R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise.
	(R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise.
	(R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise.
	(R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise.
	(R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise.
	(R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise.
	(R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise.
	(R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise.
	(R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise.
	(R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise.
	(R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise.
	(R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise.
	(R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise.
	(R_MICROMIPS_TLS_GOTTPREL): Likewise.
	(R_MICROMIPS_TLS_TPREL_HI16): Likewise.
	(R_MICROMIPS_TLS_TPREL_LO16): Likewise.
	(R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise.
	(R_MICROMIPS_max): Likewise.
	(EF_MIPS_ARCH_ASE_MICROMIPS): New macro.
	(STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise.
	(ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise.
	(STO_MICROMIPS): Likewise.
	(ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise.
	(ELF_ST_IS_COMPRESSED): Likewise.
	(STO_MIPS_PLT, STO_MIPS_PIC): Rework.
	(ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise.
	(STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise.

include/opcode/
2011-02-25  Chao-ying Fu  <fu@mips.com>
            Maciej W. Rozycki  <macro@codesourcery.com>

	* mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros.
	(OP_MASK_STYPE, OP_SH_STYPE): Likewise.
	(OP_MASK_CODE10, OP_SH_CODE10): Likewise.
	(OP_MASK_TRAP, OP_SH_TRAP): Likewise.
	(OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise.
	(OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise.
	(OP_MASK_RS3, OP_SH_RS3): Likewise.
	(OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise.
	(OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise.
	(OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise.
	(OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise.
	(OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise.
	(OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise.
	(OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise.
	(OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise.
	(OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise.
	(OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise.
	(OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise.
	(OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise.
	(OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise.
	(OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise.
	(INSN_WRITE_GPR_S): New macro.
	(INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise.
	(INSN2_READ_FPR_D): Likewise.
	(INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise.
	(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise.
	(INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise.
	(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise.
	(INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise.
	(INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise.
	(INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise.
	(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise.
	(CPU_MICROMIPS): New macro.
	(M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values.
	(M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise.
	(M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise.
	(M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise.
	(M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise.
	(M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise.
	(M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise.
	(M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise.
	(M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise.
	(M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise.
	(M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise.
	(M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise.
	(M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise.
	(MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros.
	(MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise.
	(MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise.
	(MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise.
	(MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise.
	(MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise.
	(MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise.
	(MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise.
	(MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise.
	(MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise.
	(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
	(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
	(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
	(MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise.
	(MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise.
	(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise.
	(MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise.
	(MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise.
	(MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise.
	(MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise.
	(MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise.
	(MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise.
	(MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise.
	(MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise.
	(MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise.
	(MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise.
	(MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise.
	(MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise.
	(MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise.
	(MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise.
	(MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise.
	(MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise.
	(MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise.
	(MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise.
	(MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise.
	(MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise.
	(MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise.
	(MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise.
	(MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise.
	(MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise.
	(MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise.
	(MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise.
	(MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise.
	(MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise.
	(MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise.
	(MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise.
	(MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise.
	(MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise.
	(MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise.
	(MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise.
	(MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise.
	(MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise.
	(MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise.
	(MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise.
	(MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise.
	(MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise.
	(MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise.
	(MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise.
	(MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise.
	(MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise.
	(MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise.
	(MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise.
	(MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise.
	(MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise.
	(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
	(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
	(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
	(MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise.
	(MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise.
	(MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise.
	(MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise.
	(MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise.
	(MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise.
	(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise.
	(MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise.
	(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
	(MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise.
	(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
	(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
	(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
	(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
	(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
	(MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise.
	(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
	(MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise.
	(MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise.
	(MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise.
	(MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise.
	(MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise.
	(MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise.
	(MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise.
	(MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise.
	(micromips_opcodes): New declaration.
	(bfd_micromips_num_opcodes): Likewise.

ld/testsuite/
2011-02-25  Catherine Moore  <clm@codesourcery.com>
            Chao-ying Fu  <fu@mips.com>
            Maciej W. Rozycki  <macro@codesourcery.com>

	* lib/ld-lib.exp (run_dump_test): Support distinct assembler
	flags for the same source named multiple times.
	* ld-mips-elf/jalx-1.s: New test source.
	* ld-mips-elf/jalx-1.d: New test output.
	* ld-mips-elf/jalx-1.ld: New test linker script.
	* ld-mips-elf/jalx-2-main.s: New test source.
	* ld-mips-elf/jalx-2-ex.s: Likewise.
	* ld-mips-elf/jalx-2-printf.s: Likewise.
	* ld-mips-elf/jalx-2.dd: New test output.
	* ld-mips-elf/jalx-2.ld: New test linker script.
	* ld-mips-elf/mips16-and-micromips.d: New test.
	* ld-mips-elf/mips-elf.exp: Run the new tests

opcodes/
2011-02-25  Chao-ying Fu  <fu@mips.com>
            Maciej W. Rozycki  <macro@codesourcery.com>

	* micromips-opc.c: New file.
	* mips-dis.c (micromips_to_32_reg_b_map): New array.
	(micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise.
	(micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise.
	(micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise.
	(micromips_to_32_reg_q_map): Likewise.
	(micromips_imm_b_map, micromips_imm_c_map): Likewise.
	(micromips_ase): New variable.
	(is_micromips): New function.
	(set_default_mips_dis_options): Handle microMIPS ASE.
	(print_insn_micromips): New function.
	(is_compressed_mode_p): Likewise.
	(_print_insn_mips): Handle microMIPS instructions.
	* Makefile.am (CFILES): Add micromips-opc.c.
	* configure.in (bfd_mips_arch): Add micromips-opc.lo.
	* Makefile.in: Regenerate.
	* configure: Regenerate.

	* mips-dis.c (micromips_to_32_reg_h_map): New variable.
	(micromips_to_32_reg_i_map): Likewise.
	(micromips_to_32_reg_m_map): Likewise.
	(micromips_to_32_reg_n_map): New macro.
 2011-07-24 14:20:15 +00:00
H.J. Lu
7a9068fe16 Add initial Intel K1OM support. 
bfd/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ALL_MACHINES): Add cpu-k1om.lo.
	(ALL_MACHINES_CFILES): Add cpu-k1om.c.
	* Makefile.in: Regenerated.

	* archures.c (bfd_architecture): Add bfd_arch_k1om.
	(bfd_k1om_arch): New.
	(bfd_archures_list): Add &bfd_k1om_arch.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if
	bfd_elf64_x86_64_vec is supported.  Add bfd_elf64_k1om_freebsd_vec
	if bfd_elf64_x86_64_freebsd_vec is supported.
	(targ_selvecs): Likewise.

	* configure.in: Support bfd_elf64_k1om_vec and
	bfd_elf64_k1om_freebsd_vec.
	* configure: Regenerated.

	* cpu-k1om.c: New.

	* elf64-x86-64.c (elf64_k1om_elf_object_p): New.
	(bfd_elf64_k1om_vec): Likewise.
	(bfd_elf64_k1om_freebsd_vec): Likewise.

	* targets.c (bfd_elf64_k1om_vec): New.
	(bfd_elf64_k1om_freebsd_vec): Likewise.
	(_bfd_target_vector): Add bfd_elf64_k1om_vec and
	bfd_elf64_k1om_freebsd_vec.

binutils/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (init_dwarf_regnames): Handle EM_K1OM.

	* elfedit.c (elf_machine): Support EM_K1OM.
	(elf_class): Likewise.

	* readelf.c (guess_is_rela): Handle EM_K1OM.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(get_section_type_name): Likewise.
	(get_elf_section_flags): Likewise.
	(process_section_headers): Likewise.
	(get_symbol_index_type): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_32bit_pcrel_reloc): Likewise.
	(is_64bit_abs_reloc): Likewise.
	(is_64bit_pcrel_reloc): Likewise.
	(is_none_reloc): Likewise.

	* doc/binutils.texi: Mention K1OM for elfedit.

binutils/testsuite/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* binutils-all/elfedit.exp: Run elfedit-4.

	* binutils-all/elfedit-4.d: New.

gas/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add k1om.
	(i386_align_code): Handle PROCESSOR_K1OM.
	(check_cpu_arch_compatible): Check EM_K1OM.
	(i386_arch): Handle Intel K1OM.
	(i386_mach): Return bfd_mach_k1om for Intel K1OM.
	(i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel
	K1OM.

	* config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New.
	(processor_type): Add PROCESSOR_K1OM.

	* doc/c-i386.texi: Document k1om.

gas/testsuite/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/k1om.d: New.
	* gas/i386/k1om-inval.l: Likewise.
	* gas/i386/k1om-inval.s: Likewise.

	* gas/i386/i386.exp: Run k1om-inval and k1om.

include/elf/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* common.h (EM_K1OM): New.

ld/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and
	eelf_k1om_fbsd.o
	(eelf_k1om.c): New.
	(eelf_k1om_fbsd.c): Likewise.
	* Makefile.in: Regenerated.

	* configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64
	is supported.  Add elf_k1om_fbsd if elf_x86_64_fbsd is supported.
	(targ_extra_emuls): Likewise.

	* emulparams/elf_k1om.sh: New.
	* emulparams/elf_k1om_fbsd.sh: Likewise.

ld/testsuite/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/abs-k1om.d: New.
	* ld-x86-64/protected2-k1om.d: Likewise.
	* ld-x86-64/protected3-k1om.d: Likewise.

	* ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and
	protected3-k1om.

opcodes/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in: Handle bfd_k1om_arch.
	* configure: Regenerated.

	* disassemble.c (disassembler): Handle bfd_k1om_arch.

	* i386-dis.c (print_insn): Handle bfd_mach_k1om and
	bfd_mach_k1om_intel_syntax.

	* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to
	~(CpuL1OM|CpuK1OM).  Add CPU_K1OM_FLAGS.
	(cpu_flags): Add CpuK1OM.

	* i386-opc.h (CpuK1OM): New.
	(i386_cpu_flags): Add cpuk1om.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2011-07-22 20:22:38 +00:00
Thomas Schwinge
2bb70ae0f4 ELFOSABI_GNU 
bfd/
	* elf.c (_bfd_elf_set_osabi): Use ELFOSABI_GNU name instead of
	ELFOSABI_LINUX alias.
	* elf32-hppa.c: Likewise.
	* elf32-i370.c: Likewise.
	* elf64-hppa.c: Likewise.

	binutils/
	* elfedit.c (osabis): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX
	alias and ELFOSABI_HURD.  Add GNU alias.
	* readelf.c (get_osabi_name, get_symbol_binding, get_symbol_type):
	Likewise.
	* doc/binutils.texi <elfedit>: Update accordingly.

	elfcpp/
	* elfcpp.h (ELFOSABI): Add ELFOSABI_GNU with value of ELFOSABI_LINUX,
	keep ELFOSABI_LINUX as an alias.  Remove ELFOSABI_HURD.

	gas/
	* config/obj-elf.c (obj_elf_type): Use ELFOSABI_GNU name instead of
	ELFOSABI_LINUX alias.
	* config/tc-ia64.c: Likewise.

	include/elf/
	* common.h (ELFOSABI_GNU): Define, replaces...
	(ELFOSABI_LINUX): ... this, kept as an alias.
	(ELFOSABI_HURD): Remove.

	ld/testsuite/
	* ld-ifunc/ifunc.exp: Update for changed output.
	* ld-unique/unique.exp: Likewise.
 2011-07-03 13:45:32 +00:00
Thomas Schwinge
9c55345c8c ELFOSABI_GNU 
bfd/
	* elf.c (_bfd_elf_set_osabi): Use ELFOSABI_GNU name instead of
	ELFOSABI_LINUX alias.
	* elf32-hppa.c: Likewise.
	* elf32-i370.c: Likewise.
	* elf64-hppa.c: Likewise.

	binutils/
	* elfedit.c (osabis): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX
	alias and ELFOSABI_HURD.  Add GNU alias.
	* readelf.c (get_osabi_name, get_symbol_binding, get_symbol_type):
	Likewise.
	* doc/binutils.texi <elfedit>: Update accordingly.

	elfcpp/
	* elfcpp.h (ELFOSABI): Add ELFOSABI_GNU with value of ELFOSABI_LINUX,
	keep ELFOSABI_LINUX as an alias.  Remove ELFOSABI_HURD.

	gas/
	* config/obj-elf.c (obj_elf_type): Use ELFOSABI_GNU name instead of
	ELFOSABI_LINUX alias.
	* config/tc-ia64.c: Likewise.

	include/elf/
	* common.h (ELFOSABI_GNU): Define, replaces...
	(ELFOSABI_LINUX): ... this, kept as an alias.
	(ELFOSABI_HURD): Remove.

	ld/testsuite/
	* ld-ifunc/ifunc.exp: Update for changed output.
	* ld-unique/unique.exp: Likewise.
 2011-07-03 13:37:09 +00:00
Ulrich Weigand
faa9a424ea include/elf/ 
* common.h (NT_ARM_VFP): Define.

bfd/
	* elf-bfd.h (elfcore_write_arm_vfp): Add prototype.
	* elf.c (elfcore_grok_arm_vfp): New function.
	(elfcore_grok_note): Call it to handle NT_ARM_VFP notes.
	(elfcore_write_arm_vfp): New function.
	(elfcore_write_register_note): Call it to handle .reg-arm-vfp.

binutils/
	* readelf.c (get_note_type): Handle NT_ARM_VFP.
 2011-06-15 16:36:58 +00:00
Nick Clifton
aa137e4d51 * Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. 
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
    (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
    and elfxx-tilegx.lo.
    (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
    elfxx-tilegx.c.
    (BFD64_BACKENDS): Add elf64-tilegx.lo.
    (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
    * Makefile.in: Regenerate.
    * arctures.c (bfd_architecture): Define bfd_arch_tilepro,
    bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
    (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
    (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
    bfd-in2.h: Regenerate.
    * config.bfd: Handle tilegx-*-* and tilepro-*-*.
    * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * configure: Regenerate.
    * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
    TILEPRO_ELF_DATA.
    * libbfd.h: Regenerate.
    * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
    RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
    IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
    IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
    IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
    IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
    IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
    IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
    IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
    IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
    MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
    IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
    IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
    IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
    IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
    IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
    IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
    HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
    JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
    DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
    SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
    IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
    IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
    IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
    IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
    IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
    IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
    IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
    IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
    IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
    IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
    IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
    IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
    IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
    IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
    IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
    IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
    IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
    IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
    IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
    IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
    IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
    IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
    IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
    IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
    IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
    IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
    IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
    TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    * targets.c (bfd_elf32_tilegx_vec): Declare.
    (bfd_elf32_tilepro_vec): Declare.
    (bfd_elf64_tilegx_vec): Declare.
    (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * cpu-tilegx.c: New file.
    * cpu-tilepro.c: New file.
    * elf32-tilepro.h: New file.
    * elf32-tilepro.c: New file.
    * elf32-tilegx.c: New file.
    * elf32-tilegx.h: New file.
    * elf64-tilegx.c: New file.
    * elf64-tilegx.h: New file.
    * elfxx-tilegx.c: New file.
    * elfxx-tilegx.h: New file.

	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
	config/tc-tilepro.c.
	(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
	config/tc-tilepro.h.
	* Makefile.in: Regenerate.
	* configure.tgt (tilepro-*-*): New.
	(tilegx-*-*): Likewise.
	* config/tc-tilegx.c: New file.
	* config/tc-tilegx.h: Likewise.
	* config/tc-tilepro.h: Likewise.
	* config/tc-tilepro.c: Likewise.
	* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
	c-tilepro.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TILEGX): Define.
	(TILEPRO): Define.
	* doc/as.texinfo: Add Tile-Gx and TILEPro documentation.  Include
	c-tilegx.texi and c-tilepro.texi.
	* doc/c-tilegx.texi: New.
	* doc/c-tilepro.texi: New.

        * gas/tilepro/t_constants.s: New file.
	* gas/tilepro/t_constants.d: Likewise.
	* gas/tilepro/t_insns.s: Likewise.
	* gas/tilepro/tilepro.exp: Likewise.
	* gas/tilepro/t_insns.d: Likewise.
	* gas/tilegx/tilegx.exp: Likewise.
	* gas/tilegx/t_insns.d: Likewise.
	* gas/tilegx/t_insns.s: Likewise.

	* dis-asm.h (print_insn_tilegx): Declare.
	(print_insn_tilepro): Likewise.

	* tilegx.h: New file.
	* tilepro.h: New file.

	* common.h: Add EM_TILEGX.
	* tilegx.h: New file.
	* tilepro.h: New file.

	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
	eelf32tilepro.c.
	(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
	(eelf32tilegx.c): New target.
	(eelf32tilepro.c): Likewise.
	(eelf64tilegx.c): Likewise.
	* Makefile.in: Regenerate.
	* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
	* emulparams/elf32tilegx.sh: New file.
	* emulparams/elf64tilegx.sh: New file.
	* emulparams/elf32tilepro.sh: New file.

	* ld-elf/eh5.d: Don't run on tile*.
	* ld-srec/srec.exp: xfail on tile*.
	* ld-tilegx/external.s: New file.
	* ld-tilegx/reloc.d: New file.
	* ld-tilegx/reloc.s: New file.
	* ld-tilegx/tilegx.exp: New file.
	* ld-tilepro/external.s: New file.
	* ld-tilepro/reloc.d: New file.
	* ld-tilepro/reloc.s: New file.
	* ld-tilepro/tilepro.exp: New file.

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
	tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
	* Makefile.in: Regenerate.
	* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
	* po/POTFILES.in: Regenerate.
	* tilegx-dis.c: New file.
	* tilegx-opc.c: New file.
	* tilepro-dis.c: New file.
	* tilepro-opc.c: New file.
 2011-06-13 15:18:54 +00:00
Tristan Gingold
2ddcd4af49 2011-06-09 Tristan Gingold <gingold@adacore.com> 
* ia64.h (Elf64_External_VMS_ORIG_DYN_Note): New struct.
 2011-06-09 08:53:05 +00:00
Nick Clifton
cc643b88f1 Fix spelling mistakes. 2011-06-02 13:43:24 +00:00
Paul Brook
63e1a0fcba 2011-05-31 Paul Brook <paul@codesourcery.com> 
bfd/
	* elf32-arm.c (elf32_arm_final_link_relocate): Only do bl conversion
	for known functions.
	(elf32_arm_swap_symbol_in): Only set ST_BRANCH_TO_ARM for function
	symbols.

	include/elf/
	* arm.h (arm_st_branch_type): Add ST_BRANCH_UNKNOWN.

	ld/testsuite/
	* ld-arm/cortex-a8-far.d: Adjust expected output.
	* ld-arm/arm-call1.s: Give function symbol correct type.
	* ld-arm/arm-call2.s: Ditto.
	* ld-arm/farcall-group4.s: Ditto.
	* ld-arm/arm-elf.exp (cortex-a8-far): Define far symbols with correct
	type via assembly file.
	* ld-arm/cortex-a8-far-3.s: New file.
	* ld-arm/abs-call-1.s: Add Thumb tests
 2011-05-31 14:07:58 +00:00
Nick Clifton
e21e5835b6 * elf-bfd.h (struct sdt_note): New struct. 
(struct elf_obj_tdata) <sdt_note_head>: New field.
	* elf.c (elfobj_grok_stapsdt_note_1): New function.
	(elfobj_grok_stapsdt_note): Likewise.
	(elf_parse_notes): Added code to treat SystemTap note
	sections.
	* common.h (NT_STAPSDT): New define.
 2011-04-15 11:14:01 +00:00
Bernd Schmidt
c7811365ac Move ChangeLog entry to correct directory. 2011-03-31 14:40:11 +00:00
Tristan Gingold
00e98fc759 binutils/ 
2011-03-31  Tristan Gingold  <gingold@adacore.com>

	* readelf.c (get_ia64_vms_note_type): New function.
	(print_ia64_vms_note): Ditto.
	(process_note): Recognize VMS/ia64 specific notes.
	Display them.
	(process_corefile_note_segment): Decode VMS notes.

include/elf
2011-03-31  Tristan Gingold  <gingold@adacore.com>

	* ia64.h (Elf64_External_VMS_Note): New struct.
	(NT_VMS_MHD, NT_VMS_LNM, NT_VMS_SRC, NT_VMS_TITLE, NT_VMS_EIDC,
	NT_VMS_FPMODE, NT_VMS_LINKTIME, NT_VMS_IMGNAM, NT_VMS_IMGID
	NT_VMS_LINKID, NT_VMS_IMGBID, NT_VMS_GSTNAM, NT_VMS_ORIG_DYN)
	NT_VMS_PATCHTIME) New macros.
 2011-03-31 07:49:45 +00:00
Richard Sandiford
34e77a920a include/elf/ 
* arm.h (R_ARM_IRELATIVE): New relocation.

bfd/
	* reloc.c (BFD_RELOC_ARM_IRELATIVE): New relocation.
	* bfd-in2.h: Regenerate.
	* elf32-arm.c (elf32_arm_howto_table_2): Rename existing definition
	to elf32_arm_howto_table_3 and replace with a single R_ARM_IRELATIVE
	entry.
	(elf32_arm_howto_from_type): Update accordingly.
	(elf32_arm_reloc_map): Map BFD_RELOC_ARM_IRELATIVE to R_ARM_IRELATIVE.
	(elf32_arm_reloc_name_lookup): Handle elf32_arm_howto_table_3.
	(arm_plt_info): New structure, split out from elf32_arm_link_hash_entry
	with an extra noncall_refcount field.
	(arm_local_iplt_info): New structure.
	(elf_arm_obj_tdata): Add local_iplt.
	(elf32_arm_local_iplt): New accessor macro.
	(elf32_arm_link_hash_entry): Replace plt_thumb_refcount,
	plt_maybe_thumb_refcount and plt_got_offset with an arm_plt_info.
	Change tls_type to a bitfield and add is_iplt.
	(elf32_arm_link_hash_newfunc): Update accordingly.
	(elf32_arm_allocate_local_sym_info): New function.
	(elf32_arm_create_local_iplt): Likewise.
	(elf32_arm_get_plt_info): Likewise.
	(elf32_arm_plt_needs_thumb_stub_p): Likewise.
	(elf32_arm_get_local_dynreloc_list): Likewise.
	(create_ifunc_sections): Likewise.
	(elf32_arm_copy_indirect_symbol): Update after the changes to
	elf32_arm_link_hash_entry.  Assert the is_iplt has not yet been set.
	(arm_type_of_stub): Add an st_type argument.  Use elf32_arm_get_plt_info
	to get PLT information.  Assert that all STT_GNU_IFUNC references
	are turned into PLT references.
	(arm_build_one_stub): Pass the symbol type to
	elf32_arm_final_link_relocate.
	(elf32_arm_size_stubs): Pass the symbol type to arm_type_of_stub.
	(elf32_arm_allocate_irelocs): New function.
	(elf32_arm_add_dynreloc): In static objects, use .rel.iplt for
	all R_ARM_IRELATIVE.
	(elf32_arm_allocate_plt_entry): New function.
	(elf32_arm_populate_plt_entry): Likewise.
	(elf32_arm_final_link_relocate): Add an st_type parameter.
	Set srelgot to null for static objects.  Use separate variables
	to record which st_value and st_type should be used when generating
	a dynamic relocation.  Use elf32_arm_get_plt_info to find the
	symbol's PLT information, setting has_iplt_entry, splt,
	plt_offset and gotplt_offset accordingly.  Check whether
	STT_GNU_IFUNC symbols should resolve to an .iplt entry, and change
	the relocation target accordingly.  Broaden assert to include
	.iplts.  Don't set sreloc for static relocations.  Assert that
	we only generate dynamic R_ARM_RELATIVE relocations for R_ARM_ABS32
	and R_ARM_ABS32_NOI.  Generate R_ARM_IRELATIVE relocations instead
	of R_ARM_RELATIVE relocations if the target is an STT_GNU_IFUNC
	symbol.  Pass the symbol type to arm_type_of_stub.  Conditionally
	resolve GOT references to the .igot.plt entry.
	(elf32_arm_relocate_section): Update the call to
	elf32_arm_final_link_relocate.
	(elf32_arm_gc_sweep_hook): Use elf32_arm_get_plt_info to get PLT
	information.  Treat R_ARM_REL32 and R_ARM_REL32_NOI as call
	relocations in shared libraries and relocatable executables.
	Count non-call PLT references.  Use elf32_arm_get_local_dynreloc_list
	to get the list of dynamic relocations for a local symbol.
	(elf32_arm_check_relocs): Always create ifunc sections.  Set isym
	at the same time as setting h.  Use elf32_arm_allocate_local_sym_info
	to allocate local symbol information.  Treat R_ARM_REL32 and
	R_ARM_REL32_NOI as call relocations in shared libraries and
	relocatable executables.  Record PLT information for local
	STT_GNU_IFUNC functions as well as global functions.   Count
	non-call PLT references.  Use elf32_arm_get_local_dynreloc_list
	to get the list of dynamic relocations for a local symbol.
	(elf32_arm_adjust_dynamic_symbol): Handle STT_GNU_IFUNC symbols.
	Don't remove STT_GNU_IFUNC PLTs unless all references have been
	removed.  Update after the changes to elf32_arm_link_hash_entry.
	(allocate_dynrelocs_for_symbol): Decide whether STT_GNU_IFUNC PLT
	entries should live in .plt or .iplt.  Check whether the .igot.plt
	and .got entries can be combined.  Use elf32_arm_allocate_plt_entry
	to allocate .plt and .(i)got.plt entries.  Detect which .got
	entries will need R_ARM_IRELATIVE relocations and use
	elf32_arm_allocate_irelocs to allocate them.  Likewise other
	non-.got dynamic relocations.
	(elf32_arm_size_dynamic_sections): Allocate .iplt, .igot.plt
	and dynamic relocations for local STT_GNU_IFUNC symbols.
	Check whether the .igot.plt and .got entries can be combined.
	Detect which .got entries will need R_ARM_IRELATIVE relocations
	and use elf32_arm_allocate_irelocs to allocate them.  Use stashed
	section pointers intead of strcmp checks.  Handle iplt and igotplt.
	(elf32_arm_finish_dynamic_symbol): Use elf32_arm_populate_plt_entry
	to fill in .plt, .got.plt and .rel(a).plt entries.  Point
	STT_GNU_IFUNC symbols at an .iplt entry if non-call relocations
	resolve to it.
	(elf32_arm_output_plt_map_1): New function, split out from
	elf32_arm_output_plt_map.  Handle .iplt entries.  Use
	elf32_arm_plt_needs_thumb_stub_p.
	(elf32_arm_output_plt_map): Call it.
	(elf32_arm_output_arch_local_syms): Add mapping symbols for
	local .iplt entries.
	(elf32_arm_swap_symbol_in): Handle Thumb STT_GNU_IFUNC symbols.
	(elf32_arm_swap_symbol_out): Likewise.
	(elf32_arm_add_symbol_hook): New function.
	(elf_backend_add_symbol_hook): Define for all targets.

opcodes/
	* arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.

gas/
	* config/tc-arm.c (md_pcrel_from_section): Use S_FORCE_RELOC to
	determine whether a relocation is needed.
	(md_apply_fix, arm_apply_sym_value): Likewise.

ld/testsuite/
	* ld-arm/ifunc-1.s, ld-arm/ifunc-1.dd, ld-arm/ifunc-1.gd,
	ld-arm/ifunc-1.rd, ld-arm/ifunc-2.s, ld-arm/ifunc-2.dd,
	ld-arm/ifunc-2.gd, ld-arm/ifunc-2.rd, ld-arm/ifunc-3.s,
	ld-arm/ifunc-3.dd, ld-arm/ifunc-3.gd, ld-arm/ifunc-3.rd,
	ld-arm/ifunc-4.s, ld-arm/ifunc-4.dd, ld-arm/ifunc-4.gd,
	ld-arm/ifunc-4.rd, ld-arm/ifunc-5.s, ld-arm/ifunc-5.dd,
	ld-arm/ifunc-5.gd, ld-arm/ifunc-5.rd, ld-arm/ifunc-6.s,
	ld-arm/ifunc-6.dd, ld-arm/ifunc-6.gd, ld-arm/ifunc-6.rd,
	ld-arm/ifunc-7.s, ld-arm/ifunc-7.dd, ld-arm/ifunc-7.gd,
	ld-arm/ifunc-7.rd, ld-arm/ifunc-8.s, ld-arm/ifunc-8.dd,
	ld-arm/ifunc-8.gd, ld-arm/ifunc-8.rd, ld-arm/ifunc-9.s,
	ld-arm/ifunc-9.dd, ld-arm/ifunc-9.gd, ld-arm/ifunc-9.rd,
	ld-arm/ifunc-10.s, ld-arm/ifunc-10.dd, ld-arm/ifunc-10.gd,
	ld-arm/ifunc-10.rd, ld-arm/ifunc-11.s, ld-arm/ifunc-11.dd,
	ld-arm/ifunc-11.gd, ld-arm/ifunc-11.rd, ld-arm/ifunc-12.s,
	ld-arm/ifunc-12.dd, ld-arm/ifunc-12.gd, ld-arm/ifunc-12.rd,
	ld-arm/ifunc-13.s, ld-arm/ifunc-13.dd, ld-arm/ifunc-13.gd,
	ld-arm/ifunc-13.rd, ld-arm/ifunc-14.s, ld-arm/ifunc-14.dd,
	ld-arm/ifunc-14.gd, ld-arm/ifunc-14.rd, ld-arm/ifunc-15.s,
	ld-arm/ifunc-15.dd, ld-arm/ifunc-15.gd, ld-arm/ifunc-15.rd,
	ld-arm/ifunc-16.s, ld-arm/ifunc-16.dd, ld-arm/ifunc-16.gd,
	ld-arm/ifunc-16.rd, ld-arm/ifunc-dynamic.ld,
	ld-arm/ifunc-static.ld: New tests.
	* ld-arm/farcall-group.d, ld-arm/farcall-group-size2.d,
	ld-arm/farcall-mixed-lib-v4t.d, ld-arm/farcall-mixed-lib.d: Update
	for new stub hashes.
	* ld-arm/arm-elf.exp: Run them.
 2011-03-14 16:04:16 +00:00