Output an ARM state mapping symbol at the start of the PLT. With the
current code objdump will fail to disassemble the PLT that gold
creates.
gold/ChangeLog:
2015-02-11 Will Newton <will.newton@linaro.org>
PR gold/13321
* arm.cc (Target_arm::make_plt_section): Create an ARM
state mapping symbol at the start of the PLT.
There are
two_file_shared_2_pic_1_test_LDADD = two_file_test_2_pic.o two_file_shared_1.so
There should be two_file_shared_1.so, not two_file_shared_2.so in
two_file_shared_2_pic_1_test_DEPENDENCIES.
* testsuite/Makefile.am (two_file_shared_2_pic_1_test_DEPENDENCIES):
Replace two_file_shared_2.so with two_file_shared_1.so.
* testsuite/Makefile.in: Regenerated.
2015-02-04 Peter Collingbourne <pcc@google.com>
* plugin.cc (Pluginobj::get_symbol_resolution_info): Resolve
forwarding symbols when computing symbol resolution info for plugins.
When an LTO linker plugin claims an external member of a thin archive, gold
does not properly unlock the file and make its file descriptor available for
reuse. This patch fixes the problem by modifying Archive::include_member to
unlock the object file via an RAII class instance, ensuring that it will be
unlocked no matter what path is taken through the function.
gold/
PR gold/15660
* archive.cc (Thin_archive_object_unlocker): New class.
(Archive::include_member): Unlock external members of thin archives.
* testsuite/Makefile.am (plugin_test_1): Rename .syms files.
(plugin_test_2): Likewise.
(plugin_test_3): Likewise.
(plugin_test_4): Likewise.
(plugin_test_5): Likewise.
(plugin_test_6): Likewise.
(plugin_test_7): Likewise.
(plugin_test_8): Likewise.
(plugin_test_9): Likewise.
(plugin_test_10): Likewise.
(plugin_test_11): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/plugin_test.c (claim_file_hook): Check for parallel .syms
file to decide whether to claim file.
(all_symbols_read_hook): Likewise.
* testsuite/plugin_test_1.sh: Adjust expected output.
* testsuite/plugin_test_2.sh: Likewise.
* testsuite/plugin_test_3.sh: Likewise.
* testsuite/plugin_test_6.sh: Likewise.
* testsuite/plugin_test_tls.sh: Likewise.
* testsuite/plugin_test_11.sh: New testcase.
We need to check that the output is executable before assuming that we
can replace the reference with zero.
2015-02-02 Cary Coutant <ccoutant@google.com>
gold/
* x86_64.cc (Target_x86_64::Relocate::relocate_tls): Check for
executable output file.
This is a feature required in chromeos arm development work.
Tested:
1) Built passed all-gold on x86_64 machine
2) Tested with basic gold aarch64 ifunc unittests -
a) global ifunc, statically/non-statically linked
b) local ifunc, statically/non-statically linked
c) global/local, other shared library routine mixed,
statically/non-statically linked
d) arm/thumb mode ifunc
e) linking chrome browser passed
When --warn-unresolved-symbols is used, gold tries to create a dynamic relocation
for it, and gives an internal error if the TLS segment has not already been
created. This patch allows the IE-to-LE optimization for an undefined symbol
when building an executable, which suppresses the dynamic relocation, and
relaxes the requirement to have a TLS segment when applying a relocation for
an undefined symbol.
2015-01-28 Cary Coutant <ccoutant@google.com>
gold/
* x86_64.cc (Target_x86_64::Scan::global): Allow IE-to-LE optimization
for undef TLS symbols.
(Target_x86_64::Relocate::relocate_tls): Likewise.
(Target_x86_64::Relocate::tls_ie_to_le): Likewise.
Found when attempting to build an ELFv2 Linux kernel. We don't
generally need a plt entry for ELFv2 got relocs, only on ifunc, just
like ppc32.
* powerpc.cc (Target_powerpc::Scan::local <got relocs>): Correct
condition for need of ifunc plt entry.
(Target_powerpc::Scan::global <got relocs>): Likewise.
This fixes an issue where a page-aligned data section, combined with -z relro,
could lead to a gap between text and data segments larger than a page, and
we would fail to overlap the segments in the file.
gold/
* layout.cc (Layout::set_segment_offsets): Don't align start of segment
unless alignment is larger than page size.
Missing from 5c294fee
elfcpp/
* arm.h: Add enums for Tag_ABI_FP_number_model and Tag_ABI_VFP_args.
gold/
* arm.cc (Target_arm::do_adjust_elf_header): Provide namespace on
new enums.
(Target_arm::merge_object_attributes, ): Likewise.
*** bfd/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
Tag_ABI_VFP_args value and replace hardcoded values by enum
values.
(elf32_arm_post_process_headers): Set e_flags in ELF header
as hard float only when Tag_ABI_VFP_args is 1, using new enum
value AEABI_VFP_args_vfp to check that.
*** binutils/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* readelf.c (arm_attr_tag_ABI_VFP_args): Add "compatible".
*** gdb/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm-tdep.c (arm_gdbarch_init): Explicitely handle value 3 of
Tag_ABI_VFP_args. Also replace hardcoded values by enum values
in the switch handling the different values of Tag_ABI_VFP_args.
*** gold/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm.cc (Target_arm::do_adjust_elf_header): Set e_flags in ELF
header as hard float only when Tag_ABI_VFP_args is 1, using new
enum value AEABI_VFP_args_vfp to check that.
(Target_arm::merge_object_attributes): Handle new Tag_ABI_VFP_args
value and replace hardcoded values by enum values.
*** include/elf/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm.h: New AEABI_FP_number_model_* and AEABI_VFP_args_* enum
values.
*** ld/testsuite/ChangeLog ***
2014-12-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* ld-arm/attr-merge-2a.s: Add Tag_ABI_VFP_args.
* ld-arm/attr-merge-2b.s: Likewise.
* ld-arm/attr-merge-2.attr: Likewise.
* ld-arm/attr-merge-4a.s: Add Tag_ABI_FP_number_model and
Tag_ABI_VFP_args.
* ld-arm/attr-merge-4b.s: Likewise.
* ld-arm/attr-merge-4.attr: Likewise.
* ld-arm/attr-merge-6a.s: Likewise.
* ld-arm/attr-merge-6b.s: Likewise.
* ld-arm/attr-merge-6.attr: Add Tag_ABI_FP_number_model.
The debug_msg test has 2 implementations of SometimesInlineFunction:
int SometimesInlineFunction(int i) { return i; }
int SometimesInlineFunction(int i) { return i * i; }
and One Definition Rule (ODR) violation detection expects they will be
compiled into functions of different sizes. Hower, on x86, GCC 4.7 and
newer compile them into functions of the same size and ODR violation
detection test fails. This patch changes
int SometimesInlineFunction(int i) { return i; }
to
int SometimesInlineFunction(int i) { return i * i * 3; }
so that it will be compiled into a function of larger size.
PR gold/14608
* testsuite/debug_msg.cc (SometimesInlineFunction): Changed
to "return i * i * 3;".
together.
gold/
* mapfile.cc (Mapfile::print_input_section): Print uncompressed sizes.
(Mapfile::print_output_data): Use current_data_size() to avoid
assert for sections requiring postprocessing; if address is not valid,
print 0.
(Mapfile::print_output_section): Use current_data_size(); print note
that addresses and sizes are before compression.
This patch gives current stub-group-size in error message when stub
is too far away.
* aarch64.cc (Target_aarch64): Add new variable: stub_group_size_.
(AArch64_relocate_functions::maybe_apply_stub): Add new parameter.
Update error message.
(Target_aarch64::do_relax): Use absolute value of option
stub_group_size. Replace local variable with class member
stub_group_size_.
Mixing 64-bit and 32-bit types led to the wrong promotions. Keep
calculation in same type. Also fix a case where PLTREL25 reloc addend
should be ignored.
* Powerpc.cc (Target_powerpc::Branch_info::make_stub): Ignore
addend of PLTREL24 reloc when not generating a plt stub. Make
max_branch_offset an "Address".
(Stub_table::can_read_stub): Make max_branch_offset an "Address".
(Target_powerpc::Relocate::relocate): Likewise.
pr17670 is about an assert triggering on a branch to an undefined
weak symbol, the symbol being undefined due to dropping its comdat
group section. (Well sort of. The symbol is actually defined in
an .opd section which isn't part of the group, but the code section
the opd entry points at is dropped.) So don't assert.
Also, don't make long branch stubs to such symbols, and arrange to
have target-reloc.h code warn when applying relocs that use the sym.
PR 17670
* symtab.cc (Symbol::set_undefined): Remove assertion.
* powerpc.cc (Target_powerpc::symval_for_branch): Don't assert
on symbols defined in discarded sections, instead return false.
Rearrange params, update all callers.
(Target_powerpc::Branch_info::make_stub): Don't make stubs for
branches to syms in discarded sections.
(Global_symbol_visitor_opd::operator()): Set discarded opd syms
undefined and flag as discarded.
(Target_powerpc::Relocate::relocate): Localize variable.
Code stolen from arm.cc.
PR 17566
* powerpc.cc (Target_powerpc::Scan::local): Use add_local_section
when adding dynamic relocations against section symbols.
gold/
* layout.cc (Layout::finish_dynamic_section): When '-z global'
is specified set DF_1_GLOBAL in DT_FLAGS_1 flags.
* options.h (General_options): New -z option (global).
PR gold/17578 notes that gold will print a warning about an executable stack
when the -z execstack option is given, even when there is no --warn_execstack
option. The warning is completely useless and unexpected, since the user
explicitly requested an executable stack, and did not even ask for warnings.
This patch fixes that, and adds an extra warning when --warn_execstack
and -z noexecstack are both given and an input file requires an executable
stack.
gold/
PR gold/17578
* layout.cc (Layout::layout_gnu_stack): Don't warn when -z execstack
is given.
(Layout::create_executable_stack_info): Warn when -z noexecstack is
given but some inputs require executable stack.
Add .debug_gdb_scripts, .debug_gnu_pubnames, .debug_gnu_pubtypes,
and .debug_str_offsets to lists of sections to strip or keep
when stripping debug info.
gold/
* layout.cc (gdb_sections): Keep .debug_gdb_scripts and
.debug_str_offsets; strip .debug_gnu_pubnames and
.debug_gnu_pubtypes.
(lines_only_debug_sections): Strip all four new sections.
(Also included in this patch is a minor typo fix in gold/ChangeLog.)
When linking the following tlsdesc access sequence into an executable with -pie,
adrp x0, :tlsdesc:tls_gd
ldr x1, [x0, #:tlsdesc_lo12:tls_gd]
add x0, x0, :tlsdesc_lo12:tls_gd
.tlsdesccall tls_gd
blr x1
mrs x1, tpidr_el0
add x0, x1, x0
ldr w0, [x0]
current gold-aarch64 backend does tls-desc-gd-to-ie relaxation, into
adrp x0, 1000 <__FRAME_END__+0x720>
ldr x1, [x0,#4064] ;; <=== the target register should be x0
nop
nop
mrs x1, tpidr_el0
add x0, x1, x0
ldr w0, [x0]
This code is wrong. The fix changes ldr target register into x0.
An unusually large number of stubs can result in the default section
group size being too large; sections plus stubs exceed the range of a
branch. Restarting the relaxation pass with a smaller group size can
sometimes help.
* powerpc.cc (struct Stub_table_owner): New.
(Powerpc_relobj): Rename stub_table_ to stub_table_index_, an
unsigned int vector. Update all references.
(powerpc_relobj::set_stub_table): Take an unsigned int param
rather than a Stub_table. Update callers.
(Powerpc_relobj::clear_stub_table): New function.
(Target_powerpc): Add relax_failed_, relax_fail_count_ and
stub_group_size_ vars.
(Target_powerpc::new_stub_table): Delete.
(max_branch_delta): New function, extracted from..
(Target_powerpc::Relocate::relocate): ..here..
(Target_powerpc::Branch_info::make_stub): ..and here. Return
status on whether stub created successfully.
(Stub_control::Stub_control): Add "no_size_errors" param. Move
default sizing to..
(Target_powerpc::do_relax): ..here. Init stub_group_size_ and
reduce on relax failure.
(Target_powerpc::group_sections): Add "no_size_errors" param.
Use stub_group_size_. Set up group info in a temp vector,
before building Stub_table vector. Account for input sections
possibly already converted to relaxed sections.
(Stub_table::init): Delete. Merge into..
(Stub_table::Stub_table): ..here.
(Stub_table::can_reach_stub): New function.
(Stub_table::add_plt_call_entry): Add "from" parameter and
return true iff stub could be reached.
(Stub_table::add_long_branch_entry): Similarly. Add "r_type"
param too.
(Stub_table::clear_stubs): Add "all" param.
It's possible for the section grouping code to decide that the last
section looked at (the first section by address) doesn't fit into a
group. In one case that section is already a group owner and that is
handled correctly. In other cases the section should be put into its
own group. Like this:
* powerpc.cc (Stub_control::set_output_and_owner): New function.
(Target_powerpc::group_sections): Use it.
When --gc-sections is turned on during an LTO link, the .eh_frame sections
from deferred files are processed before those from the replacement files.
As a result, the section end-cap from crtendS.o is placed ahead of
the .eh_frame data from the replacement files. This patch fixes the bug
by skipping the layout of the deferred sections during GC pass 2.
gold/
PR gold/17639
* object.cc (Sized_relobj_file): Initialize is_deferred_layout_.
(Sized_relobj_file::do_layout): Handle deferred sections properly
during GC pass 1. Don't add reloc sections to deferred list twice.
* object.h (Sized_relobj_file::is_deferred_layout): New function.
(Sized_relobj_file::is_deferred_layout_): New data member.
Corrects overflow test for rel14, addr14, rel24, addr24 branch relocs,
and prints an information message to give a hint as to how a branch
that can't reach a stub might be cured.
bfd/
* elf64-ppc.c (group_sections): Init stub14_group_size from
--stub-group-size parameter divided by 1024.
gold/
* powerpc.cc (Stub_control::Stub_control): Init stub14_group_size_
from --stub-group-size parameter divided by 1024.
(Powerpc_relocate_functions::rela, rela_ua): Add fieldsize
template parameter. Update all uses.
(Target_powerpc::Relocate::relocate): Rename has_plt_value to
has_stub_value. Set for long branches. Don't report overflow for
branch to undefined weak symbols. Print info message on
overflowing branch to stub.
Go is multi-threaded, so use thread-safe plt stubs. __go_go doesn't
actually start threads, but is a convenient libgo function with a
reasonably unique name that is called by all Go executables. (Threads
are started by a static function of libgo, runtime_newosproc, called
by a whole lot of global functions, including runtime_starttheworld
and runtime_main.)
bfd/
* elf64-ppc.c (ppc64_elf_size_stubs): Add __go_go to thread_starters.
gold/
* powerpc.cc (Target_powerpc::do_relax): Add __go_go to thread_starters.
* x86_64.cc (Target_x86_64<size>::Scan::global): Don't make PLT
entry for R_X86_64_GOTPLT64.
(Target_x86_64<size>::Relocate::relocate): Update comments for
R_X86_64_GOTPLT64.
The patch does the following things:
-- Add support for ifunc.
-- Enable safe icf
-- Add support for TLSLD relocations
R_AARCH64_TLSLD_ADR_PAGE21,
R_AARCH64_TLSLD_ADD_LO12_NC,
R_AARCH64_TLSLD_MOVW_DTPREL_G1,
R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC.
(R_AARCH64_TLSLD_MOVW_* are used by LLVM.)
-- Add support for TLSLD->TLSLE relaxation.
-- Add support for R_AARCH64_LD_PREL_LO19, R_AARCH64_ADR_PREL_LO21.
-- Fix 2 encoding bugs in AArch64_relocate_functions::update_movnz.
-- Correct TLS relocation properties in gold/aarch64-reloc.def.
-- Update testsuite/icf_safe_so_test.cc, testsuite/icf_safe_test.sh.
gold/
2014-10-29 Han Shen <shenhan@google.com>
Jing Yu <jingyu@google.com>
* aarch64-reloc.def: Add LD_PREL_LO12, ADR_PREL_LO21,
TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1,
TLSLD_MOVW_DTPREL_G0_NC. Change property of TLS relocations to
Symbol::TLS_REF.
* aarch64.cc (Target_aarch64::do_can_check_for_function_pointers): New
method.
(Target_aarch64::reloc_needs_plt_for_ifunc): New method.
(Target_aarch64::tls_ld_to_le): New method.
(Target_aarch64::aarch64_info): Enable can_icf_inline_merge_sections
for 64bit targets.
(Output_data_plt_aarch64::irelative_rel_): New data member.
(Output_data_plt_aarch64::add_entry): Add irelative entries to plt.
(Output_data_plt_aarch64::add_local_ifunc_entry): New method.
(Output_data_plt_aarch64::add_relocation): New method.
(Output_data_plt_aarch64::do_write): Add gold_assert on got_irelative
offset. Add got_irelative size to got size.
(AArch64_relocate_functions): Typedef AArch64_valtype. Replace long
type string with the new typename.
(AArch64_relocate_functions::update_adr): Replace parameter x with
immed.
(AArch64_relocate_functions::update_movnz): Correct wrong val mask.
(AArch64_relocate_functions::reloc_common): New method.
(AArch64_relocate_funcsions::rela_general): Extract common part out
into reloc_common method.
(AArch64_relocate_functions::rela_general): Likewise.
(AArch64_relocate_functions::pcrela_general): Likewise.
(AArch64_relocate_functions::adr): New method.
(AArch64_relocate_functions::adrp): Calculate immed before calling
update_adr.
(AArch64_relocate_functions::adrp): Likewise.
(AArch64_relocate_functions::movnz): Cast x to SignedW type when
comparing x to 0. Calculate immed from ~x when x < 0.
(Target_aarch64::optimize_tls_reloc): Add new cases for
TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1,
TLSLD_MOVW_DTPREL_G0_NC.
(Target_aarch64::possible_function_pointer_reloc): Implement this
method.
(Target_aarch64::Scan::local_reloc_may_be_function_pointer): Update
comment.
(Target_aarch64::Scan::local): Add codes to handle STT_GNU_IFUNC
symbol. Add cases for TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC,
TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC.
(Target_aarch64::Scan::global): Add codes to handle STT_GNU_IFUNC
symbol. Add cases for TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC,
TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC.
(Target_aarch64::make_plt_entry): Call add_entry with two more
parameters.
(Target_aarch64::make_local_ifunc_plt_entry): New method.
(Target_aarch64::Relocate::relocate): Add cases for LD_PREL_LO19,
ADR_PREL_LO21, TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC,
TLSLD_MOVW_DTPREL_G1, TLSLD_MOVW_DTPREL_G0_NC.
(Target_aarch64::Relocate::relocate_tls): Add cases for
TLSLD_ADR_PAGE21, TLSLD_ADD_LO12_NC, TLSLD_MOVW_DTPREL_G1,
TLSLD_MOVW_DTPREL_G0_NC.
* testsuite/icf_safe_so_test.cc: Correct test comment.
* testsuite/icf_safe_test.sh: Add AArch64 arch.
