defaults for defined, private, and spnum fields for the
$TEXT$ and $PRIVATE$ spaces. Do not clobber spnum. Do
not reset the segment if just updating a space.
(pa_spaces_begin): Set BFD section flags for all built-in
subspaces.
(add_procedure): Set first_proc_ptr if it hasn't been set.
(ecoff_build_lineno): If the first procedure does not start at
address zero, insert a dummy line to compensate.
* configure.in: Set ALL_OBJ_DEPS in output Makefile.
Based on suggestions from <BAILEY@hmivax.humgen.upenn.edu> (Charles Bailey):
* vmsconf.sh: In generated file, get ".obj" suffix right, build source files
from other directories into objects in the current directory, and specify PSECT
attributes explicitly to linker. Also added missing label.
* Makefile.in (stamp-mk.com): Reference new variable VMS_OTHER_OBJS for list of
non-local object files, instead of listing them here.
(VMS_OTHER_OBJS): New variable, added more libiberty files.
* make-gas.com: Regenerated.
* config/ho-vms.h (unlink): Define as delete.
* config-gas.com: Fix quoting on TARGET_CANONICAL definition. Delete files
before creating them.
* config/tc-mips.c (macro_build): Permit BFD_RELOC_PCREL_LO16 for
certain cases of 'i', 'j' and 'o'. Change 'u' to take an
argument, the reloc type.
(load_register): Pass reloc type to macro_build for 'u'.
(macro): Likewise. For M_LA_AB permit a difference expression
when generating embedded PIC code between an arbitrary symbol and
a symbol in the .text section.
(mips_force_relocation): Force BFD_RELOC_PCREL_HI16_S and
BFD_RELOC_PCREL_LO16 to be emitted.
(md_apply_fix): Check that most relocs are not PC relative.
Handle BFD_RELOC_PCREL_HI16_S and BFD_RELOC_PCREL_LO16.
(tc_gen_reloc): Change #error to as_fatal. Handle
BFD_RELOC_PCREL_LO16 and BFD_RELOC_PCREL_HI16_S.
* subsegs.c (subsegs_begin): Call memset with args in the correct
order.
(subseg_get): Clear newly allocated seginfo, set its pointer slots
to NULL instead of 0.
Fixes a problem observed in sparc-lynx progressive.
macro_build for nori case.
(SWITCH_TABLE): Define.
(mips_force_relocation): Force a relocation for a switch table
entry.
(md_apply_fix): Write switch table entry value into file.
(tc_gen_reloc): Use BFD_RELOC_GPREL32 for a switch table entry,
and set the addend to the difference between the reloc address and
the subtrahend.
(elf_tc_make_sections): Likewise.
(hppa_tc_make_sections, hppa_tc_symbol): Delete extern decls.
* config/tc-hppa.c (hppa_tc_make_sections): Delete function.
(hppa_tc_symbol): Likewise.
* config/obj-elf.c (elf_frob_file): Delete elf_tc_symbol and
elf_tc_make_sections stuff. It was there to support PA braindamage
which has been fixed, and in the case of elf_tc_make_sections is
redundant with elf_tc_final_processing.
embedded PIC code, accept the difference between two local symbols
as being constant.
(mips_force_relocation): Only force a reloc to be generated for a
PC relative fixup.
(md_apply_fix): For BFD_RELOC_32 and BFD_RELOC_LO16, put the fixup
value into the file if the fixup will not generate a reloc.
flag rather than signedp field. Only permit extended range if
PPC_OPERAND_SIGNOPT flag is set and assembling in 32 bit mode.
Based on patch from David Edelsohn (edelsohn@npac.syr.edu).
(ppc_arch): Check for PPC_OPCODE_PPC before PPC_OPCODE_POWER.
(md_begin): If an instruction has a size specific flag set, only
add it if we are assembling that size.
branch with an instruction that uses $at, in case the branch is
later expanded.
(macro): If EMBEDDED_PIC, case M_JAL_A may use $at.
(md_pcrel_from): If not OBJ_AOUT, return 4 for an undefined symbol
to make it pcrel_offset.
(tc_gen_reloc): If not OBJ_AOUT, set the reloc addend to
reloc->address; another gruesome hack to get gas reloc handling to
do the right thing.
(T12): New macro.
(emit_insn): New function.
(md_assemble): Call it.
(alpha_force_relocation): Handle BFD_RELOC_26, for call_pal instructions.
(lituse_pending): New variable. Set by anything that generates a LITERAL
reloc, cleared by anything that generates a LITUSE reloc, tested by code that
might want to emit a LITUSE reloc.
(emit_unaligned_io): New function. Currently calls md_assemble, but it should
eventually be converted to generate the insn itself and call emit_insn directly.
(emit_load_unal, emit_store_unal, emit_byte_manip_r, emit_extract_r,
emit_insert_r, emit_mask_r, emit_sign_extend, emit_bis_r): Likewise.
(alpha_ip, case 'I'): Handle with BFD_RELOC_23.
(alpha_ip, label get_macro): Don't emit the final instruction if the opcode is
zero.
(alpha_ip, case 'B', subcase 'd'): New case, for subword and unaligned memory
access macros.
(md_apply_fix): Handle BFD_RELOC_26. Generate an error message if the value
can't be resolved.
(mips_pic): Change from int to enum mips_pic_level. Change all
uses (0 becomes NO_PIC, 2 becomes SVR4_PIC).
(load_address): Handle EMBEDDED_PIC.
(macro): Handle EMBEDDED_PIC in all PIC cases.
(md_parse_option): Accept -membedded-pic to use EMBEDDED_PIC. If
OBJ_ELF, accept -KPIC and -call_shared to use SVR4_PIC and accept
-non_shared to use NO_PIC (this is how the Irix 5 assembler
works). Do not permit -G with SVR4_PIC.
(s_abicalls): Warn if -G was used, and force -G 0.
(tc_gen_reloc): Set reloc->addend to 0 for a PC relative reloc for
anything but a.out, not just for ELF. For ECOFF, don't generate a
BFD_RELOC_16_PCREL_S2 reloc unless using EMBEDDED_PIC.
