* config/tc-mips.h (DIFF_EXPR_OK): Define.
* config/tc-mips.c (macro_build): Permit BFD_RELOC_PCREL_LO16 for certain cases of 'i', 'j' and 'o'. Change 'u' to take an argument, the reloc type. (load_register): Pass reloc type to macro_build for 'u'. (macro): Likewise. For M_LA_AB permit a difference expression when generating embedded PIC code between an arbitrary symbol and a symbol in the .text section. (mips_force_relocation): Force BFD_RELOC_PCREL_HI16_S and BFD_RELOC_PCREL_LO16 to be emitted. (md_apply_fix): Check that most relocs are not PC relative. Handle BFD_RELOC_PCREL_HI16_S and BFD_RELOC_PCREL_LO16. (tc_gen_reloc): Change #error to as_fatal. Handle BFD_RELOC_PCREL_LO16 and BFD_RELOC_PCREL_HI16_S.
This commit is contained in:
Ian Lance Taylor
parent
4f996613fa
commit
ecd4ca1cef
1 changed files with 112 additions and 8 deletions
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@ -1350,13 +1350,30 @@ macro_build (place, counter, ep, name, fmt, va_alist)
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|| r == BFD_RELOC_MIPS_LITERAL
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|| r == BFD_RELOC_LO16
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|| r == BFD_RELOC_MIPS_GOT16
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|| r == BFD_RELOC_MIPS_CALL16);
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|| r == BFD_RELOC_MIPS_CALL16
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|| (ep->X_op == O_subtract
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&& now_seg == text_section
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&& S_GET_SEGMENT (ep->X_op_symbol) == text_section
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&& r == BFD_RELOC_PCREL_LO16));
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continue;
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case 'u':
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assert (ep != NULL && ep->X_op == O_constant);
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insn.insn_opcode |= (ep->X_add_number >> 16) & 0xffff;
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ep = NULL;
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r = (bfd_reloc_code_real_type) va_arg (args, int);
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assert (ep != NULL
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&& (ep->X_op == O_constant
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|| (ep->X_op == O_symbol
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&& (r == BFD_RELOC_HI16_S
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|| r == BFD_RELOC_HI16))
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|| (ep->X_op == O_subtract
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&& now_seg == text_section
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&& S_GET_SEGMENT (ep->X_op_symbol) == text_section
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&& r == BFD_RELOC_PCREL_HI16_S)));
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if (ep->X_op == O_constant)
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{
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insn.insn_opcode |= (ep->X_add_number >> 16) & 0xffff;
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ep = NULL;
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r = BFD_RELOC_UNUSED;
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}
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continue;
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case 'p':
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@ -1517,7 +1534,8 @@ load_register (counter, reg, ep)
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|| ((ep->X_add_number &~ (offsetT) 0x7fffffff)
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== ~ (offsetT) 0x7fffffff))
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{
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macro_build ((char *) NULL, counter, ep, "lui", "t,u", reg);
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macro_build ((char *) NULL, counter, ep, "lui", "t,u", reg,
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(int) BFD_RELOC_HI16);
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if ((ep->X_add_number & 0xffff) != 0)
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macro_build ((char *) NULL, counter, ep, "ori", "t,r,i", reg, reg,
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(int) BFD_RELOC_LO16);
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@ -2206,7 +2224,8 @@ macro (ip)
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else
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{
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expr1.X_add_number = 0x80000000;
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macro_build ((char *) NULL, &icnt, &expr1, "lui", "t,u", AT);
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macro_build ((char *) NULL, &icnt, &expr1, "lui", "t,u", AT,
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(int) BFD_RELOC_HI16);
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}
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if (mips_trap)
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macro_build ((char *) NULL, &icnt, NULL, "teq", "s,t", sreg, AT);
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@ -2333,6 +2352,30 @@ macro (ip)
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case M_LA_AB:
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/* Load the address of a symbol into a register. If breg is not
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zero, we then add a base register to it. */
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/* When generating embedded PIC code, we permit expressions of
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the form
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la $4,foo-bar
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where bar is an address in the .text section. These are used
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when getting the addresses of functions. We don't permit
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X_add_number to be non-zero, because if the symbol is
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external the relaxing code needs to know that any addend is
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purely the offset to X_op_symbol. */
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if (mips_pic == EMBEDDED_PIC
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&& offset_expr.X_op == O_subtract
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&& now_seg == text_section
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&& S_GET_SEGMENT (offset_expr.X_op_symbol) == text_section
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&& breg == 0
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&& offset_expr.X_add_number == 0)
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{
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macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u",
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treg, (int) BFD_RELOC_PCREL_HI16_S);
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macro_build ((char *) NULL, &icnt, &offset_expr,
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mips_isa < 3 ? "addiu" : "daddiu",
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"t,r,j", treg, treg, (int) BFD_RELOC_PCREL_LO16);
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return;
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}
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if (offset_expr.X_op != O_symbol
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&& offset_expr.X_op != O_constant)
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{
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@ -5085,7 +5128,10 @@ mips_force_relocation (fixp)
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fixS *fixp;
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{
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return (mips_pic == EMBEDDED_PIC
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&& (fixp->fx_pcrel || SWITCH_TABLE (fixp)));
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&& (fixp->fx_pcrel
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|| SWITCH_TABLE (fixp)
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|| fixp->fx_r_type == BFD_RELOC_PCREL_HI16_S
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|| fixp->fx_r_type == BFD_RELOC_PCREL_LO16));
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}
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/* Apply a fixup to the object file. */
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@ -5116,9 +5162,42 @@ md_apply_fix (fixP, valueP)
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case BFD_RELOC_MIPS_CALL16:
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case BFD_RELOC_MIPS_GOT16:
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case BFD_RELOC_MIPS_GPREL32:
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if (fixP->fx_pcrel)
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as_bad ("Invalid PC relative reloc");
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/* Nothing needed to do. The value comes from the reloc entry */
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break;
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case BFD_RELOC_PCREL_HI16_S:
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/* The addend for this is tricky if it is internal, so we just
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do everything here rather than in bfd_perform_relocation. */
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if ((fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) == 0)
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{
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/* For an external symbol adjust by the address to make it
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pcrel_offset. We use the address of the RELLO reloc
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which follows this one. */
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value += (fixP->fx_next->fx_frag->fr_address
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+ fixP->fx_next->fx_where);
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}
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if (value & 0x8000)
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value += 0x10000;
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value >>= 16;
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buf = fixP->fx_frag->fr_literal + fixP->fx_where;
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if (byte_order == BIG_ENDIAN)
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buf += 2;
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md_number_to_chars (buf, value, 2);
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break;
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case BFD_RELOC_PCREL_LO16:
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/* The addend for this is tricky if it is internal, so we just
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do everything here rather than in bfd_perform_relocation. */
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if ((fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) == 0)
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value += fixP->fx_frag->fr_address + fixP->fx_where;
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buf = fixP->fx_frag->fr_literal + fixP->fx_where;
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if (byte_order == BIG_ENDIAN)
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buf += 2;
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md_number_to_chars (buf, value, 2);
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break;
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case BFD_RELOC_32:
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/* If we are deleting this reloc entry, we must fill in the
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value now. This can happen if we have a .word which is not
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@ -5152,6 +5231,7 @@ md_apply_fix (fixP, valueP)
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* might be deleting the relocation entry (i.e., a branch within
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* the current segment).
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*/
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assert (fixP->fx_pcrel);
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if (value & 0x3)
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as_warn ("Branch to odd address (%lx)", value);
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value >>= 2;
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@ -5962,10 +6042,34 @@ tc_gen_reloc (section, fixp)
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subtrahend. */
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reloc->addend = reloc->address - S_GET_VALUE (fixp->fx_subsy);
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#ifndef OBJ_ECOFF
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#error Double check fx_r_type here
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as_fatal ("Double check fx_r_type in tc-mips.c:tc_gen_reloc");
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#endif
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fixp->fx_r_type = BFD_RELOC_GPREL32;
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}
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else if (fixp->fx_r_type == BFD_RELOC_PCREL_LO16)
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{
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/* We use a special addend for an internal RELLO reloc. */
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if (fixp->fx_addsy->bsym->flags & BSF_SECTION_SYM)
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reloc->addend = reloc->address - S_GET_VALUE (fixp->fx_subsy);
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else
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reloc->addend = fixp->fx_addnumber + reloc->address;
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}
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else if (fixp->fx_r_type == BFD_RELOC_PCREL_HI16_S)
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{
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assert (fixp->fx_next != NULL
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&& fixp->fx_next->fx_r_type == BFD_RELOC_PCREL_LO16);
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/* We use a special addend for an internal RELHI reloc. The
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reloc is relative to the RELLO; adjust the addend
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accordingly. */
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if (fixp->fx_addsy->bsym->flags & BSF_SECTION_SYM)
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reloc->addend = (fixp->fx_next->fx_frag->fr_address
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+ fixp->fx_next->fx_where
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- S_GET_VALUE (fixp->fx_subsy));
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else
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reloc->addend = (fixp->fx_addnumber
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+ fixp->fx_next->fx_frag->fr_address
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+ fixp->fx_next->fx_where);
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}
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else if (fixp->fx_pcrel == 0)
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reloc->addend = fixp->fx_addnumber;
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else
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