Commit graph

270 commits

Author SHA1 Message Date
Jim Blandy
c0efbca4a3 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
set of the FCSR.
* sim-main.h (COCIDX): Remove definition; this isn't supported by
PENDING_FILL, and you can get the intended effect gracefully by
calling PENDING_SCHED directly.
2001-04-12 14:53:20 +00:00
Ben Elliston
fb891446b7 2001-02-23 Ben Elliston <bje@redhat.com>
* sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
	already defined elsewhere.
2001-02-24 02:43:11 +00:00
Ben Elliston
8030f85769 2001-02-19 Ben Elliston <bje@redhat.com>
* sim-main.h (sim_monitor): Return an int.
	* interp.c (sim_monitor): Add return values.
	(signal_exception): Handle error conditions from sim_monitor.
2001-02-19 21:57:03 +00:00
Chris Demetriou
56b48a7a9b 2001-02-08 Ben Elliston <bje@redhat.com>
* sim-main.c (load_memory): Pass cia to sim_core_read* functions.
        (store_memory): Likewise, pass cia to sim_core_write*.
2001-02-08 05:22:04 +00:00
Frank Ch. Eigler
d3ee60d90e * cleanup
2000-10-19  Frank Ch. Eigler  <fche@redhat.com>

	On advice from Chris G. Demetriou <cgd@sibyte.com>:
	* sim-main.h (GPR_CLEAR): Remove unused alternative macro.
2000-10-19 10:52:52 +00:00
Andrew Cagney
071da00250 Don't clean *.igen. 2000-07-27 12:03:19 +00:00
Andrew Cagney
a28c02cd2b * m16.igen (break): Call SignalException not sim_engine_halt. 2000-07-20 00:02:22 +00:00
Andrew Cagney
80ee11fa0e Fix MOVN.fmt and MOVZ.fmt, need to test GPR[RT]. 2000-07-04 02:32:58 +00:00
Andrew Cagney
673388c077 Fix printf arguments. 2000-06-23 12:39:41 +00:00
Nick Clifton
4c0deff44c Define GPR_CLEAR 2000-05-29 19:38:39 +00:00
Andrew Cagney
eb2d80b469 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
Andrew Cagney
dd37a34b6f * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call. 2000-05-01 07:06:10 +00:00
Andrew Cagney
e30db7381c Fix printf botch. 2000-04-09 14:15:43 +00:00
Frank Ch. Eigler
cb7450ea08 * simplify eCos testing
2000-03-21  Frank Ch. Eigler  <fche@redhat.com>

	* interp.c (sim_open): Sort & extend dummy memory regions for
	--board=jmr3904 for eCos.
2000-03-21 20:45:43 +00:00
Frank Ch. Eigler
a3027dd748 * autoconf correction
* merge from internal repo -> sourceware

2000-03-02  Frank Ch. Eigler  <fche@redhat.com>

	* configure: Regenerated.

Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>

	* interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
	calls, conditional on the simulator being in verbose mode.
2000-03-02 18:14:02 +00:00
Jason Molenda
dfcd3bfb6f import gdb-2000-02-04 snapshot 2000-02-05 07:30:26 +00:00
Jason Molenda
c2d11a7da0 import gdb-1999-12-06 snapshot 1999-12-07 03:56:43 +00:00
Jason Molenda
4ce44c668d import gdb-1999-11-16 snapshot 1999-11-17 02:31:06 +00:00
Jason Molenda
cff3e48be7 import gdb-1999-09-13 snapshot 1999-09-13 21:40:00 +00:00
Stan Shebs
d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Jason Molenda
a0b3c4fd32 import gdb-1999-08-02 snapshot 1999-08-02 23:48:37 +00:00
Jason Molenda
adf40b2e16 import gdb-1999-07-19 snapshot 1999-07-19 23:30:11 +00:00
Jason Molenda
43e526b9b4 import gdb-1999-07-12 snapshot 1999-07-12 11:15:22 +00:00
Jason Molenda
9846de1bb5 import gdb-1999-07-07 pre reformat 1999-07-07 17:31:57 +00:00
Stan Shebs
cd0fc7c3eb import gdb-1999-05-10 1999-05-11 13:35:55 +00:00
Stan Shebs
7a292a7adf import gdb-19990422 snapshot 1999-04-26 18:34:20 +00:00
Stan Shebs
c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs
071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Frank Ch. Eigler
e346625314 * Fix for PR 17794, brought over from ecc-98r1-branch.
1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
 	CPU, start periodic background I/O polls.
	(tx3904sio_poll): New function: periodic I/O poller.
1999-02-05 13:55:16 +00:00
Frank Ch. Eigler
08f758df94 * resolution of eCos-vs.-sky merge conflict!
[ChangeLog]
1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
	* mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
start-sanitize-sky
	* interp.c (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook.
 	Call sim_engine_halt on BreakPoint.
end-sanitize-sky
[ChangeLog.sky]
1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
	* sky-gdb.c (sky_sim_engine_halt): Do not set CIA here.
1998-12-30 21:16:14 +00:00
Stan Shebs
bd164e2835 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
* configure.in, configure (mips64vr5*-*-*): Added missing ;; in
 	case statement.
(actually a sanitize-cygnus mistake, but Rainer doesn't know that)
1998-12-30 21:16:13 +00:00
Frank Ch. Eigler
14bbac6609 * eCos->devo merge; tx3904 sanitize tags removed
1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
	(load_word): Call SIM_CORE_SIGNAL hook on error.
	(signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
	starting.  For exception dispatching, pass PC instead of NULL_CIA.
	(decode_coproc): Use COP0_BADVADDR to store faulting address.
	* sim-main.h (COP0_BADVADDR): Define.
	(SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
	(SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
	(_sim_cpu): Add exc_* fields to store register value snapshots.
	* mips.igen (*): Replace memory-related SignalException* calls
	with references to SIM_CORE_SIGNAL hook.
	* dv-tx3904irc.c (tx3904irc_port_event): printf format warning
	fix.
	* sim-main.c (*): Minor warning cleanups.
1998-12-30 12:21:43 +00:00
Gavin Romig-Koch
35d6075ac2 m16.igen (DADDIU5): Correct type-o. 1998-12-24 05:55:42 +00:00
Gavin Romig-Koch
f87366ec28 New 'hack' generator 1998-12-16 05:07:34 +00:00
Gavin Romig-Koch
7d2ec607de missing *vr4320: 1998-12-15 03:31:39 +00:00
Gavin Romig-Koch
bff2d36890 5xxx and el 1998-12-14 15:14:24 +00:00
Gavin Romig-Koch
f14397f057 for bfd:
* archures.c,bfd-in2.h (bfd_mach_mips4121): New.
	* cpu-mips.c: Added vr4121.
	* elf32-mips.c (elf_mips_mach): Same.
	(_bfd_mips_elf_final_write_processing): Same.

for gas:
	* config/tc-mips.c (mips_4121): New.
	(md_begin,mips_ip,md_longopts,md_parse_option): Add vr4121.

for gcc:
	* config/mips/mips.c (override_options): Add vr4121.
	* config/mips/t-vr4xxx (MULTILIB_MATCHES): Same.

for include/elf:
	* mips.h (E_MIPS_MACH_4121): New.

for include/opcode:
	* mips.h (INSN_4121): New.

for opcodes:
	* mips-dis.c (set_mips_isa_type): Add bfd_mach_mips4121.
	(_print_insn_mips): Same.
	* mips-opc.c: Add vr4121.

for sim/mips:
	* configure.in,mips.igen,vr.igen: Add vr4121.
	* configure: Rebuilt.
1998-12-13 16:14:24 +00:00
Gavin Romig-Koch
82aeada70c * configure.in (mips64vr4xxx): Enable TARGET_ENABLE_FR.
Set mips_fpu, and mips_fpu_bitsize.
	Set sim_gen, and sim_igen_machine.
	* configure: Rebuild.
	* mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
	* sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1998-12-12 22:43:54 +00:00
Gavin Romig-Koch
eac6dec56e Cleanups. 1998-12-11 15:18:54 +00:00
Frank Ch. Eigler
c426ee5dd0 * Fix for endianness bugs in tx39 sio sim.
1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
	(tx3904sio_tickle): fflush after a stdout character output.
1998-12-10 23:20:48 +00:00
Jeff Law
3314a50ac8 Add missing sanitize markers. 1998-12-10 23:20:47 +00:00
Andrew Cagney
a6a5d34927 Fix --enable-build-warnings=-Werror failures.
v850/simops.c, d10v/simops.c, v850/Makefile.in, d10v/Makefile.in:
Include targ-vals.h instead of syscall.h. Replace SYS_* with
TARGET_SYS_*.  Add dependency.
z8k/support.c: Include <errno.h>
v850/simops.c: Replace long with portable signed32.
mips/interp.c: Make sim_monitor global - needed by sky.
1998-11-25 09:58:04 +00:00
Andrew Cagney
baa1a48801 Explicitly tag vr41/mips16 instructions.
Update configure.in/configure.
1998-11-25 06:50:48 +00:00
Andrew Cagney
57791952b6 Configure mips64vr4100-elf nee mips64vr41* as a 64 bit mips16 igen simulator.
Fix problems: All vr.igen instructions are 64 bit.
1998-11-23 07:16:03 +00:00
Andrew Cagney
5a581ea612 Pacify GCC. 1998-11-23 06:10:01 +00:00
Andrew Cagney
ee562da4c4 Reconize target mips-tx19-elf 1998-11-23 06:06:12 +00:00
Andrew Cagney
a83d7d870f Switch mips-lsi-elf mips16 simulator to igen (from gencode). 1998-11-23 05:50:21 +00:00
Andrew Cagney
821b702f92 * r5900.igen (CVT.W.S): Always round towards zero.
Update testsuite.
1998-11-21 03:31:30 +00:00
Andrew Cagney
d1cbd70abb Add configury for mips-lsi-elf target (32 bit MIPS16).
Fix numerous problems with PENDING_* code.
In old gencode simulator, don't double tick each cycle.
Add BREAK instruction to MIPS16 gencode simulator.
1998-11-12 06:42:34 +00:00
Andrew Cagney
7d88afe63e div(-0) sets both I/SI and D/SD (PR16522) 1998-11-11 08:18:55 +00:00