darkkirb/old-cross-binutils
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
71078 commits 1 branch 0 tags 272 MiB
Commit graph

2073 commits

Author SHA1 Message Date
Matthew Gretton-Dann
5f1af56b76 2011-06-21 Sameera Deshpande <sameera.deshpande@arm.com> 
* gas/config/tc-arm.c (vfp_conv): Add check on range of immediate operand
	in vcvt instruction between floating-point and fixed-point.
	(operand_parse_code): Add "OP_oI32z".
	(parse_operands): OP_oI32z case added.
	* gas/testsuite/gas/arm/vcvt-bad.d: New test.
	* gas/testsuite/gas/arm/vcvt-bad.l: Likewise.
	* gas/testsuite/gas/arm/vcvt-bad.s: Likewise.
	* gas/testsuite/gas/arm/vcvt.d: Likewise.
	* gas/testsuite/gas/arm/vcvt.s: Likewise.
 2011-06-21 15:34:27 +00:00
Tristan Gingold
2fb4b302aa gas/ 
2011-06-14  Tristan Gingold  <gingold@adacore.com>

	* config/tc-ppc.h (struct ppc_tc_sy): Complete comment on within.
	(tc_new_dot_label): Define.
	(ppc_new_dot_label): Declare.
	* config/tc-ppc.c (ppc_frob_label): Set within target field.
	(ppc_fix_adjustable): Use this field to adjust the reloc.
	(ppc_new_dot_label): New function.


gas/testsuite/
2011-06-14  Tristan Gingold  <gingold@adacore.com>

	* gas/ppc/test1xcoff32.d: Adjust for csect anchor.
 2011-06-14 09:03:52 +00:00
Nick Clifton
aa137e4d51 * Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. 
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
    (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
    and elfxx-tilegx.lo.
    (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
    elfxx-tilegx.c.
    (BFD64_BACKENDS): Add elf64-tilegx.lo.
    (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
    * Makefile.in: Regenerate.
    * arctures.c (bfd_architecture): Define bfd_arch_tilepro,
    bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
    (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
    (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
    bfd-in2.h: Regenerate.
    * config.bfd: Handle tilegx-*-* and tilepro-*-*.
    * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * configure: Regenerate.
    * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
    TILEPRO_ELF_DATA.
    * libbfd.h: Regenerate.
    * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
    RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
    IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
    IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
    IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
    IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
    IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
    IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
    IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
    IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
    MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
    IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
    IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
    IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
    IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
    IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
    IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
    HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
    JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
    DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
    SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
    IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
    IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
    IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
    IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
    IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
    IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
    IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
    IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
    IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
    IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
    IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
    IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
    IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
    IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
    IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
    IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
    IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
    IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
    IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
    IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
    IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
    IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
    IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
    IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
    IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
    IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
    IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
    TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    * targets.c (bfd_elf32_tilegx_vec): Declare.
    (bfd_elf32_tilepro_vec): Declare.
    (bfd_elf64_tilegx_vec): Declare.
    (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * cpu-tilegx.c: New file.
    * cpu-tilepro.c: New file.
    * elf32-tilepro.h: New file.
    * elf32-tilepro.c: New file.
    * elf32-tilegx.c: New file.
    * elf32-tilegx.h: New file.
    * elf64-tilegx.c: New file.
    * elf64-tilegx.h: New file.
    * elfxx-tilegx.c: New file.
    * elfxx-tilegx.h: New file.

	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
	config/tc-tilepro.c.
	(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
	config/tc-tilepro.h.
	* Makefile.in: Regenerate.
	* configure.tgt (tilepro-*-*): New.
	(tilegx-*-*): Likewise.
	* config/tc-tilegx.c: New file.
	* config/tc-tilegx.h: Likewise.
	* config/tc-tilepro.h: Likewise.
	* config/tc-tilepro.c: Likewise.
	* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
	c-tilepro.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TILEGX): Define.
	(TILEPRO): Define.
	* doc/as.texinfo: Add Tile-Gx and TILEPro documentation.  Include
	c-tilegx.texi and c-tilepro.texi.
	* doc/c-tilegx.texi: New.
	* doc/c-tilepro.texi: New.

        * gas/tilepro/t_constants.s: New file.
	* gas/tilepro/t_constants.d: Likewise.
	* gas/tilepro/t_insns.s: Likewise.
	* gas/tilepro/tilepro.exp: Likewise.
	* gas/tilepro/t_insns.d: Likewise.
	* gas/tilegx/tilegx.exp: Likewise.
	* gas/tilegx/t_insns.d: Likewise.
	* gas/tilegx/t_insns.s: Likewise.

	* dis-asm.h (print_insn_tilegx): Declare.
	(print_insn_tilepro): Likewise.

	* tilegx.h: New file.
	* tilepro.h: New file.

	* common.h: Add EM_TILEGX.
	* tilegx.h: New file.
	* tilepro.h: New file.

	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
	eelf32tilepro.c.
	(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
	(eelf32tilegx.c): New target.
	(eelf32tilepro.c): Likewise.
	(eelf64tilegx.c): Likewise.
	* Makefile.in: Regenerate.
	* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
	* emulparams/elf32tilegx.sh: New file.
	* emulparams/elf64tilegx.sh: New file.
	* emulparams/elf32tilepro.sh: New file.

	* ld-elf/eh5.d: Don't run on tile*.
	* ld-srec/srec.exp: xfail on tile*.
	* ld-tilegx/external.s: New file.
	* ld-tilegx/reloc.d: New file.
	* ld-tilegx/reloc.s: New file.
	* ld-tilegx/tilegx.exp: New file.
	* ld-tilepro/external.s: New file.
	* ld-tilepro/reloc.d: New file.
	* ld-tilepro/reloc.s: New file.
	* ld-tilepro/tilepro.exp: New file.

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
	tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
	* Makefile.in: Regenerate.
	* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
	* po/POTFILES.in: Regenerate.
	* tilegx-dis.c: New file.
	* tilegx-opc.c: New file.
	* tilepro-dis.c: New file.
	* tilepro-opc.c: New file.
 2011-06-13 15:18:54 +00:00
Nick Clifton
af199b0601 PR gas/12854 
Add additional checks for extraneous shifts and extra tests in the testsuite.
 2011-06-13 12:50:18 +00:00
Nick Clifton
94342ec38b PR gas/12854 
* gas/arm/shift-bad.s: New test.
	* gas/arm/shift-bad.l: Expcted error output.
	* gas/arm/shift-bad.s: New control file.

	* config/tc-arm.c (do_shift): Do not allow shift operations at the
	end of a register based shift insn.
	(do_t_shift): Likewise.
 2011-06-13 09:57:35 +00:00
H.J. Lu
551497ed0e Update lzcnt testcases. 
2011-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10-lzcnt.d: Updated.
	* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
 2011-06-13 02:41:24 +00:00
H.J. Lu
6c30d220f1 Support AVX Programming Reference (June, 2011). 
gas/

2011-06-10  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (June, 2011)
	* config/tc-i386.c (i386_error): Add invalid_vsib_address and
	unsupported_vector_index_register.
	(cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
	(check_VecOperands): New.
	(match_template): Call check_VecOperands.  Handle
	invalid_vsib_address and unsupported_vector_index_register.
	(build_modrm_byte): Support VecSIB.  Check register-only source
	operand when two source operands are swapped.
	(i386_index_check): Allow Xmm/Ymm index registers.

	* doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
	and invpcid./invpcid.

gas/testsuite/

2011-06-10  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (June, 2011)
	* gas/i386/arch-10-1.l: Updated.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.

	* gas/i386/arch-10.s: Add LZCNT to comments.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/arch-10-lzcnt.d: New.
	* gas/i386/avx-gather-intel.d: Likewise.
	* gas/i386/avx-gather.d: Likewise.
	* gas/i386/avx-gather.s: Likewise.
	* gas/i386/avx2-intel.d: Likewise.
	* gas/i386/avx2.d: Likewise.
	* gas/i386/avx2.s: Likewise
	* gas/i386/avx256int-intel.d: Likewise.
	* gas/i386/avx256int.d: Likewise.
	* gas/i386/avx256int.s: Likewise.
	* gas/i386/bmi2-intel.d: Likewise.
	* gas/i386/bmi2.d: Likewise.
	* gas/i386/bmi2.s: Likewise.
	* gas/i386/inval-invpcid.l:Likewise.
	* gas/i386/inval-invpcid.s: Likewise.
	* gas/i386/invpcid-intel.d: Likewise.
	* gas/i386/invpcid.d: Likewise.
	* gas/i386/invpcid.s: Likewise.
	* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
	* gas/i386/x86-64-avx-gather-intel.d: Likewise.
	* gas/i386/x86-64-avx-gather.d: Likewise.
	* gas/i386/x86-64-avx-gather.s: Likewise.
	* gas/i386/x86-64-avx2-intel.d: Likewise.
	* gas/i386/x86-64-avx2.d: Likewise.
	* gas/i386/x86-64-avx2.s: Likewise.
	* gas/i386/x86-64-avx256int-intel.d: Likewise.
	* gas/i386/x86-64-avx256int.d: Likewise.
	* gas/i386/x86-64-avx256int.s: Likewise.
	* gas/i386/x86-64-bmi2-intel.d: Likewise.
	* gas/i386/x86-64-bmi2.d: Likewise.
	* gas/i386/x86-64-bmi2.s: Likewise.
	* gas/i386/x86-64-inval-invpcid.l: Likewise.
	* gas/i386/x86-64-inval-invpcid.s: Likewise.
	* gas/i386/x86-64-invpcid-intel.d: Likewise.
	* gas/i386/x86-64-invpcid.d: Likewise.
	* gas/i386/x86-64-invpcid.s: Likewise.

opcodes/

2011-06-10  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (June, 2011)
	* i386-dis.c (XMGatherQ): New.
	* i386-dis.c (EXxmm_mb): New.
	(EXxmm_mb): Likewise.
	(EXxmm_mw): Likewise.
	(EXxmm_md): Likewise.
	(EXxmm_mq): Likewise.
	(EXxmmdw): Likewise.
	(EXxmmqd): Likewise.
	(VexGatherQ): Likewise.
	(MVexVSIBDWpX): Likewise.
	(MVexVSIBQWpX): Likewise.
	(xmm_mb_mode): Likewise.
	(xmm_mw_mode): Likewise.
	(xmm_md_mode): Likewise.
	(xmm_mq_mode): Likewise.
	(xmmdw_mode): Likewise.
	(xmmqd_mode): Likewise.
	(ymmxmm_mode): Likewise.
	(vex_vsib_d_w_dq_mode): Likewise.
	(vex_vsib_q_w_dq_mode): Likewise.
	(MOD_VEX_0F385A_PREFIX_2): Likewise.
	(MOD_VEX_0F388C_PREFIX_2): Likewise.
	(MOD_VEX_0F388E_PREFIX_2): Likewise.
	(PREFIX_0F3882): Likewise.
	(PREFIX_VEX_0F3816): Likewise.
	(PREFIX_VEX_0F3836): Likewise.
	(PREFIX_VEX_0F3845): Likewise.
	(PREFIX_VEX_0F3846): Likewise.
	(PREFIX_VEX_0F3847): Likewise.
	(PREFIX_VEX_0F3858): Likewise.
	(PREFIX_VEX_0F3859): Likewise.
	(PREFIX_VEX_0F385A): Likewise.
	(PREFIX_VEX_0F3878): Likewise.
	(PREFIX_VEX_0F3879): Likewise.
	(PREFIX_VEX_0F388C): Likewise.
	(PREFIX_VEX_0F388E): Likewise.
	(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
	(PREFIX_VEX_0F38F5): Likewise.
	(PREFIX_VEX_0F38F6): Likewise.
	(PREFIX_VEX_0F3A00): Likewise.
	(PREFIX_VEX_0F3A01): Likewise.
	(PREFIX_VEX_0F3A02): Likewise.
	(PREFIX_VEX_0F3A38): Likewise.
	(PREFIX_VEX_0F3A39): Likewise.
	(PREFIX_VEX_0F3A46): Likewise.
	(PREFIX_VEX_0F3AF0): Likewise.
	(VEX_LEN_0F3816_P_2): Likewise.
	(VEX_LEN_0F3819_P_2): Likewise.
	(VEX_LEN_0F3836_P_2): Likewise.
	(VEX_LEN_0F385A_P_2_M_0): Likewise.
	(VEX_LEN_0F38F5_P_0): Likewise.
	(VEX_LEN_0F38F5_P_1): Likewise.
	(VEX_LEN_0F38F5_P_3): Likewise.
	(VEX_LEN_0F38F6_P_3): Likewise.
	(VEX_LEN_0F38F7_P_1): Likewise.
	(VEX_LEN_0F38F7_P_2): Likewise.
	(VEX_LEN_0F38F7_P_3): Likewise.
	(VEX_LEN_0F3A00_P_2): Likewise.
	(VEX_LEN_0F3A01_P_2): Likewise.
	(VEX_LEN_0F3A38_P_2): Likewise.
	(VEX_LEN_0F3A39_P_2): Likewise.
	(VEX_LEN_0F3A46_P_2): Likewise.
	(VEX_LEN_0F3AF0_P_3): Likewise.
	(VEX_W_0F3816_P_2): Likewise.
	(VEX_W_0F3818_P_2): Likewise.
	(VEX_W_0F3819_P_2): Likewise.
	(VEX_W_0F3836_P_2): Likewise.
	(VEX_W_0F3846_P_2): Likewise.
	(VEX_W_0F3858_P_2): Likewise.
	(VEX_W_0F3859_P_2): Likewise.
	(VEX_W_0F385A_P_2_M_0): Likewise.
	(VEX_W_0F3878_P_2): Likewise.
	(VEX_W_0F3879_P_2): Likewise.
	(VEX_W_0F3A00_P_2): Likewise.
	(VEX_W_0F3A01_P_2): Likewise.
	(VEX_W_0F3A02_P_2): Likewise.
	(VEX_W_0F3A38_P_2): Likewise.
	(VEX_W_0F3A39_P_2): Likewise.
	(VEX_W_0F3A46_P_2): Likewise.
	(MOD_VEX_0F3818_PREFIX_2): Removed.
	(MOD_VEX_0F3819_PREFIX_2): Likewise.
	(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
	(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
	(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
	(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
	(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
	(VEX_LEN_0F3A0E_P_2): Likewise.
	(VEX_LEN_0F3A0F_P_2): Likewise.
	(VEX_LEN_0F3A42_P_2): Likewise.
	(VEX_LEN_0F3A4C_P_2): Likewise.
	(VEX_W_0F3818_P_2_M_0): Likewise.
	(VEX_W_0F3819_P_2_M_0): Likewise.
	(prefix_table): Updated.
	(three_byte_table): Likewise.
	(vex_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(putop): Handle "LW".
	(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
	xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
	vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
	(OP_EX): Likewise.
	(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
	vex_vsib_q_w_dq_mode.
	(OP_XMM): Handle vex_vsib_q_w_dq_mode.
	(OP_VEX): Likewise.

	* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
	and CPU_ANY_AVX_FLAGS.  Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
	CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
	(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
	(opcode_modifiers): Add VecSIB.

	* i386-opc.h (CpuAVX2): New.
	(CpuBMI2): Likewise.
	(CpuLZCNT): Likewise.
	(CpuINVPCID): Likewise.
	(VecSIB128): Likewise.
	(VecSIB256): Likewise.
	(VecSIB): Likewise.
	(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
	(i386_opcode_modifier): Add vecsib.

	* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2011-06-10 21:27:40 +00:00
Richard Earnshaw
c56791bbad 2011-06-09 James Greenhalgh <james.greenhalgh@arm.com> 
* config/tc-arm.c (do_ldrd): Warn in unpredictable cases.

2011-06-09  James Greenhalgh  <james.greenhalgh@arm.com>

	* gas/arm/ldrd-unpredicatble.d: New testcase.
	* gas/arm/ldrd-unpredicatble.s: Likewise.
	* gas/arm/ldrd-unpredicatble.l: Likewise.
 2011-06-09 09:59:34 +00:00
Nathan Sidwell
26d97720ed gas/ 
* config/tc-arm.c (parse_address_main): Handle -0 offsets.
	(encode_arm_addr_mode_2): Set default sign of zero here ...
	(encode_arm_addr_mode_3): ... and here.
	(encode_arm_cp_address): ... and here.
	(md_apply_fix): Use default sign of zero here.

	gas/testsuite/
	* gas/arm/inst.d: Adjust for signed zero offsets.
	* gas/arm/ldst-offset0.d: New test.
	* gas/arm/ldst-offset0.s: New test.
	* gas/arm/offset-1.d: New test.
	* gas/arm/offset-1.s: New test.

	ld/testsuite/
	Adjust tests for zero offset formatting.
	* ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
	* ld-arm/farcall-arm-arm-pic-veneer.d: Adjust.
	* ld-arm/farcall-arm-thumb.d: Adjust.
	* ld-arm/farcall-group-size2.d: Adjust.
	* ld-arm/farcall-group.d: Adjust.
	* ld-arm/farcall-mix.d: Adjust.
	* ld-arm/farcall-mix2.d: Adjust.
	* ld-arm/farcall-mixed-lib-v4t.d: Adjust.
	* ld-arm/farcall-mixed-lib.d: Adjust.
	* ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust.
	* ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust.
	* ld-arm/farcall-thumb-thumb.d: Adjust.
	* ld-arm/ifunc-10.dd: Adjust.
	* ld-arm/ifunc-3.dd: Adjust.
	* ld-arm/ifunc-4.dd: Adjust.
	* ld-arm/ifunc-5.dd: Adjust.
	* ld-arm/ifunc-6.dd: Adjust.
	* ld-arm/ifunc-7.dd: Adjust.
	* ld-arm/ifunc-8.dd: Adjust.
	* ld-arm/jump-reloc-veneers-long.d: Adjust.
	* ld-arm/tls-longplt-lib.d: Adjust.
	* ld-arm/tls-thumb1.d: Adjust.

	opcodes/
	* arm-dis.c (print_insn_coprocessor): Explicitly print #-0
	as address offset.
	(print_arm_address): Likewise. Elide positive #0 appropriately.
	(print_insn_arm): Likewise.
 2011-06-02 15:32:10 +00:00
Paul Brook
3b2f079304 2011-05-31 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (arm_cpus): Add Cortex-R5.
	(arm_extensions): Allow idiv on ARMv7-R.
	* doc/c-arm.text: Update idiv extension restrictions.

	gas/testsuite/
	* gas/arm/arm-idiv-bad.d: New test.
	* gas/arm/arm-idiv-bad.s: New test.
	* gas/arm/arm-idiv-bad.l: New test.
	* gas/arm/arm-idiv.d: New test.
	* gas/arm/arm-idiv.s: New test.

	include/
	* opcode/arm.h (ARM_ARCH_V7R_IDIV): Define.
 2011-05-31 14:12:55 +00:00
Paul Brook
b58843019a 2011-05-31 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (arm_force_relocation): Resolve all pc-relative
	loads.

	gas/testsuite/
	* gas/arm/ldr-global.d: New test.
	* gas/arm/ldr-global.s: New test.
 2011-05-31 14:10:07 +00:00
Paul Brook
10960bfbce 2011-05-31 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (do_t_branch): Avoid relaxing branches to constant
	addresses.

	gas/testsuite/
	* arm/t2-branch-global.d: New test.
	* arm/t2-branch-global.s: New test.
 2011-05-31 14:04:13 +00:00
Andreas Krebbel
c8fa16ed5a 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* config/tc-s390.c (md_gather_operands): Fix check for floating
	    register pair operands.

2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	    * opcode/s390.h: Replace S390_OPERAND_REG_EVEN with
	    S390_OPERAND_REG_PAIR.

2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	    * s390-opc.c: Replace S390_OPERAND_REG_EVEN with
	    S390_OPERAND_REG_PAIR.  Fix INSTR_RRF_0UFEF instruction type.
	    * s390-opc.txt: Fix cxr instruction type.

2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	    * gas/s390/esa-g5.d: Fix fp register pair operands.
	    * gas/s390/esa-g5.s: Likewise.
	    * gas/s390/zarch-z196.d: Likewise.
	    * gas/s390/zarch-z196.s: Likewise.
	    * gas/s390/zarch-z9-109.d: Likewise.
	    * gas/s390/zarch-z9-109.s: Likewise.
	    * gas/s390/zarch-z9-ec.d: Likewise.
	    * gas/s390/zarch-z9-ec.s: Likewise.
 2011-05-24 16:13:31 +00:00
Andreas Krebbel
5e4b319cdc 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* config/tc-s390.c (md_gather_operands): Emit an error for odd
	numbered registers used as register pair operand.

2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* opcode/s390.h: Add S390_OPCODE_REG_EVEN flag.

2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-opc.c: Add new instruction types marking register pair
	operands.
	* s390-opc.txt: Match instructions having register pair operands
	to the new instruction types.

2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/esa-g5.d: Fix register pair operands.
	* gas/s390/esa-g5.s: Likewise.
	* gas/s390/esa-z9-109.d: Likewise.
	* gas/s390/esa-z9-109.s: Likewise.
	* gas/s390/zarch-z196.d: Likewise.
	* gas/s390/zarch-z196.s: Likewise.
	* gas/s390/zarch-z9-109.d: Likewise.
	* gas/s390/zarch-z9-109.s: Likewise.
	* gas/s390/zarch-z900.d: Likewise.
	* gas/s390/zarch-z900.s: Likewise.
	* gas/s390/zarch-z990.d: Likewise.
	* gas/s390/zarch-z990.s: Likewise.
 2011-05-24 13:33:57 +00:00
Bernd Schmidt
4a73203297 ld/testsuite/ 
* ld-tic6x/pcr-reloc.d: New test.
	* ld-tic6x/pcr-reloc.s: New test.

	gas/testsuite/
	* gas/tic6x/pcr-relocs.d: New test.
	* gas/tic6x/pcr-relocs.s: New test.
	* gas/tic6x/pcr-relocs-undef.d: New test.
	* gas/tic6x/pcr-relocs-undef.s: New test.
	* gas/tic6x/reloc-bad-2.s: Update for pcr_offset.
	* gas/tic6x/reloc-bad-2.l: Update for pcr_offset.

	bfd/
	* elf32-tic6x.c (elf32_tic6x_howto_table): Add entries for
	R_C6000_PCR_H16 and R_C6000_PCR_L16.
	(elf32_tic6x_relocate_section): Handle them.

	gas/
	* config/tc-tic6x.c (tic6x_operators): Add "pcr_offset".
	(tic6x_parse_name): Handle it.
	(tic6x_fix_new_exp): Handle O_pcr_offset.
	(tic6x_fix_adjustable): Return 0 for the new relocs.
	(md_apply_fix): Handle them.
	(tc_gen_reloc): Likewise.
	* config/tc-tic6x.h (tic6x_fix_info): Add a fix_subsy member.
 2011-05-20 10:10:00 +00:00
Nick Clifton
5652e39766 * gas/arm/req.l: Updated expected warning message. 2011-05-18 16:28:34 +00:00
Tristan Gingold
85645aed85 bfd 
2011-05-18  Tristan Gingold  <gingold@adacore.com>

	* libxcoff.h (struct xcoff_dwsect_name): New type.
	(XCOFF_DWSECT_NBR_NAMES): New macro.
	(xcoff_dwsect_names): Declare.
	* coffcode.h (sec_to_styp_flags): Handle xcoff dwarf sections.
	(styp_to_sec_flags): Ditto.
	(coff_new_section_hook): Ditto.
	(coff_slurp_symbol_table): Handle C_DWARF and C_INFO.
	* coff-rs6000.c (xcoff_dwsect_name): New variable.

gas
2011-05-18  Tristan Gingold  <gingold@adacore.com>

	* config/tc-ppc.h (ppc_tc_sy): Reorder fields.
	Put size into an union with dw.
	(OBJ_COPY_SYMBOL_ATTRIBUTES): Adjust.
	(ppc_xcoff_end): Declare.
	(md_end): Define.
	* config/tc-ppc.c: Add includes for xcoff.
	(ppc_dwsect): New function.
	(md_pseudo_table): Add dwsect.
	(struct dw_subsection): New.
	(dw_sections): New.
	(ppc_change_debug_section): New function.
	(ppc_xcoff_end): Ditto.
	(ppc_function): Adjust for ppc_tc_sy.
	(ppc_symbol_new_hook): Ditto.
	(ppc_frob_symbol): Ditto.
	(ppc_frob_section): Do not set vma for debug sections.
	(ppc_fix_adjustable): Return true for debug sections.
	* config/obj-coff.c: Add includes for xcoff.
	(coff_frob_section): Handle dwarf section.

gas/testsuite
2011-05-18  Tristan Gingold  <gingold@adacore.com>

	* gas/ppc/xcoff-dwsect-1-32.d: New test.
	* gas/ppc/xcoff-dwsect-1-64.d: Ditto.
	* gas/ppc/xcoff-dwsect-1.s: New file.
	* gas/ppc/aix.exp (do_align_test): Add tests.
 2011-05-18 07:58:36 +00:00
Hans-Peter Nilsson
27d0bed645 * gas/cris/rd-brokw-pic-1.d, gas/cris/rd-brokw-pic-2.d, 
gas/cris/rd-fragtest-pic.d: Gate on targets cris-*-*elf* and
	cris-*-linux-gnu.
	* gas/cris/pic-err-2.s, gas/cris/pic-err-3.s: New tests.
 2011-05-16 03:29:34 +00:00
Alan Modra
25e334b48f * gas/all/gas.exp: Fix typo last change. 2011-05-14 00:52:07 +00:00
Alan Modra
8b0aac0f7b * gas/all/gas.exp: Remove some xfails on redef2 and redef3 tests. 
Update comments.
	* gas/hppa/unsorted/unsorted.exp: Run globalbug test on appropriate
	targets rather than xfailing.
 2011-05-13 04:16:23 +00:00
Matthew Gretton-Dann
58ad575ff3 PR gas/12715 
* gas/config/tc-arm.c (parse_big_immediate):  Fix parsing of 64-bit
	immediates on 32-bit hosts.
	* gas/testsuite/gas/arm/neon-const.s: Add testcase for 64-bit Neon constants.
	* gas/testsuite/gas/arm/neon-const.d: Likewise.
 2011-05-12 12:41:45 +00:00
Richard Sandiford
f11e29afea gas/testsuite/ 
* gas/mips/24k-branch-delay-1.d: Allow 64-bit addresses.  Stub out
	function names.
	* gas/mips/24k-triple-stores-1.d: Likewise.
	* gas/mips/24k-triple-stores-2.d: Likewise.
	* gas/mips/24k-triple-stores-3.d: Likewise.
	* gas/mips/24k-triple-stores-4.d: Likewise.
	* gas/mips/24k-triple-stores-5.d: Likewise.
	* gas/mips/24k-triple-stores-7.d: Likewise.
	* gas/mips/24k-triple-stores-8.d: Likewise.
	* gas/mips/24k-triple-stores-9.d: Likewise.
	* gas/mips/24k-triple-stores-10.d: Likewise.
	* gas/mips/24k-triple-stores-11.d: Likewise.
	* gas/mips/24k-triple-stores-6.d: Likewise.  Add -EB.
	* gas/mips/mips.exp: Only run 24k-triple-stores-11.d on ELF targets.
 2011-05-11 12:39:08 +00:00
Richard Sandiford
6eee42f470 gas/testsuite/ 
* gas/mips/24k-branch-delay-1.d: Add -32 to assembler options.
	* gas/mips/24k-triple-stores-1.d: Likewise.
	* gas/mips/24k-triple-stores-2.d: Likewise.
	* gas/mips/24k-triple-stores-3.d: Likewise.
	* gas/mips/24k-triple-stores-4.d: Likewise.
	* gas/mips/24k-triple-stores-5.d: Likewise.
	* gas/mips/24k-triple-stores-6.d: Likewise.
	* gas/mips/24k-triple-stores-7.d: Likewise.
	* gas/mips/24k-triple-stores-8.d: Likewise.
	* gas/mips/24k-triple-stores-9.d: Likewise.
	* gas/mips/24k-triple-stores-10.d: Likewise.
	* gas/mips/24k-triple-stores-11.d: Likewise.
 2011-05-11 11:50:40 +00:00
Nick Clifton
8d67f500e1 * config/tc-arm.c(do_t_ldst): Warn on loading into sp with 
writeback for appropriate cores/arch.
	* testsuite/gas/arm/ld-sp-warn-cortex-m3.d: New test.
	* testsuite/gas/arm/ld-sp-warn-cortex-m3.l: New test.
	* testsuite/gas/arm/ld-sp-warn-cortex-m4.d: New test.
	* testsuite/gas/arm/ld-sp-warn-cortex-m4.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7a.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7a.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7e-m.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7em.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7m.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7m.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7r.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7r.l: New test.
	* testsuite/gas/arm/ld-sp-warn.s: New test.
 2011-05-11 09:25:44 +00:00
Quentin Neill
af2f724ec4 2011-05-10 Quentin Neill <quentin.neill@amd.com> 
gas/
	* config/tc-i386.c (cpu_arch): Add bdver2 and rename
	PROCESSOR_BDVER1 to PROCESSOR_BDVER.
	(i386_align_code): Rename PROCESSOR_BDVER1.
	(processor_type): Ditto.
	* doc/c-i386.texi: Add bdver2.

opcodes/
	* i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS.
	* i386-init.h: Regenerated.

gas/testsuite/
	* gas/i386/i386.exp: Add new bdver2 test cases.
	* gas/i386/nops-1-bdver2.d: New.
	* gas/i386/x86-64-nops-1-bdver2.d: New.
 2011-05-10 22:02:27 +00:00
Paul Brook
1bce6bd86f 2011-05-09 Paul Brook <paul@codesourcery.com> 
bfd/
	* elf32-tic6x.c (is_tic6x_elf_unwind_section_name,
	elf32_tic6x_fake_sections): New functions.
	(elf_backend_fake_sections): Define.

	gas/
	* config/tc-tic6x.c (streq): Define.
	(tic6x_get_unwind): New.
	(s_tic6x_cantunwind, s_tic6x_handlerdata, s_tic6x_endp,
	s_tic6x_personalityindex, s_tic6x_personality): New functions.
	(md_pseudo_table): Add "endp", "handlerdata", "personalityindex",
	"personality" and "cantunwind".
	(tic6x_regname_to_dw2regnum, tic6x_frame_initial_instructions,
	tic6x_start_unwind_section, tic6x_unwind_frame_regs,
	tic6x_pop_rts_offset_little, tic6x_pop_rts_offset_big,
	tic6x_unwind_reg_from_dwarf, tic6x_flush_unwind_word,
	tic6x_unwind_byte, tic6x_unwind_2byte, tic6x_unwind_uleb,
	tic6x_cfi_startproc, output_exidx_entry, tic6x_output_unwinding,
	tic6x_cfi_endproc): New.
	* config/tc-tic6x.h (TIC6X_NUM_UNWIND_REGS): Define.
	(tic6x_unwind_info): New.
	(tic6x_segment_info_type): Add marked_pr_dependency, unwind and
	text_unwind.
	(TARGET_USE_CFIPOP, tc_regname_to_dw2regnum,
	tc_cfi_frame_initial_instructions, DWARF2_DEFAULT_RETURN_COLUMN,
	DWARF2_CIE_DATA_ALIGNMENT, tc_cfi_startproc, tc_cfi_endproc,
	tc_cfi_section_name): Define.
	* doc/c-tic6x.texi: Document new unwinding directives.
	* dw2gencfi.c (tc_cfi_startproc, tc_cfi_endproc): Add default
	definitions.
	(cfi_insn_data, fde_entry, CFI_adjust_cfa_offset, CFI_return_column,
	CFI_rel_offset, CFI_escape, CFI_signal_frame, CFI_val_encoded_addr):
	Move to dw2gencfi.h.
	(CFI_EMIT_target): Define.
	(dot_cfi_sections): Check tc_cfi_section_name.
	(dot_cfi_startproc): Use tc_cfi_startproc.
	(dot_cfi_endproc): Use tc_cfi_endproc.
	* dw2gencfi.h (cfi_insn_data, fde_entry, CFI_adjust_cfa_offset,
	CFI_return_column, CFI_rel_offset, CFI_escape, CFI_signal_frame,
	CFI_val_encoded_addr):  Move to here from dw2gencfi.c.

	gas/testsuite:
	* gas/tic6x/unwind-1.d: New test.
	* gas/tic6x/unwind-1.s: New test.
	* gas/tic6x/unwind-2.d: New test.
	* gas/tic6x/unwind-2.s: New test.
	* gas/tic6x/unwind-3.d: New test.
	* gas/tic6x/unwind-3.s: New test.
	* gas/tic6x/unwind-bad-1.d: New test.
	* gas/tic6x/unwind-bad-1.s: New test.
	* gas/tic6x/unwind-bad-1.l: New test.
	* gas/tic6x/unwind-bad-2.d: New test.
	* gas/tic6x/unwind-bad-2.s: New test.
	* gas/tic6x/unwind-bad-2.l: New test.

	include/
	* elf/tic6x.h (ELF_STRING_C6000_unwind,
	ELF_STRING_C6000_unwind_info, ELF_STRING_C6000_unwind_once,
	ELF_STRING_C6000_unwind_info_once): Define.
 2011-05-09 13:17:58 +00:00
Hans-Peter Nilsson
b8bbfecaed * gas/elf/dwarf2-1.d, gas/elf/dwarf2-2.d: Adjust for change in 
output format.
	* gas/i386/dw2-compress-1.d: Ditto.
 2011-04-29 01:45:06 +00:00
Catherine Moore
17b09558c0 2011-04-20 Catherine Moore <clm@codesourcery.com> 
David Ung <davidu@mips.com>

	* gas/mips/24k-branch-delay-1.d: New.
	* gas/mips/24k-branch-delay-1.s: New.
	* gas/mips/24k-triple-stores-1.d: New.
	* gas/mips/24k-triple-stores-1.s: New.
	* gas/mips/24k-triple-stores-2.d: New.
	* gas/mips/24k-triple-stores-2.s: New.
	* gas/mips/24k-triple-stores-3.d: New.
	* gas/mips/24k-triple-stores-3.s: New.
	* gas/mips/24k-triple-stores-4.s: New.
	* gas/mips/24k-triple-stores-4.d: New.
	* gas/mips/24k-triple-stores-5.d: New.
	* gas/mips/24k-triple-stores-5.s: New.
	* gas/mips/24k-triple-stores-6.d: New.
	* gas/mips/24k-triple-stores-6.s: New.
	* gas/mips/24k-triple-stores-7.d: New.
	* gas/mips/24k-triple-stores-7.s: New.
	* gas/mips/24k-triple-stores-8.d: New.
	* gas/mips/24k-triple-stores-8.s: New.
	* gas/mips/24k-triple-stores-9.d: New.
	* gas/mips/24k-triple-stores-9.s: New.
	* gas/mips/24k-triple-stores-10.d: New.
	* gas/mips/24k-triple-stores-10.s: New.
	* gas/mips/24k-triple-stores-11.d: New.
	* gas/mips/24k-triple-stores-11.s: New.
	* gas/mips/mips.exp: Invoke new tests.
 2011-04-20 16:44:28 +00:00
Nick Clifton
00bbc0bdc6 * config/tc-arm.c (v7m_psrs): Revert previous delta. 
* gas/arm/mrs-msr-thumb-v7e-m.s: Restore name of basepri_max
	register.
	* gas/arm/mrs-msr-thumb-v7e-m.d: Likewise.
	* gas/arm/arch7.d: Likewise.
	* gas/arm/arch7.s: Likewise.

	* arm-dis.c: Revert previous reversion.
 2011-04-19 07:44:12 +00:00
Nick Clifton
ac7f631be1 * gas/arm/arch7.s: Fix typo basepri_max should be basepri_mask. 
* gas/arm/mrs-msr-thumb-v7e-m.s: Likewise.
	* gas/arm/arch7.d: Update expected disassembly.
	* gas/arm/attr-march-armv7.d: Remove Microcontroller tag.
	* gas/arm/blx-bad.d: Only run for ELF based targets.
	* gas/arm/mrs-msr-thumb-v6t2.d: Likewise.
	* gas/arm/vldm-arm.d: Likewise.
	* gas/arm/mrs-msr-thumb-v7-m.d: Likewise.
	Remove qualifiers from PSR and IAPSR regsiter names.
	* gas/arm/mrs-msr-thumb-v7e-m.d: Likewise.
	* gas/arm/thumb2_bcond.d: Update expected disassembly to allow for
	relaxing of branch insns.
	* gas/arm/thumb32.d: Fix whitespace problems in disassembly.

	* config/tc-arm.c (parse_psr): Use selected_cpu not cpu_variant to
	detect M-profile targets.
	(do_t_swi): Exclude v7 and higher variants from arm_ext_os test.
	(v7m_psrs): Fix typo: basepri_max should be basepri_mask.

	* arm-dis.c (psr_name): Revert previous delta.

	* arm.h (ARM_AEXT_V7_ARM): Remove ARM_EXT_OS from bitmask.
 2011-04-19 07:27:32 +00:00
Tristan Gingold
049c5eba36 2011-04-18 Tristan Gingold <gingold@adacore.com> 
* gas/macros/app1.s: Export symbol
	* gas/macros/app2.s: Ditto
	* gas/macros/app3.s: Ditto
	* gas/macros/app4.s: Ditto
	* gas/macros/app4b.s: Ditto
	* gas/macros/app1.d: Adjust.
	* gas/macros/app2.d: Ditto.
	* gas/macros/app3.d: Ditto.
	* gas/macros/app4.d: Ditto.
 2011-04-18 13:44:36 +00:00
Tristan Gingold
7b403836d7 2011-04-18 Tristan Gingold <gingold@adacore.com> 
* lib/gas-defs.exp (get_standard_section_names): Add names for
	alpha vms.
	* gas/all/gas.exp: Do not test diff1.s on alpha-vms.
 2011-04-18 13:43:21 +00:00
Andreas Krebbel
902cc293a0 2011-04-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* config/tc-s390.c (s390_machine): New prototype.
	(md_pseudo_table): New pseudo-op .machine.
	(s390_opcode_hash): Initialize to NULL.
	(s390_parse_cpu): New function.
	(md_parse_option): Use s390_parse_cpu.
	(s390_setup_opcodes): New function.
	(md_begin): Use s390_setup_opcodes.
	(s390_machine): New hook handling the new .machine pseudo.

	* doc/c-s390.texi: Document the new pseudo op .machine.

2011-04-14  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/zarch-machine.s: New testcase.
	* gas/s390/zarch-machine.d: New testcase output.
	* gas/s390/s390.exp: Execute the new testcase.
 2011-04-14 11:11:33 +00:00
Nick Clifton
7d063384af * v850-dis.c (disassemble): Always print a closing square brace if 
an opening square brace was printed.
 2011-04-13 13:20:24 +00:00
Nick Clifton
32a946987b PR binutils/12534 
* arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
	patterns.
	(print_insn_thumb32): Handle %L.

	* gas/arm/thumb32.s: Add PC relative LDRD and STRD insns.
	* gas/arm/thumb32.l: Update expected output.
	* gas/arm/thumb32.d: Update expected disassembly.
 2011-04-12 16:01:48 +00:00
Nick Clifton
1bbabca54e PR gas/12532 
* gas/arm/plt-1.d: Update expected disassembly.
	* gas/arm/thumb2_bcond.d: Likewise.
	* gas/arm/weakdef-1.d: Likewise.
 2011-04-12 15:44:36 +00:00
Alan Modra
24c8611522 * gas/all/gas.exp (do_930509a): Don't xfail h8300 and mn10200. 2011-04-12 06:21:25 +00:00
Julian Brown
d2cd120565 gas/ 
* config/tc-arm.c (parse_psr): Add LHS argument. Improve support
    for *APSR bitmasks.
    (operand_parse_code): Replace OP_PSR with OP_wPSR and OP_rPSR.
    Remove OP_RVC_PSR.
    (parse_operands): Likewise.
    (do_mrs): Tweak error message for constraint.
    (do_t_mrs): Update constraints for changes to APSR support.
    (do_t_msr): Likewise. Don't set PSR_f flag here.
    (psrs): Remove "g", "nzcvq", "nzcvqg".
    (insns): Tweak entries for msr and mrs instructions.

    opcodes/
    * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
    (print_insn_thumb32): Add APSR bitmask support.

    gas/testsuite/
    * gas/arm/mrs-msr-thumb-v7-m.s: New.
    * gas/arm/mrs-msr-thumb-v7-m.d: New.
    * gas/arm/mrs-msr-thumb-v7-m-bad.d: New.
    * gas/arm/mrs-msr-thumb-v7-m-bad.l: New.
    * gas/arm/mrs-msr-thumb-v7-m-bad.s: New.
    * gas/arm/mrs-msr-thumb-v7e-m.d: New.
    * gas/arm/mrs-msr-thumb-v7e-m.s: New.
    * gas/arm/mrs-msr-arm-v7-a-bad.d: New.
    * gas/arm/mrs-msr-arm-v7-a-bad.l: New.
    * gas/arm/mrs-msr-arm-v7-a-bad.s: New.
    * gas/arm/mrs-msr-arm-v7-a.d: New.
    * gas/arm/mrs-msr-arm-v7-a.s: New.
    * gas/arm/mrs-msr-arm-v6.d: New.
    * gas/arm/mrs-msr-arm-v6.s: New.
    * gas/arm/mrs-msr-thumb-v6t2.d: New.
    * gas/arm/mrs-msr-thumb-v6t2.s: New.
    * gas/arm/arch7.d: Fix typo in disassembly for BASEPRI_MAX,
    bitmasks for IAPSR etc.
    * gas/arm/arch7.s: Specify bitmask for APSR writes.
    * gas/arm/archv6m.s: Likewise.
    * msr-imm-bad.l: Tweak expected disassembly in error message.
    * msr-reg-bad.l: Likewise.
    * msr-imm.d: Tweak expected disassembly.
    * msr-reg.d: Likewise.
    * msr-reg-thumb.d: Likewise.
    * msr-imm.s: Specify bitmask on APSR writes.
    * msr-reg.s: Add comment about deprecated usage.
 2011-04-11 18:49:06 +00:00
Nick Clifton
84701018a5 PR gas/12296 
* arm.h (ARM_AEXT_V7_ARM): Add ARM_EXT_OS.

	* gas/arm/arch7.s: Add SVC insn.
	* gas/arm/arch7.d: Add disassembly of SVC insn.
	* gas/arm/attr-march-armv7.d: Add arch profile tag.
 2011-04-11 15:23:09 +00:00
Nick Clifton
4e4f7c872b * config/tc-i386.c (x86_cons): Define even for non-ELF targets. 
* config/tc-i386.h (x86_cons): Always prototype.
 2011-04-11 08:27:48 +00:00
Joseph Myers
8c5fc80011 bfd: 
* config.bfd (thumb-*-oabi): Don't handle in list of obsolete
	targets.
	(strongarm*, thumb*, xscale*): Remove architectures.
	(strongarm-*-kaos*, thumb-*-coff, thumb-*-elf, thumb-epoc-pe*,
	thumb-*-pe*, strongarm-*-elf, strongarm-*-coff, xscale-*-elf,
	xscale-*-coff): Remove targets.

binutils:
	* configure.in (thumb-*-pe*): Remove.
	* configure: Regenerate.

binutils/testsuite:
	* binutils-all/objcopy.exp (*arm*-*-coff): Change to arm*-*-coff.
	(xscale-*-coff, thumb*-*-coff, thumb*-*-pe): Don't handle.

gas:
	* configure.tgt (strongarm*be, strongarm*b, strongarm*,
	xscale*be|xscale*b, xscale*): Remove architectures.
	(thumb-*-coff, thumb-*-rtems*, thumb-*-elf, thumb-epoc-pe,
	thumb-*-pe, xscale-*-coff, xscale-*-elf): Remove targets.

gas/testsuite:
	* gas/all/gas.exp (*arm*-*-coff): Change to arm*-*-coff.
	(thumb*-*-coff, thumb*-*-pe*): Don;t handle.
	* gas/arm/arm.exp (*arm*-*-*): Change to arm*-*-*.
	(*xscale*-*-*): Don't handle.
	* gas/cfi/cfi.exp (xscale*-*): Don't handle.
	* gas/elf/elf.exp (*arm*-*-*): Change to arm*-*-*.
	(xscale*-*-*): Don't handle.

ld:
	* configure.tgt (thumb-*-linux-* | thumb-*-uclinux*,
	strongarm-*-coff, strongarm-*-elf, strongarm-*-kaos*,
	thumb-*-coff, thumb-*-elf, thumb-epoc-pe, thumb-*-pe,
	xscale-*-coff, xscale-*-elf): Remove targets.

ld/testsuite:
	* ld-selective/selective.exp (xscale-*-*): Don't handle.
	* ld-srec/srec.exp (strongarm*-*-*, xscale*-*-*, thumb-*-*): Don't
	handle.
	(*arm*-*-*): Change to arm*-*-*.
	(strongarm*-*-coff, xscale*-*-coff, thumb-*-coff*, thumb-*-pe*,
	thumb-*-elf*, strongarm*-*-*, thumb-*-*): Remove xfails.
	* ld-undefined/undefined.exp (thumb*-*-pe*, thumb*-*-pe*): Remove
	commented-out xfails.
	(thumb-elf): Remove reference in comment.
	* lib/ld-lib.exp (strongarm*-*-*, xscale*-*-*, thumb-*-*): Don't
	handle.
 2011-04-06 17:09:56 +00:00
Bernd Schmidt
ac14530735 include/elf/ 
* tic6x.h (R_C6000_JUMP_SPLOT, R_C6000_EHTYPE,
	R_C6000_PCR_H16, R_C6000_PCR_L16): New relocs.
	(SHN_TIC6X_SCOMMON): Define.

bfd/
	* elf32-tic6x.h (struct elf32_tic6x_params): New.
	(elf32_tic6x_setup): Declare.
	* elf32-tic6x.c: Include <limits.h>.
	(ELF_DYNAMIC_LINKER, DEFAULT_STACK_SIZE, PLT_ENTRY_SIZE): Define.
	(struct elf32_tic6x_link_hash_table, struct elf32_link_hash_entry):
	New structures.
	(elf32_tic6x_link_hash_table, is_tic6x_elf): New macros.
	(tic6x_elf_scom_section, tic6x_elf_scom_symbol,
	tic6x_elf_scom_symbol_ptr): New static variables.
	(elf32_tic6x_howto_table, elf32_tic6x_howto_table_rel,
	elf32_tic6x_reloc_map): Add R_C6000_JUMP_SLOT, R_C6000_EHTYPE,
	R_C6000_PCR_H16 and R_C6000_PCR_L16.
	(elf32_tic6x_link_hash_newfunc, elf32_tic6x_link_hash_table_create,
	elf32_tic6x_link_hash_table_free, elf32_tic6x_setup,
	elf32_tic6x_using_dsbt, elf32_tic6x_install_rela,
	elf32_tic6x_create_dynamic_sections, elf32_tic6x_make_got_dynreloc,
	elf32_tic6x_finish_dynamic_symbol, elf32_tic6x_gc_sweep_hook,
	elf32_tic6x_adjust_dynamic_symbol): New static functions.
	(elf32_tic6x_relocate_section): For R_C6000_PCR_S21, convert branches
	to weak symbols as required by the ABI.
	Handle GOT and DSBT_INDEX relocs, and copy relocs to the output file
	as needed when generating DSBT output.
	(elf32_tic6x_check_relocs, elf32_tic6x_add_symbol_hook,
	elf32_tic6x_symbol_processing, elf32_tic6x_section_from_bfd_section,
	elf32_tic6x_allocate_dynrelocs, elf32_tic6x_size_dynamic_sections,
	elf32_tic6x_always_size_sections, elf32_tic6x_modify_program_headers,
	elf32_tic6x_finish_dynamic_sections, elf32_tic6x_plt_sym_val,
	elf32_tic6x_copy_private_data, elf32_tic6x_link_omit_section_dynsym):
	New static functions.
	(ELF_MAXPAGESIZE): Define to 0x1000.
	(bfd_elf32_bfd_copy_private_bfd_data,
	bfd_elf32_bfd_link_hash_table_create,
	bfd_elf32_bfd_link_hash_table_free, elf_backend_can_refcount,
	elf_backend_want_got_plt, elf_backend_want_dynbss,
	elf_backend_plt_readonly, elf_backend_got_header_size,
	elf_backend_gc_sweep_hook, elf_backend_modify_program_headers,
	elf_backend_create_dynamic_sections, elf_backend_adjust_dynamic_symbol,
	elf_backend_check_relocs, elf_backend_add_symbol_hook,
	elf_backend_symbol_processing, elf_backend_link_output_symbol_hook,
	elf_backend_section_from_bfd_section,
	elf_backend_finish_dynamic_symbol, elf_backend_always_size_sections,
	elf32_tic6x_size_dynamic_sections, elf_backend_finish_dynamic_sections,
	elf_backend_omit_section_dynsym, elf_backend_plt_sym_val): Define.

	* bfd/reloc.c (BFD_RELOC_C6000_JUMP_SLOT, BFD_RELOC_C6000_EHTYPE,
	BFD_RELOC_C6000_PCR_H16, BFD_RELOC_C6000_PCR_S16): Add.
	* bfd/bfd-in2.h: Regenerate.
	* bfd/libbfd.h: Regenerate.
	* config.bfd: Accept tic6x-*-* instead of tic6x-*-elf.

gas/
	* config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New
	static variables.
	(md_begin): Initialize them.
	(s_tic6x_scomm): New static function.
	(md_pseudo_table): Add "scomm".
	(tc_gen_reloc): Really undo all adjustments made by
	bfd_install_relocation.
	* doc/c-tic6x.texi: Document the .scomm directive.

gas/testsuite/
	* gas/tic6x/scomm-directive-1.s: New test.
	* gas/tic6x/scomm-directive-1.d: New test.
	* gas/tic6x/scomm-directive-2.s: New test.
	* gas/tic6x/scomm-directive-2.d: New test.
	* gas/tic6x/scomm-directive-3.s: New test.
	* gas/tic6x/scomm-directive-3.d: New test.
	* gas/tic6x/scomm-directive-4.s: New test.
	* gas/tic6x/scomm-directive-4.d: New test.
	* gas/tic6x/scomm-directive-5.s: New test.
	* gas/tic6x/scomm-directive-5.d: New test.
	* gas/tic6x/scomm-directive-6.s: New test.
	* gas/tic6x/scomm-directive-6.d: New test.
	* gas/tic6x/scomm-directive-7.s: New test.
	* gas/tic6x/scomm-directive-7.d: New test.
	* gas/tic6x/scomm-directive-8.s: New test.
	* gas/tic6x/scomm-directive-8.d: New test.

ld/
	* emulparams/elf32_tic6x_le.sh (BIG_OUTPUT_FORMAT, EXTRA_EM_FILE,
	GENERATE_SHLIB_SCRIPT): New defines.
	(TEXT_START_ADDR): Define differently depending on target.
	(.got): Redefine to include "*(.dsbt)".
	(SDATA_START_SYMBOLS): Remove, replace with
	(OTHER_GOT_SYMBOLS): New.
	(OTHER_BSS_SECTIONS): Define only for ELF targets.
	* emultempl/tic6xdsbt.em: New file.
	* gen-doc.texi: Set C6X.
	* ld.texinfo: Likewise.
	(Options specific to C6X uClinux targets): New section.

binutils/
	* readelf.c (get_symbol_index_type): Handle SCOM for TIC6X.
	(dump_relocations): Likewise.

binutils/testsuite/
	* lib/binutils-common.exp (is_elf_format): Accept tic6x*-*-uclinux*.

ld/testsuite/
	* ld-scripts/crossref.exp: Add CFLAGS for tic6x*-*-*.
	* ld-elf/sec-to-seg.exp: Remove tic6x from list of targets defining
	pagesize to 1.
	* ld-tic6x/tic6x.exp: Add support for DSBT shared library/executable
	linking tests.
	* ld-tic6x/dsbt.ld: New linker script.
	* ld-tic6x/dsbt-be.ld: New linker script.
	* ld-tic6x/dsbt-overflow.ld: New linker script.
	* ld-tic6x/dsbt-inrange.ld: New linker script.
	* ld-tic6x/shlib-1.s: New test.
	* ld-tic6x/shlib-2.s: New test.
	* ld-tic6x/shlib-app-1r.s: New test.
	* ld-tic6x/shlib-app-1.s: New test.
	* ld-tic6x/shlib-1.sd: New test.
	* ld-tic6x/shlib-1.dd: New test.
	* ld-tic6x/shlib-app-1.rd: New test.
	* ld-tic6x/shlib-app-1rb.rd: New test.
	* ld-tic6x/shlib-app-1.sd: New test.
	* ld-tic6x/static-app-1rb.od: New test.
	* ld-tic6x/shlib-app-1.dd: New test.
	* ld-tic6x/shlib-app-1rb.sd: New test.
	* ld-tic6x/static-app-1b.od: New test.
	* ld-tic6x/static-app-1r.od: New test.
	* ld-tic6x/shlib-1rb.rd: New test.
	* ld-tic6x/shlib-app-1rb.dd: New test.
	* ld-tic6x/shlib-1rb.sd: New test.
	* ld-tic6x/shlib-1rb.dd: New test.
	* ld-tic6x/shlib-app-1b.od: New test.
	* ld-tic6x/tic6x.exp: New test.
	* ld-tic6x/static-app-1rb.rd: New test.
	* ld-tic6x/shlib-app-1r.od: New test.
	* ld-tic6x/static-app-1.od: New test.
	* ld-tic6x/static-app-1b.rd: New test.
	* ld-tic6x/static-app-1r.rd: New test.
	* ld-tic6x/static-app-1rb.sd: New test.
	* ld-tic6x/static-app-1b.sd: New test.
	* ld-tic6x/static-app-1rb.dd: New test.
	* ld-tic6x/static-app-1r.sd: New test.
	* ld-tic6x/static-app-1b.dd: New test.
	* ld-tic6x/shlib-1b.rd: New test.
	* ld-tic6x/static-app-1r.dd: New test.
	* ld-tic6x/shlib-app-1b.rd: New test.
	* ld-tic6x/shlib-1r.rd: New test.
	* ld-tic6x/shlib-app-1r.rd: New test.
	* ld-tic6x/shlib-1b.sd: New test.
	* ld-tic6x/static-app-1.rd: New test.
	* ld-tic6x/shlib-app-1b.sd: New test.
	* ld-tic6x/shlib-1r.sd: New test.
	* ld-tic6x/shlib-1b.dd: New test.
	* ld-tic6x/shlib-app-1r.sd: New test.
	* ld-tic6x/shlib-app-1b.dd: New test.
	* ld-tic6x/shlib-1r.dd: New test.
	* ld-tic6x/static-app-1.sd: New test.
	* ld-tic6x/shlib-app-1r.dd: New test.
	* ld-tic6x/static-app-1.dd: New test.
	* ld-tic6x/shlib-noindex.rd: New test.
	* ld-tic6x/shlib-noindex.dd: New test.
	* ld-tic6x/shlib-noindex.sd: New test.
	* ld-tic6x/got-reloc-local-1.s: New test.
	* ld-tic6x/got-reloc-local-2.s: New test.
	* ld-tic6x/got-reloc-local-r.d: New test.
	* ld-tic6x/got-reloc-global.s: New test.
	* ld-tic6x/got-reloc-global-addend-1.d: New test.
	* ld-tic6x/got-reloc-global-addend-1.s: New test.
	* ld-tic6x/got-reloc-global-addend-2.d: New test.
	* ld-tic6x/got-reloc-inrange.d: New test.
	* ld-tic6x/got-reloc-overflow.d: New test.
	* ld-tic6x/got-reloc-global-addend-2.s: New test.
	* ld-tic6x/dsbt-index-error.d: New test.
	* ld-tic6x/dsbt-index.d: New test.
	* ld-tic6x/dsbt-index.s: New test.
	* ld-tic6x/shlib-app-1.od: New test.
	* ld-tic6x/shlib-app-1rb.od: New test.
	* ld-tic6x/shlib-1.rd: New test.
	* ld-tic6x/weak.d: New test.
	* ld-tic6x/weak-be.d: New test.
	* ld-tic6x/weak.s: New test.
 	* ld-tic6x/weak-data.d: New test.
	* ld-tic6x/common.d: New test.
	* ld-tic6x/common.ld: New test.
	* ld-tic6x/common.s: New test.
 2011-03-31 08:58:28 +00:00
Richard Henderson
af3ecb4a35 PR 12610 
* config/tc-alpha.c (s_alpha_align): Don't auto-align a previous
label; zap alpha_insn_label.
 2011-03-29 18:16:16 +00:00
H.J. Lu
75c1c785ac Properly handle multiple operands for x32 quad. 
gas/

2011-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (handle_quad): Properly handle multiple
	operands.

gas/testsuite/

2011-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/quad.d: Add tests for multiple operands.
	* gas/i386/ilp32/quad.s: Likewise.
 2011-03-29 12:40:51 +00:00
Mike Frysinger
fc99ebdc2b gas: blackfin: gas: blackfin: reject invalid BYTEUNPACK insns 
The destination registers must be different with BYTEUNPACK insns,
otherwise the hardware throws up an exception.  So reject them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-29 05:54:41 +00:00
Mike Frysinger
3823a07437 gas: blackfin: gas: blackfin: reject invalid BYTEOP16M insns 
The destination registers must be different with BYTEOP16M insns,
otherwise the hardware throws up an exception.  So reject them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-29 05:51:22 +00:00
Mike Frysinger
0be99d4ba6 gas: blackfin: gas: blackfin: reject invalid BYTEOP16P insns 
The destination registers must be different with BYTEOP16P insns,
otherwise the hardware throws up an exception.  So reject them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-29 05:44:56 +00:00
Mike Frysinger
f4a2f576d4 gas: blackfin: reject invalid 16bit acc add insns 
The 16bit acc add insn cannot assign the two results to the same dreg,
so make sure gas rejects attempts to use this insn variant.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-29 01:25:13 +00:00
H.J. Lu
314a59d568 Support .quad for x32. 
gas/

2011-03-28  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (handle_quad): New.
	(md_pseudo_table): Add "quad".

gas/testsuite/

2011-03-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/inval.s: Remove .quad.
	* gas/i386/ilp32/inval.l: Updated.

	* gas/i386/ilp32/quad.d: New.
	* gas/i386/ilp32/quad.s: Likewise.
 2011-03-28 22:47:59 +00:00
Mike Frysinger
2dd0dc9418 gas: blackfin: reject invalid register destinations for vector add/sub 
The destination registers with vector add/sub insns must be different,
so make sure gas rejects attempt to write these.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-24 06:17:47 +00:00
Mike Frysinger
6d7e72e511 gas: blackfin: test all 16bit insns 
The current 16bit insn test doesn't actually cover all illegal insns
since it stops at 0xa000 instead of 0xc000.  But rather than address
that, replace it with a test that covers all 16bit insns.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-24 04:34:33 +00:00
Mike Frysinger
a0bc8198d3 gas: blackfin: catch invalid dest dregs in dsp mult insns 
While we were catching a few mismatches in vectorized dsp mult insns,
the error we displayed was misleading.  Once we fix that up, we can
convert previously dead code into proper checking for destination
dreg matching.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-24 04:25:25 +00:00
Mike Frysinger
ba48c47be5 gas: blackfin: catch invalid register combinations with SEARCH/BITMUX 
The destination registers for SEARCH cannot be the same.  Same rule
for the source registers for BITMUX.

Signed-off-by: Mike Frsyinger <vapier@gentoo.org>
 2011-03-24 04:20:10 +00:00
Alan Modra
144886fa6b gas/ 
* input-scrub.c (line_numberT): Delete.
	(input_scrub_close): Reset line counters.
	* messages.c (as_show_where): Don't print invalid line number.
	(as_warn_internal, as_bad_internal): Likewise.
gas/testsuite/
	* gas/elf/bad-size.err: Adjust expected error.
	* gas/i386/bad-size.warn: Likewise.
	* gas/i386/inval-equ-2.l: Likewise.
	* gas/symver/symver2.l: Likewise.
 2011-03-18 11:16:28 +00:00
H.J. Lu
a5f21126be Add a testase for PR gas/12589. 
2011-03-17  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/12589
	* gas/i386/pr12589-1.d: New.
	* gas/i386/pr12589-1.s: Likewise.

	* gas/i386/i386.exp: Run pr12589-1.
 2011-03-17 13:16:44 +00:00
H.J. Lu
21be61f588 Add --size-check=[error|warning]. 
gas/

2011-03-16  H.J. Lu  <hongjiu.lu@intel.com>

	* as.c (show_usage): Add --size-check=.
	(parse_args): Add and handle OPTION_SIZE_CHECK.

	* as.h (flag_size_check): New.

	* config/obj-elf.c (elf_frob_symbol): Use as_bad to report
	bad .size directive only for --size-check=error.

	* doc/as.texinfo: Document --size-check=.

gas/testsuite/

2011-03-16  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/bad-size.d: New.
	* gas/i386/bad-size.s: Likewise.
	* gas/i386/bad-size.warn: Likewise.

	* gas/i386/i386.exp: Run bad-size for ELF targets.
 2011-03-16 12:58:26 +00:00
H.J. Lu
acc69ddaff Revert the last change on gas/elf/bad-size.err. 
2011-03-06  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/elf/bad-size.err: Revert the last change.
 2011-03-07 05:42:53 +00:00
H.J. Lu
49002d7f0e Mention symbol name in non-constant .size expression. 
gas/

2011-03-05  H.J. Lu  <hongjiu.lu@intel.com>

	* config/obj-elf.c (elf_frob_symbol): Mention symbol name in
	non-constant .size expression.

gas/testsuite/

2011-03-05  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/elf/bad-size.err: Updated.
 2011-03-06 14:05:25 +00:00
H.J. Lu
61ff971fde Revert the last change. 2011-03-05 04:31:41 +00:00
H.J. Lu
ac480657f1 Set x86_cie_data_alignment to -4 for x32. 
gas/

2011-03-04  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (x86_cie_stack_alignment): New.
	(md_begin): Set x86_cie_data_alignment if it isn't set.  Set
	x86_cie_stack_alignment.
	(i386_target_format): Set x86_cie_data_alignment to -4 for x32.
	(tc_x86_frame_initial_instructions): Use x86_cie_stack_alignment
	instead of x86_cie_data_alignment on SP and RA.

gas/testsuite/

2011-03-04  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/cfi/cfi-x86_64.d: Updated.
 2011-03-05 02:16:36 +00:00
Maciej W. Rozycki
0067d8fc73 opcodes/ 
* mips-opc.c (mips_builtin_opcodes): Correct register use
	annotation of "alnv.ps".

	gas/testsuite/
	* gas/mips/alnv_ps-swap.d: New test for ALNV.PS instruction
	branch swapping.
	* gas/mips/alnv_ps-swap.s: Source for the new test.
	* gas/mips/mips.exp: Run the new test.
 2011-02-28 16:34:39 +00:00
Maciej W. Rozycki
d455268f73 gas/ 
* config/tc-mips.c (append_insn): Disable branch relaxation for
	DSP instructions.

	gas/testsuite/
	* gas/mips/relax-bposge.l: New test for DSP branch relaxation.
	* gas/mips/relax-bposge.s: Source for the new test.
	* gas/mips/mips.exp: Run the new test.
 2011-02-28 16:26:46 +00:00
Maciej W. Rozycki
66b3e8dabc gas/ 
* config/tc-mips.c (RELAX_BRANCH_ENCODE): Encode the temporary
	register to use.
	(RELAX_BRANCH_UNCOND): Adjust accordingly.
	(RELAX_BRANCH_LIKELY): Likewise.
	(RELAX_BRANCH_LINK): Likewise.
	(RELAX_BRANCH_TOOFAR): Likewise.
	(RELAX_BRANCH_AT): New macro.
	(append_insn): Encode the temporary register to use in standard
	MIPS branch relaxation.
	(relaxed_branch_length): Update according to changes to
	RELAX_BRANCH_ENCODE.
	(md_convert_frag): Use the encoded register as the temporary.

	gas/testsuite/
	* gas/mips/relax-at.d: New test for branch relaxation with .set
	at.
	* gas/mips/relax.s: Update to support the new test.
	* gas/mips/relax.l: Update accordingly.
	* gas/mips/relax.d: Update for multi-arch invocation.
	* gas/mips/mips.exp: Run the new test.  Adjust to run "relax"
	across all applicable architectures.
 2011-02-28 15:52:26 +00:00
Maciej W. Rozycki
ce70d90a3e gas/ 
* config/tc-mips.c (mips_fix_adjustable): On REL targets also
	reject PC-relative relocations.

	gas/testsuite/
	* gas/mips/branch-misc-2.d: Adjust for relocation change.
	* gas/mips/branch-misc-2pic.d: Likewise.
	* gas/mips/branch-misc-4.d: New test for PC-relative relocation
	overflow.
	* gas/mips/branch-misc-4-64.d: Likewise.
	* gas/mips/branch-misc-4.s: Source for the new tests.
	* testsuite/gas/mips/mips.exp: Run the new tests.
 2011-02-28 15:44:53 +00:00
Maciej W. Rozycki
5c4f07bae1 gas/ 
* config/tc-mips.c (md_convert_frag): Correct message
	capitalization.

	gas/testsuite/
	* gas/mips/relax-swap1.l: Adjust for message capitalization
	correction.
	* gas/mips/relax-swap2.l: Likewise.
	* gas/mips/relax.l: Likewise.
 2011-02-28 15:33:25 +00:00
H.J. Lu
f2d8a97c28 Don't sign-checking 4-byte relocations for x32. 
gas/

2011-02-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (reloc): Don't sign-checking 4-byte
	relocations if 64bit relocations aren't allowed.

gas/testsuite/

2011-02-25  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/ilp32.exp: Run reloc64.

	* gas/i386/ilp32/reloc64.s: Allow TLS relocations with 32bit
	register destinations.
	* gas/i386/ilp32/reloc64.d: Updated.

	* gas/i386/ilp32/reloc64.l: New.
 2011-02-25 19:19:45 +00:00
H.J. Lu
093a6ec67f Add a testcase for PR gas/12519. 
2011-02-25  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/12519
	* gas/elf/bad-size.d: New.
	* gas/elf/bad-size.err: Likewise.
	* gas/elf/bad-size.s: Likewise.

	* gas/elf/elf.exp: Run bad-size.
 2011-02-25 17:00:30 +00:00
Mike Frysinger
13c02f06ff opcodes: blackfin: fix decoding of ABS 
The single cycle dual mac ABS insn was incorrectly decoding the mac1
part of the insn.

Once we fix the decode, update the gas tests to have the correct output.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-02-13 18:55:22 +00:00
Mike Frysinger
4db6639409 opcodes: blackfin: fix decoding of dsp mult insns 
When assigning to a register half, the mac0 part of the mult insn
was not decoding properly.  It would always show a full dreg instead
of the dreg low half.

Once we fix the disassembler, we have to update a few of the gas
tests as their previous expected output was incorrect.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-02-13 18:54:49 +00:00
Mike Frysinger
36f446111a gas/opcodes: blackfin: punt BYTEOP2M insn support 
The BYTEOP2M insn was part of the initial Blackfin designs, but never made
it into any actual silicon.  So punt support for it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-02-13 18:53:16 +00:00
Kai Tietz
40c034ebed 2011-02-10 Kai Tietz <kai.tietz@onevision.com> 
* gas/cfi/cfi-x86_64.d: Adjust for x64 PE+.
 2011-02-10 17:06:44 +00:00
Alan Modra
726eb385b2 * gas/m68k/cpu32.d: Set explicit architecture for objdump. 
* gas/m68k/mcf-coproc.d: Likewise.
	* gas/m68k/mcf-wdebug.d: Likewise.
 2011-02-10 08:43:27 +00:00
Alan Modra
867287bb32 * gas/elf/dwarf2-4.s: Don't use @. 2011-02-10 05:06:19 +00:00
H.J. Lu
2dde194857 Use f32_patt in i386_align_code when tuning for i686. 
gas/

2011-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/6957
	* config/tc-i386.c (i386_align_code): Use f32_patt when tuning
	for i686.

gas/testsuite/

2011-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/6957
	* gas/i386/nops-1-i686.d: Updated.
	* gas/i386/nops-3-i686.d: Likewise.
	* gas/i386/nops-4-i686.d: Likewise.
 2011-02-08 20:21:26 +00:00
H.J. Lu
a586129ea5 Also update cpu_arch_isa_flags for ISA extensions. 
gas/

2011-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (set_cpu_arch): Also update cpu_arch_isa_flags
	for ISA extensions.
	(md_parse_option): Likewise.

gas/testsuite/

2011-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run nops-4a-i686 and nops-6.

	* gas/i386/nops-4a-i686.d: New.
	* gas/i386/nops-6.d: Likewise.
	* gas/i386/nops-6.s: Likewise.
 2011-02-08 18:12:25 +00:00
Alan Modra
32a96f364b PR gas/3041 
* gas/m68k/p3041pcrel.s, * gas/m68k/p3041pcrel.d: New test.
	* gas/m68k/all.exp: Add "p3041pcrel" and enable p3041 tests for
	all m68k-aout targets.
 2011-02-07 00:04:09 +00:00
Bernd Schmidt
98d23befa7 gas/ 
* doc/as.texinfo (Target TIC6X options): Don't mention "-matomic".
	* doc/c-tic6x.texi (TIC6X Directives): Don't mention ".atomic".
	(TIC6X Options): Don't mention "-matomic".
	* config/tc-tic6x.c (OPTION_MATOMIC, OPTION_MNO_ATOMIC): Delete.
	(md_longopts): Remove corresponding entries.
	(md_parse_option): Don't handle them.
	(md_show_usage): Don't document them.
	(tic6x_atomic): Delete variable.
	(tic6x_update_features): Always copy tic6x_arch_enable to
	tic6x_features.
	(tic6x_arch_enable): Remove references to TIC6X_INSN_ATOMIC.
	(s_tic6x_atomic, s_tic6x_noatomic): Remove functions.
	(md_pseudo_table): Remove ".atomic" and ".noatomic".

	gas/testsuite/
	* gas/tic6x/dir-junk.l: Remove tests for .atomic and .noatomic.
	* gas/tic6x/dir-junk.s: Likewise.
	* gas/tic6x/insns-c674x-bad.d: Remove test.
	* gas/tic6x/insns-c674x-bad.l: Likewise.
	* gas/tic6x/insns-atomic.d: Remove "-matomic" switch.

	include/opcode/
	* tic6x-opcode-table.h (cmtl, ll, sl): Available on C64XP.
	* tic6x.h (TIC6X_INSN_ATOMIC): Remove.
 2011-02-03 23:20:26 +00:00
Nick Clifton
a22429b98e * write.c (write_contents): Include output file name and bfd error 
value when reporting the inability to write to the output file.
	* config/tc-rx.c (rx_handle_align): Do not insert NOPs into align
	frag that has a non-zero fill value.

	* gas/all/align.d: Skip for the RX.
	* gas/elf/group1a.d: Likewise.
	* gas/elf/groupautoa.d: Likewise.
	* gas/elf/elf.exp: Do not run section5 test for the RX port.
	* gas/elf/section4.d: Likewise.
	* gas/elf/section7.d: Likewise.
	* gas/macros/semi.s: Fill with a non-zero pattern.
	* gas/macros/semi.d: Expect non-zero fill value.
	* gas/rx/bcnd.d: Update expected disassembly.
	* gas/rx/bra.d: Likewise.
	* gas/rx/macros.inc: Add reg1 macro.
	* gas/rx/max.sm: Use reg1 macro to avoid generating illegal NOP
	instruction.
	* gas/rx/mov.sm: Likewise.
	* gas/rx/max.d: Update expected disassembly.
	* gas/rx/mov.d: Likewise.
	* gas/rx/rx-asm-good.s: Use Renesas section names.
	* gas/rx/rx-asm-good.d: Update expected disassembly.
 2011-01-31 16:43:15 +00:00
H.J. Lu
24a2d04da0 Don't compress empty debug sections. 
gas/

2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/12409
	* write.c (compress_debug): Return if section size is 0.

gas/testsuite/

2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/12409
	* gas/elf/dwarf2-4.d: New.
	* gas/elf/dwarf2-4.s: Likewise.
 2011-01-18 18:55:59 +00:00
H.J. Lu
e3949f17f3 Properly sign-extend byte. 
gas/testsuite/

2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/intel.d: Updated.
	* gas/i386/opcode-intel.d: Likewise.
	* gas/i386/opcode-suffix.d: Likewise.
	* gas/i386/opcode.d: Likewise.

opcodes/

2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (sIbT): New.
	(b_T_mode): Likewise.
	(dis386): Replace sIb with sIbT on "pushT".
	(x86_64_table): Replace sIb with Ib on "aam" and "aad".
	(OP_sI): Handle b_T_mode.  Properly sign-extend byte.
 2011-01-18 17:08:13 +00:00
H.J. Lu
0ae8ca9029 Add tbm flag and TBM instruction pattern. 
2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/x86-64-arch-2.d: Add tbm flag and TBM instruction
	pattern.
 2011-01-18 16:39:50 +00:00
Quentin Neill
337e412819 Add TBM testsuite files missing from last commit. 2011-01-17 22:17:16 +00:00
Quentin Neill
2a2a0f38e7 Add support for TBM instructions. 
gas/

2011-01-17  Quentin Neill  <quentin.neill@amd.com>

	* config/tc-i386.c (cpu_arch): Add CPU_TBM_FLAGS.

	* doc/c-i386.texi (i386-TBM): New section.

opcodes/

2011-01-17  Quentin Neill  <quentin.neill@amd.com>

	* i386-dis.c (REG_XOP_TBM_01): New.
	(REG_XOP_TBM_02): New.
	(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
	(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
	entries, and add bextr instruction.

	* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
	(cpu_flags): Add CpuTBM.

	* i386-opc.h (CpuTBM) New.
	(i386_cpu_flags): Add bit cputbm.

	* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
	blcs, blsfill, blsic, t1mskc, and tzmsk.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated

gas/testsuite

2011-01-17  Quentin Neill  <quentin.neill@amd.com>

	* gas/i386/tbm.s: New.
	* gas/i386/tbm.d: New.
	* gas/i386/tbm-intel.d: New.
	* gas/i386/x86-64-tbm.s: New.
	* gas/i386/x86-64-tbm.d: New.
	* gas/i386/x86-64-tbm-intel.d: New.
	* gas/i386/arch-10.d: Add tbm flag and TBM instruction pattern.
	* gas/i386/arch-10.s: Add a TBM instruction.
	* gas/i386/arch-10-1.l: Add TBM instruction pattern.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
 2011-01-17 18:40:36 +00:00
H.J. Lu
862be3fb9a Disallow 64bit relocations in x32 mode. 
gas/

2011-01-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (disallow_64bit_disp): Renamed to ...
	(disallow_64bit_reloc): This.
	(md_assemble): Don't check movabs for x32 mode here.
	(i386_target_format): Updated.
	(tc_gen_reloc): Check if 64bit relocations are allowed.

gas/testsuite/

2011-01-16  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/immed64.s: New.
	* gas/i386/ilp32/reloc64.s: Likewise.
	* gas/i386/ilp32/x86-64-pcrel.s: Likewise.

	* gas/i386/ilp32/inval.s: Add more tests.

	* gas/i386/ilp32/immed64.d: Updated.
	* gas/i386/ilp32/inval.l: Likewise.
	* gas/i386/ilp32/reloc64.d: Likewise.
	* gas/i386/ilp32/x86-64-pcrel.d: Likewise.
 2011-01-16 17:06:12 +00:00
H.J. Lu
7f56bc95d6 Don't allow movabs with relocation in x32 mode. 
gas/

2011-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (disallow_64bit_disp): New.
	(x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with
	X86_64_ABI/X86_64_X32_ABI.
	(md_assemble): Don't allow movabs with relocation in x32 mode.
	(i386_target_format): Updated.

gas/testsuite/

2011-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/ilp32.exp: Run inval.

	* gas/i386/ilp32/inval.l: New.
	* gas/i386/ilp32/inval.s: Likewise.
	* gas/i386/ilp32/x86-64.s: Likewise.

	* gas/i386/ilp32/x86-64.d: Don't use ../x86_64.s.  Updated.
 2011-01-15 15:48:02 +00:00
H.J. Lu
570561f71a Rename --n32 to --x32. 
gas/

2011-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (OPTION_N32): Renamed to ...
	(OPTION_X32): This.
	(md_longopts): Replace n32 with x32.
	(md_parse_option): Updated.
	(md_show_usage): Likewise.

	* doc/c-i386.texi: Replace n32 with x32.

gas/testsuite/

2011-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/cfi/ilp32.exp: Replace --n32 with --x32.
	* gas/i386/ilp32/elf/ilp32.exp: Likewise.
	* gas/i386/ilp32/ilp32.exp: Likewise.
	* gas/i386/ilp32/lns/ilp32.exp: Likewise.

ld/testsuite/

2011-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/ilp32-1.d: Replace --n32 with --x32.
	* ld-x86-64/ilp32-2.d: Likewise.
	* ld-x86-64/ilp32-3.d: Likewise.
	* ld-x86-64/ilp32-4.d: Likewise.
	* ld-x86-64/ilp32-5.d: Likewise.
	* ld-x86-64/x86-64.exp: Likewise.
 2011-01-14 23:07:11 +00:00
Mingjie Xing
c95354ed13 Take unadjusted offset for loongson3a specific instructions. 2011-01-11 07:22:09 +00:00
Nathan Sidwell
0855e32bf5 bfd/ 
* reloc.c (BFD_RELOC_ARM_TLS_GOTDESC, BFD_RELOC_ARM_TLS_CALL,
	BFD_RELOC_ARM_THM_TLS_CALL, BFD_RELOC_ARM_TLS_DESCSEQ,
	BFD_RELOC_ARM_THM_TLS_DESCSEQ, BFD_RELOC_ARM_TLS_DESC): New
	relocations.
	* libbfd.h: Rebuilt.
	* bfd-in2.h: Rebuilt.
	* elf32-arm.c (elf32_arm_howto_table_1): Add new relocations.
	(elf32_arm_reloc_map): Likewise.
	(tls_trampoline, dl_tlsdesc_lazy_trampoline): New PLT templates.
	(elf32_arm_stub_long_branch_any_tls_pic,
	elf32_arm_stub_long_branch_v4t_thumb_tls_pic): New stub templates.
	(DEF_STUBS): Add new stubs.
	(struct_elf_arm_obj_data): Add local_tlsdesc_gotent field.
	(elf32_arm_local_tlsdesc_gotent): New.
	(GOT_TLS_GDESC): New mask.
	(GOT_TLS_GD_ANY): Define.
	(struct elf32_arm_link_hash_entry): Add tlsdesc_got field.
	(elf32_arm_compute_jump_table_size): New.
	(struct elf32_arm_link_hash_table): Add next_tls_desc_index,
	num_tls_desc, dt_tlsdesc_plt, dt_tlsdesc_got, tls_trampoline,
	sgotplt_jump_table_size fields.
	(elf32_arm_link_hash_newfunc): Initialize tlsdesc_got field.
	(elf32_arm_link_hash_table_create): Initialize new fields.
	(arm_type_of_stub): Check TLS desc relocs too.
	(elf32_arm_stub_name): TLS desc relocs can be shared.
	(elf32_arm_tls_transition): Determine relaxation.
	(arm_stub_required_alignment): Add tls stubs.
	(elf32_arm_size_stubs): Likewise.
	(elf32_arm_tls_relax): Perform TLS relaxing.
	(elf32_arm_final_link_relocate): Process TLS DESC relocations.
	(IS_ARM_TLS_GNU_RELOC): New.
	(IS_ARM_TLS_RELOC): Use it.
	(elf32_arm_relocate_section): Perform TLS relaxing.
	(elf32_arm_check_relocs): Anticipate TLS relaxing, process tls
	desc relocations.
	(allocate_dynrelocs): Allocate tls desc relcoations.
	(elf32_arm_output_arch_local_syms): Emit tls trampoline mapping
	symbols.
	(elf32_arm_size_dynamic_sections): Allocate tls trampolines and
	got slots.
	(elf32_arm_always_size_sections): New. Create _TLS_MODULE_BASE
	symbol.
	(elf32_arm_finish_dynamic_symbol): Adjust.
	(arm_put_trampoline): New.
	(elf32_arm_finish_dynamic_sections): Emit new dynamic tags and tls
	trampolines.
	(elf_backend_always_size_sections): Define.

	include/elf/
	* arm.h (R_ARM_TLS_DESC, R_ARM_TLS_GOTDESC, R_ARM_TLS_CALL,
	R_ARM_TLS_DESCSEQ, T_ARM_THM_TLS_CALL, R_ARM_THM_TLS_DESCSEQ): New
	relocations.

	gas/
	* doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and
	.tlsdescseq directive.
	* config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc
	following a symbol.
	(s_arm_tls_descseq): New directive.
	(md_pseudo_table): Add it.
	(encode_branch): Allow TLS_CALL relocs too.
	(do_t_blx, do_t_branch23): Use encode_branch.
	(reloc_names): Add tlsdesc and tlscall.
	(md_apply_fix): Process tls desc relocations.
	(tc_gen_reloc): Likewise.
	(arm_fix_adjustable): Likewise.

	gas/testsuite/
	* gas/arm/tls.s: Add tlsdesc tests.
	* gas/arm/tls.d: Adjust.

	ld/testsuite/
	* ld-arm/arm-elf.exp: Added tests for new TLS handling
	relocations.
	* ld-arm/tls-descrelax-be32.d: New.
	* ld-arm/tls-descrelax-be32.s: New.
	* ld-arm/tls-descrelax-be8.d: New.
	* ld-arm/tls-descrelax-be8.s: New.
	* ld-arm/tls-descrelax-v7.d: New.
	* ld-arm/tls-descrelax-v7.s: New.
	* ld-arm/tls-descrelax.d: New.
	* ld-arm/tls-descrelax.s: New.
	* ld-arm/tls-descseq.d: New.
	* ld-arm/tls-descseq.r: New.
	* ld-arm/tls-descseq.s: New.
	* ld-arm/tls-gdesc-got.d: New.
	* ld-arm/tls-gdesc-got.s: New.
	* ld-arm/tls-gdesc-nlazy.g: New.
	* ld-arm/tls-gdesc-nlazy.s: New.
	* ld-arm/tls-gdesc.d: New.
	* ld-arm/tls-gdesc.r: New.
	* ld-arm/tls-gdesc.s: New.
	* ld-arm/tls-gdierelax.d: New.
	* ld-arm/tls-gdierelax.s: New.
	* ld-arm/tls-gdierelax2.d: New.
	* ld-arm/tls-gdierelax2.s: New.
	* ld-arm/tls-gdlerelax.d: New.
	* ld-arm/tls-gdlerelax.s: New.
	* ld-arm/tls-lib-loc.d: New.
	* ld-arm/tls-lib-loc.r: New.
	* ld-arm/tls-lib-loc.s: New.
	* ld-arm/tls-longplt-lib.d: New.
	* ld-arm/tls-longplt-lib.s: New.
	* ld-arm/tls-longplt.d: New.
	* ld-arm/tls-longplt.s: New.
	* ld-arm/tls-mixed.r: New.
	* ld-arm/tls-mixed.s: New.
	* ld-arm/tls-thumb1.d: New.
	* ld-arm/tls-thumb1.s: New.
	* ld-arm/arm-elf.exp: New.
 2011-01-10 08:40:19 +00:00
H.J. Lu
5bc3844998 Update gas/i386/ilp32/x86-64-arch-2.d. 
2011-01-07  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/x86-64-arch-2.d: Add bmi flag and BMI instruction
	pattern.
 2011-01-07 23:26:59 +00:00
Quentin Neill
87973e9f82 Add docs and arch tests to BMI. 
gas/
2011-01-07  Quentin Neill  <quentin.neill@amd.com>

	* config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS.

	* doc/c-i386.texi (i386-BMI): New section.

gas/testsuite/
2011-01-07  Quentin Neill  <quentin.neill@amd.com>

	* gas/i386/arch-10.s: Add a BMI instruction.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/arch-10.d: Add bmi flag and BMI instruction pattern.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/arch-10-1.l: Add BMI instruction pattern.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
 2011-01-07 17:44:30 +00:00
Paul Koning
1df3baeaa6 * gas/pdp11/pdp11.exp: Add run of absreloc. 2011-01-07 01:51:45 +00:00
Paul Koning
12505806d0 * config/tc-pdp11.c (parse_op_no_deferred): Allow PC-relative 
references to absolute addresses.
 2011-01-06 16:41:35 +00:00
Paul Koning
6630558452 * gas/pdp11/opcode.d: Fix expected output for sec instruction. 2011-01-06 16:31:39 +00:00
Nathan Sidwell
639e30d297 gas/testsuite/ 
* gas/arm/blx-bad.s: New.
	* gas/arm/blx-bad.d: New.

	opcodes/
	* arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
 2011-01-06 14:30:43 +00:00
H.J. Lu
f12dc42220 Implement BMI instructions. 2011-01-05 00:16:57 +00:00
H.J. Lu
1b0b9b7110 Also expect .zdebug in section name in ILP32 tests. 
2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/lns/lns-common-1.d: Also expect .zdebug in
	section name.
	* gas/i386/ilp32/lns/lns-duplicate.d: Likewise.
 2011-01-01 19:27:52 +00:00
H.J. Lu
5b326c3ee2 Rotate gas ChangeLogs. 2011-01-01 16:44:48 +00:00
Dave Anglin
01c51e443e * gas/all/gas.exp (fwdexp): Run on hppa*64*-*-*. Skip on 32-bit 
hppa*-*-hpux*.
	(octa): Likewise.
 2010-12-31 20:01:39 +00:00
Dave Anglin
40a41a9acc * gas/cfi/cfi.exp: Skip cfi-common-6 on hppa64*-*. 2010-12-31 18:40:23 +00:00
Richard Sandiford
3cc86b96c0 Add change missing from previous commit, and fix misplaced changelog line. 2010-12-31 11:04:55 +00:00