Commit graph

85197 commits

Author SHA1 Message Date
GDB Administrator
bc04c45531 Automatic date update in version.in 2015-10-09 00:00:08 +00:00
Iain Buclaw
d5d8c4e12b [D] Support D style sizeof and typeof expressions.
gdb/ChangeLog:

	* d-exp.y: (UnaryExpression): Support `type.sizeof' expressions.
	(PostfixExpression): Support `expr.sizeof' expressions.
	(PrimaryExpression): Support `typeof(expr)' expressions.

gdb/testsuite/ChangeLog:

	* gdb.dlang/properties.exp: New file.
2015-10-08 21:42:36 +02:00
Maciej W. Rozycki
4e7de1556a MAINTAINERS: Update my email address
gdb/
	* MAINTAINERS: Update my email address.
2015-10-08 18:57:56 +01:00
Nick Clifton
3f94e60d92 Fix compile time warning compiling ARC port. 2015-10-08 12:34:13 +01:00
Markus Metzger
04c4fe8c59 btrace: fix void return
record_btrace_resume returns the void return from the to_resume method of the
target beneath.  Split this into calling to_resume and return.

gdb/
	* record-btrace.c (record_btrace_resume): Fix void return.
2015-10-08 09:00:57 +02:00
GDB Administrator
8c5b385cbf Automatic date update in version.in 2015-10-08 00:00:08 +00:00
Yao Qi
875880c661 Avoid using 'template' C++ keyword
'template' is used in include/opcode/aarch64.h as below,

 typedef struct
 {
   const char *template;
   uint32_t value;
   int has_xt;
 } aarch64_sys_ins_reg;

and it triggers compilation errors when GDB is built in C++ mode.

In file included from git/gdb/aarch64-tdep.c:62:0:
git/gdb/../include/opcode/aarch64.h:651:15: error: expected unqualified-id before 'template'
   const char *template;

This patch is to rename field template to name.

gas/

	* config/tc-aarch64.c (md_begin): Access field 'name' rather
	than 'template'.

include/opcode/

	* aarch64.h (aarch64_sys_ins_reg) <template>: Removed.
	<name>: New field.

opcodes/

	* aarch64-dis.c (aarch64_ext_sysins_op): Access field
	'name' rather than 'template'.
	* aarch64-opc.c (aarch64_print_operand): Likewise.
2015-10-07 15:22:47 +01:00
Yao Qi
d3e12b29ae Wrap include/opcode/aarch64.h in extern "C" for C++
This is sufficient to link an aarch64 GDB built in C++ mode.  Pedro
did something similar in Feb
https://sourceware.org/ml/binutils/2015-02/msg00176.html

include/opcode/

2015-10-07  Yao Qi  <yao.qi@linaro.org>

	* aarch64.h [__cplusplus]: Wrap in extern "C".
2015-10-07 15:07:14 +01:00
Nick Clifton
886a250647 New ARC implementation.
bfd	* archures.c: Remove support for older ARC. Added support for new
	ARC cpus (ARC600, ARC601, ARC700, ARCV2).
	* bfd-in2.h: Likewise.
	* config.bfd: Likewise.
	* cpu-arc.c: Likewise.
	* elf32-arc.c: Totally changed file with a refactored
	inplementation of the ARC port.
	* libbfd.h: Added ARC specific relocation types.
	* reloc.c: Likewise.

gas     * config/tc-arc.c: Revamped file for ARC support.
        * config/tc-arc.h: Likewise.
        * doc/as.texinfo: Add new ARC options.
        * doc/c-arc.texi: Likewise.

ld	* configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
	* emulparams/arcebelf_prof.sh: New file
	* emulparams/arcebelf.sh: Likewise.
	* emulparams/arceblinux_prof.sh: Likewise.
	* emulparams/arceblinux.sh: Likewise.
	* emulparams/arcelf_prof.sh: Likewise.
	* emulparams/arcelf.sh: Likewise.
	* emulparams/arclinux_prof.sh: Likewise.
	* emulparams/arclinux.sh: Likewise.
	* emulparams/arcv2elfx.sh: Likewise.
	* emulparams/arcv2elf.sh: Likewise.
	* emultempl/arclinux.em: Likewise.
	* scripttempl/arclinux.sc: Likewise.
	* scripttempl/elfarc.sc: Likewise.
	* scripttempl/elfarcv2.sc: Likewise
	* Makefile.am: Add new ARC emulations.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new feature.

opcodes * arc-dis.c: Revamped file for ARC support
	* arc-dis.h: Likewise.
	* arc-ext.c: Likewise.
	* arc-ext.h: Likewise.
	* arc-opc.c: Likewise.
	* arc-fxi.h: New file.
	* arc-regs.h: Likewise.
	* arc-tbl.h: Likewise.

binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
	and ARCv2.
	(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Likewise.
	* NEWS: Mention the new feature.

include	* dis-asm.h (arc_get_disassembler): Correct declaration.
	* arc-reloc.def: Macro file with definition of all relocation
	types.
	* arc.h: Changed macros for the newly supported ARC cpus.  Altered
	enum defining the supported relocations.
	* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
	macro for EM_ARC_COMPACT2.
        * arc-func.h: New file.
        * arc.h: Likewise.
2015-10-07 14:20:19 +01:00
Andreas Schwab
3b0357dada gold: fix ABI pagesize for aarch64
* aarch64.cc (aarch64_info): Set abi_pagesize to 64K.
2015-10-07 10:57:37 +02:00
Yao Qi
f77ee8026d [aarch64] use aarch64_decode_insn to decode instructions in GDB
In this patch, we start to use aarch64_decode_insn to decode instructions
in aarch64_software_single_step.

gdb:

2015-10-07  Yao Qi  <yao.qi@linaro.org>

	* aarch64-tdep.c: Include opcode/aarch64.h.
	(submask): Move it above.
	(bit): Likewise.
	(bits): Likewise.
	(aarch64_software_single_step): Call aarch64_decode_insn.
	Decode instruction by aarch64_inst instead of using
	aarch64_decode_bcond and decode_masked_match.
2015-10-07 09:52:46 +01:00
GDB Administrator
ff792d99a9 Automatic date update in version.in 2015-10-07 00:00:20 +00:00
Cary Coutant
9eacb935ac Fix bug when applying R_SPARC_GOTDATA_OP* relocations to local symbols.
When applying a GOTDATA_OP* relocation to a local symbol, the addend
is being applied after getting the value of the symbol. When the
relocation refers to a merge section, however, the addend must be
provided when computing the symbol value, since the contents of
the section may have been rearranged.

gold/
	PR gold/18855
	* sparc.cc (Sparc_relocate_functions::gdop_hix22): Remove addend
	parameter.
	(Sparc_relocate_functions::gdop_lox10): Likewise.
	(Target_sparc::Relocate::relocate): Use addend when computing
	symbol value for R_SPARC_GOTDATA_OP*.
2015-10-06 14:44:10 -07:00
H.J. Lu
8c6da3dfbc Clear the ch_reserved field in 64-bit output
It is better to clear the ch_reserved field of Elf64_External_Chdr
in 64-bit output.

	* bfd.c (bfd_update_compression_header): Clear the ch_reserved
	field in 64-bit output.
	(bfd_convert_section_contents): Likewise.
2015-10-06 14:34:17 -07:00
Pitchumani Sivanupandi
cbd641edf3 parse load_offset (bias) of restore command as long
Following failures are noticed for avr-gdb. This may be the case
for targets like AVR which has integer_to_address hook defined.

FAIL: gdb.base/dump.exp: struct copy, srec; value restored ok
FAIL: gdb.base/dump.exp: struct copy, ihex; value restored ok
FAIL: gdb.base/dump.exp: struct copy, tekhex; value restored ok

These tests are failed because load_offset(bias) of restore command
parsed as address.

command: restore filename [binary] bias start end

Except binary, other BFDs have a built-in location; gdb restores content
at offset 'bias' from that location. So, 'bias' of 'restore' command should
be parsed as address only when the file is binary.

Below patch changes gdb to parse 'bias' as long if the file is not binary.

gdb/ChangeLog

2015-10-06  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>

	* cli/cli-dump.c (restore_command): Parse load_offset (bias) as address
	only when the file is binary.
2015-10-06 18:29:03 +02:00
GDB Administrator
6540205329 Automatic date update in version.in 2015-10-06 00:00:08 +00:00
H.J. Lu
a0d49154d4 Don't re-export common symbols
For ELF linker, a common symbol isn't a definition.  When we decide if a
symbol should be re-exported, we should check if the symbol isn't
undefined, not if it is a definition.

bfd/

	PR ld/18914
	* elflink.c (elf_link_add_object_symbols): Don't re-export a
	symbol if it isn't undefined.

ld/testsuite/

	PR ld/18914
	* ld-elf/exclude.exp: Also check exclude_common.
	* ld-elf/exclude2.s: Add exclude_common.
2015-10-05 14:45:17 -07:00
GDB Administrator
e753e154bf Automatic date update in version.in 2015-10-05 00:00:08 +00:00
H.J. Lu
d00c2bc9c0 Enable IAMCU and PEI for Solaris2/x86
bfd/

	* config.bfd (targ_selvecs, targ64_selvecs): Add iamcu_elf32_vec,
	i386_pei_vec and x86_64_pei_vec for Solaris2/x86.

ld/

	* configure.tgt (targ_extra_emuls): Add elf_iamcu for Solaris2/x86.
2015-10-04 07:42:43 -07:00
H.J. Lu
9706b5e627 Change ch_type to Elf_Word in struct Chdr_data<64>
The ch_type field in struct Chdr_data<64>  is 4 bytes, followed by a
4-byte padding.  This change doesn't introduce any functional change
since only the lower 32 bits of the ch_type field are used.

	PR gold/19060
	* elfcpp.h (Chdr::get_ch_type): Change return type to Elf_Word.
	* elfcpp_internal.h (Chdr_data<64>): Change ch_type to 4 bytes
	and add ch_reserved.
2015-10-04 06:14:36 -07:00
GDB Administrator
73e5465df5 Automatic date update in version.in 2015-10-04 00:00:08 +00:00
jamesbowman
ae4e25019d [FT32] gdb: Correctly interpret function prologs
The stack unwinder did not understand the function prologs
generated by gcc with -Os. Add code to recognize and interpret the
prolog calls.

[gdb]

2015-10-02  James Bowman  <james.bowman@ftdichip.com>

	* ft32-tdep.c (ft32_analyze_prologue): Add function prolog
	subroutine handling.
2015-10-02 17:32:47 -07:00
GDB Administrator
604763ceaa Automatic date update in version.in 2015-10-03 00:00:09 +00:00
Sandra Loosemore
06e635ef63 Fix gdb.dwarf2/staticvirtual.exp regexp.
2015-10-02  Sandra Loosemore  <sandra@codesourcery.com>

	gdb/testsuite/
	* gdb.dwarf2/staticvirtual.exp: Generalize regexp so it can match
	whether or not address 0x1000 is mapped on the target.
2015-10-02 13:12:56 -07:00
Renlin Li
3ebe65c0ff [LD][AARCH64]Add TLSIE relaxation support under large memory model.
bfd/
2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Add
	TLSIE_MOVW_GOTTPREL_G1.
	(aarch64_tls_transition_without_check): Add
	TLSIE_MOVW_GOTTPREL_G1 to TLSLE_MOVW_TPREL_G2
	transition for local symbol.
	(elfNN_aarch64_tls_relax): Add a argument to pass tp offset.
	Add TLSIE_MOVW_GOTTPREL_G1 relaxation.
	(elfNN_aarch64_relocate_section): Call elfNN_aarch64_tls_relax
	with new argument.

ld/testsuite/
2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp (tls-relax-large-le-ie): Run new test.
	* ld-aarch64/tls-relax-large-ie-le.d: New.
	* ld-aarch64/tls-relax-large-ie-le.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li
0484b4549e [LD][AARCH64]Add TLSDESC support for large memory model.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_tls_transition_without_check):  Add
	relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC,
	TLSDESC_OFF_G1.
	(aarch64_tls_transition_without_check): Add relaxation support.
	(aarch64_reloc_got_type): Add support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_tls_relax): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: Run new test.
	* ld-aarch64/tls-large-desc.d: New.
	* ld-aarch64/tls-large-desc.s: New.
	* ld-aarch64/tls-relax-large-desc-ie.d: New.
	* ld-aarch64/tls-relax-large-desc-ie.s: New.
	* ld-aarch64/tls-relax-large-desc-le.d: New.
	* ld-aarch64/tls-relax-large-desc-le.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li
43a357f99f [GAS][AARCH64]Add TLSDESC large memory model support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Check overflow for
	BFD_RELOC_AARCH64_TLSDESC_OFF_G1.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (s_tlsdescadd): New.
	(s_tlsdescldr): New.
	(md_pseudo_table): Handle tlsdescadd and tlsdescldr pseudo ops.
	(reloc_table): Add entries for BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC and
	BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC.
	(process_movw_reloc_info): Support AARCH64_TLSDESC_OFF_G1 and
	    AARCH64_TLSDESC_OFF_G0_NC.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsdesc_off_g0_nc.d: New.
	* gas/aarch64/reloc-tlsdesc_off_g0_nc.s: New.
	* gas/aarch64/reloc-tlsdesc_off_g1.d: New.
	* gas/aarch64/reloc-tlsdesc_off_g1.s: New.
	* gas/aarch64/tls-desc.d: New.
	* gas/aarch64/tls-desc.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li
ac73473248 [BFD][AARCH64]Add TLSGD relaxation support under large memory model.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC):
	Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1.
	(aarch64_tls_transition_without_check): Likewise
	(elfNN_aarch64_tls_relax): Likwise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: run new test
	* ld-aarch64/tls-relax-large-gd-ie.d: New.
	* ld-aarch64/tls-relax-large-gd-ie.s: New.
	* ld-aarch64/tls-relax-large-gd-le.d: New.
	* ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 17:56:09 +01:00
Renlin Li
b7a944fea3 [BFD][AARCH64]Create GOT section for TLSLE_MOVW_TPREL_G(1, 1_NC, 2).
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Create GOT section
	for TLSLE_MOVW_TPREL_G(1, 1_NC, 2) relocation.
2015-10-02 17:56:09 +01:00
Renlin Li
3b957e5b07 [Binutils][AARCH64]Add TLS IE large memory support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and
	AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Make
	TLSIE_MOVW_GOTTPREL_G1 check overflow.
	(aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1
	and TLSIE_MOVW_GOTTPREL_G0_NC.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): Add two entries for
	gottprel_g0_nc and gottprel_g1.
	(process_movw_reloc_info): Add support.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gottprel_g0_nc.d: New.
	* gas/aarch64/reloc-gottprel_g0_nc.s: New.
	* gas/aarch64/reloc-gottprel_g1.d: New.
	* gas/aarch64/reloc-gottprel_g1.s: New.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/tls-large-ie.d: New.
	* ld-aarch64/tls-large-ie.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li
7ba7cfe431 [LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-516.d: New.
	* ld-aarch64/emit-relocs-516.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li
3e8286c0d2 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g0_nc.d: New.
	* gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02 17:56:08 +01:00
Renlin Li
94facae337 [LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-515.d: New.
	* ld-aarch64/emit-relocs-515.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02 17:56:08 +01:00
Renlin Li
1aa66fb152 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g1.s: New.
	* gas/aarch64/reloc-tlsgd_g1.s: New.
2015-10-02 17:56:08 +01:00
Renlin Li
dc8008f508 [LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: Run new test.
	* ld-aarch64/emit-relocs-301.d: New.
	* ld-aarch64/emit-relocs-301.s: New.
2015-10-02 17:56:07 +01:00
Renlin Li
ca632371ce [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry
	MOVW_GOTOFF_G0_NC.
	* libbfd.h: Regnerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g0_nc.
	(process_movw_reloc_info): Support gotoff_g0_nc.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g0_nc.s: New.
	* gas/aarch64/reloc-gotoff_g0_nc.d: New.
2015-10-02 17:56:07 +01:00
Renlin Li
74a1bfe1d6 [LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add support
	for BFD_RELOC_AARCH64_MOVW_GOTOFF_G1.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise
	(elfNN_aarch64_final_link_relocate): Calculate offset within GOT.

ld/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-302.d: New.
	* ld-aarch64/emit-relocs-302.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-02 17:56:07 +01:00
Renlin Li
654248e7f7 [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G1): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	MOVW_GOTOFF_G1.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g1.
	(process_movw_reloc_info): Support newly added modifier.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g1.s: New.
	* gas/aarch64/reloc-gotoff_g1.d: New.
2015-10-02 17:56:07 +01:00
Renlin Li
a2e1db00c7 [LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_LD_64_GOTOFF_LO15 support.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise
	(elfNN_aarch64_final_link_relocate): Calculate offset within GOT.

ld/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-310.d: New.
	* ld-aarch64/emit-relocs-310.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the test.
2015-10-02 17:56:07 +01:00
Renlin Li
a0becb8948 [BFD][AARCH64]Refactor to facilitate further large memory model support patches.
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Change if to
	switch statement.
2015-10-02 17:56:07 +01:00
Yao Qi
e141d84e89 Make aarch64_zero_register_p declaration starts from column one
include/opcode:

2015-10-02  Yao Qi  <yao.qi@linaro.org>

	* aarch64.h (aarch64_zero_register_p): Move the declaration
	to column one.
2015-10-02 15:43:46 +01:00
Yao Qi
36f4aab18c [aarch64] expose disas_aarch64_insn and rename it to aarch64_decode_insn
We want to use disas_aarch64_insn inside GDB to decode instructions, so
this patch exposes it and rename it to aarch64_decode_insn to follow
the conventions of other interfaces.

include/opcode:

2015-10-02  Yao Qi  <yao.qi@linaro.org>

	* aarch64.h (aarch64_decode_insn): Declare it.

opcodes:

2015-10-02  Yao Qi  <yao.qi@linaro.org>

	* aarch64-dis.c	(disas_aarch64_insn): Remove static.  Change
	argument insn type to aarch64_insn.  Rename to ...
	(aarch64_decode_insn): ... it.
	(print_insn_aarch64_word): Caller updated.
2015-10-02 15:23:58 +01:00
Yao Qi
7232d38966 [aarch64] Remove argument pc from disas_aarch64_insn
I happen to see that argument pc is not used inside disas_aarch64_insn
at all.  This patch is to remove it.

OK to apply?

opcodes:

2015-10-02  Yao Qi  <yao.qi@linaro.org>

	* aarch64-dis.c (disas_aarch64_insn): Remove argument PC.
	(print_insn_aarch64_word): Caller updated.
2015-10-02 15:23:54 +01:00
GDB Administrator
371517f576 Automatic date update in version.in 2015-10-02 00:00:07 +00:00
H.J. Lu
5db4f0d383 Create a PLT entry for R_X86_64_PC32 in non-code sections
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.

bfd/

	PR ld/19031
	* elf64-x86-64.c (elf_x86_64_check_relocs): Set
	pointer_equality_needed for R_X86_64_PC32 reloc in non-code
	sections.

ld/testsuite/

	PR ld/19031
	* ld-x86-64/x86-64.exp: Run PR ld/19031 test.
	* ld-x86-64/pr19031.out: New file.
	* ld-x86-64/pr19031a.c: Likewise.
	* ld-x86-64/pr19031b.S: Likewise.
	* ld-x86-64/pr19031c.c: Likewise.
2015-10-01 10:49:33 -07:00
Simon Marchi
dd0a637a3d vec.h: Add casts for C++ compat
gdb/ChangeLog:

	* common/vec.h (VEC_OP (T,cleanup)): Add pointer cast.
2015-10-01 11:29:08 -04:00
Renlin Li
73524045d3 [BFD][AARCH64]Emit single AARCH64_MAP_INSN symbol for the whole plt.
bfd/

2015-10-01  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_output_plt_map): Remove.
	(elfNN_aarch64_output_arch_local_syms): Emit AARCH64_MAP_INSN once.

ld/testsuite/

2015-10-01  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/plt_mapping_symbol.d: New.
	* ld-aarch64/plt_mapping_symbol.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the new test.
2015-10-01 14:27:56 +01:00
Kaz Kojima
0e1e4a7512 ld/configure.tgt: Drop non-linux non-fdpic stuff from the last change of targ_extra_emuls for sh*-linux cases 2015-10-01 14:19:53 +09:00
Kaz Kojima
de48f481b1 bfd/config.bfd: Drop non-linux non-fdpic stuff from the last change of targ_selvecs of sh*-linux cases 2015-10-01 14:13:26 +09:00
Alan Modra
c220e327e3 Update ld-x86-64/pr19013-nacl.d
* ld-x86-64/pr19013-nacl.d: Update.
2015-10-01 09:31:16 +09:30