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Author SHA1 Message Date
Maciej W. Rozycki
7951ca422a * config/tc-mips.c (move_register): Fix formatting. 2011-10-24 14:25:01 +00:00
Maciej W. Rozycki
72671e6201 * config/tc-mips.c (can_swap_branch_p): Remove empty line. 
(start_noreorder): Likewise.
 2011-10-24 14:17:10 +00:00
Maciej W. Rozycki
8b828383a8 * config/tc-mips.c (s_option): Fix formatting. 
(mips_elf_final_processing): Likewise.
 2011-10-24 14:08:23 +00:00
Maciej W. Rozycki
444d75be22 * config/tc-mips.c (validate_micromips_insn): Fix formatting. 2011-10-24 14:04:42 +00:00
Alan Modra
652618321c * config/tc-mn10200.c (md_convert_frag): Add missing break. 2011-10-24 02:49:24 +00:00
Tristan Gingold
f8e24652cb 2011-10-21 Tristan Gingold <gingold@adacore.com> 
* config/tc-alpha.c (load_expression): Use symbol_mark_used accessor.
	(s_alpha_comm): Use symbol_set_frag accessor.
 2011-10-21 13:24:26 +00:00
Alan Modra
db9b2be466 * config/tc-mips.c (micromips_add_label): Avoid gcc warning. 
(md_convert_frag): Likewise.
 2011-10-19 23:09:11 +00:00
Julian Brown
a415b1cd63 Jie Zhang <jie@codesourcery.com> 
Julian Brown  <julian@codesourcery.com>

    gas/
    * config/tc-arm.c (parse_shifter_operand): Fix handling
    of explicit rotation.
    (encode_arm_shifter_operand): Likewise.

    gas/testsuite/
    * gas/arm/adrl.d: Adjust.
    * gas/arm/immed2.d: New test.
    * gas/arm/immed2.s: New test.

    ld/testsuite/
    * ld-arm/cortex-a8-fix-b-plt.d: Adjust.
    * ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
    * ld-arm/cortex-a8-fix-bl-plt.d: Adjust.
    * ld-arm/cortex-a8-fix-bl-rel-plt.d: Adjust.
    * ld-arm/cortex-a8-fix-blx-plt.d: Adjust.
    * ld-arm/ifunc-1.dd: Adjust.
    * ld-arm/ifunc-2.dd: Adjust.
    * ld-arm/ifunc-3.dd: Adjust.
    * ld-arm/ifunc-4.dd: Adjust.
    * ld-arm/ifunc-5.dd: Adjust.
    * ld-arm/ifunc-6.dd: Adjust.
    * ld-arm/ifunc-7.dd: Adjust.
    * ld-arm/ifunc-8.dd: Adjust.
    * ld-arm/ifunc-9.dd: Adjust.
    * ld-arm/ifunc-10.dd: Adjust.
    * ld-arm/ifunc-14.dd: Adjust.
    * ld-arm/ifunc-15.dd: Adjust.
    * ld-arm/ifunc-16.dd: Adjust.

    opcodes/
    * arm-dis.c (print_insn_arm): Explicitly specify rotation
    if needed.
 2011-10-18 14:41:55 +00:00
Nick Clifton
1be5fd2e2f * config/tc-arm.c (check_ldr_r15_aligned): New. 
(do_ldst): Warn in upredictable cases.
	(do_t_ldst): Likewise.
	(insns): Update accordingly.

	* gas/arm/ldr-bad.s: New testcase.
	* gas/arm/ldr-bad.l: Likewise.
	* gas/arm/ldr-bad.d: Likewise.
	* gas/arm/ldr.s: Likewise.
	* gas/arm/ldr.d: Likewise.
	* gas/arm/ldr-t-bad.s: Likewise.
	* gas/arm/ldr-t-bad.l: Likewise.
	* gas/arm/ldr-t-bad.d: Likewise.
	* gas/arm/ldr-t.s: Likewise.
	* gas/arm/ldr-t.d: Likewise.
	* gas/arm/sp-pc-usage-t.s: Correct.
	* gas/arm/sp-pc-usage-t.d: Update accordingly.
 2011-10-13 08:15:17 +00:00
Nick Clifton
d4cb0ea0ca * readelf.c (get_machine_dlags): Add support for RX's PID mode. 
* ld-scripts/phdrs.exp: Expect to fail for the RX.

	* elf32-rx.c: Add support for PID mode.
	(rx_elf_relocate_section): Add checks for unsafe PID relocations.
	Include addend in R_RX_SYM relocations.

	* config/rx-defs.h (rx_pid_register): New.
	(rx_gp_register): New.
	* config/rx-parse.y (rx_lex): Add support for %gpreg and %pidreg.
	(displacement): Add PID support.
	* config/tc-rx.c (rx_pid_mode): New.
	(rx_num_int_regs): New.
	(rx_pid_register): New.
	(rx_gp_register): New.
	(options): Add -mpid and -mint-register= options.
	(md_longopts): Likewise.
	(md_parse_option): Likewise.
	(md_show_usage): Likewise.
	(rx_pid_symbol): New.
	(rx_pidreg_symbol): New.
	(rx_gpreg_symbol): New.
	(md_begin): Support PID.
	(rx_validate_fix_sub): Support PID.
	(tc_gen_reloc): Support PID.
	* doc/c-rx.texi: Document PID support.

	* rx.h (E_FLAG_RX_PID): New.
 2011-10-05 14:13:31 +00:00
Kai Tietz
c348982892 2011-09-27 Kai Tietz <ktietz@redhat.com> 
* config/obj-coff.c (obj_coff_section): Add 'e' as specifier
       for marking section SEC_EXCLUDE.

2011-09-27  Kai Tietz  <ktietz@redhat.com>

       * gas/pe/pe.exp: Add new testcase.
       * gas/pe/section-exclude.d: New file.
       * gas/pe/section-exclude.s: New file.
 2011-09-27 18:57:22 +00:00
David S. Miller
4bafe00ecf Add new sparc options to control instruction availability. 
gas/

	* config/tc-sparc.c (hwcap_allowed): New.
	(struct sparc_arch): New field 'hwcap_allowed' containing a bitmask
	of F_FOO flags which are enabled by the particular arch setting.
	Add new options that provide explicit access to new instructions.
	(md_parse_option): Only bump max_architecture if the requested one
	is larger, or this is the first explicit request.
	(get_hwcap_name): New function.
	(sparc_ip): Validate that hwcaps used by an instruction have actually
	been enabled.
	* doc/c-sparc.texi: Document new sparc options.
 2011-09-22 00:03:30 +00:00
David S. Miller
9e8c70f96b Annotate sparc objects with cpu hardware capabilities used. 
bfd/

	* elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): New.
	* elfxx-sparc.h: Declare it.
	* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Call it.
	* elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise.

binutils/

	* readelf.c (display_sparc_hwcaps): New.
	(display_sparc_gnu_attribute): New.
	(process_sparc_specific): New.
	(process_arch_specific): When EM_SPARC, EM_SPARC32PLUS,
	or EM_SPARCV9 invoke process_sparc_specific.

gas/

	* config/tc-sparc.c (hwcap_seen): New bitmask, defined when
	not TE_SOLARIS.
	(sparc_ip): When not TE_SOLARIS, accumulate hwcap bits from
	sparc_opcode->flags of instruction into hwcap_seen.
	(sparc_md_end): Create Tag_GNU_Sparc_HWCAPS attribute if
	hwcap_seen is non-zero and not TE_SOLARIS.

gas/testsuite/

	* gas/sparc/hpcvis3.s: Update for fixed fchksum16 mnemonic.
	* gas/sparc/hpcvis3.d: Likewise.

include/elf/

	* sparc.h (Tag_GNU_Sparc_HWCAPS): New object attribute.
	(ELF_SPARC_HWCAP_*): New HWCAPS bitmask values.

include/opcode/

	* sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int.
	(F_MUL32, F_DIV32, F_FSMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
	F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
	F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING): New flag bits.

opcodes/

	* sparc-opc.c (sparc_opcodes): Annotate table with HWCAP flag
	bits.  Fix "fchksm16" mnemonic.
 2011-09-21 20:49:16 +00:00
Tristan Gingold
a06413e3ef 2011-09-19 Tristan Gingold <gingold@adacore.com> 
* config/tc-alpha.c (insert_operand): Call as_bad_value_out_of_range
	instead of as_warn_out_of_range.
 2011-09-19 08:24:23 +00:00
David S. Miller
f124dd4f3f gas/ 
* config/tc-sparc.c (sparc_ip): Handle 'i' + r<0..31>
	in addition to 'i' + [goli]<0..7>.

gas/testsuite/

	* gas/sparc/imm-plus-rreg.[sd]: New test.
	* gas/sparc/sparc.exp: Run new test.
 2011-09-08 16:56:10 +00:00
Tristan Gingold
0ac5db1998 2011-08-26 Tristan Gingold <gingold@adacore.com> 
* config/tc-alpha.c (s_alpha_linkage): Simplify.  Add comments.
 2011-08-26 13:37:28 +00:00
Tristan Gingold
0189c2eba7 2011-08-26 Tristan Gingold <gingold@adacore.com> 
* config/tc-alpha.c (add_to_link_pool): Improve comment.
	(s_alpha_fp_save): Fix indentation.
 2011-08-26 13:16:36 +00:00
Maciej W. Rozycki
87333bb72b * config/tc-mips.c (can_swap_branch_p): Update the comment on 
MIPS16 fixups.
 2011-08-10 22:55:57 +00:00
Maciej W. Rozycki
b5503c7b66 * config/tc-mips.c (mips_cpu_info_table): Add "m14k" and 
"m14kc".
	* doc/c-mips.texi (MIPS architecture options): Add "m14k" and
	"m14kc" to the list of -march options.
 2011-08-09 15:25:32 +00:00
Maciej W. Rozycki
dec0624dcd gas/ 
* config/tc-mips.c (mips_set_options): Add ase_mcu.
	(mips_opts): Initialise ase_mcu to -1.
	(ISA_SUPPORTS_MCU_ASE): New macro.
	(MIPS_CPU_ASE_MCU): Likewise.
	(is_opcode_valid): Handle MCU.
	(macro_build, macro): Likewise.
	(validate_mips_insn, validate_micromips_insn): Likewise.
	(mips_ip): Likewise.
	(options): Add OPTION_MCU and OPTION_NO_MCU.
	(md_longopts): Add mmcu and mno-mcu.
	(md_parse_option): Handle OPTION_MCU and OPTION_NO_MCU.
	(mips_after_parse_args): Handle MCU.
	(s_mipsset): Likewise.
	(md_show_usage): Handle MCU options.

	* doc/as.texinfo: Document -mmcu and -mno-mcu options.
	* doc/c-mips.texi: Likewise, and document ".set mcu" and
	".set nomcu" directives.

	gas/testsuite/
	* gas/mips/micromips@mcu.d: New test.
	* gas/mips/mcu.d: Likewise.
	* gas/mips/mcu.s: New test source.
	* gas/mips/mips.exp: Run the new tests.

	include/opcode/
	* mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros.
	(OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine.
	(INSN_ASE_MASK): Add the MCU bit.
	(INSN_MCU): New macro.
	(M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values.
	(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros.

	opcodes/
	* mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2"
	and "mips64r2".
	(print_insn_args, print_insn_micromips): Handle MCU.
	* micromips-opc.c (MC): New macro.
	(micromips_opcodes): Add "aclr", "aset" and "iret".
	* mips-opc.c (MC): New macro.
	(mips_builtin_opcodes): Add "aclr", "aset" and "iret".
 2011-08-09 15:20:03 +00:00
Maciej W. Rozycki
2b0c8b40ed include/opcode/ 
* mips.h (INSN_WRITE_GPR_S, INSN2_WRITE_GPR_MB): New macros.
	(INSN2_READ_GPR_MC, INSN2_READ_GPR_ME): Likewise.
	(INSN2_WRITE_GPR_MF, INSN2_READ_GPR_MG): Likewise.
	(INSN2_READ_GPR_MJ, INSN2_WRITE_GPR_MJ): Likewise.
	(INSN2_READ_GPR_MP, INSN2_WRITE_GPR_MP): Likewise.
	(INSN2_READ_GPR_MQ, INSN2_WRITE_GPR_MHI): Likewise.
	(INSN2_READ_GPR_MMN): Likewise.
	(INSN2_READ_FPR_D): Change the bit used.
	(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_MF): Likewise.
	(INSN2_MOD_SP, INSN2_READ_GPR_31, INSN2_READ_GP): Likewise.
	(INSN2_READ_PC, INSN2_UNCOND_BRANCH): Likewise.
	(INSN2_COND_BRANCH): Likewise.
	(INSN2_WRITE_GPR_S, INSN2_MOD_GPR_MB): Remove macros.
	(INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG): Likewise.
	(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP, INSN2_MOD_GPR_MQ): Likewise.
	(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM): Likewise.
	(INSN2_MOD_GPR_MN): Likewise.

	gas/
	* config/tc-mips.c (gpr_mod_mask): Remove INSN2_MOD_GPR_MB,
	INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG,
	INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MM,
	INSN2_MOD_GPR_MN, INSN2_MOD_GPR_MP and INSN2_MOD_GPR_MQ opcode
	register use checks.
	(gpr_read_mask): Add INSN2_READ_GPR_MC, INSN2_READ_GPR_ME
	INSN2_READ_GPR_MG, INSN2_READ_GPR_MJ, INSN2_READ_GPR_MMN,
	INSN2_READ_GPR_MP and INSN2_READ_GPR_MQ opcode register use
	checks.
	(gpr_write_mask): Replace INSN2_WRITE_GPR_S opcode register
	use flag with INSN_WRITE_GPR_S.  Add INSN2_WRITE_GPR_MB,
	INSN2_WRITE_GPR_MHI, INSN2_WRITE_GPR_MJ and INSN2_WRITE_GPR_MP
	opcode register use checks.
	(can_swap_branch_p): Enable microMIPS branch swapping.
	(append_insn): Likewise.

	gas/testsuite/
	* gas/mips/micromips.d: Update according to changes to enable
	microMIPS branch swapping.
	* gas/mips/micromips-trap.d: Likewise.
	* gas/mips/micromips@jal-svr4pic.d: Likewise.
	* gas/mips/micromips@loc-swap.d: Likewise.
	* gas/mips/micromips@loc-swap-dis.d: Likewise.

	opcodes/
	* micromips-opc.c (MOD_mb, MOD_mc, MOD_md): Remove macros.
	(MOD_me, MOD_mf, MOD_mg, MOD_mhi, MOD_mj, MOD_ml): Likewise.
	(MOD_mm, MOD_mn, MOD_mp, MOD_mq, MOD_sp): Likewise.
	(WR_mb, RD_mc, RD_md, WR_md, RD_me, RD_mf, WR_mf): New macros.
	(RD_mg, WR_mhi, RD_mj, WR_mj, RD_ml, RD_mmn): Likewise.
	(RD_mp, WR_mp, RD_mq, RD_sp, WR_sp): Likewise.
	(WR_s): Update macro.
	(micromips_opcodes): Update register use flags of: "addiu",
	"addiupc", "addiur1sp", "addiur2", "addius5", "addiusp", "addu",
	"and", "andi", "beq", "beqz", "bne", "bnez", "di", "ei", "j",
	"jalr", "jalrs", "jr", "jraddiusp", "jrc", "lbu", "lhu", "li",
	"lui", "lw", "lwm", "mfhi", "mflo", "move", "movep", "not",
	"nor", "or", "ori", "sb", "sh", "sll", "srl", "subu", "sw",
	"swm" and "xor" instructions.
 2011-08-09 14:25:29 +00:00
Maciej W. Rozycki
40209cad0b * config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Remove forced 16-bit 
branch size information.
	(RELAX_MICROMIPS_U16BIT): Remove macro.
	(RELAX_MICROMIPS_UNCOND): Adjust accordingly.
	(RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
	(RELAX_MICROMIPS_RELAX32): Likewise.
	(RELAX_MICROMIPS_TOOFAR16): Likewise.
	(RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
	(RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
	(RELAX_MICROMIPS_TOOFAR32): Likewise.
	(RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
	(RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
	(append_insn): Always check forced_insn_length for microMIPS
	relaxation.  Adjust code for the removal of
	RELAX_MICROMIPS_U16BIT.
	(mips_ip) <'D', 'E'>: If forced_insn_length, then emit the
	relocation straight away.
	(relaxed_micromips_16bit_branch_length): Adjust code for the
	removal of RELAX_MICROMIPS_U16BIT.
 2011-08-09 13:39:39 +00:00
Tristan Gingold
74a6005fea 2011-08-08 Tristan Gingold <gingold@adacore.com> 
* config/obj-macho.c (obj_mach_o_section): New function.
	(struct known_section): New type.
	(known_sections): Declare.
	(obj_mach_o_known_section): New function.
	(obj_mach_o_common_parse): Ditto.
	(obj_mach_o_comm): Ditto.
	(obj_mach_o_subsections_via_symbols): Ditto.
	(mach_o_pseudo_table): Add new pseudos.
 2011-08-08 12:20:01 +00:00
Richard Henderson
af385746fb * dw2gencfi.c (all_fde_data): Export. 
* dw2gencfi.h (all_fde_data): Declare.
        * config/tc-alpha.c (alpha_elf_md_end): Don't convert legacy unwind
        info to cfi unwind info if the user already has supplied some.
 2011-08-07 16:32:20 +00:00
Richard Sandiford
14fe068bd8 gas/ 
* config/tc-mips.c (emit_nop): Delete.
	(get_delay_slot_nop): New function.
	(nops_for_insn_or_target): Use it.
	(append_insn): Likewise.  When avoiding hazards, call add_fixed_insn
	and insert_into_history directly.
 2011-08-06 10:25:01 +00:00
Richard Sandiford
11625dd84f gas/ 
* config/tc-mips.c (delayed_branch_p, compact_branch_p)
	(uncond_branch_p, branch_likely_p): New functions.
	(insns_between, nops_for_insn_or_target, append_insn)
	(macro_start): Use them.
	(get_append_method): Likewise.  Remove redundant test.
 2011-08-06 10:02:03 +00:00
David S. Miller
ea783ef3a0 include/opcode/ 
* sparc.h: Document new format codes '4', '5', and '('.
	(OPF_LOW4, RS3): New macros.
opcodes/
	* sparc-dis.c (v9a_ast_reg_names): Add "cps".
	(X_RS3): New macro.
	(print_insn_sparc): Handle '4', '5', and '(' format codes.
	Accept %asr numbers below 28.
	* sparc-opc.c (sparc_opcodes): Add entries for HPC and VIS3
	instructions.
gas/
	* config/tc-sparc.c (v9a_asr_table): Add "cps".
	(sparc_ip): Handle '4', '5' and '(' format codes.
gas/testsuite
	* gas/sparc/hpcvis3.d: New test.
	* gas/sparc/hpcvis3.s: New test source.
	* gas/sparc/sparc.exp: Run new test.
 2011-08-05 16:52:50 +00:00
Tristan Gingold
249a777b4c 2011-08-04 Tristan Gingold <gingold@adacore.com> 
* config/obj-elf.c (obj_elf_section): Do not free name.
 2011-08-04 07:44:44 +00:00
Nick Clifton
877807f8c4 * config/tc-arm.c (do_t_strexbh): New. 
(insns): Update accordingly.

	* gas/arm/strex-bad-t.d: New testcase.
	* gas/arm/strex-bad-t.s: Likewise.
	* gas/arm/strex-bad-t.l: Likewise.
	* gas/arm/strex-t.s: Likewise.
	* gas/arm/strex-t.d: Likewise.
 2011-08-03 11:35:56 +00:00
H.J. Lu
d7921315ba Check R_X86_64_32 overflow and allow R_X86_64_64 for x32. 
bfd/

2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/13048
	* archures.c (bfd_mach_i386_intel_syntax): New.
	(bfd_mach_i386_i8086): Updated.
	(bfd_mach_i386_i386): Likewise.
	(bfd_mach_x86_64): Likewise.
	(bfd_mach_x64_32): Likewise.
	(bfd_mach_i386_i386_intel_syntax): Likewise.
	(bfd_mach_x86_64_intel_syntax): Likewise.
	(bfd_mach_x64_32_intel_syntax): Likewise.
	(bfd_mach_l1om): Likewise.
	(bfd_mach_l1om_intel_syntax): Likewise.
	(bfd_mach_k1om): Likewise.
	(bfd_mach_k1om_intel_syntax): Likewise.

	* bfd-in2.h: Regenerated.

	* cpu-i386.c (bfd_i386_compatible): Check mach instead of
	bits_per_address.
	(bfd_x64_32_arch_intel_syntax): Set bits_per_address to 64.
	(bfd_x64_32_arch): Likewise.

	* elf64-x86-64.c: Include "libiberty.h".
	(x86_64_elf_howto_table): Append x32 R_X86_64_32.
	(elf_x86_64_rtype_to_howto): Support x32 R_X86_64_32.
	(elf_x86_64_reloc_type_lookup): Likewise.
	(elf_x86_64_reloc_name_lookup): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_check_relocs): Allow R_X86_64_64 relocations for x32.

gas/

2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/13048
	* config/tc-i386.c (handle_quad): Removed.
	(md_pseudo_table): Remove "quad".
	(tc_gen_reloc): Don't check BFD_RELOC_64 for disallow_64bit_reloc.
	(x86_dwarf2_addr_size): New.

	* config/tc-i386.h (x86_dwarf2_addr_size): New.
	(DWARF2_ADDR_SIZE): Likewise.

gas/testsuite/

2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/13048
	* gas/i386/ilp32/ilp32.exp: Don't run inval.

	* gas/i386/ilp32/inval.l: Removed.
	* gas/i386/ilp32/inval.s: Likewise.

	* gas/i386/ilp32/quad.d: Expect R_X86_64_64 instead of
	R_X86_64_32.

	* gas/i386/ilp32/x86-64-pcrel.s: Add tests for movabs.
	* gas/i386/ilp32/x86-64-pcrel.d: Updated.

ld/testsuite/

2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/13048
	* ld-x86-64/ilp32-6.d: New.
	* ld-x86-64/ilp32-6.s: Likewise.
	* ld-x86-64/ilp32-7.d: Likewise.
	* ld-x86-64/ilp32-7.s: Likewise.
	* ld-x86-64/ilp32-8.d: Likewise.
	* ld-x86-64/ilp32-8.s: Likewise.
	* ld-x86-64/ilp32-9.d: Likewise.
	* ld-x86-64/ilp32-9.s: Likewise.

	* ld-x86-64/x86-64.exp: Run ilp32-6, ilp32-7, ilp32-8 and ilp32-9.

opcodes/

2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/13048
	* i386-dis.c (print_insn): Optimize info->mach check.
 2011-08-01 23:04:23 +00:00
Nick Clifton
a8040cf231 PR ld/12974 
* config/tc-arm.c (literal_pool): Add locs field.
	(add_to_lit_pool): Initialise the locs entry for the new literal.
	(s_ltorg): Generate a DWARF2 line number entry for each emitted
	literal pool entry.
 2011-08-01 11:27:14 +00:00
Richard Sandiford
c310919936 gas/ 
* config/tc-mips.c (nops_for_vr4130): Revert previous commit.
 2011-07-30 06:28:22 +00:00
Maciej W. Rozycki
2309ddf222 bfd/ 
* elfxx-mips.c: Adjust comments throughout.
	(mips_elf_relax_delete_bytes): Reshape code.
	(_bfd_mips_elf_relax_section): Remove check for
	R_MICROMIPS_GPREL16 relocations.  Reshape code.

	gas/
	* config/tc-mips.c: Adjust comments throughout.
	(reglist_lookup): Reshape code.
	(jmp_reloc_p, jalr_reloc_p): Reformat.
	(got16_reloc_p, hi16_reloc_p, lo16_reloc_p): Handle microMIPS
	relocations.
	(gpr_mod_mask): Remove unused variable.
	(gpr_read_mask, gpr_write_mask): Reshape code.
	(fpr_read_mask, fpr_write_mask): Likewise.
	(nops_for_vr4130): Ensure non-microMIPS mode.
	(can_swap_branch_p): Correct pinfo2 reference.  Reshape code.
	(append_insn): Skip Loongson 2F workaround in MIPS16 mode.  Use
	the outermost operator of a compound relocation to determines
	the relocated field.  Fix formatting.
	(md_convert_frag): Reshape code.

	include/opcode/
	* mips.h: Clarify the description of microMIPS instruction
	manipulation macros.
	(MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): Remove macros.
 2011-07-29 22:46:29 +00:00
Nick Clifton
53d780c93d * config/tc-rx.c (md_convert_frag): Fix encoding of beq.a 
synthetic instruction.

	* gas/rx/r-bcc.d: Update expected disassembly of synthetic beq.a
	instruction.
 2011-07-26 14:09:36 +00:00
Richard Sandiford
df58fc944d bfd/ 
2011-02-25  Chao-ying Fu  <fu@mips.com>
            Ilie Garbacea  <ilie@mips.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Catherine Moore  <clm@codesourcery.com>
	    Richard Sandiford  <rdsandiford@googlemail.com>

	* archures.c (bfd_mach_mips_micromips): New macro.
	* cpu-mips.c (I_micromips): New enum value.
	(arch_info_struct): Add bfd_mach_mips_micromips.
	* elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New
	prototype.
	(_bfd_mips_elf_relax_section): Likewise.
	(_bfd_mips16_elf_reloc_unshuffle): Rename to...
	(_bfd_mips_elf_reloc_unshuffle): ... this.  Handle microMIPS
	ASE.
	(_bfd_mips16_elf_reloc_shuffle): Rename to...
	(_bfd_mips_elf_reloc_shuffle): ... this.  Handle microMIPS ASE.
	(gprel16_reloc_p): Handle microMIPS ASE.
	(literal_reloc_p): New function.
	* elf32-mips.c (elf_micromips_howto_table_rel): New variable.
	(_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE.
	(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
	and _bfd_mips_elf_reloc_shuffle changes.
	(mips_elf_gprel32_reloc): Update comment.
	(micromips_reloc_map): New variable.
	(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
	(mips_elf32_rtype_to_howto): Likewise.
	(mips_info_to_howto_rel): Likewise.
	(bfd_elf32_bfd_is_target_special_symbol): Define.
	(bfd_elf32_bfd_relax_section): Likewise.
	* elf64-mips.c (micromips_elf64_howto_table_rel): New variable.
	(micromips_elf64_howto_table_rela): Likewise.
	(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
	and _bfd_mips_elf_reloc_shuffle changes.
	(micromips_reloc_map): Likewise.
	(bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE.
	(bfd_elf64_bfd_reloc_name_lookup): Likewise.
	(mips_elf64_rtype_to_howto): Likewise.
	(bfd_elf64_bfd_is_target_special_symbol): Define.
	* elfn32-mips.c (elf_micromips_howto_table_rel): New variable.
	(elf_micromips_howto_table_rela): Likewise.
	(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
	and _bfd_mips_elf_reloc_shuffle changes.
	(micromips_reloc_map): Likewise.
	(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
	(bfd_elf32_bfd_reloc_name_lookup): Likewise.
	(mips_elf_n32_rtype_to_howto): Likewise.
	(bfd_elf32_bfd_is_target_special_symbol): Define.
	* elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro.
	(LA25_LUI_MICROMIPS_2): Likewise.
	(LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise.
	(LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise.
	(TLS_RELOC_P): Handle microMIPS ASE.
	(mips_elf_create_stub_symbol): Adjust value of stub symbol if
	target is a microMIPS function.
	(micromips_reloc_p): New function.
	(micromips_reloc_shuffle_p): Likewise.
	(got16_reloc_p, call16_reloc_p): Handle microMIPS ASE.
	(got_disp_reloc_p, got_page_reloc_p): New functions.
	(got_ofst_reloc_p): Likewise.
	(got_hi16_reloc_p, got_lo16_reloc_p): Likewise.
	(call_hi16_reloc_p, call_lo16_reloc_p): Likewise.
	(hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE.
	(micromips_branch_reloc_p): New function.
	(tls_gd_reloc_p, tls_ldm_reloc_p): Likewise.
	(tls_gottprel_reloc_p): Likewise.
	(_bfd_mips16_elf_reloc_unshuffle): Rename to...
	(_bfd_mips_elf_reloc_unshuffle): ... this.  Handle microMIPS
	ASE.
	(_bfd_mips16_elf_reloc_shuffle): Rename to...
	(_bfd_mips_elf_reloc_shuffle): ... this.  Handle microMIPS ASE.
	(_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE.
	(mips_tls_got_index, mips_elf_got_page): Likewise.
	(mips_elf_create_local_got_entry): Likewise.
	(mips_elf_relocation_needs_la25_stub): Likewise.
	(mips_elf_calculate_relocation): Likewise.
	(mips_elf_perform_relocation): Likewise.
	(_bfd_mips_elf_symbol_processing): Likewise.
	(_bfd_mips_elf_add_symbol_hook): Likewise.
	(_bfd_mips_elf_link_output_symbol_hook): Likewise.
	(mips_elf_add_lo16_rel_addend): Likewise.
	(_bfd_mips_elf_check_relocs): Likewise.
	(mips_elf_adjust_addend): Likewise.
	(_bfd_mips_elf_relocate_section): Likewise.
	(mips_elf_create_la25_stub): Likewise.
	(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
	(_bfd_mips_elf_gc_sweep_hook): Likewise.
	(_bfd_mips_elf_is_target_special_symbol): New function.
	(mips_elf_relax_delete_bytes): Likewise.
	(opcode_descriptor): New structure.
	(RA): New macro.
	(OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise.
	(b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables.
	(beq_insn_32): Likewise.
	(b_insn_16, bz_insn_16): New variables.
	(BZC32_REG_FIELD): New macro.
	(bz_rs_insns_32, bz_rt_insns_32): New variables.
	(bzc_insns_32, bz_insns_16):Likewise.
	(BZ16_REG, BZ16_REG_FIELD): New macros.
	(jal_insn_32_bd16, jal_insn_32_bd32): New variables.
	(jal_x_insn_32_bd32): Likewise.
	(j_insn_32, jalr_insn_32): Likewise.
	(ds_insns_32_bd16, ds_insns_32_bd32): Likewise.
	(jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise.
	(JR16_REG): New macro.
	(ds_insns_16_bd16): New variable.
	(lui_insn): Likewise.
	(addiu_insn, addiupc_insn): Likewise.
	(ADDIUPC_REG_FIELD): New macro.
	(MOVE32_RD, MOVE32_RS): Likewise.
	(MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise.
	(move_insns_32, move_insns_16): New variables.
	(nop_insn_32, nop_insn_16): Likewise.
	(MATCH): New macro.
	(find_match): New function.
	(check_br16_dslot, check_br32_dslot): Likewise.
	(check_br16, check_br32): Likewise.
	(IS_BITSIZE): New macro.
	(check_4byte_branch): New function.
	(_bfd_mips_elf_relax_section): Likewise.
	(_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16
	and microMIPS modules together.
	(_bfd_mips_elf_print_private_bfd_data):	Handle microMIPS ASE.
	* reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation.
	(BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise.
	(BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise.
	(BFD_RELOC_MICROMIPS_GPREL16): Likewise.
	(BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise.
	(BFD_RELOC_MICROMIPS_HI16_S): Likewise.
	(BFD_RELOC_MICROMIPS_LO16): Likewise.
	(BFD_RELOC_MICROMIPS_LITERAL): Likewise.
	(BFD_RELOC_MICROMIPS_GOT16): Likewise.
	(BFD_RELOC_MICROMIPS_CALL16): Likewise.
	(BFD_RELOC_MICROMIPS_GOT_HI16): Likewise.
	(BFD_RELOC_MICROMIPS_GOT_LO16): Likewise.
	(BFD_RELOC_MICROMIPS_CALL_HI16): Likewise.
	(BFD_RELOC_MICROMIPS_CALL_LO16): Likewise.
	(BFD_RELOC_MICROMIPS_SUB): Likewise.
	(BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise.
	(BFD_RELOC_MICROMIPS_GOT_OFST): Likewise.
	(BFD_RELOC_MICROMIPS_GOT_DISP): Likewise.
	(BFD_RELOC_MICROMIPS_HIGHEST): Likewise.
	(BFD_RELOC_MICROMIPS_HIGHER): Likewise.
	(BFD_RELOC_MICROMIPS_SCN_DISP): Likewise.
	(BFD_RELOC_MICROMIPS_JALR): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_GD): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_LDM): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise.
	(BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

binutils/
2011-02-25  Chao-ying Fu  <fu@mips.com>
            Maciej W. Rozycki  <macro@codesourcery.com>

	* readelf.c (get_machine_flags): Handle microMIPS ASE.
	(get_mips_symbol_other): Likewise.

gas/
2011-02-25  Maciej W. Rozycki  <macro@codesourcery.com>
            Chao-ying Fu  <fu@mips.com>
	    Richard Sandiford  <rdsandiford@googlemail.com>

	* config/tc-mips.h (mips_segment_info): Add one bit for
	microMIPS.
	(TC_LABEL_IS_LOCAL): New macro.
	(mips_label_is_local): New prototype.
	* config/tc-mips.c (S0, S7): New macros.
	(emit_branch_likely_macro): New variable.
	(mips_set_options): Add micromips.
	(mips_opts): Initialise micromips to -1.
	(file_ase_micromips): New variable.
	(CPU_HAS_MICROMIPS): New macro.
	(hilo_interlocks): Set for microMIPS too.
	(gpr_interlocks): Likewise.
	(cop_interlocks): Likewise.
	(cop_mem_interlocks): Likewise.
	(HAVE_CODE_COMPRESSION): New macro.
	(micromips_op_hash): New variable.
	(micromips_nop16_insn, micromips_nop32_insn): New variables.
	(NOP_INSN): Handle microMIPS ASE.
	(mips32_to_micromips_reg_b_map): New macro.
	(mips32_to_micromips_reg_c_map): Likewise.
	(mips32_to_micromips_reg_d_map): Likewise.
	(mips32_to_micromips_reg_e_map): Likewise.
	(mips32_to_micromips_reg_f_map): Likewise.
	(mips32_to_micromips_reg_g_map): Likewise.
	(mips32_to_micromips_reg_l_map): Likewise.
	(mips32_to_micromips_reg_n_map): Likewise.
	(mips32_to_micromips_reg_h_map): New variable.
	(mips32_to_micromips_reg_m_map): Likewise.
	(mips32_to_micromips_reg_q_map): Likewise.
	(micromips_to_32_reg_h_map): New variable.
	(micromips_to_32_reg_i_map): Likewise.
	(micromips_to_32_reg_m_map): Likewise.
	(micromips_to_32_reg_q_map): Likewise.
	(micromips_to_32_reg_b_map): New macro.
	(micromips_to_32_reg_c_map): Likewise.
	(micromips_to_32_reg_d_map): Likewise.
	(micromips_to_32_reg_e_map): Likewise.
	(micromips_to_32_reg_f_map): Likewise.
	(micromips_to_32_reg_g_map): Likewise.
	(micromips_to_32_reg_l_map): Likewise.
	(micromips_to_32_reg_n_map): Likewise.
	(micromips_imm_b_map, micromips_imm_c_map): New macros.
	(RELAX_DELAY_SLOT_16BIT): New macro.
	(RELAX_DELAY_SLOT_SIZE_FIRST): Likewise.
	(RELAX_DELAY_SLOT_SIZE_SECOND): Likewise.
	(RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros.
	(RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise.
	(RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise.
	(RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
	(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise.
	(RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
	(RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
	(RELAX_MICROMIPS_TOOFAR32): Likewise.
	(RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
	(RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
	(INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE.
	(mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p,
	fsize and insns.
	(mips_mark_labels): New function.
	(mips16_small, mips16_ext): Remove variables, replacing with...
	(forced_insn_size): ... this.
	(append_insn, mips16_ip): Update accordingly.
	(micromips_insn_length): New function.
	(insn_length): Return the length of microMIPS instructions.
	(mips_record_mips16_mode): Rename to...
	(mips_record_compressed_mode): ... this.  Handle microMIPS ASE.
	(install_insn): Handle microMIPS ASE.
	(reglist_lookup): New function.
	(is_size_valid, is_delay_slot_valid): Likewise.
	(md_begin): Handle microMIPS ASE.
	(md_assemble): Likewise.  Update for append_insn interface change.
	(micromips_reloc_p): New function.
	(got16_reloc_p): Handle microMIPS ASE.
	(hi16_reloc_p): Likewise.
	(lo16_reloc_p): Likewise.
	(jmp_reloc_p): New function.
	(jalr_reloc_p): Likewise.
	(matching_lo_reloc): Handle microMIPS ASE.
	(insn_uses_reg, reg_needs_delay): Likewise.
	(mips_move_labels): Likewise.
	(mips16_mark_labels): Rename to...
	(mips_compressed_mark_labels): ... this.  Handle microMIPS ASE.
	(gpr_mod_mask): New function.
	(gpr_read_mask, gpr_write_mask): Handle microMIPS ASE.
	(fpr_read_mask, fpr_write_mask): Likewise.
	(insns_between, nops_for_vr4130, nops_for_insn): Likewise.
	(fix_loongson2f_nop, fix_loongson2f_jump): Likewise.
	(MICROMIPS_LABEL_CHAR): New macro.
	(micromips_target_label, micromips_target_name): New variables.
	(micromips_label_name, micromips_label_expr): New functions.
	(micromips_label_inc, micromips_add_label): Likewise.
	(mips_label_is_local): Likewise.
	(micromips_map_reloc): Likewise.
	(can_swap_branch_p): Handle microMIPS ASE.
	(append_insn): Add expansionp argument.  Handle microMIPS ASE.
	(start_noreorder, end_noreorder): Handle microMIPS ASE.
	(macro_start, macro_warning, macro_end): Likewise.
	(brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables.
	(mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise.
	(BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros.
	(MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise.
	(macro_build): Handle microMIPS ASE.  Update for append_insn
	interface change.
	(mips16_macro_build): Update for append_insn interface change.
	(macro_build_jalr): Handle microMIPS ASE.
	(macro_build_lui): Likewise.  Simplify.
	(load_register): Handle microMIPS ASE.
	(load_address): Likewise.
	(move_register): Likewise.
	(macro_build_branch_likely): New function.
	(macro_build_branch_ccl): Likewise.
	(macro_build_branch_rs): Likewise.
	(macro_build_branch_rsrt): Likewise.
	(macro): Handle microMIPS ASE.
	(validate_micromips_insn): New function.
	(expr_const_in_range): Likewise.
	(mips_ip): Handle microMIPS ASE.
	(options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS.
	(md_longopts): Add mmicromips and mno-micromips.
	(md_parse_option): Handle OPTION_MICROMIPS and
	OPTION_NO_MICROMIPS.
	(mips_after_parse_args): Handle microMIPS ASE.
	(md_pcrel_from): Handle microMIPS relocations.
	(mips_force_relocation): Likewise.
	(md_apply_fix): Likewise.
	(mips_align): Handle microMIPS ASE.
	(s_mipsset): Likewise.
	(s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers.
	(s_dtprel_internal): Likewise.
	(s_gpword, s_gpdword): Likewise.
	(s_insn): Handle microMIPS ASE.
	(s_mips_stab): Likewise.
	(relaxed_micromips_32bit_branch_length): New function.
	(relaxed_micromips_16bit_branch_length): New function.
	(md_estimate_size_before_relax): Handle microMIPS ASE.
	(mips_fix_adjustable): Likewise.
	(tc_gen_reloc): Handle microMIPS relocations.
	(mips_relax_frag): Handle microMIPS ASE.
	(md_convert_frag): Likewise.
	(mips_frob_file_after_relocs): Likewise.
	(mips_elf_final_processing): Likewise.
	(mips_nop_opcode): Likewise.
	(mips_handle_align): Likewise.
	(md_show_usage): Handle microMIPS options.
	* symbols.c (TC_LABEL_IS_LOCAL): New macro.
	(S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check.

	* doc/as.texinfo (Target MIPS options): Add -mmicromips and
	-mno-micromips.
	(-mmicromips, -mno-micromips): New options.
	* doc/c-mips.texi (-mmicromips, -mno-micromips): New options.
	(MIPS ISA): Document .set micromips and .set nomicromips.
	(MIPS insn): Update for microMIPS support.

gas/testsuite/
2011-02-25  Maciej W. Rozycki  <macro@codesourcery.com>
            Chao-ying Fu  <fu@mips.com>
	    Richard Sandiford  <rdsandiford@googlemail.com>

	* gas/mips/micromips.d: New test.
	* gas/mips/micromips-branch-delay.d: Likewise.
	* gas/mips/micromips-branch-relax.d: Likewise.
	* gas/mips/micromips-branch-relax-pic.d: Likewise.
	* gas/mips/micromips-size-1.d: Likewise.
	* gas/mips/micromips-trap.d: Likewise.
	* gas/mips/micromips.l: New stderr output.
	* gas/mips/micromips-branch-delay.l: Likewise.
	* gas/mips/micromips-branch-relax.l: Likewise.
	* gas/mips/micromips-branch-relax-pic.l: Likewise.
	* gas/mips/micromips-size-0.l: New list test.
	* gas/mips/micromips-size-1.l: New stderr output.
	* gas/mips/micromips.s: New test source.
	* gas/mips/micromips-branch-delay.s: Likewise.
	* gas/mips/micromips-branch-relax.s: Likewise.
	* gas/mips/micromips-size-0.s: Likewise.
	* gas/mips/micromips-size-1.s: Likewise.
	* gas/mips/mips.exp: Run the new tests.

	* gas/mips/dli.s: Use .p2align.
	* gas/mips/elf_ase_micromips.d: New test.
	* gas/mips/elf_ase_micromips-2.d: Likewise.
	* gas/mips/micromips@abs.d: Likewise.
	* gas/mips/micromips@add.d: Likewise.
	* gas/mips/micromips@alnv_ps-swap.d: Likewise.
	* gas/mips/micromips@and.d: Likewise.
	* gas/mips/micromips@beq.d: Likewise.
	* gas/mips/micromips@bge.d: Likewise.
	* gas/mips/micromips@bgeu.d: Likewise.
	* gas/mips/micromips@blt.d: Likewise.
	* gas/mips/micromips@bltu.d: Likewise.
	* gas/mips/micromips@branch-likely.d: Likewise.
	* gas/mips/micromips@branch-misc-1.d: Likewise.
	* gas/mips/micromips@branch-misc-2-64.d: Likewise.
	* gas/mips/micromips@branch-misc-2.d: Likewise.
	* gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
	* gas/mips/micromips@branch-misc-2pic.d: Likewise.
	* gas/mips/micromips@branch-misc-4-64.d: Likewise.
	* gas/mips/micromips@branch-misc-4.d: Likewise.
	* gas/mips/micromips@branch-self.d: Likewise.
	* gas/mips/micromips@cache.d: Likewise.
	* gas/mips/micromips@daddi.d: Likewise.
	* gas/mips/micromips@dli.d: Likewise.
	* gas/mips/micromips@elf-jal.d: Likewise.
	* gas/mips/micromips@elf-rel2.d: Likewise.
	* gas/mips/micromips@elfel-rel2.d: Likewise.
	* gas/mips/micromips@elf-rel4.d: Likewise.
	* gas/mips/micromips@jal-svr4pic.d: Likewise.
	* gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise.
	* gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise.
	* gas/mips/micromips@li.d: Likewise.
	* gas/mips/micromips@loc-swap-dis.d: Likewise.
	* gas/mips/micromips@loc-swap.d: Likewise.
	* gas/mips/micromips@mips1-fp.d: Likewise.
	* gas/mips/micromips@mips32-cp2.d: Likewise.
	* gas/mips/micromips@mips32-imm.d: Likewise.
	* gas/mips/micromips@mips32-sf32.d: Likewise.
	* gas/mips/micromips@mips32.d: Likewise.
	* gas/mips/micromips@mips32r2-cp2.d: Likewise.
	* gas/mips/micromips@mips32r2-fp32.d: Likewise.
	* gas/mips/micromips@mips32r2-sync.d: Likewise.
	* gas/mips/micromips@mips32r2.d: Likewise.
	* gas/mips/micromips@mips4-branch-likely.d: Likewise.
	* gas/mips/micromips@mips4-fp.d: Likewise.
	* gas/mips/micromips@mips4.d: Likewise.
	* gas/mips/micromips@mips5.d: Likewise.
	* gas/mips/micromips@mips64-cp2.d: Likewise.
	* gas/mips/micromips@mips64.d: Likewise.
	* gas/mips/micromips@mips64r2.d: Likewise.
	* gas/mips/micromips@pref.d: Likewise.
	* gas/mips/micromips@relax-at.d: Likewise.
	* gas/mips/micromips@relax.d: Likewise.
	* gas/mips/micromips@rol-hw.d: Likewise.
	* gas/mips/micromips@uld2-eb.d: Likewise.
	* gas/mips/micromips@uld2-el.d: Likewise.
	* gas/mips/micromips@ulh2-eb.d: Likewise.
	* gas/mips/micromips@ulh2-el.d: Likewise.
	* gas/mips/micromips@ulw2-eb-ilocks.d: Likewise.
	* gas/mips/micromips@ulw2-el-ilocks.d: Likewise.
	* gas/mips/cache.d: Likewise.
	* gas/mips/daddi.d: Likewise.
	* gas/mips/mips32-imm.d: Likewise.
	* gas/mips/pref.d: Likewise.
	* gas/mips/elf-rel27.d: Handle microMIPS ASE.
	* gas/mips/l_d.d: Likewise.
	* gas/mips/l_d-n32.d: Likewise.
	* gas/mips/l_d-n64.d: Likewise.
	* gas/mips/ld.d: Likewise.
	* gas/mips/ld-n32.d: Likewise.
	* gas/mips/ld-n64.d: Likewise.
	* gas/mips/s_d.d: Likewise.
	* gas/mips/s_d-n32.d: Likewise.
	* gas/mips/s_d-n64.d: Likewise.
	* gas/mips/sd.d: Likewise.
	* gas/mips/sd-n32.d: Likewise.
	* gas/mips/sd-n64.d: Likewise.
	* gas/mips/mips32.d: Update immediates.
	* gas/mips/micromips@mips32-cp2.s: New test source.
	* gas/mips/micromips@mips32-imm.s: Likewise.
	* gas/mips/micromips@mips32r2-cp2.s: Likewise.
	* gas/mips/micromips@mips64-cp2.s: Likewise.
	* gas/mips/cache.s: Likewise.
	* gas/mips/daddi.s: Likewise.
	* gas/mips/mips32-imm.s: Likewise.
	* gas/mips/elf-rel4.s: Handle microMIPS ASE.
	* gas/mips/lb-pic.s: Likewise.
	* gas/mips/ld.s: Likewise.
	* gas/mips/mips32.s: Likewise.
	* gas/mips/mips.exp: Add the micromips arch.  Exclude mips16e
	from micromips.  Run mips32-imm.

	* gas/mips/jal-mask-11.d: New test.
	* gas/mips/jal-mask-12.d: Likewise.
	* gas/mips/micromips@jal-mask-11.d: Likewise.
	* gas/mips/jal-mask-1.s: Source for the new tests.
	* gas/mips/jal-mask-21.d: New test.
	* gas/mips/jal-mask-22.d: Likewise.
	* gas/mips/micromips@jal-mask-12.d: Likewise.
	* gas/mips/jal-mask-2.s: Source for the new tests.
	* gas/mips/mips.exp: Run the new tests.

	* gas/mips/mips16-e.d: Add --special-syms to `objdump'.
	* gas/mips/tmips16-e.d: Likewise.
	* gas/mips/mipsel16-e.d: Likewise.
	* gas/mips/tmipsel16-e.d: Likewise.

	* gas/mips/and.s: Adjust padding.
	* gas/mips/beq.s: Likewise.
	* gas/mips/bge.s: Likewise.
	* gas/mips/bgeu.s: Likewise.
	* gas/mips/blt.s: Likewise.
	* gas/mips/bltu.s: Likewise.
	* gas/mips/branch-misc-2.s: Likewise.
	* gas/mips/jal.s: Likewise.
	* gas/mips/li.s: Likewise.
	* gas/mips/mips4.s: Likewise.
	* gas/mips/mips4-fp.s: Likewise.
	* gas/mips/relax.s: Likewise.
	* gas/mips/and.d: Update accordingly.
	* gas/mips/elf-jal.d: Likewise.
	* gas/mips/jal.d: Likewise.
	* gas/mips/li.d: Likewise.
	* gas/mips/relax-at.d: Likewise.
	* gas/mips/relax.d: Likewise.

include/elf/
2011-02-25  Chao-ying Fu  <fu@mips.com>
            Maciej W. Rozycki  <macro@codesourcery.com>

	* mips.h (R_MICROMIPS_min): New relocations.
	(R_MICROMIPS_26_S1): Likewise.
	(R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise.
	(R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise.
	(R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise.
	(R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise.
	(R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise.
	(R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise.
	(R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise.
	(R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise.
	(R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise.
	(R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise.
	(R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise.
	(R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise.
	(R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise.
	(R_MICROMIPS_TLS_GOTTPREL): Likewise.
	(R_MICROMIPS_TLS_TPREL_HI16): Likewise.
	(R_MICROMIPS_TLS_TPREL_LO16): Likewise.
	(R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise.
	(R_MICROMIPS_max): Likewise.
	(EF_MIPS_ARCH_ASE_MICROMIPS): New macro.
	(STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise.
	(ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise.
	(STO_MICROMIPS): Likewise.
	(ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise.
	(ELF_ST_IS_COMPRESSED): Likewise.
	(STO_MIPS_PLT, STO_MIPS_PIC): Rework.
	(ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise.
	(STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise.

include/opcode/
2011-02-25  Chao-ying Fu  <fu@mips.com>
            Maciej W. Rozycki  <macro@codesourcery.com>

	* mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros.
	(OP_MASK_STYPE, OP_SH_STYPE): Likewise.
	(OP_MASK_CODE10, OP_SH_CODE10): Likewise.
	(OP_MASK_TRAP, OP_SH_TRAP): Likewise.
	(OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise.
	(OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise.
	(OP_MASK_RS3, OP_SH_RS3): Likewise.
	(OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise.
	(OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise.
	(OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise.
	(OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise.
	(OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise.
	(OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise.
	(OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise.
	(OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise.
	(OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise.
	(OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise.
	(OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise.
	(OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise.
	(OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise.
	(OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise.
	(INSN_WRITE_GPR_S): New macro.
	(INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise.
	(INSN2_READ_FPR_D): Likewise.
	(INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise.
	(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise.
	(INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise.
	(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise.
	(INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise.
	(INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise.
	(INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise.
	(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise.
	(CPU_MICROMIPS): New macro.
	(M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values.
	(M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise.
	(M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise.
	(M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise.
	(M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise.
	(M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise.
	(M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise.
	(M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise.
	(M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise.
	(M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise.
	(M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise.
	(M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise.
	(M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise.
	(MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros.
	(MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise.
	(MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise.
	(MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise.
	(MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise.
	(MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise.
	(MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise.
	(MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise.
	(MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise.
	(MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise.
	(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
	(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
	(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
	(MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise.
	(MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise.
	(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise.
	(MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise.
	(MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise.
	(MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise.
	(MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise.
	(MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise.
	(MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise.
	(MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise.
	(MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise.
	(MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise.
	(MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise.
	(MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise.
	(MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise.
	(MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise.
	(MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise.
	(MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise.
	(MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise.
	(MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise.
	(MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise.
	(MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise.
	(MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise.
	(MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise.
	(MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise.
	(MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise.
	(MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise.
	(MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise.
	(MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise.
	(MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise.
	(MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise.
	(MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise.
	(MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise.
	(MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise.
	(MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise.
	(MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise.
	(MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise.
	(MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise.
	(MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise.
	(MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise.
	(MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise.
	(MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise.
	(MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise.
	(MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise.
	(MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise.
	(MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise.
	(MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise.
	(MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise.
	(MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise.
	(MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise.
	(MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise.
	(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
	(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
	(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
	(MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise.
	(MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise.
	(MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise.
	(MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise.
	(MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise.
	(MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise.
	(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise.
	(MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise.
	(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
	(MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise.
	(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
	(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
	(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
	(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
	(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
	(MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise.
	(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
	(MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise.
	(MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise.
	(MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise.
	(MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise.
	(MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise.
	(MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise.
	(MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise.
	(MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise.
	(micromips_opcodes): New declaration.
	(bfd_micromips_num_opcodes): Likewise.

ld/testsuite/
2011-02-25  Catherine Moore  <clm@codesourcery.com>
            Chao-ying Fu  <fu@mips.com>
            Maciej W. Rozycki  <macro@codesourcery.com>

	* lib/ld-lib.exp (run_dump_test): Support distinct assembler
	flags for the same source named multiple times.
	* ld-mips-elf/jalx-1.s: New test source.
	* ld-mips-elf/jalx-1.d: New test output.
	* ld-mips-elf/jalx-1.ld: New test linker script.
	* ld-mips-elf/jalx-2-main.s: New test source.
	* ld-mips-elf/jalx-2-ex.s: Likewise.
	* ld-mips-elf/jalx-2-printf.s: Likewise.
	* ld-mips-elf/jalx-2.dd: New test output.
	* ld-mips-elf/jalx-2.ld: New test linker script.
	* ld-mips-elf/mips16-and-micromips.d: New test.
	* ld-mips-elf/mips-elf.exp: Run the new tests

opcodes/
2011-02-25  Chao-ying Fu  <fu@mips.com>
            Maciej W. Rozycki  <macro@codesourcery.com>

	* micromips-opc.c: New file.
	* mips-dis.c (micromips_to_32_reg_b_map): New array.
	(micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise.
	(micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise.
	(micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise.
	(micromips_to_32_reg_q_map): Likewise.
	(micromips_imm_b_map, micromips_imm_c_map): Likewise.
	(micromips_ase): New variable.
	(is_micromips): New function.
	(set_default_mips_dis_options): Handle microMIPS ASE.
	(print_insn_micromips): New function.
	(is_compressed_mode_p): Likewise.
	(_print_insn_mips): Handle microMIPS instructions.
	* Makefile.am (CFILES): Add micromips-opc.c.
	* configure.in (bfd_mips_arch): Add micromips-opc.lo.
	* Makefile.in: Regenerate.
	* configure: Regenerate.

	* mips-dis.c (micromips_to_32_reg_h_map): New variable.
	(micromips_to_32_reg_i_map): Likewise.
	(micromips_to_32_reg_m_map): Likewise.
	(micromips_to_32_reg_n_map): New macro.
 2011-07-24 14:20:15 +00:00
Richard Sandiford
a40bc9dd42 gas/ 
2011-07-24  Maciej W. Rozycki  <macro@codesourcery.com>

	* config/tc-mips.c (mips_ip): Make a copy of the instruction's
	mnemonic and use it for further processing.
 2011-07-24 14:05:28 +00:00
Richard Sandiford
bcd530a713 include/opcode/ 
2011-07-24  Maciej W. Rozycki  <macro@codesourcery.com>

	* mips.h (INSN_TRAP): Rename to...
	(INSN_NO_DELAY_SLOT): ... this.
	(INSN_SYNC): Remove macro.

gas/
2011-07-24  Maciej W. Rozycki  <macro@codesourcery.com>

	* config/tc-mips.c (can_swap_branch_p): Adjust for the rename of
	INSN_TRAP to INSN_NO_DELAY_SLOT.  Remove the check for INSN_SYNC
	as well as explicit checks for ERET and DERET when scheduling
	branch delay slots.

opcodes/
2011-07-24  Maciej W. Rozycki  <macro@codesourcery.com>

	* mips-opc.c (NODS): New macro.
	(TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
	(DSP_VOLA): Likewise.
	(mips_builtin_opcodes): Add NODS annotation to "deret" and
	"eret". Replace INSN_SYNC with NODS throughout.  Use NODS in
	place of TRAP for "wait", "waiti" and "yield".
	* mips16-opc.c (NODS): New macro.
	(TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
	(mips16_opcodes):  Use NODS in place of TRAP for "jalrc", "jrc",
	"restore" and "save".
 2011-07-24 14:04:51 +00:00
H.J. Lu
7a9068fe16 Add initial Intel K1OM support. 
bfd/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ALL_MACHINES): Add cpu-k1om.lo.
	(ALL_MACHINES_CFILES): Add cpu-k1om.c.
	* Makefile.in: Regenerated.

	* archures.c (bfd_architecture): Add bfd_arch_k1om.
	(bfd_k1om_arch): New.
	(bfd_archures_list): Add &bfd_k1om_arch.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf64_k1om_vec if
	bfd_elf64_x86_64_vec is supported.  Add bfd_elf64_k1om_freebsd_vec
	if bfd_elf64_x86_64_freebsd_vec is supported.
	(targ_selvecs): Likewise.

	* configure.in: Support bfd_elf64_k1om_vec and
	bfd_elf64_k1om_freebsd_vec.
	* configure: Regenerated.

	* cpu-k1om.c: New.

	* elf64-x86-64.c (elf64_k1om_elf_object_p): New.
	(bfd_elf64_k1om_vec): Likewise.
	(bfd_elf64_k1om_freebsd_vec): Likewise.

	* targets.c (bfd_elf64_k1om_vec): New.
	(bfd_elf64_k1om_freebsd_vec): Likewise.
	(_bfd_target_vector): Add bfd_elf64_k1om_vec and
	bfd_elf64_k1om_freebsd_vec.

binutils/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (init_dwarf_regnames): Handle EM_K1OM.

	* elfedit.c (elf_machine): Support EM_K1OM.
	(elf_class): Likewise.

	* readelf.c (guess_is_rela): Handle EM_K1OM.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(get_section_type_name): Likewise.
	(get_elf_section_flags): Likewise.
	(process_section_headers): Likewise.
	(get_symbol_index_type): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_32bit_pcrel_reloc): Likewise.
	(is_64bit_abs_reloc): Likewise.
	(is_64bit_pcrel_reloc): Likewise.
	(is_none_reloc): Likewise.

	* doc/binutils.texi: Mention K1OM for elfedit.

binutils/testsuite/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* binutils-all/elfedit.exp: Run elfedit-4.

	* binutils-all/elfedit-4.d: New.

gas/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add k1om.
	(i386_align_code): Handle PROCESSOR_K1OM.
	(check_cpu_arch_compatible): Check EM_K1OM.
	(i386_arch): Handle Intel K1OM.
	(i386_mach): Return bfd_mach_k1om for Intel K1OM.
	(i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel
	K1OM.

	* config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New.
	(processor_type): Add PROCESSOR_K1OM.

	* doc/c-i386.texi: Document k1om.

gas/testsuite/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/k1om.d: New.
	* gas/i386/k1om-inval.l: Likewise.
	* gas/i386/k1om-inval.s: Likewise.

	* gas/i386/i386.exp: Run k1om-inval and k1om.

include/elf/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* common.h (EM_K1OM): New.

ld/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (ALL_64_EMULATIONS): Add eelf_k1om.o and
	eelf_k1om_fbsd.o
	(eelf_k1om.c): New.
	(eelf_k1om_fbsd.c): Likewise.
	* Makefile.in: Regenerated.

	* configure.tgt (targ64_extra_emuls): Add elf_k1om if elf_x86_64
	is supported.  Add elf_k1om_fbsd if elf_x86_64_fbsd is supported.
	(targ_extra_emuls): Likewise.

	* emulparams/elf_k1om.sh: New.
	* emulparams/elf_k1om_fbsd.sh: Likewise.

ld/testsuite/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/abs-k1om.d: New.
	* ld-x86-64/protected2-k1om.d: Likewise.
	* ld-x86-64/protected3-k1om.d: Likewise.

	* ld-x86-64/x86-64.exp: Run abs-k1om, protected2-k1om and
	protected3-k1om.

opcodes/

2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in: Handle bfd_k1om_arch.
	* configure: Regenerated.

	* disassemble.c (disassembler): Handle bfd_k1om_arch.

	* i386-dis.c (print_insn): Handle bfd_mach_k1om and
	bfd_mach_k1om_intel_syntax.

	* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to
	~(CpuL1OM|CpuK1OM).  Add CPU_K1OM_FLAGS.
	(cpu_flags): Add CpuK1OM.

	* i386-opc.h (CpuK1OM): New.
	(i386_cpu_flags): Add cpuk1om.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2011-07-22 20:22:38 +00:00
Richard Sandiford
01f372ca0b gas/ 
2011-07-04  Aurelien Jarno  <aurelien@aurel32.net>

	* config/tc-mips.c (append_insn): delete prev_pinfo2 and pinfo2.
 2011-07-06 18:01:51 +00:00
Richard Sandiford
fe35f09f47 gas/ 
* config/tc-mips.c (gpr_read_mask, gpr_write_mask): Fix handling
	of register 0.
 2011-07-04 20:22:52 +00:00
Maciej W. Rozycki
e3a82c8e75 gas/ 
* config/tc-mips.c (append_insn): Make sure DWARF-2 location
	information is properly adjusted for branches that get swapped.

	gas/testsuite/
	* gas/mips/loc-swap.d: New test case for DWARF-2 location with
	branch swapping.
	* gas/mips/loc-swap-dis.d: Likewise.
	* gas/mips/mips16@loc-swap.d: Likewise, MIPS16 version.
	* gas/mips/mips16@loc-swap-dis.d: Likewise.
	* gas/mips/loc-swap.s: Source for the new tests.
	* gas/mips/mips.exp: Run the new tests.
 2011-07-04 19:27:28 +00:00
Thomas Schwinge
9c55345c8c ELFOSABI_GNU 
bfd/
	* elf.c (_bfd_elf_set_osabi): Use ELFOSABI_GNU name instead of
	ELFOSABI_LINUX alias.
	* elf32-hppa.c: Likewise.
	* elf32-i370.c: Likewise.
	* elf64-hppa.c: Likewise.

	binutils/
	* elfedit.c (osabis): Use ELFOSABI_GNU name instead of ELFOSABI_LINUX
	alias and ELFOSABI_HURD.  Add GNU alias.
	* readelf.c (get_osabi_name, get_symbol_binding, get_symbol_type):
	Likewise.
	* doc/binutils.texi <elfedit>: Update accordingly.

	elfcpp/
	* elfcpp.h (ELFOSABI): Add ELFOSABI_GNU with value of ELFOSABI_LINUX,
	keep ELFOSABI_LINUX as an alias.  Remove ELFOSABI_HURD.

	gas/
	* config/obj-elf.c (obj_elf_type): Use ELFOSABI_GNU name instead of
	ELFOSABI_LINUX alias.
	* config/tc-ia64.c: Likewise.

	include/elf/
	* common.h (ELFOSABI_GNU): Define, replaces...
	(ELFOSABI_LINUX): ... this, kept as an alias.
	(ELFOSABI_HURD): Remove.

	ld/testsuite/
	* ld-ifunc/ifunc.exp: Update for changed output.
	* ld-unique/unique.exp: Likewise.
 2011-07-03 13:37:09 +00:00
Nick Clifton
5f4cb1986d * gas/arm/addthumb2err.s: New test file. 
* gas/arm/addthumb2err.d: Test control file.
	* gas/arm/addthumb2err.l: Expected error messages.

	* config/tc-arm.c (do_t_add_sub): Only allow LSL shifts of less
	than 4 in Thumb mode.
 2011-06-30 13:42:46 +00:00
Nick Clifton
08f10d51f9 PR gas/12848 
* config/tc-arm.c (BAD_RANGE): New error message define.
	(md_apply_fix): Use it.
	Fix range check for thumb branch instructions.
 2011-06-30 12:52:58 +00:00
Richard Sandiford
a4e064680b gas/ 
* config/tc-mips.c (append_method): New enum.
	(can_swap_branch_p, get_append_method): New functions.
	(append_insn): Use get_append_method to decide how the instruction
	should be added.
 2011-06-29 21:05:29 +00:00
Richard Sandiford
9fe77896a7 gas/ 
* config/tc-mips.c (append_insn): Remove bogus goto.
 2011-06-29 20:48:10 +00:00
Richard Sandiford
13408f1edd gas/ 
* config/tc-mips.c (append_insn): Always clear the history after an
	unconditional branch.
 2011-06-29 20:46:10 +00:00
Richard Sandiford
ceb94aa50d gas/ 
* config/tc-mips.c (find_altered_mips16_opcode): New function.
	(append_insn): Use it.

opcodes/
	* mips16-opc.c (jalrc, jrc): Move earlier in file.
 2011-06-29 20:42:48 +00:00
Richard Sandiford
4c26037942 gas/ 
* config/tc-mips.c (insn_uses_reg): Delete.
	(gpr_read_mask, gpr_write_mask): New functions.
	(fpr_read_mask, fpr_write_mask): Likewise.
	(insns_between, nops_for_vr4130, append_insn): Use them.

gas/testsuite/
	* gas/mips/mips16-e.d, gas/mips/mips16-f.d,
	gas/mips/mipsel16-e.d, gas/mips/mipsel16-f.d,
	gas/mips/tmips16-e.d, gas/mips/tmips16-f.d,
	gas/mips/tmipsel16-e.d, gas/mips/tmipsel16-f.d: Fix GPR mask.
	* gas/mips/reginfo-1.s, gas/mips/reginfo-1a.d,
	gas/mips/reginfo-1b.d: New tests.
	* gas/mips/mips.exp: Run them.
 2011-06-29 20:39:00 +00:00
Richard Sandiford
02b1ab82d7 gas/ 
* config/tc-mips.c (md_mips_end): Call mips_emit_delays.

gas/testsuite/
	* gas/mips/24k-triple-stores-9.d: Add -z to dump options and
	explicitly match one nop.
	* gas/mips/24k-triple-stores-10.d: Likewise.
	* gas/mips/24k-triple-stores-11.d: Likewise.
	* gas/mips/lifloat.d: Likewise.
	* gas/mips/trunc.d: Likewise 1 extra nop.
	* gas/mips/vr4111.d: Likewise 2 nops.
 2011-06-29 20:35:05 +00:00
Nick Clifton
49c62a3353 PR gas/12931 
* config/tc-arm.c (mapping_state): When changing to ARM or THUMB
	state set the minimum required alignment of the section.
 2011-06-29 16:29:38 +00:00
Tristan Gingold
7016a5d53d 2011-06-29 Tristan Gingold <gingold@adacore.com> 
* config/tc-i386.c (i386_mach): Convert to ISO-C.
	(md_begin, pe_directive_secrel, md_estimate_size_before_relax): Ditto.
	(md_convert_frag, md_apply_fix, md_undefined_symbol): Ditto.
	(md_section_align, tc_gen_reloc): Ditto.
 2011-06-29 11:12:25 +00:00
Tristan Gingold
af24f60c6d 2011-06-28 Tristan Gingold <gingold@adacore.com> 
* config/tc-alpha.c (s_alpha_pdesc): Fix indentation. Do not
	generate dummy fix.
 2011-06-28 13:33:33 +00:00
Tristan Gingold
e1f4d6bd07 2011-06-28 Tristan Gingold <gingold@adacore.com> 
* config/tc-alpha.c (load_expression): Use alloca instead of xmalloc.
	(emit_jsrjmp): Ditto.
	(tc_gen_reloc): Ditto.
 2011-06-28 09:23:53 +00:00
Tristan Gingold
4b1c4d2b62 2011-06-28 Tristan Gingold <gingold@adacore.com> 
* config/tc-alpha.c (alpha_evax_proc_hash): Remove.
	(alpha_evax_proc_data): New variable.
	(s_alpha_ent): Prevent nested function.  Remove has_insert call.
	(s_alpha_pdesc): Do not call demand_empty_rest_of_line in case of
	error.  Do not search in the hash table.  Check if match with .ent.
	(s_alpha_name): Remove unused variable.
	(md_begin): Remove initialization of alpha_evax_proc_hash.
 2011-06-28 07:40:16 +00:00
Tristan Gingold
8aacb050e6 2011-06-27 Tristan Gingold <gingold@adacore.com> 
* config/tc-alpha.c (add_to_link_pool): Remove basesym parameter.
	Locally declare basesym.  Add comments.  Do not set literal_pool_size.
	(load_expression): Adjust call to add_to_link_pool.
	(s_alpha_pdesc): Define pdesc symbol using dot.
	Do not set literal_pool_size.
	(s_alpha_end): Use NULL instead of 0.
 2011-06-27 14:08:15 +00:00
Tristan Gingold
bb1d425616 2011-06-27 Tristan Gingold <gingold@adacore.com> 
* config/obj-evax.c (evax_frob_file_before_adjust): Add comments.
	Fix style.
	* config/obj-evax.h (struct alpha_linkage_fixups): Remove seg
	field.  Add comments.
	(obj_symbol_type, object_headers, OBJ_SYMFIELD_TYPE): Remove
 2011-06-27 10:03:42 +00:00
Richard Sandiford
cec256b1fc Remove previous patch, committed in error. 2011-06-26 09:19:17 +00:00
Richard Sandiford
96124ee0cf gas/ 
* config/tc-mips.c (insn_uses_reg): Delete.
	(gpr_read_mask, gpr_write_mask): New functions.
	(fpr_read_mask, fpr_write_mask): Likewise.
	(insns_between, nops_for_vr4130, append_insn): Use them.

gas/testsuite/
	* gas/mips/mips16-e.d, gas/mips/mips16-f.d,
	gas/mips/mipsel16-e.d, gas/mips/mipsel16-f.d,
	gas/mips/tmips16-e.d, gas/mips/tmips16-f.d,
	gas/mips/tmipsel16-e.d, gas/mips/tmipsel16-f.d: Fix GPR mask.
 2011-06-26 09:16:35 +00:00
Richard Sandiford
ab9794cf6a gas/ 
* config/tc-mips.c (fix_24k_record_store_info): If the previous
	instruction was a store, and the next instructions are unknown,
	assume the worst.

gas/testsuite/
	* gas/mips/24k-branch-delay-1.d: Do not allow stores to be put
	into delay slots.
	* gas/mips/24k-triple-stores-1.d: Put the first nop after the
	second store, rather than the first.
	* gas/mips/24k-triple-stores-2.d: Likewise.
	* gas/mips/24k-triple-stores-4.d: Likewise.
	* gas/mips/24k-triple-stores-8.d: Likewise.
	* gas/mips/24k-triple-stores-3.d: Remove first nop.
	* gas/mips/24k-triple-stores-5.d: Likewise.
	* gas/mips/24k-triple-stores-6.d: Likewise.
	* gas/mips/24k-triple-stores-7.d: Likewise.
	* gas/mips/24k-triple-stores-9.d: Add a nop after the second store.
	Expect a nop at the end.
	* gas/mips/24k-triple-stores-10.d: Put the first nop after the
	second store, rather than the first.  Expect a nop at the end.
 2011-06-26 08:32:50 +00:00
Richard Sandiford
932d1a1b03 gas/ 
PR gas/12915
	* config/tc-mips.c (nops_for_vr4130, nops_for_24k, nops_for_insn)
	(nops_for_sequence, nops_for_insn_or_target): Add ignore parameters.
	(mips_emit_delays, start_noreorder): Update accordingly.
	(append_insn): Likewise.  Revert original fix for this PR
	and use the ignore parameter instead.

gas/testsuite/
	* gas/mips/vr4130.s: Add some more ".set noreorder" tests.
	* gas/mips/vr4130.d: Update accordingly.
 2011-06-25 10:11:46 +00:00
Tristan Gingold
e3a9940106 2011-06-24 Tristan Gingold <gingold@adacore.com> 
PR gas/11625
	* config/obj-evax.c (evax_frob_symbol): Use as_bad instead of abort.
 2011-06-24 15:44:41 +00:00
Tristan Gingold
576d330713 2011-06-24 Tristan Gingold <gingold@adacore.com> 
* config/tc-alpha.c (add_to_link_pool): Remove useless offset
	variable.  Fix style.
 2011-06-24 15:16:03 +00:00
Richard Sandiford
f77ef3e29a gas/ 
PR gas/12915
	* config/tc-mips.c (append_insn): Only consider hazards between the
	pre-noreorder block and ip.

gas/testsuite/
	* gas/mips/pr12915.s, gas/mips/pr12915.d: New test.
	* gas/mips/mips.exp: Run it.
 2011-06-23 20:21:38 +00:00
Matthew Gretton-Dann
5f1af56b76 2011-06-21 Sameera Deshpande <sameera.deshpande@arm.com> 
* gas/config/tc-arm.c (vfp_conv): Add check on range of immediate operand
	in vcvt instruction between floating-point and fixed-point.
	(operand_parse_code): Add "OP_oI32z".
	(parse_operands): OP_oI32z case added.
	* gas/testsuite/gas/arm/vcvt-bad.d: New test.
	* gas/testsuite/gas/arm/vcvt-bad.l: Likewise.
	* gas/testsuite/gas/arm/vcvt-bad.s: Likewise.
	* gas/testsuite/gas/arm/vcvt.d: Likewise.
	* gas/testsuite/gas/arm/vcvt.s: Likewise.
 2011-06-21 15:34:27 +00:00
Tristan Gingold
2fb4b302aa gas/ 
2011-06-14  Tristan Gingold  <gingold@adacore.com>

	* config/tc-ppc.h (struct ppc_tc_sy): Complete comment on within.
	(tc_new_dot_label): Define.
	(ppc_new_dot_label): Declare.
	* config/tc-ppc.c (ppc_frob_label): Set within target field.
	(ppc_fix_adjustable): Use this field to adjust the reloc.
	(ppc_new_dot_label): New function.


gas/testsuite/
2011-06-14  Tristan Gingold  <gingold@adacore.com>

	* gas/ppc/test1xcoff32.d: Adjust for csect anchor.
 2011-06-14 09:03:52 +00:00
Nick Clifton
aa137e4d51 * Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. 
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
    (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
    and elfxx-tilegx.lo.
    (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
    elfxx-tilegx.c.
    (BFD64_BACKENDS): Add elf64-tilegx.lo.
    (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
    * Makefile.in: Regenerate.
    * arctures.c (bfd_architecture): Define bfd_arch_tilepro,
    bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
    (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
    (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
    bfd-in2.h: Regenerate.
    * config.bfd: Handle tilegx-*-* and tilepro-*-*.
    * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * configure: Regenerate.
    * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
    TILEPRO_ELF_DATA.
    * libbfd.h: Regenerate.
    * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
    RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
    IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
    IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
    IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
    IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
    IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
    IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
    IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
    IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
    MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
    IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
    IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
    IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
    IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
    IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
    IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
    HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
    JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
    DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
    SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
    IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
    IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
    IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
    IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
    IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
    IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
    IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
    IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
    IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
    IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
    IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
    IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
    IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
    IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
    IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
    IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
    IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
    IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
    IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
    IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
    IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
    IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
    IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
    IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
    IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
    IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
    IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
    TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    * targets.c (bfd_elf32_tilegx_vec): Declare.
    (bfd_elf32_tilepro_vec): Declare.
    (bfd_elf64_tilegx_vec): Declare.
    (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * cpu-tilegx.c: New file.
    * cpu-tilepro.c: New file.
    * elf32-tilepro.h: New file.
    * elf32-tilepro.c: New file.
    * elf32-tilegx.c: New file.
    * elf32-tilegx.h: New file.
    * elf64-tilegx.c: New file.
    * elf64-tilegx.h: New file.
    * elfxx-tilegx.c: New file.
    * elfxx-tilegx.h: New file.

	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
	config/tc-tilepro.c.
	(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
	config/tc-tilepro.h.
	* Makefile.in: Regenerate.
	* configure.tgt (tilepro-*-*): New.
	(tilegx-*-*): Likewise.
	* config/tc-tilegx.c: New file.
	* config/tc-tilegx.h: Likewise.
	* config/tc-tilepro.h: Likewise.
	* config/tc-tilepro.c: Likewise.
	* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
	c-tilepro.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TILEGX): Define.
	(TILEPRO): Define.
	* doc/as.texinfo: Add Tile-Gx and TILEPro documentation.  Include
	c-tilegx.texi and c-tilepro.texi.
	* doc/c-tilegx.texi: New.
	* doc/c-tilepro.texi: New.

        * gas/tilepro/t_constants.s: New file.
	* gas/tilepro/t_constants.d: Likewise.
	* gas/tilepro/t_insns.s: Likewise.
	* gas/tilepro/tilepro.exp: Likewise.
	* gas/tilepro/t_insns.d: Likewise.
	* gas/tilegx/tilegx.exp: Likewise.
	* gas/tilegx/t_insns.d: Likewise.
	* gas/tilegx/t_insns.s: Likewise.

	* dis-asm.h (print_insn_tilegx): Declare.
	(print_insn_tilepro): Likewise.

	* tilegx.h: New file.
	* tilepro.h: New file.

	* common.h: Add EM_TILEGX.
	* tilegx.h: New file.
	* tilepro.h: New file.

	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
	eelf32tilepro.c.
	(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
	(eelf32tilegx.c): New target.
	(eelf32tilepro.c): Likewise.
	(eelf64tilegx.c): Likewise.
	* Makefile.in: Regenerate.
	* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
	* emulparams/elf32tilegx.sh: New file.
	* emulparams/elf64tilegx.sh: New file.
	* emulparams/elf32tilepro.sh: New file.

	* ld-elf/eh5.d: Don't run on tile*.
	* ld-srec/srec.exp: xfail on tile*.
	* ld-tilegx/external.s: New file.
	* ld-tilegx/reloc.d: New file.
	* ld-tilegx/reloc.s: New file.
	* ld-tilegx/tilegx.exp: New file.
	* ld-tilepro/external.s: New file.
	* ld-tilepro/reloc.d: New file.
	* ld-tilepro/reloc.s: New file.
	* ld-tilepro/tilepro.exp: New file.

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
	tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
	* Makefile.in: Regenerate.
	* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
	* po/POTFILES.in: Regenerate.
	* tilegx-dis.c: New file.
	* tilegx-opc.c: New file.
	* tilepro-dis.c: New file.
	* tilepro-opc.c: New file.
 2011-06-13 15:18:54 +00:00
Nick Clifton
af199b0601 PR gas/12854 
Add additional checks for extraneous shifts and extra tests in the testsuite.
 2011-06-13 12:50:18 +00:00
Nick Clifton
94342ec38b PR gas/12854 
* gas/arm/shift-bad.s: New test.
	* gas/arm/shift-bad.l: Expcted error output.
	* gas/arm/shift-bad.s: New control file.

	* config/tc-arm.c (do_shift): Do not allow shift operations at the
	end of a register based shift insn.
	(do_t_shift): Likewise.
 2011-06-13 09:57:35 +00:00
Nick Clifton
f9e53abc4a * config/tc-score.c (s3_my_get_expression): Delete unused local 
variable 'seg'.
	(s3_do_ldst_insn): Delete unused local variable 'strbak'.
	(s3_do16_ldst_insn): Delete unused local variable 'temp'.
	(s3_do_macro_bcmp): Zero inst_expand array.
	(s3_do_macro_bcmpz): Likewise.
	(s3_s_score_end): Delete unused local variable 'dot'.
	(s3_gen_reloc): Delete unused local variables 'f', 's', and 'e'.
	* config/tc-score7.c (s7_my_get_expression): Delete unused local
	variable 'seg'.
	(s7_do_ldst_insn): Delete unused local variable 'strbak'.
	(s7_b32_relax_to_b16): Delete unused local variables 'r_old' and
	'r_new'.
	(s7_s_score_end): Delete unused local variable 'dot'.
	(s7_relax_frag): Delete unused local variable 'relax_size'.
	(s7_gen_reloc): Delete unused local variables 'f', 's', and 'e'.
 2011-06-13 09:45:28 +00:00
H.J. Lu
6c30d220f1 Support AVX Programming Reference (June, 2011). 
gas/

2011-06-10  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (June, 2011)
	* config/tc-i386.c (i386_error): Add invalid_vsib_address and
	unsupported_vector_index_register.
	(cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
	(check_VecOperands): New.
	(match_template): Call check_VecOperands.  Handle
	invalid_vsib_address and unsupported_vector_index_register.
	(build_modrm_byte): Support VecSIB.  Check register-only source
	operand when two source operands are swapped.
	(i386_index_check): Allow Xmm/Ymm index registers.

	* doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
	and invpcid./invpcid.

gas/testsuite/

2011-06-10  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (June, 2011)
	* gas/i386/arch-10-1.l: Updated.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.

	* gas/i386/arch-10.s: Add LZCNT to comments.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/arch-10-lzcnt.d: New.
	* gas/i386/avx-gather-intel.d: Likewise.
	* gas/i386/avx-gather.d: Likewise.
	* gas/i386/avx-gather.s: Likewise.
	* gas/i386/avx2-intel.d: Likewise.
	* gas/i386/avx2.d: Likewise.
	* gas/i386/avx2.s: Likewise
	* gas/i386/avx256int-intel.d: Likewise.
	* gas/i386/avx256int.d: Likewise.
	* gas/i386/avx256int.s: Likewise.
	* gas/i386/bmi2-intel.d: Likewise.
	* gas/i386/bmi2.d: Likewise.
	* gas/i386/bmi2.s: Likewise.
	* gas/i386/inval-invpcid.l:Likewise.
	* gas/i386/inval-invpcid.s: Likewise.
	* gas/i386/invpcid-intel.d: Likewise.
	* gas/i386/invpcid.d: Likewise.
	* gas/i386/invpcid.s: Likewise.
	* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
	* gas/i386/x86-64-avx-gather-intel.d: Likewise.
	* gas/i386/x86-64-avx-gather.d: Likewise.
	* gas/i386/x86-64-avx-gather.s: Likewise.
	* gas/i386/x86-64-avx2-intel.d: Likewise.
	* gas/i386/x86-64-avx2.d: Likewise.
	* gas/i386/x86-64-avx2.s: Likewise.
	* gas/i386/x86-64-avx256int-intel.d: Likewise.
	* gas/i386/x86-64-avx256int.d: Likewise.
	* gas/i386/x86-64-avx256int.s: Likewise.
	* gas/i386/x86-64-bmi2-intel.d: Likewise.
	* gas/i386/x86-64-bmi2.d: Likewise.
	* gas/i386/x86-64-bmi2.s: Likewise.
	* gas/i386/x86-64-inval-invpcid.l: Likewise.
	* gas/i386/x86-64-inval-invpcid.s: Likewise.
	* gas/i386/x86-64-invpcid-intel.d: Likewise.
	* gas/i386/x86-64-invpcid.d: Likewise.
	* gas/i386/x86-64-invpcid.s: Likewise.

opcodes/

2011-06-10  H.J. Lu  <hongjiu.lu@intel.com>

	AVX Programming Reference (June, 2011)
	* i386-dis.c (XMGatherQ): New.
	* i386-dis.c (EXxmm_mb): New.
	(EXxmm_mb): Likewise.
	(EXxmm_mw): Likewise.
	(EXxmm_md): Likewise.
	(EXxmm_mq): Likewise.
	(EXxmmdw): Likewise.
	(EXxmmqd): Likewise.
	(VexGatherQ): Likewise.
	(MVexVSIBDWpX): Likewise.
	(MVexVSIBQWpX): Likewise.
	(xmm_mb_mode): Likewise.
	(xmm_mw_mode): Likewise.
	(xmm_md_mode): Likewise.
	(xmm_mq_mode): Likewise.
	(xmmdw_mode): Likewise.
	(xmmqd_mode): Likewise.
	(ymmxmm_mode): Likewise.
	(vex_vsib_d_w_dq_mode): Likewise.
	(vex_vsib_q_w_dq_mode): Likewise.
	(MOD_VEX_0F385A_PREFIX_2): Likewise.
	(MOD_VEX_0F388C_PREFIX_2): Likewise.
	(MOD_VEX_0F388E_PREFIX_2): Likewise.
	(PREFIX_0F3882): Likewise.
	(PREFIX_VEX_0F3816): Likewise.
	(PREFIX_VEX_0F3836): Likewise.
	(PREFIX_VEX_0F3845): Likewise.
	(PREFIX_VEX_0F3846): Likewise.
	(PREFIX_VEX_0F3847): Likewise.
	(PREFIX_VEX_0F3858): Likewise.
	(PREFIX_VEX_0F3859): Likewise.
	(PREFIX_VEX_0F385A): Likewise.
	(PREFIX_VEX_0F3878): Likewise.
	(PREFIX_VEX_0F3879): Likewise.
	(PREFIX_VEX_0F388C): Likewise.
	(PREFIX_VEX_0F388E): Likewise.
	(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
	(PREFIX_VEX_0F38F5): Likewise.
	(PREFIX_VEX_0F38F6): Likewise.
	(PREFIX_VEX_0F3A00): Likewise.
	(PREFIX_VEX_0F3A01): Likewise.
	(PREFIX_VEX_0F3A02): Likewise.
	(PREFIX_VEX_0F3A38): Likewise.
	(PREFIX_VEX_0F3A39): Likewise.
	(PREFIX_VEX_0F3A46): Likewise.
	(PREFIX_VEX_0F3AF0): Likewise.
	(VEX_LEN_0F3816_P_2): Likewise.
	(VEX_LEN_0F3819_P_2): Likewise.
	(VEX_LEN_0F3836_P_2): Likewise.
	(VEX_LEN_0F385A_P_2_M_0): Likewise.
	(VEX_LEN_0F38F5_P_0): Likewise.
	(VEX_LEN_0F38F5_P_1): Likewise.
	(VEX_LEN_0F38F5_P_3): Likewise.
	(VEX_LEN_0F38F6_P_3): Likewise.
	(VEX_LEN_0F38F7_P_1): Likewise.
	(VEX_LEN_0F38F7_P_2): Likewise.
	(VEX_LEN_0F38F7_P_3): Likewise.
	(VEX_LEN_0F3A00_P_2): Likewise.
	(VEX_LEN_0F3A01_P_2): Likewise.
	(VEX_LEN_0F3A38_P_2): Likewise.
	(VEX_LEN_0F3A39_P_2): Likewise.
	(VEX_LEN_0F3A46_P_2): Likewise.
	(VEX_LEN_0F3AF0_P_3): Likewise.
	(VEX_W_0F3816_P_2): Likewise.
	(VEX_W_0F3818_P_2): Likewise.
	(VEX_W_0F3819_P_2): Likewise.
	(VEX_W_0F3836_P_2): Likewise.
	(VEX_W_0F3846_P_2): Likewise.
	(VEX_W_0F3858_P_2): Likewise.
	(VEX_W_0F3859_P_2): Likewise.
	(VEX_W_0F385A_P_2_M_0): Likewise.
	(VEX_W_0F3878_P_2): Likewise.
	(VEX_W_0F3879_P_2): Likewise.
	(VEX_W_0F3A00_P_2): Likewise.
	(VEX_W_0F3A01_P_2): Likewise.
	(VEX_W_0F3A02_P_2): Likewise.
	(VEX_W_0F3A38_P_2): Likewise.
	(VEX_W_0F3A39_P_2): Likewise.
	(VEX_W_0F3A46_P_2): Likewise.
	(MOD_VEX_0F3818_PREFIX_2): Removed.
	(MOD_VEX_0F3819_PREFIX_2): Likewise.
	(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
	(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
	(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
	(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
	(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
	(VEX_LEN_0F3A0E_P_2): Likewise.
	(VEX_LEN_0F3A0F_P_2): Likewise.
	(VEX_LEN_0F3A42_P_2): Likewise.
	(VEX_LEN_0F3A4C_P_2): Likewise.
	(VEX_W_0F3818_P_2_M_0): Likewise.
	(VEX_W_0F3819_P_2_M_0): Likewise.
	(prefix_table): Updated.
	(three_byte_table): Likewise.
	(vex_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(putop): Handle "LW".
	(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
	xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
	vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
	(OP_EX): Likewise.
	(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
	vex_vsib_q_w_dq_mode.
	(OP_XMM): Handle vex_vsib_q_w_dq_mode.
	(OP_VEX): Likewise.

	* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
	and CPU_ANY_AVX_FLAGS.  Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
	CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
	(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
	(opcode_modifiers): Add VecSIB.

	* i386-opc.h (CpuAVX2): New.
	(CpuBMI2): Likewise.
	(CpuLZCNT): Likewise.
	(CpuINVPCID): Likewise.
	(VecSIB128): Likewise.
	(VecSIB256): Likewise.
	(VecSIB): Likewise.
	(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
	(i386_opcode_modifier): Add vecsib.

	* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2011-06-10 21:27:40 +00:00
Nick Clifton
fd596c16fb PR gas/12861 
* config/tc-cr16.c (tc_gen_reloc): Remove unused local variable
	code.
	(check_cinv_options): Remove unused local variables.  Make
	function void.
	(md_assemble): Remove unused local variable.
 2011-06-09 15:43:52 +00:00
Richard Earnshaw
c56791bbad 2011-06-09 James Greenhalgh <james.greenhalgh@arm.com> 
* config/tc-arm.c (do_ldrd): Warn in unpredictable cases.

2011-06-09  James Greenhalgh  <james.greenhalgh@arm.com>

	* gas/arm/ldrd-unpredicatble.d: New testcase.
	* gas/arm/ldrd-unpredicatble.s: Likewise.
	* gas/arm/ldrd-unpredicatble.l: Likewise.
 2011-06-09 09:59:34 +00:00
Nick Clifton
a4482bb643 PR gas/12698 
* config/tc-arm.c (parse_psr): Set m_profile to false when
	assembling for any architecture.
 2011-06-03 14:42:47 +00:00
Nathan Sidwell
26d97720ed gas/ 
* config/tc-arm.c (parse_address_main): Handle -0 offsets.
	(encode_arm_addr_mode_2): Set default sign of zero here ...
	(encode_arm_addr_mode_3): ... and here.
	(encode_arm_cp_address): ... and here.
	(md_apply_fix): Use default sign of zero here.

	gas/testsuite/
	* gas/arm/inst.d: Adjust for signed zero offsets.
	* gas/arm/ldst-offset0.d: New test.
	* gas/arm/ldst-offset0.s: New test.
	* gas/arm/offset-1.d: New test.
	* gas/arm/offset-1.s: New test.

	ld/testsuite/
	Adjust tests for zero offset formatting.
	* ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
	* ld-arm/farcall-arm-arm-pic-veneer.d: Adjust.
	* ld-arm/farcall-arm-thumb.d: Adjust.
	* ld-arm/farcall-group-size2.d: Adjust.
	* ld-arm/farcall-group.d: Adjust.
	* ld-arm/farcall-mix.d: Adjust.
	* ld-arm/farcall-mix2.d: Adjust.
	* ld-arm/farcall-mixed-lib-v4t.d: Adjust.
	* ld-arm/farcall-mixed-lib.d: Adjust.
	* ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust.
	* ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust.
	* ld-arm/farcall-thumb-thumb.d: Adjust.
	* ld-arm/ifunc-10.dd: Adjust.
	* ld-arm/ifunc-3.dd: Adjust.
	* ld-arm/ifunc-4.dd: Adjust.
	* ld-arm/ifunc-5.dd: Adjust.
	* ld-arm/ifunc-6.dd: Adjust.
	* ld-arm/ifunc-7.dd: Adjust.
	* ld-arm/ifunc-8.dd: Adjust.
	* ld-arm/jump-reloc-veneers-long.d: Adjust.
	* ld-arm/tls-longplt-lib.d: Adjust.
	* ld-arm/tls-thumb1.d: Adjust.

	opcodes/
	* arm-dis.c (print_insn_coprocessor): Explicitly print #-0
	as address offset.
	(print_arm_address): Likewise. Elide positive #0 appropriately.
	(print_insn_arm): Likewise.
 2011-06-02 15:32:10 +00:00
Nick Clifton
cc643b88f1 Fix spelling mistakes. 2011-06-02 13:43:24 +00:00
Paul Brook
3b2f079304 2011-05-31 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (arm_cpus): Add Cortex-R5.
	(arm_extensions): Allow idiv on ARMv7-R.
	* doc/c-arm.text: Update idiv extension restrictions.

	gas/testsuite/
	* gas/arm/arm-idiv-bad.d: New test.
	* gas/arm/arm-idiv-bad.s: New test.
	* gas/arm/arm-idiv-bad.l: New test.
	* gas/arm/arm-idiv.d: New test.
	* gas/arm/arm-idiv.s: New test.

	include/
	* opcode/arm.h (ARM_ARCH_V7R_IDIV): Define.
 2011-05-31 14:12:55 +00:00
Paul Brook
b58843019a 2011-05-31 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (arm_force_relocation): Resolve all pc-relative
	loads.

	gas/testsuite/
	* gas/arm/ldr-global.d: New test.
	* gas/arm/ldr-global.s: New test.
 2011-05-31 14:10:07 +00:00
Paul Brook
10960bfbce 2011-05-31 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (do_t_branch): Avoid relaxing branches to constant
	addresses.

	gas/testsuite/
	* arm/t2-branch-global.d: New test.
	* arm/t2-branch-global.s: New test.
 2011-05-31 14:04:13 +00:00
Paul Brook
6e7ce2cdd3 2011-05-31 Paul Brook <paul@codesourcery.com> 
Nathan Sidwell  <nathan@codesourcery.com>

	gas/
	* config/tc-arm.c (fix_new_arm): Create an absolute symbol for
	pc-relative fixes to constants.
	* config/tc-arm.h (TC_FORCE_RELOCATATION_ABS): Define.

	ld/testsuite/
	* ld-arm/abs-call-1.d: New.
	* ld-arm/abs-call-1.s: New.
	* ld-arm/arm-elf.exp: Add it.
 2011-05-31 13:40:04 +00:00
Nick Clifton
8e1adb8d3c * config/tc-s390.c (md_begin): Remove unused variable dup_insn. 2011-05-27 12:56:06 +00:00
Andreas Krebbel
c8fa16ed5a 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* config/tc-s390.c (md_gather_operands): Fix check for floating
	    register pair operands.

2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	    * opcode/s390.h: Replace S390_OPERAND_REG_EVEN with
	    S390_OPERAND_REG_PAIR.

2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	    * s390-opc.c: Replace S390_OPERAND_REG_EVEN with
	    S390_OPERAND_REG_PAIR.  Fix INSTR_RRF_0UFEF instruction type.
	    * s390-opc.txt: Fix cxr instruction type.

2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	    * gas/s390/esa-g5.d: Fix fp register pair operands.
	    * gas/s390/esa-g5.s: Likewise.
	    * gas/s390/zarch-z196.d: Likewise.
	    * gas/s390/zarch-z196.s: Likewise.
	    * gas/s390/zarch-z9-109.d: Likewise.
	    * gas/s390/zarch-z9-109.s: Likewise.
	    * gas/s390/zarch-z9-ec.d: Likewise.
	    * gas/s390/zarch-z9-ec.s: Likewise.
 2011-05-24 16:13:31 +00:00
Andreas Krebbel
5e4b319cdc 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* config/tc-s390.c (md_gather_operands): Emit an error for odd
	numbered registers used as register pair operand.

2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* opcode/s390.h: Add S390_OPCODE_REG_EVEN flag.

2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-opc.c: Add new instruction types marking register pair
	operands.
	* s390-opc.txt: Match instructions having register pair operands
	to the new instruction types.

2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/esa-g5.d: Fix register pair operands.
	* gas/s390/esa-g5.s: Likewise.
	* gas/s390/esa-z9-109.d: Likewise.
	* gas/s390/esa-z9-109.s: Likewise.
	* gas/s390/zarch-z196.d: Likewise.
	* gas/s390/zarch-z196.s: Likewise.
	* gas/s390/zarch-z9-109.d: Likewise.
	* gas/s390/zarch-z9-109.s: Likewise.
	* gas/s390/zarch-z900.d: Likewise.
	* gas/s390/zarch-z900.s: Likewise.
	* gas/s390/zarch-z990.d: Likewise.
	* gas/s390/zarch-z990.s: Likewise.
 2011-05-24 13:33:57 +00:00
Nick Clifton
56d0a8a122 * config/tc-v850.h (TC_FX_SIZE_SLACK): Define. 2011-05-23 09:29:00 +00:00
Bernd Schmidt
4a73203297 ld/testsuite/ 
* ld-tic6x/pcr-reloc.d: New test.
	* ld-tic6x/pcr-reloc.s: New test.

	gas/testsuite/
	* gas/tic6x/pcr-relocs.d: New test.
	* gas/tic6x/pcr-relocs.s: New test.
	* gas/tic6x/pcr-relocs-undef.d: New test.
	* gas/tic6x/pcr-relocs-undef.s: New test.
	* gas/tic6x/reloc-bad-2.s: Update for pcr_offset.
	* gas/tic6x/reloc-bad-2.l: Update for pcr_offset.

	bfd/
	* elf32-tic6x.c (elf32_tic6x_howto_table): Add entries for
	R_C6000_PCR_H16 and R_C6000_PCR_L16.
	(elf32_tic6x_relocate_section): Handle them.

	gas/
	* config/tc-tic6x.c (tic6x_operators): Add "pcr_offset".
	(tic6x_parse_name): Handle it.
	(tic6x_fix_new_exp): Handle O_pcr_offset.
	(tic6x_fix_adjustable): Return 0 for the new relocs.
	(md_apply_fix): Handle them.
	(tc_gen_reloc): Likewise.
	* config/tc-tic6x.h (tic6x_fix_info): Add a fix_subsy member.
 2011-05-20 10:10:00 +00:00
Nick Clifton
d0da06e2df PR gas/12754 
* config/tc-tic30.c (ordinal_names): Allow translation of the
	ordinal names.
 2011-05-18 13:52:44 +00:00
Nick Clifton
a1727c1a6c * config/tc-arm.c (s_unreq): Reword warning message to make it 
easier to translate.
	* config/tc-ia64.c (md_show_usage): Add note for translators.
	* configure.in (ALL_LINGUAS): Add "fi".
	* configure: Regenerate.
 2011-05-18 09:41:15 +00:00
Tristan Gingold
85645aed85 bfd 
2011-05-18  Tristan Gingold  <gingold@adacore.com>

	* libxcoff.h (struct xcoff_dwsect_name): New type.
	(XCOFF_DWSECT_NBR_NAMES): New macro.
	(xcoff_dwsect_names): Declare.
	* coffcode.h (sec_to_styp_flags): Handle xcoff dwarf sections.
	(styp_to_sec_flags): Ditto.
	(coff_new_section_hook): Ditto.
	(coff_slurp_symbol_table): Handle C_DWARF and C_INFO.
	* coff-rs6000.c (xcoff_dwsect_name): New variable.

gas
2011-05-18  Tristan Gingold  <gingold@adacore.com>

	* config/tc-ppc.h (ppc_tc_sy): Reorder fields.
	Put size into an union with dw.
	(OBJ_COPY_SYMBOL_ATTRIBUTES): Adjust.
	(ppc_xcoff_end): Declare.
	(md_end): Define.
	* config/tc-ppc.c: Add includes for xcoff.
	(ppc_dwsect): New function.
	(md_pseudo_table): Add dwsect.
	(struct dw_subsection): New.
	(dw_sections): New.
	(ppc_change_debug_section): New function.
	(ppc_xcoff_end): Ditto.
	(ppc_function): Adjust for ppc_tc_sy.
	(ppc_symbol_new_hook): Ditto.
	(ppc_frob_symbol): Ditto.
	(ppc_frob_section): Do not set vma for debug sections.
	(ppc_fix_adjustable): Return true for debug sections.
	* config/obj-coff.c: Add includes for xcoff.
	(coff_frob_section): Handle dwarf section.

gas/testsuite
2011-05-18  Tristan Gingold  <gingold@adacore.com>

	* gas/ppc/xcoff-dwsect-1-32.d: New test.
	* gas/ppc/xcoff-dwsect-1-64.d: Ditto.
	* gas/ppc/xcoff-dwsect-1.s: New file.
	* gas/ppc/aix.exp (do_align_test): Add tests.
 2011-05-18 07:58:36 +00:00
Nick Clifton
9fd07943ff * config/tc-m32r.c (md_show_usage): Fix typos in descriptions. 
* config/tc-mt.c (md_assemble): Fix typos in warning messages.
	* cond.c (s_else): Fix typos in error messages.
	* config/tc-pj.c (md_assemble): Fix typo in error message.
 2011-05-17 16:15:59 +00:00
Hans-Peter Nilsson
0d7e0060b4 * config/tc-cris.c (md_parse_option) <OPTION_PIC>: Error if not 
emitting ELF object.
	(md_show_usage): Only mention --pic if the assembler can generate
	ELF objects.
	* doc/c-cris.texi (CRIS-Opt): Mention that generating ELF is a
	prerequisite for --pic being a valid option.
 2011-05-16 03:28:47 +00:00
Alan Modra
5648d7c7ee PR gas/12755 
* config/tc-v850.c (parse_register_list): Correct error string.
 2011-05-12 23:50:23 +00:00
Quentin Neill
8aedb9fe9e 2011-05-12 Quentin Neill <quentin.neill@amd.com> 
* config/tc-i386.c (cpu_arch): Rename PROCESSOR_BDVER1 to PROCESSOR_BD.
      (i386_align_code): Ditto
 2011-05-12 22:29:06 +00:00
Matthew Gretton-Dann
58ad575ff3 PR gas/12715 
* gas/config/tc-arm.c (parse_big_immediate):  Fix parsing of 64-bit
	immediates on 32-bit hosts.
	* gas/testsuite/gas/arm/neon-const.s: Add testcase for 64-bit Neon constants.
	* gas/testsuite/gas/arm/neon-const.d: Likewise.
 2011-05-12 12:41:45 +00:00
Nick Clifton
8d67f500e1 * config/tc-arm.c(do_t_ldst): Warn on loading into sp with 
writeback for appropriate cores/arch.
	* testsuite/gas/arm/ld-sp-warn-cortex-m3.d: New test.
	* testsuite/gas/arm/ld-sp-warn-cortex-m3.l: New test.
	* testsuite/gas/arm/ld-sp-warn-cortex-m4.d: New test.
	* testsuite/gas/arm/ld-sp-warn-cortex-m4.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7a.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7a.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7e-m.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7em.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7m.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7m.l: New test.
	* testsuite/gas/arm/ld-sp-warn-v7r.d: New test.
	* testsuite/gas/arm/ld-sp-warn-v7r.l: New test.
	* testsuite/gas/arm/ld-sp-warn.s: New test.
 2011-05-11 09:25:44 +00:00
Quentin Neill
af2f724ec4 2011-05-10 Quentin Neill <quentin.neill@amd.com> 
gas/
	* config/tc-i386.c (cpu_arch): Add bdver2 and rename
	PROCESSOR_BDVER1 to PROCESSOR_BDVER.
	(i386_align_code): Rename PROCESSOR_BDVER1.
	(processor_type): Ditto.
	* doc/c-i386.texi: Add bdver2.

opcodes/
	* i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS.
	* i386-init.h: Regenerated.

gas/testsuite/
	* gas/i386/i386.exp: Add new bdver2 test cases.
	* gas/i386/nops-1-bdver2.d: New.
	* gas/i386/x86-64-nops-1-bdver2.d: New.
 2011-05-10 22:02:27 +00:00
Paul Brook
1bce6bd86f 2011-05-09 Paul Brook <paul@codesourcery.com> 
bfd/
	* elf32-tic6x.c (is_tic6x_elf_unwind_section_name,
	elf32_tic6x_fake_sections): New functions.
	(elf_backend_fake_sections): Define.

	gas/
	* config/tc-tic6x.c (streq): Define.
	(tic6x_get_unwind): New.
	(s_tic6x_cantunwind, s_tic6x_handlerdata, s_tic6x_endp,
	s_tic6x_personalityindex, s_tic6x_personality): New functions.
	(md_pseudo_table): Add "endp", "handlerdata", "personalityindex",
	"personality" and "cantunwind".
	(tic6x_regname_to_dw2regnum, tic6x_frame_initial_instructions,
	tic6x_start_unwind_section, tic6x_unwind_frame_regs,
	tic6x_pop_rts_offset_little, tic6x_pop_rts_offset_big,
	tic6x_unwind_reg_from_dwarf, tic6x_flush_unwind_word,
	tic6x_unwind_byte, tic6x_unwind_2byte, tic6x_unwind_uleb,
	tic6x_cfi_startproc, output_exidx_entry, tic6x_output_unwinding,
	tic6x_cfi_endproc): New.
	* config/tc-tic6x.h (TIC6X_NUM_UNWIND_REGS): Define.
	(tic6x_unwind_info): New.
	(tic6x_segment_info_type): Add marked_pr_dependency, unwind and
	text_unwind.
	(TARGET_USE_CFIPOP, tc_regname_to_dw2regnum,
	tc_cfi_frame_initial_instructions, DWARF2_DEFAULT_RETURN_COLUMN,
	DWARF2_CIE_DATA_ALIGNMENT, tc_cfi_startproc, tc_cfi_endproc,
	tc_cfi_section_name): Define.
	* doc/c-tic6x.texi: Document new unwinding directives.
	* dw2gencfi.c (tc_cfi_startproc, tc_cfi_endproc): Add default
	definitions.
	(cfi_insn_data, fde_entry, CFI_adjust_cfa_offset, CFI_return_column,
	CFI_rel_offset, CFI_escape, CFI_signal_frame, CFI_val_encoded_addr):
	Move to dw2gencfi.h.
	(CFI_EMIT_target): Define.
	(dot_cfi_sections): Check tc_cfi_section_name.
	(dot_cfi_startproc): Use tc_cfi_startproc.
	(dot_cfi_endproc): Use tc_cfi_endproc.
	* dw2gencfi.h (cfi_insn_data, fde_entry, CFI_adjust_cfa_offset,
	CFI_return_column, CFI_rel_offset, CFI_escape, CFI_signal_frame,
	CFI_val_encoded_addr):  Move to here from dw2gencfi.c.

	gas/testsuite:
	* gas/tic6x/unwind-1.d: New test.
	* gas/tic6x/unwind-1.s: New test.
	* gas/tic6x/unwind-2.d: New test.
	* gas/tic6x/unwind-2.s: New test.
	* gas/tic6x/unwind-3.d: New test.
	* gas/tic6x/unwind-3.s: New test.
	* gas/tic6x/unwind-bad-1.d: New test.
	* gas/tic6x/unwind-bad-1.s: New test.
	* gas/tic6x/unwind-bad-1.l: New test.
	* gas/tic6x/unwind-bad-2.d: New test.
	* gas/tic6x/unwind-bad-2.s: New test.
	* gas/tic6x/unwind-bad-2.l: New test.

	include/
	* elf/tic6x.h (ELF_STRING_C6000_unwind,
	ELF_STRING_C6000_unwind_info, ELF_STRING_C6000_unwind_once,
	ELF_STRING_C6000_unwind_info_once): Define.
 2011-05-09 13:17:58 +00:00
Paul Brook
2fbb87f627 2011-05-03 Paul Brook <paul@codesourcery.com> 
bfd/
	* elf32-tic6x.c (elf32_tic6x_howto_table,
	elf32_tic6x_howto_table_rel, (elf32_tic6x_gc_sweep_hook,
	elf32_tic6x_relocate_section, elf32_tic6x_check_relocs):
	Add R_C6000_EHTYPE.

	gas/
	* config/tc-tic6x.c (s_ehtype): New function.
	(md_pseudo_table): Add "ehtype".
	(tic6x_fix_adjustable, md_apply_fix): BFD_RELOC_C6000_EHTYPE.
	* doc/c-tic6x.texi: Document .ehtype directive.

	ld/testsuite/
	* ld-tic6x/ehtype-reloc-1-rel.d: New test.
	* ld-tic6x/ehtype-reloc-1.d: New test.
	* ld-tic6x/ehtype-reloc-1.s: New test.
 2011-05-03 11:17:22 +00:00
Catherine Moore
15be625dff 2011-04-20 Catherine Moore <clm@codesourcery.com> 
David Ung <davidu@mips.com>

	* config/mips.c (mips_cl_insn): Add new field complete_p.
	(create_insn): Initialize complete_p to zero.
	(BASE_REG_EQ): New.
	(fix_24k_align_to): New.
	(fix_24k_store_info): Declare.
	(fix_24k_sort): New.
	(fix_24k_record_store_info): New.
	(nops_for_24k): New.
	(nops_for_insn): Call nops_for_24k.
	(append_insn): Move O_constant expression handling.
 2011-04-20 16:45:35 +00:00
Nick Clifton
00bbc0bdc6 * config/tc-arm.c (v7m_psrs): Revert previous delta. 
* gas/arm/mrs-msr-thumb-v7e-m.s: Restore name of basepri_max
	register.
	* gas/arm/mrs-msr-thumb-v7e-m.d: Likewise.
	* gas/arm/arch7.d: Likewise.
	* gas/arm/arch7.s: Likewise.

	* arm-dis.c: Revert previous reversion.
 2011-04-19 07:44:12 +00:00
Nick Clifton
ac7f631be1 * gas/arm/arch7.s: Fix typo basepri_max should be basepri_mask. 
* gas/arm/mrs-msr-thumb-v7e-m.s: Likewise.
	* gas/arm/arch7.d: Update expected disassembly.
	* gas/arm/attr-march-armv7.d: Remove Microcontroller tag.
	* gas/arm/blx-bad.d: Only run for ELF based targets.
	* gas/arm/mrs-msr-thumb-v6t2.d: Likewise.
	* gas/arm/vldm-arm.d: Likewise.
	* gas/arm/mrs-msr-thumb-v7-m.d: Likewise.
	Remove qualifiers from PSR and IAPSR regsiter names.
	* gas/arm/mrs-msr-thumb-v7e-m.d: Likewise.
	* gas/arm/thumb2_bcond.d: Update expected disassembly to allow for
	relaxing of branch insns.
	* gas/arm/thumb32.d: Fix whitespace problems in disassembly.

	* config/tc-arm.c (parse_psr): Use selected_cpu not cpu_variant to
	detect M-profile targets.
	(do_t_swi): Exclude v7 and higher variants from arm_ext_os test.
	(v7m_psrs): Fix typo: basepri_max should be basepri_mask.

	* arm-dis.c (psr_name): Revert previous delta.

	* arm.h (ARM_AEXT_V7_ARM): Remove ARM_EXT_OS from bitmask.
 2011-04-19 07:27:32 +00:00
Andreas Krebbel
902cc293a0 2011-04-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* config/tc-s390.c (s390_machine): New prototype.
	(md_pseudo_table): New pseudo-op .machine.
	(s390_opcode_hash): Initialize to NULL.
	(s390_parse_cpu): New function.
	(md_parse_option): Use s390_parse_cpu.
	(s390_setup_opcodes): New function.
	(md_begin): Use s390_setup_opcodes.
	(s390_machine): New hook handling the new .machine pseudo.

	* doc/c-s390.texi: Document the new pseudo op .machine.

2011-04-14  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/zarch-machine.s: New testcase.
	* gas/s390/zarch-machine.d: New testcase output.
	* gas/s390/s390.exp: Execute the new testcase.
 2011-04-14 11:11:33 +00:00
H.J. Lu
2b5d6a91a8 Start error message with lower case. 
2011-04-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (i386_mach): Start error message with lower
	case.
	(md_begin): Likewise.
	(md_parse_option): Likewise.
	(i386_target_format): Likewise.
	(check_byte_reg): Likewise.
	(check_long_reg): Likewise.
	(check_qword_reg): Likewise.
	(check_word_reg): Likewise.
 2011-04-12 13:57:50 +00:00
Nick Clifton
0d9b4b55c2 PR gas/12532 
* config/tc-arm.c (relax_branch): Do not relax branches to
	preemptable global symbols.
 2011-04-12 11:47:38 +00:00
Julian Brown
d2cd120565 gas/ 
* config/tc-arm.c (parse_psr): Add LHS argument. Improve support
    for *APSR bitmasks.
    (operand_parse_code): Replace OP_PSR with OP_wPSR and OP_rPSR.
    Remove OP_RVC_PSR.
    (parse_operands): Likewise.
    (do_mrs): Tweak error message for constraint.
    (do_t_mrs): Update constraints for changes to APSR support.
    (do_t_msr): Likewise. Don't set PSR_f flag here.
    (psrs): Remove "g", "nzcvq", "nzcvqg".
    (insns): Tweak entries for msr and mrs instructions.

    opcodes/
    * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
    (print_insn_thumb32): Add APSR bitmask support.

    gas/testsuite/
    * gas/arm/mrs-msr-thumb-v7-m.s: New.
    * gas/arm/mrs-msr-thumb-v7-m.d: New.
    * gas/arm/mrs-msr-thumb-v7-m-bad.d: New.
    * gas/arm/mrs-msr-thumb-v7-m-bad.l: New.
    * gas/arm/mrs-msr-thumb-v7-m-bad.s: New.
    * gas/arm/mrs-msr-thumb-v7e-m.d: New.
    * gas/arm/mrs-msr-thumb-v7e-m.s: New.
    * gas/arm/mrs-msr-arm-v7-a-bad.d: New.
    * gas/arm/mrs-msr-arm-v7-a-bad.l: New.
    * gas/arm/mrs-msr-arm-v7-a-bad.s: New.
    * gas/arm/mrs-msr-arm-v7-a.d: New.
    * gas/arm/mrs-msr-arm-v7-a.s: New.
    * gas/arm/mrs-msr-arm-v6.d: New.
    * gas/arm/mrs-msr-arm-v6.s: New.
    * gas/arm/mrs-msr-thumb-v6t2.d: New.
    * gas/arm/mrs-msr-thumb-v6t2.s: New.
    * gas/arm/arch7.d: Fix typo in disassembly for BASEPRI_MAX,
    bitmasks for IAPSR etc.
    * gas/arm/arch7.s: Specify bitmask for APSR writes.
    * gas/arm/archv6m.s: Likewise.
    * msr-imm-bad.l: Tweak expected disassembly in error message.
    * msr-reg-bad.l: Likewise.
    * msr-imm.d: Tweak expected disassembly.
    * msr-reg.d: Likewise.
    * msr-reg-thumb.d: Likewise.
    * msr-imm.s: Specify bitmask on APSR writes.
    * msr-reg.s: Add comment about deprecated usage.
 2011-04-11 18:49:06 +00:00
Kai Tietz
4a57f2cf9c 2011-04-11 Kai Tietz <ktietz@redhat.com> 
* config/tc-i386.c (x86_cons): Initialize adjust with zero.
 2011-04-11 18:45:12 +00:00
Nick Clifton
4e4f7c872b * config/tc-i386.c (x86_cons): Define even for non-ELF targets. 
* config/tc-i386.h (x86_cons): Always prototype.
 2011-04-11 08:27:48 +00:00
Nick Clifton
249c2423d4 * config/tc-cr16.c (getprocregp_image): Fix type of 'r' parameter 
in order to avoid a compile time warning.
	(getprocreg_image): Likewise.
 2011-04-11 08:20:25 +00:00
Alan Modra
d86fff4454 * config/tc-cr16.c (getprocreg_image): Correct range check. 
(getprocregp_image): Likewise.
 2011-04-11 04:52:01 +00:00
Tristan Gingold
592588f3f8 2011-04-01 Tristan Gingold <gingold@adacore.com> 
* config/tc-ia64.c (md_apply_fix): Add a cast to avoid a warning.
 2011-04-01 08:56:21 +00:00
Bernd Schmidt
ac14530735 include/elf/ 
* tic6x.h (R_C6000_JUMP_SPLOT, R_C6000_EHTYPE,
	R_C6000_PCR_H16, R_C6000_PCR_L16): New relocs.
	(SHN_TIC6X_SCOMMON): Define.

bfd/
	* elf32-tic6x.h (struct elf32_tic6x_params): New.
	(elf32_tic6x_setup): Declare.
	* elf32-tic6x.c: Include <limits.h>.
	(ELF_DYNAMIC_LINKER, DEFAULT_STACK_SIZE, PLT_ENTRY_SIZE): Define.
	(struct elf32_tic6x_link_hash_table, struct elf32_link_hash_entry):
	New structures.
	(elf32_tic6x_link_hash_table, is_tic6x_elf): New macros.
	(tic6x_elf_scom_section, tic6x_elf_scom_symbol,
	tic6x_elf_scom_symbol_ptr): New static variables.
	(elf32_tic6x_howto_table, elf32_tic6x_howto_table_rel,
	elf32_tic6x_reloc_map): Add R_C6000_JUMP_SLOT, R_C6000_EHTYPE,
	R_C6000_PCR_H16 and R_C6000_PCR_L16.
	(elf32_tic6x_link_hash_newfunc, elf32_tic6x_link_hash_table_create,
	elf32_tic6x_link_hash_table_free, elf32_tic6x_setup,
	elf32_tic6x_using_dsbt, elf32_tic6x_install_rela,
	elf32_tic6x_create_dynamic_sections, elf32_tic6x_make_got_dynreloc,
	elf32_tic6x_finish_dynamic_symbol, elf32_tic6x_gc_sweep_hook,
	elf32_tic6x_adjust_dynamic_symbol): New static functions.
	(elf32_tic6x_relocate_section): For R_C6000_PCR_S21, convert branches
	to weak symbols as required by the ABI.
	Handle GOT and DSBT_INDEX relocs, and copy relocs to the output file
	as needed when generating DSBT output.
	(elf32_tic6x_check_relocs, elf32_tic6x_add_symbol_hook,
	elf32_tic6x_symbol_processing, elf32_tic6x_section_from_bfd_section,
	elf32_tic6x_allocate_dynrelocs, elf32_tic6x_size_dynamic_sections,
	elf32_tic6x_always_size_sections, elf32_tic6x_modify_program_headers,
	elf32_tic6x_finish_dynamic_sections, elf32_tic6x_plt_sym_val,
	elf32_tic6x_copy_private_data, elf32_tic6x_link_omit_section_dynsym):
	New static functions.
	(ELF_MAXPAGESIZE): Define to 0x1000.
	(bfd_elf32_bfd_copy_private_bfd_data,
	bfd_elf32_bfd_link_hash_table_create,
	bfd_elf32_bfd_link_hash_table_free, elf_backend_can_refcount,
	elf_backend_want_got_plt, elf_backend_want_dynbss,
	elf_backend_plt_readonly, elf_backend_got_header_size,
	elf_backend_gc_sweep_hook, elf_backend_modify_program_headers,
	elf_backend_create_dynamic_sections, elf_backend_adjust_dynamic_symbol,
	elf_backend_check_relocs, elf_backend_add_symbol_hook,
	elf_backend_symbol_processing, elf_backend_link_output_symbol_hook,
	elf_backend_section_from_bfd_section,
	elf_backend_finish_dynamic_symbol, elf_backend_always_size_sections,
	elf32_tic6x_size_dynamic_sections, elf_backend_finish_dynamic_sections,
	elf_backend_omit_section_dynsym, elf_backend_plt_sym_val): Define.

	* bfd/reloc.c (BFD_RELOC_C6000_JUMP_SLOT, BFD_RELOC_C6000_EHTYPE,
	BFD_RELOC_C6000_PCR_H16, BFD_RELOC_C6000_PCR_S16): Add.
	* bfd/bfd-in2.h: Regenerate.
	* bfd/libbfd.h: Regenerate.
	* config.bfd: Accept tic6x-*-* instead of tic6x-*-elf.

gas/
	* config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New
	static variables.
	(md_begin): Initialize them.
	(s_tic6x_scomm): New static function.
	(md_pseudo_table): Add "scomm".
	(tc_gen_reloc): Really undo all adjustments made by
	bfd_install_relocation.
	* doc/c-tic6x.texi: Document the .scomm directive.

gas/testsuite/
	* gas/tic6x/scomm-directive-1.s: New test.
	* gas/tic6x/scomm-directive-1.d: New test.
	* gas/tic6x/scomm-directive-2.s: New test.
	* gas/tic6x/scomm-directive-2.d: New test.
	* gas/tic6x/scomm-directive-3.s: New test.
	* gas/tic6x/scomm-directive-3.d: New test.
	* gas/tic6x/scomm-directive-4.s: New test.
	* gas/tic6x/scomm-directive-4.d: New test.
	* gas/tic6x/scomm-directive-5.s: New test.
	* gas/tic6x/scomm-directive-5.d: New test.
	* gas/tic6x/scomm-directive-6.s: New test.
	* gas/tic6x/scomm-directive-6.d: New test.
	* gas/tic6x/scomm-directive-7.s: New test.
	* gas/tic6x/scomm-directive-7.d: New test.
	* gas/tic6x/scomm-directive-8.s: New test.
	* gas/tic6x/scomm-directive-8.d: New test.

ld/
	* emulparams/elf32_tic6x_le.sh (BIG_OUTPUT_FORMAT, EXTRA_EM_FILE,
	GENERATE_SHLIB_SCRIPT): New defines.
	(TEXT_START_ADDR): Define differently depending on target.
	(.got): Redefine to include "*(.dsbt)".
	(SDATA_START_SYMBOLS): Remove, replace with
	(OTHER_GOT_SYMBOLS): New.
	(OTHER_BSS_SECTIONS): Define only for ELF targets.
	* emultempl/tic6xdsbt.em: New file.
	* gen-doc.texi: Set C6X.
	* ld.texinfo: Likewise.
	(Options specific to C6X uClinux targets): New section.

binutils/
	* readelf.c (get_symbol_index_type): Handle SCOM for TIC6X.
	(dump_relocations): Likewise.

binutils/testsuite/
	* lib/binutils-common.exp (is_elf_format): Accept tic6x*-*-uclinux*.

ld/testsuite/
	* ld-scripts/crossref.exp: Add CFLAGS for tic6x*-*-*.
	* ld-elf/sec-to-seg.exp: Remove tic6x from list of targets defining
	pagesize to 1.
	* ld-tic6x/tic6x.exp: Add support for DSBT shared library/executable
	linking tests.
	* ld-tic6x/dsbt.ld: New linker script.
	* ld-tic6x/dsbt-be.ld: New linker script.
	* ld-tic6x/dsbt-overflow.ld: New linker script.
	* ld-tic6x/dsbt-inrange.ld: New linker script.
	* ld-tic6x/shlib-1.s: New test.
	* ld-tic6x/shlib-2.s: New test.
	* ld-tic6x/shlib-app-1r.s: New test.
	* ld-tic6x/shlib-app-1.s: New test.
	* ld-tic6x/shlib-1.sd: New test.
	* ld-tic6x/shlib-1.dd: New test.
	* ld-tic6x/shlib-app-1.rd: New test.
	* ld-tic6x/shlib-app-1rb.rd: New test.
	* ld-tic6x/shlib-app-1.sd: New test.
	* ld-tic6x/static-app-1rb.od: New test.
	* ld-tic6x/shlib-app-1.dd: New test.
	* ld-tic6x/shlib-app-1rb.sd: New test.
	* ld-tic6x/static-app-1b.od: New test.
	* ld-tic6x/static-app-1r.od: New test.
	* ld-tic6x/shlib-1rb.rd: New test.
	* ld-tic6x/shlib-app-1rb.dd: New test.
	* ld-tic6x/shlib-1rb.sd: New test.
	* ld-tic6x/shlib-1rb.dd: New test.
	* ld-tic6x/shlib-app-1b.od: New test.
	* ld-tic6x/tic6x.exp: New test.
	* ld-tic6x/static-app-1rb.rd: New test.
	* ld-tic6x/shlib-app-1r.od: New test.
	* ld-tic6x/static-app-1.od: New test.
	* ld-tic6x/static-app-1b.rd: New test.
	* ld-tic6x/static-app-1r.rd: New test.
	* ld-tic6x/static-app-1rb.sd: New test.
	* ld-tic6x/static-app-1b.sd: New test.
	* ld-tic6x/static-app-1rb.dd: New test.
	* ld-tic6x/static-app-1r.sd: New test.
	* ld-tic6x/static-app-1b.dd: New test.
	* ld-tic6x/shlib-1b.rd: New test.
	* ld-tic6x/static-app-1r.dd: New test.
	* ld-tic6x/shlib-app-1b.rd: New test.
	* ld-tic6x/shlib-1r.rd: New test.
	* ld-tic6x/shlib-app-1r.rd: New test.
	* ld-tic6x/shlib-1b.sd: New test.
	* ld-tic6x/static-app-1.rd: New test.
	* ld-tic6x/shlib-app-1b.sd: New test.
	* ld-tic6x/shlib-1r.sd: New test.
	* ld-tic6x/shlib-1b.dd: New test.
	* ld-tic6x/shlib-app-1r.sd: New test.
	* ld-tic6x/shlib-app-1b.dd: New test.
	* ld-tic6x/shlib-1r.dd: New test.
	* ld-tic6x/static-app-1.sd: New test.
	* ld-tic6x/shlib-app-1r.dd: New test.
	* ld-tic6x/static-app-1.dd: New test.
	* ld-tic6x/shlib-noindex.rd: New test.
	* ld-tic6x/shlib-noindex.dd: New test.
	* ld-tic6x/shlib-noindex.sd: New test.
	* ld-tic6x/got-reloc-local-1.s: New test.
	* ld-tic6x/got-reloc-local-2.s: New test.
	* ld-tic6x/got-reloc-local-r.d: New test.
	* ld-tic6x/got-reloc-global.s: New test.
	* ld-tic6x/got-reloc-global-addend-1.d: New test.
	* ld-tic6x/got-reloc-global-addend-1.s: New test.
	* ld-tic6x/got-reloc-global-addend-2.d: New test.
	* ld-tic6x/got-reloc-inrange.d: New test.
	* ld-tic6x/got-reloc-overflow.d: New test.
	* ld-tic6x/got-reloc-global-addend-2.s: New test.
	* ld-tic6x/dsbt-index-error.d: New test.
	* ld-tic6x/dsbt-index.d: New test.
	* ld-tic6x/dsbt-index.s: New test.
	* ld-tic6x/shlib-app-1.od: New test.
	* ld-tic6x/shlib-app-1rb.od: New test.
	* ld-tic6x/shlib-1.rd: New test.
	* ld-tic6x/weak.d: New test.
	* ld-tic6x/weak-be.d: New test.
	* ld-tic6x/weak.s: New test.
 	* ld-tic6x/weak-data.d: New test.
	* ld-tic6x/common.d: New test.
	* ld-tic6x/common.ld: New test.
	* ld-tic6x/common.s: New test.
 2011-03-31 08:58:28 +00:00
Tristan Gingold
fc0eebac62 2011-03-31 Tristan Gingold <gingold@adacore.com> 
* dwarf2dbg.c (DWARF2_VERSION): Define.
	(out_debug_line): Use it.
	(out_debug_aranges): Ditto.
	(out_debug_info): Ditto.
	* config/tc-ia64.h (DWARF2_VERSION): Override it.
 2011-03-31 08:02:41 +00:00
Nick Clifton
f956bf33e2 * obj-elf.c (obj_elf_section): Free malloced name. 2011-03-30 15:06:51 +00:00
Tristan Gingold
c734e7e383 2011-03-30 Tristan Gingold <gingold@adacore.com> 
* config/tc-ppc.c (ppc_frob_symbol): Convert stsym symbols value
	to offset only if within is set.
	(ppc_stabx): Reformat.  For stsym stabs, add a check and set
	within only for symbols.
 2011-03-30 12:43:35 +00:00
Richard Henderson
af3ecb4a35 PR 12610 
* config/tc-alpha.c (s_alpha_align): Don't auto-align a previous
label; zap alpha_insn_label.
 2011-03-29 18:16:16 +00:00
H.J. Lu
75c1c785ac Properly handle multiple operands for x32 quad. 
gas/

2011-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (handle_quad): Properly handle multiple
	operands.

gas/testsuite/

2011-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/quad.d: Add tests for multiple operands.
	* gas/i386/ilp32/quad.s: Likewise.
 2011-03-29 12:40:51 +00:00
Mike Frysinger
fc99ebdc2b gas: blackfin: gas: blackfin: reject invalid BYTEUNPACK insns 
The destination registers must be different with BYTEUNPACK insns,
otherwise the hardware throws up an exception.  So reject them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-29 05:54:41 +00:00
Mike Frysinger
3823a07437 gas: blackfin: gas: blackfin: reject invalid BYTEOP16M insns 
The destination registers must be different with BYTEOP16M insns,
otherwise the hardware throws up an exception.  So reject them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-29 05:51:22 +00:00
Mike Frysinger
0be99d4ba6 gas: blackfin: gas: blackfin: reject invalid BYTEOP16P insns 
The destination registers must be different with BYTEOP16P insns,
otherwise the hardware throws up an exception.  So reject them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-29 05:44:56 +00:00
Mike Frysinger
f4a2f576d4 gas: blackfin: reject invalid 16bit acc add insns 
The 16bit acc add insn cannot assign the two results to the same dreg,
so make sure gas rejects attempts to use this insn variant.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-29 01:25:13 +00:00
H.J. Lu
314a59d568 Support .quad for x32. 
gas/

2011-03-28  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (handle_quad): New.
	(md_pseudo_table): Add "quad".

gas/testsuite/

2011-03-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/inval.s: Remove .quad.
	* gas/i386/ilp32/inval.l: Updated.

	* gas/i386/ilp32/quad.d: New.
	* gas/i386/ilp32/quad.s: Likewise.
 2011-03-28 22:47:59 +00:00
Nick Clifton
5b806d2793 Add support for DragonFlyBSD target. 2011-03-28 11:18:27 +00:00
Eric B. Weddington
b8c610a72f 2011-03-24 Eric B. Weddington <eric.weddington@atmel.com> 
* config/tc-avr.c (mcu_types): Add new devices: atmega325pa,
	atmega3250pa, atmega3290pa, atmega16hvbrevb, atmega32hvbrevb,
	at90pwm161.
	* doc/c-avr.texi: Document new device names.
 2011-03-24 17:03:03 +00:00
Mike Frysinger
2dd0dc9418 gas: blackfin: reject invalid register destinations for vector add/sub 
The destination registers with vector add/sub insns must be different,
so make sure gas rejects attempt to write these.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-24 06:17:47 +00:00
Mike Frysinger
a0bc8198d3 gas: blackfin: catch invalid dest dregs in dsp mult insns 
While we were catching a few mismatches in vectorized dsp mult insns,
the error we displayed was misleading.  Once we fix that up, we can
convert previously dead code into proper checking for destination
dreg matching.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-24 04:25:25 +00:00
Mike Frysinger
ba48c47be5 gas: blackfin: catch invalid register combinations with SEARCH/BITMUX 
The destination registers for SEARCH cannot be the same.  Same rule
for the source registers for BITMUX.

Signed-off-by: Mike Frsyinger <vapier@gentoo.org>
 2011-03-24 04:20:10 +00:00
Eric B. Weddington
6f8a4444ff 2011-03-23 Eric B. Weddington <eric.weddington@atmel.com> 
* config/tc-avr.c (mcu_types): Add new xmega devices: atxmega64a1u,
	atxmega128a1u, atxmega16x1, atxmega32x1, atxmega128b1, atxmega256a3bu.
	* doc/c-avr.texi: Document new device names.
 2011-03-23 15:02:06 +00:00
Eric B. Weddington
8cc66334fa /bfd: 
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* archures.c: Add AVR XMEGA architecture information.
	* cpu-avr.c (arch_info_struct): Likewise.
	* elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise.
	(elf32_avr_object_p): Likewise.

/gas:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
	(AVR_INSN): Change definition to match.
	(avr_opcodes): Likewise, change to match.
	(mcu_types): Add XMEGA architecture names and new XMEGA device names.
	(md_show_usage): Add XMEGA architecture names.
	(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
	Add support for SPM Z+ instruction.
	* doc/c-avr.texi: Add documentation for XMEGA architectures and
	devices.

/include/opcode:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
	New instruction set flags.
	(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.

/ld:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures.
	(eavrxmega?.c): Likewise.
	* configure.tgt (targ_extra_emuls): Likewise.
	* emulparams/avrxmega1.sh: New file.
	* emulparams/avrxmega2.sh: Likewise.
	* emulparams/avrxmega3.sh: Likewise.
	* emulparams/avrxmega4.sh: Likewise.
	* emulparams/avrxmega5.sh: Likewise.
	* emulparams/avrxmega6.sh: Likewise.
	* emulparams/avrxmega7.sh: Likewise.
	* emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation):
	Add avrxmega6, avrxmega7 to list of architectures for no stubs.

/opcodes:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
	post-increment to support LPM Z+ instruction. Add support for 'E'
	constraint for DES instruction.
	(print_insn_avr): Adjust calls to avr_operand. Rename variable.
 2011-03-22 18:10:48 +00:00
Eric B. Weddington
4fb8d1c60a 2011-03-21 Eric B. Weddington <eric.weddington@atmel.com> 
* config/tc-avr.c (md_show_usage): Add "Assembler" text to output.
 2011-03-21 20:25:56 +00:00
Alan Modra
869fe6ea85 * config/obj-elf.c (elf_frob_symbol): Report S_SET_SIZE symbol 
on .size expression errors rather than symbols in the size expression.
 2011-03-18 11:21:33 +00:00
Alan Modra
04648e6590 * read.c (read_a_source_file): Remove md_after_pass_hook. 
Move "quit" label before set of dot_symbol.
	* config/tc-d10v.h (md_after_pass_hook): Don't define.
	* config/tc-d30v.h (md_after_pass_hook): Likewise.
	* config/tc-m32r.h (md_after_pass_hook): Likewise.
	(md_cleanup): Define to call m32r_fill_insn.
 2011-03-18 10:46:52 +00:00
Andreas Krebbel
db3a4e4042 2011-03-18 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* config/tc-s390.c (md_parse_option): Add -march=all option which
	switches to the highest available CPU.
 2011-03-18 09:54:58 +00:00
H.J. Lu
21be61f588 Add --size-check=[error|warning]. 
gas/

2011-03-16  H.J. Lu  <hongjiu.lu@intel.com>

	* as.c (show_usage): Add --size-check=.
	(parse_args): Add and handle OPTION_SIZE_CHECK.

	* as.h (flag_size_check): New.

	* config/obj-elf.c (elf_frob_symbol): Use as_bad to report
	bad .size directive only for --size-check=error.

	* doc/as.texinfo: Document --size-check=.

gas/testsuite/

2011-03-16  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/bad-size.d: New.
	* gas/i386/bad-size.s: Likewise.
	* gas/i386/bad-size.warn: Likewise.

	* gas/i386/i386.exp: Run bad-size for ELF targets.
 2011-03-16 12:58:26 +00:00
Mike Frysinger
7f35e99197 gas: blackfin: add support for bf54x-0.4 
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-03-15 00:17:00 +00:00
Richard Sandiford
34e77a920a include/elf/ 
* arm.h (R_ARM_IRELATIVE): New relocation.

bfd/
	* reloc.c (BFD_RELOC_ARM_IRELATIVE): New relocation.
	* bfd-in2.h: Regenerate.
	* elf32-arm.c (elf32_arm_howto_table_2): Rename existing definition
	to elf32_arm_howto_table_3 and replace with a single R_ARM_IRELATIVE
	entry.
	(elf32_arm_howto_from_type): Update accordingly.
	(elf32_arm_reloc_map): Map BFD_RELOC_ARM_IRELATIVE to R_ARM_IRELATIVE.
	(elf32_arm_reloc_name_lookup): Handle elf32_arm_howto_table_3.
	(arm_plt_info): New structure, split out from elf32_arm_link_hash_entry
	with an extra noncall_refcount field.
	(arm_local_iplt_info): New structure.
	(elf_arm_obj_tdata): Add local_iplt.
	(elf32_arm_local_iplt): New accessor macro.
	(elf32_arm_link_hash_entry): Replace plt_thumb_refcount,
	plt_maybe_thumb_refcount and plt_got_offset with an arm_plt_info.
	Change tls_type to a bitfield and add is_iplt.
	(elf32_arm_link_hash_newfunc): Update accordingly.
	(elf32_arm_allocate_local_sym_info): New function.
	(elf32_arm_create_local_iplt): Likewise.
	(elf32_arm_get_plt_info): Likewise.
	(elf32_arm_plt_needs_thumb_stub_p): Likewise.
	(elf32_arm_get_local_dynreloc_list): Likewise.
	(create_ifunc_sections): Likewise.
	(elf32_arm_copy_indirect_symbol): Update after the changes to
	elf32_arm_link_hash_entry.  Assert the is_iplt has not yet been set.
	(arm_type_of_stub): Add an st_type argument.  Use elf32_arm_get_plt_info
	to get PLT information.  Assert that all STT_GNU_IFUNC references
	are turned into PLT references.
	(arm_build_one_stub): Pass the symbol type to
	elf32_arm_final_link_relocate.
	(elf32_arm_size_stubs): Pass the symbol type to arm_type_of_stub.
	(elf32_arm_allocate_irelocs): New function.
	(elf32_arm_add_dynreloc): In static objects, use .rel.iplt for
	all R_ARM_IRELATIVE.
	(elf32_arm_allocate_plt_entry): New function.
	(elf32_arm_populate_plt_entry): Likewise.
	(elf32_arm_final_link_relocate): Add an st_type parameter.
	Set srelgot to null for static objects.  Use separate variables
	to record which st_value and st_type should be used when generating
	a dynamic relocation.  Use elf32_arm_get_plt_info to find the
	symbol's PLT information, setting has_iplt_entry, splt,
	plt_offset and gotplt_offset accordingly.  Check whether
	STT_GNU_IFUNC symbols should resolve to an .iplt entry, and change
	the relocation target accordingly.  Broaden assert to include
	.iplts.  Don't set sreloc for static relocations.  Assert that
	we only generate dynamic R_ARM_RELATIVE relocations for R_ARM_ABS32
	and R_ARM_ABS32_NOI.  Generate R_ARM_IRELATIVE relocations instead
	of R_ARM_RELATIVE relocations if the target is an STT_GNU_IFUNC
	symbol.  Pass the symbol type to arm_type_of_stub.  Conditionally
	resolve GOT references to the .igot.plt entry.
	(elf32_arm_relocate_section): Update the call to
	elf32_arm_final_link_relocate.
	(elf32_arm_gc_sweep_hook): Use elf32_arm_get_plt_info to get PLT
	information.  Treat R_ARM_REL32 and R_ARM_REL32_NOI as call
	relocations in shared libraries and relocatable executables.
	Count non-call PLT references.  Use elf32_arm_get_local_dynreloc_list
	to get the list of dynamic relocations for a local symbol.
	(elf32_arm_check_relocs): Always create ifunc sections.  Set isym
	at the same time as setting h.  Use elf32_arm_allocate_local_sym_info
	to allocate local symbol information.  Treat R_ARM_REL32 and
	R_ARM_REL32_NOI as call relocations in shared libraries and
	relocatable executables.  Record PLT information for local
	STT_GNU_IFUNC functions as well as global functions.   Count
	non-call PLT references.  Use elf32_arm_get_local_dynreloc_list
	to get the list of dynamic relocations for a local symbol.
	(elf32_arm_adjust_dynamic_symbol): Handle STT_GNU_IFUNC symbols.
	Don't remove STT_GNU_IFUNC PLTs unless all references have been
	removed.  Update after the changes to elf32_arm_link_hash_entry.
	(allocate_dynrelocs_for_symbol): Decide whether STT_GNU_IFUNC PLT
	entries should live in .plt or .iplt.  Check whether the .igot.plt
	and .got entries can be combined.  Use elf32_arm_allocate_plt_entry
	to allocate .plt and .(i)got.plt entries.  Detect which .got
	entries will need R_ARM_IRELATIVE relocations and use
	elf32_arm_allocate_irelocs to allocate them.  Likewise other
	non-.got dynamic relocations.
	(elf32_arm_size_dynamic_sections): Allocate .iplt, .igot.plt
	and dynamic relocations for local STT_GNU_IFUNC symbols.
	Check whether the .igot.plt and .got entries can be combined.
	Detect which .got entries will need R_ARM_IRELATIVE relocations
	and use elf32_arm_allocate_irelocs to allocate them.  Use stashed
	section pointers intead of strcmp checks.  Handle iplt and igotplt.
	(elf32_arm_finish_dynamic_symbol): Use elf32_arm_populate_plt_entry
	to fill in .plt, .got.plt and .rel(a).plt entries.  Point
	STT_GNU_IFUNC symbols at an .iplt entry if non-call relocations
	resolve to it.
	(elf32_arm_output_plt_map_1): New function, split out from
	elf32_arm_output_plt_map.  Handle .iplt entries.  Use
	elf32_arm_plt_needs_thumb_stub_p.
	(elf32_arm_output_plt_map): Call it.
	(elf32_arm_output_arch_local_syms): Add mapping symbols for
	local .iplt entries.
	(elf32_arm_swap_symbol_in): Handle Thumb STT_GNU_IFUNC symbols.
	(elf32_arm_swap_symbol_out): Likewise.
	(elf32_arm_add_symbol_hook): New function.
	(elf_backend_add_symbol_hook): Define for all targets.

opcodes/
	* arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.

gas/
	* config/tc-arm.c (md_pcrel_from_section): Use S_FORCE_RELOC to
	determine whether a relocation is needed.
	(md_apply_fix, arm_apply_sym_value): Likewise.

ld/testsuite/
	* ld-arm/ifunc-1.s, ld-arm/ifunc-1.dd, ld-arm/ifunc-1.gd,
	ld-arm/ifunc-1.rd, ld-arm/ifunc-2.s, ld-arm/ifunc-2.dd,
	ld-arm/ifunc-2.gd, ld-arm/ifunc-2.rd, ld-arm/ifunc-3.s,
	ld-arm/ifunc-3.dd, ld-arm/ifunc-3.gd, ld-arm/ifunc-3.rd,
	ld-arm/ifunc-4.s, ld-arm/ifunc-4.dd, ld-arm/ifunc-4.gd,
	ld-arm/ifunc-4.rd, ld-arm/ifunc-5.s, ld-arm/ifunc-5.dd,
	ld-arm/ifunc-5.gd, ld-arm/ifunc-5.rd, ld-arm/ifunc-6.s,
	ld-arm/ifunc-6.dd, ld-arm/ifunc-6.gd, ld-arm/ifunc-6.rd,
	ld-arm/ifunc-7.s, ld-arm/ifunc-7.dd, ld-arm/ifunc-7.gd,
	ld-arm/ifunc-7.rd, ld-arm/ifunc-8.s, ld-arm/ifunc-8.dd,
	ld-arm/ifunc-8.gd, ld-arm/ifunc-8.rd, ld-arm/ifunc-9.s,
	ld-arm/ifunc-9.dd, ld-arm/ifunc-9.gd, ld-arm/ifunc-9.rd,
	ld-arm/ifunc-10.s, ld-arm/ifunc-10.dd, ld-arm/ifunc-10.gd,
	ld-arm/ifunc-10.rd, ld-arm/ifunc-11.s, ld-arm/ifunc-11.dd,
	ld-arm/ifunc-11.gd, ld-arm/ifunc-11.rd, ld-arm/ifunc-12.s,
	ld-arm/ifunc-12.dd, ld-arm/ifunc-12.gd, ld-arm/ifunc-12.rd,
	ld-arm/ifunc-13.s, ld-arm/ifunc-13.dd, ld-arm/ifunc-13.gd,
	ld-arm/ifunc-13.rd, ld-arm/ifunc-14.s, ld-arm/ifunc-14.dd,
	ld-arm/ifunc-14.gd, ld-arm/ifunc-14.rd, ld-arm/ifunc-15.s,
	ld-arm/ifunc-15.dd, ld-arm/ifunc-15.gd, ld-arm/ifunc-15.rd,
	ld-arm/ifunc-16.s, ld-arm/ifunc-16.dd, ld-arm/ifunc-16.gd,
	ld-arm/ifunc-16.rd, ld-arm/ifunc-dynamic.ld,
	ld-arm/ifunc-static.ld: New tests.
	* ld-arm/farcall-group.d, ld-arm/farcall-group-size2.d,
	ld-arm/farcall-mixed-lib-v4t.d, ld-arm/farcall-mixed-lib.d: Update
	for new stub hashes.
	* ld-arm/arm-elf.exp: Run them.
 2011-03-14 16:04:16 +00:00
Richard Sandiford
35fc36a8d6 include/elf/ 
* internal.h (elf_internal_sym): Add st_target_internal.
	* arm.h (arm_st_branch_type): New enum.
	(ARM_SYM_BRANCH_TYPE): New macro.

bfd/
	* elf-bfd.h (elf_link_hash_entry): Add target_internal.
	* elf.c (swap_out_syms): Set st_target_internal for each
	Elf_Internal_Sym.
	* elfcode.h (elf_swap_symbol_in): Likewise.
	* elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise.
	* elf32-sh-symbian.c (sh_symbian_relocate_section): Likewise.
	* elf64-sparc.c (elf64_sparc_output_arch_syms): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise.
	* elflink.c (elf_link_output_extsym): Likewise.
	(bfd_elf_final_link): Likewise.
	(elf_link_add_object_symbols): Copy st_target_internal
	to the hash table if we see a definition.
	(_bfd_elf_copy_link_hash_symbol_type): Copy target_internal.
	* elf32-arm.c (elf32_arm_stub_hash_entry): Replace st_type with
	a branch_type field.
	(a8_erratum_fix, a8_erratum_reloc): Likewise.
	(arm_type_of_stub): Replace actual_st_type with an
	actual_branch_type parameter.
	(arm_build_one_stub): Use branch types rather than st_types to
	determine the type of branch.
	(cortex_a8_erratum_scan): Likewise.
	(elf32_arm_size_stubs): Likewise.
	(bfd_elf32_arm_process_before_allocation): Likewise.
	(allocate_dynrelocs_for_symbol): Likewise.
	(elf32_arm_finish_dynamic_sections): Likewise.
	(elf32_arm_final_link_relocate): Replace sym_flags parameter with
	a branch_type parameter.
	(elf32_arm_relocate_section): Update call accordingly.
	(elf32_arm_adjust_dynamic_symbol): Don't check STT_ARM_TFUNC.
	(elf32_arm_output_map_sym): Initialize st_target_internal.
	(elf32_arm_output_stub_sym): Likewise.
	(elf32_arm_symbol_processing): Delete.
	(elf32_arm_swap_symbol_in): Convert STT_ARM_TFUNCs into STT_FUNCs.
	Use st_target_internal to record the branch type.
	(elf32_arm_swap_symbol_out): Use st_target_internal to test for
	Thumb functions.
	(elf32_arm_is_function_type): Delete.
	(elf_backend_symbol_processing): Likewise.
	(elf_backend_is_function_type): Likewise.

gas/
	* config/tc-arm.c (arm_adjust_symtab): Set the branch type
	for Thumb symbols.

ld/
	* emultempl/armelf.em (gld${EMULATION_NAME}_finish): Check
	eh->target_internal.

opcodes/
	* arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
	Use branch types instead.
	(print_insn): Likewise.
 2011-03-14 15:55:04 +00:00
Alan Modra
293855c8bb * gas/config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS, 
TARGET_SYMBOL_FIELDS): Don't define.
	* gas/config/tc-arc.c (arc_common): Use correct symbol "local" field.
 2011-03-10 10:06:05 +00:00
H.J. Lu
49002d7f0e Mention symbol name in non-constant .size expression. 
gas/

2011-03-05  H.J. Lu  <hongjiu.lu@intel.com>

	* config/obj-elf.c (elf_frob_symbol): Mention symbol name in
	non-constant .size expression.

gas/testsuite/

2011-03-05  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/elf/bad-size.err: Updated.
 2011-03-06 14:05:25 +00:00
H.J. Lu
61ff971fde Revert the last change. 2011-03-05 04:31:41 +00:00
H.J. Lu
ac480657f1 Set x86_cie_data_alignment to -4 for x32. 
gas/

2011-03-04  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (x86_cie_stack_alignment): New.
	(md_begin): Set x86_cie_data_alignment if it isn't set.  Set
	x86_cie_stack_alignment.
	(i386_target_format): Set x86_cie_data_alignment to -4 for x32.
	(tc_x86_frame_initial_instructions): Use x86_cie_stack_alignment
	instead of x86_cie_data_alignment on SP and RA.

gas/testsuite/

2011-03-04  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/cfi/cfi-x86_64.d: Updated.
 2011-03-05 02:16:36 +00:00
Maciej W. Rozycki
d455268f73 gas/ 
* config/tc-mips.c (append_insn): Disable branch relaxation for
	DSP instructions.

	gas/testsuite/
	* gas/mips/relax-bposge.l: New test for DSP branch relaxation.
	* gas/mips/relax-bposge.s: Source for the new test.
	* gas/mips/mips.exp: Run the new test.
 2011-02-28 16:26:46 +00:00
Maciej W. Rozycki
3eebd5eb03 gas/ 
* config/tc-mips.c (macro): Handle M_PREF_AB.

	include/opcode/
	* mips.h (M_PREF_AB): New enum value.

	opcodes/
	* mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
 2011-02-28 16:06:51 +00:00
Maciej W. Rozycki
66b3e8dabc gas/ 
* config/tc-mips.c (RELAX_BRANCH_ENCODE): Encode the temporary
	register to use.
	(RELAX_BRANCH_UNCOND): Adjust accordingly.
	(RELAX_BRANCH_LIKELY): Likewise.
	(RELAX_BRANCH_LINK): Likewise.
	(RELAX_BRANCH_TOOFAR): Likewise.
	(RELAX_BRANCH_AT): New macro.
	(append_insn): Encode the temporary register to use in standard
	MIPS branch relaxation.
	(relaxed_branch_length): Update according to changes to
	RELAX_BRANCH_ENCODE.
	(md_convert_frag): Use the encoded register as the temporary.

	gas/testsuite/
	* gas/mips/relax-at.d: New test for branch relaxation with .set
	at.
	* gas/mips/relax.s: Update to support the new test.
	* gas/mips/relax.l: Update accordingly.
	* gas/mips/relax.d: Update for multi-arch invocation.
	* gas/mips/mips.exp: Run the new test.  Adjust to run "relax"
	across all applicable architectures.
 2011-02-28 15:52:26 +00:00
Maciej W. Rozycki
ce70d90a3e gas/ 
* config/tc-mips.c (mips_fix_adjustable): On REL targets also
	reject PC-relative relocations.

	gas/testsuite/
	* gas/mips/branch-misc-2.d: Adjust for relocation change.
	* gas/mips/branch-misc-2pic.d: Likewise.
	* gas/mips/branch-misc-4.d: New test for PC-relative relocation
	overflow.
	* gas/mips/branch-misc-4-64.d: Likewise.
	* gas/mips/branch-misc-4.s: Source for the new tests.
	* testsuite/gas/mips/mips.exp: Run the new tests.
 2011-02-28 15:44:53 +00:00
Maciej W. Rozycki
5c4f07bae1 gas/ 
* config/tc-mips.c (md_convert_frag): Correct message
	capitalization.

	gas/testsuite/
	* gas/mips/relax-swap1.l: Adjust for message capitalization
	correction.
	* gas/mips/relax-swap2.l: Likewise.
	* gas/mips/relax.l: Likewise.
 2011-02-28 15:33:25 +00:00
H.J. Lu
f2d8a97c28 Don't sign-checking 4-byte relocations for x32. 
gas/

2011-02-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (reloc): Don't sign-checking 4-byte
	relocations if 64bit relocations aren't allowed.

gas/testsuite/

2011-02-25  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/ilp32.exp: Run reloc64.

	* gas/i386/ilp32/reloc64.s: Allow TLS relocations with 32bit
	register destinations.
	* gas/i386/ilp32/reloc64.d: Updated.

	* gas/i386/ilp32/reloc64.l: New.
 2011-02-25 19:19:45 +00:00
Alan Modra
e1e9003466 PR gas/12519 
* config/obj-elf.c (elf_frob_symbol): Properly handle size expression.
	* ld-mn10300/i135409-3.s: Correct .size label reference.
	* ld-sh/sh64/stolib.s: Likewise.
 2011-02-25 13:45:54 +00:00
Maciej W. Rozycki
dfa58db10c * config/tc-mips.c (mips_ip) <'o'>: Remove duplicate 
initialization of offset_reloc.
 2011-02-21 23:27:02 +00:00
Mike Frysinger
36f446111a gas/opcodes: blackfin: punt BYTEOP2M insn support 
The BYTEOP2M insn was part of the initial Blackfin designs, but never made
it into any actual silicon.  So punt support for it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-02-13 18:53:16 +00:00
Mike Frysinger
26bb3ddd50 gas/opcodes: blackfin: move dsp mac func defines to common header 
The mmod field is decoded in a few places (gas/opcodes/sim), so move it to
a common place to avoid duplication.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-02-12 19:36:31 +00:00
Mike Frysinger
5f95629354 gas: blackfin: reject FP/SP with TESTSET 
The TESTSET insn does not work with the FP/SP Pregs, so reject them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2011-02-11 19:04:33 +00:00
Alan Modra
b8b738ac92 * config/tc-ppc.c (md_show_usage): Remove -l and -b. Add -K PIC. 
* doc/as.texinfo: Refer to and include c-ppc.texi for PowerPC options.
	(Overview <Target PowerPC options>): Add a number of missing options.
	* doc/c-ppc.texi: Likewise.  Add markup for use in manpage generation.
 2011-02-10 11:59:12 +00:00
H.J. Lu
2dde194857 Use f32_patt in i386_align_code when tuning for i686. 
gas/

2011-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/6957
	* config/tc-i386.c (i386_align_code): Use f32_patt when tuning
	for i686.

gas/testsuite/

2011-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/6957
	* gas/i386/nops-1-i686.d: Updated.
	* gas/i386/nops-3-i686.d: Likewise.
	* gas/i386/nops-4-i686.d: Likewise.
 2011-02-08 20:21:26 +00:00
H.J. Lu
a586129ea5 Also update cpu_arch_isa_flags for ISA extensions. 
gas/

2011-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (set_cpu_arch): Also update cpu_arch_isa_flags
	for ISA extensions.
	(md_parse_option): Likewise.

gas/testsuite/

2011-02-08  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run nops-4a-i686 and nops-6.

	* gas/i386/nops-4a-i686.d: New.
	* gas/i386/nops-6.d: Likewise.
	* gas/i386/nops-6.s: Likewise.
 2011-02-08 18:12:25 +00:00
Bernd Schmidt
98d23befa7 gas/ 
* doc/as.texinfo (Target TIC6X options): Don't mention "-matomic".
	* doc/c-tic6x.texi (TIC6X Directives): Don't mention ".atomic".
	(TIC6X Options): Don't mention "-matomic".
	* config/tc-tic6x.c (OPTION_MATOMIC, OPTION_MNO_ATOMIC): Delete.
	(md_longopts): Remove corresponding entries.
	(md_parse_option): Don't handle them.
	(md_show_usage): Don't document them.
	(tic6x_atomic): Delete variable.
	(tic6x_update_features): Always copy tic6x_arch_enable to
	tic6x_features.
	(tic6x_arch_enable): Remove references to TIC6X_INSN_ATOMIC.
	(s_tic6x_atomic, s_tic6x_noatomic): Remove functions.
	(md_pseudo_table): Remove ".atomic" and ".noatomic".

	gas/testsuite/
	* gas/tic6x/dir-junk.l: Remove tests for .atomic and .noatomic.
	* gas/tic6x/dir-junk.s: Likewise.
	* gas/tic6x/insns-c674x-bad.d: Remove test.
	* gas/tic6x/insns-c674x-bad.l: Likewise.
	* gas/tic6x/insns-atomic.d: Remove "-matomic" switch.

	include/opcode/
	* tic6x-opcode-table.h (cmtl, ll, sl): Available on C64XP.
	* tic6x.h (TIC6X_INSN_ATOMIC): Remove.
 2011-02-03 23:20:26 +00:00
Nick Clifton
a22429b98e * write.c (write_contents): Include output file name and bfd error 
value when reporting the inability to write to the output file.
	* config/tc-rx.c (rx_handle_align): Do not insert NOPs into align
	frag that has a non-zero fill value.

	* gas/all/align.d: Skip for the RX.
	* gas/elf/group1a.d: Likewise.
	* gas/elf/groupautoa.d: Likewise.
	* gas/elf/elf.exp: Do not run section5 test for the RX port.
	* gas/elf/section4.d: Likewise.
	* gas/elf/section7.d: Likewise.
	* gas/macros/semi.s: Fill with a non-zero pattern.
	* gas/macros/semi.d: Expect non-zero fill value.
	* gas/rx/bcnd.d: Update expected disassembly.
	* gas/rx/bra.d: Likewise.
	* gas/rx/macros.inc: Add reg1 macro.
	* gas/rx/max.sm: Use reg1 macro to avoid generating illegal NOP
	instruction.
	* gas/rx/mov.sm: Likewise.
	* gas/rx/max.d: Update expected disassembly.
	* gas/rx/mov.d: Likewise.
	* gas/rx/rx-asm-good.s: Use Renesas section names.
	* gas/rx/rx-asm-good.d: Update expected disassembly.
 2011-01-31 16:43:15 +00:00
DJ Delorie
eb6fae196b * config/tc-rx.c (md_convert_frag): If we can't compute the target 
address, zero out the values stored in the object file to make
objdump's output consistent.
 2011-01-27 22:38:32 +00:00
Kai Tietz
ca19b261ec 2011-01-26 Kai Tietz <kai.tietz@onevision.com> 
* config/tc-i386.c (md_begin): Set for x64 windows COFF target
        x86_dwarf2_return_column to 32.
 2011-01-26 10:16:12 +00:00
Nick Clifton
b37a4e796b PR gas/12384 
* config/tc-h8300.c (constant_fits_width_p): Use correct type for
	comparison.
 2011-01-20 12:49:05 +00:00
Nick Clifton
4a58c4bdc9 * config/tc-arm.c (arm_cpus): Add Faraday ARMv5TE compatible 
cores: fa606te, fa616te, fmp626.  Modify the VFP of fa626te.
	* doc/c-arm.texi (ARM Options): Add -mcpu={fa606te, fa616te,
	fmp626} options.
 2011-01-18 14:10:44 +00:00
Quentin Neill
2a2a0f38e7 Add support for TBM instructions. 
gas/

2011-01-17  Quentin Neill  <quentin.neill@amd.com>

	* config/tc-i386.c (cpu_arch): Add CPU_TBM_FLAGS.

	* doc/c-i386.texi (i386-TBM): New section.

opcodes/

2011-01-17  Quentin Neill  <quentin.neill@amd.com>

	* i386-dis.c (REG_XOP_TBM_01): New.
	(REG_XOP_TBM_02): New.
	(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
	(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
	entries, and add bextr instruction.

	* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
	(cpu_flags): Add CpuTBM.

	* i386-opc.h (CpuTBM) New.
	(i386_cpu_flags): Add bit cputbm.

	* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
	blcs, blsfill, blsic, t1mskc, and tzmsk.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated

gas/testsuite

2011-01-17  Quentin Neill  <quentin.neill@amd.com>

	* gas/i386/tbm.s: New.
	* gas/i386/tbm.d: New.
	* gas/i386/tbm-intel.d: New.
	* gas/i386/x86-64-tbm.s: New.
	* gas/i386/x86-64-tbm.d: New.
	* gas/i386/x86-64-tbm-intel.d: New.
	* gas/i386/arch-10.d: Add tbm flag and TBM instruction pattern.
	* gas/i386/arch-10.s: Add a TBM instruction.
	* gas/i386/arch-10-1.l: Add TBM instruction pattern.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
 2011-01-17 18:40:36 +00:00
H.J. Lu
862be3fb9a Disallow 64bit relocations in x32 mode. 
gas/

2011-01-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (disallow_64bit_disp): Renamed to ...
	(disallow_64bit_reloc): This.
	(md_assemble): Don't check movabs for x32 mode here.
	(i386_target_format): Updated.
	(tc_gen_reloc): Check if 64bit relocations are allowed.

gas/testsuite/

2011-01-16  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/immed64.s: New.
	* gas/i386/ilp32/reloc64.s: Likewise.
	* gas/i386/ilp32/x86-64-pcrel.s: Likewise.

	* gas/i386/ilp32/inval.s: Add more tests.

	* gas/i386/ilp32/immed64.d: Updated.
	* gas/i386/ilp32/inval.l: Likewise.
	* gas/i386/ilp32/reloc64.d: Likewise.
	* gas/i386/ilp32/x86-64-pcrel.d: Likewise.
 2011-01-16 17:06:12 +00:00
H.J. Lu
7f56bc95d6 Don't allow movabs with relocation in x32 mode. 
gas/

2011-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (disallow_64bit_disp): New.
	(x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with
	X86_64_ABI/X86_64_X32_ABI.
	(md_assemble): Don't allow movabs with relocation in x32 mode.
	(i386_target_format): Updated.

gas/testsuite/

2011-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/ilp32.exp: Run inval.

	* gas/i386/ilp32/inval.l: New.
	* gas/i386/ilp32/inval.s: Likewise.
	* gas/i386/ilp32/x86-64.s: Likewise.

	* gas/i386/ilp32/x86-64.d: Don't use ../x86_64.s.  Updated.
 2011-01-15 15:48:02 +00:00
H.J. Lu
570561f71a Rename --n32 to --x32. 
gas/

2011-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (OPTION_N32): Renamed to ...
	(OPTION_X32): This.
	(md_longopts): Replace n32 with x32.
	(md_parse_option): Updated.
	(md_show_usage): Likewise.

	* doc/c-i386.texi: Replace n32 with x32.

gas/testsuite/

2011-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/cfi/ilp32.exp: Replace --n32 with --x32.
	* gas/i386/ilp32/elf/ilp32.exp: Likewise.
	* gas/i386/ilp32/ilp32.exp: Likewise.
	* gas/i386/ilp32/lns/ilp32.exp: Likewise.

ld/testsuite/

2011-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/ilp32-1.d: Replace --n32 with --x32.
	* ld-x86-64/ilp32-2.d: Likewise.
	* ld-x86-64/ilp32-3.d: Likewise.
	* ld-x86-64/ilp32-4.d: Likewise.
	* ld-x86-64/ilp32-5.d: Likewise.
	* ld-x86-64/x86-64.exp: Likewise.
 2011-01-14 23:07:11 +00:00
Mingjie Xing
c95354ed13 Take unadjusted offset for loongson3a specific instructions. 2011-01-11 07:22:09 +00:00
Nick Clifton
7af8ed2d47 * config/tc-i386.c (x86_elf_abi): Only define for targets that use 
it.
 2011-01-10 10:10:06 +00:00
Nick Clifton
cdf9ccec6a * config/tc-arm.c (s_arm_tls_desceq): Move code into ELF-only 
part of the file.
 2011-01-10 09:50:02 +00:00
Nathan Sidwell
0855e32bf5 bfd/ 
* reloc.c (BFD_RELOC_ARM_TLS_GOTDESC, BFD_RELOC_ARM_TLS_CALL,
	BFD_RELOC_ARM_THM_TLS_CALL, BFD_RELOC_ARM_TLS_DESCSEQ,
	BFD_RELOC_ARM_THM_TLS_DESCSEQ, BFD_RELOC_ARM_TLS_DESC): New
	relocations.
	* libbfd.h: Rebuilt.
	* bfd-in2.h: Rebuilt.
	* elf32-arm.c (elf32_arm_howto_table_1): Add new relocations.
	(elf32_arm_reloc_map): Likewise.
	(tls_trampoline, dl_tlsdesc_lazy_trampoline): New PLT templates.
	(elf32_arm_stub_long_branch_any_tls_pic,
	elf32_arm_stub_long_branch_v4t_thumb_tls_pic): New stub templates.
	(DEF_STUBS): Add new stubs.
	(struct_elf_arm_obj_data): Add local_tlsdesc_gotent field.
	(elf32_arm_local_tlsdesc_gotent): New.
	(GOT_TLS_GDESC): New mask.
	(GOT_TLS_GD_ANY): Define.
	(struct elf32_arm_link_hash_entry): Add tlsdesc_got field.
	(elf32_arm_compute_jump_table_size): New.
	(struct elf32_arm_link_hash_table): Add next_tls_desc_index,
	num_tls_desc, dt_tlsdesc_plt, dt_tlsdesc_got, tls_trampoline,
	sgotplt_jump_table_size fields.
	(elf32_arm_link_hash_newfunc): Initialize tlsdesc_got field.
	(elf32_arm_link_hash_table_create): Initialize new fields.
	(arm_type_of_stub): Check TLS desc relocs too.
	(elf32_arm_stub_name): TLS desc relocs can be shared.
	(elf32_arm_tls_transition): Determine relaxation.
	(arm_stub_required_alignment): Add tls stubs.
	(elf32_arm_size_stubs): Likewise.
	(elf32_arm_tls_relax): Perform TLS relaxing.
	(elf32_arm_final_link_relocate): Process TLS DESC relocations.
	(IS_ARM_TLS_GNU_RELOC): New.
	(IS_ARM_TLS_RELOC): Use it.
	(elf32_arm_relocate_section): Perform TLS relaxing.
	(elf32_arm_check_relocs): Anticipate TLS relaxing, process tls
	desc relocations.
	(allocate_dynrelocs): Allocate tls desc relcoations.
	(elf32_arm_output_arch_local_syms): Emit tls trampoline mapping
	symbols.
	(elf32_arm_size_dynamic_sections): Allocate tls trampolines and
	got slots.
	(elf32_arm_always_size_sections): New. Create _TLS_MODULE_BASE
	symbol.
	(elf32_arm_finish_dynamic_symbol): Adjust.
	(arm_put_trampoline): New.
	(elf32_arm_finish_dynamic_sections): Emit new dynamic tags and tls
	trampolines.
	(elf_backend_always_size_sections): Define.

	include/elf/
	* arm.h (R_ARM_TLS_DESC, R_ARM_TLS_GOTDESC, R_ARM_TLS_CALL,
	R_ARM_TLS_DESCSEQ, T_ARM_THM_TLS_CALL, R_ARM_THM_TLS_DESCSEQ): New
	relocations.

	gas/
	* doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and
	.tlsdescseq directive.
	* config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc
	following a symbol.
	(s_arm_tls_descseq): New directive.
	(md_pseudo_table): Add it.
	(encode_branch): Allow TLS_CALL relocs too.
	(do_t_blx, do_t_branch23): Use encode_branch.
	(reloc_names): Add tlsdesc and tlscall.
	(md_apply_fix): Process tls desc relocations.
	(tc_gen_reloc): Likewise.
	(arm_fix_adjustable): Likewise.

	gas/testsuite/
	* gas/arm/tls.s: Add tlsdesc tests.
	* gas/arm/tls.d: Adjust.

	ld/testsuite/
	* ld-arm/arm-elf.exp: Added tests for new TLS handling
	relocations.
	* ld-arm/tls-descrelax-be32.d: New.
	* ld-arm/tls-descrelax-be32.s: New.
	* ld-arm/tls-descrelax-be8.d: New.
	* ld-arm/tls-descrelax-be8.s: New.
	* ld-arm/tls-descrelax-v7.d: New.
	* ld-arm/tls-descrelax-v7.s: New.
	* ld-arm/tls-descrelax.d: New.
	* ld-arm/tls-descrelax.s: New.
	* ld-arm/tls-descseq.d: New.
	* ld-arm/tls-descseq.r: New.
	* ld-arm/tls-descseq.s: New.
	* ld-arm/tls-gdesc-got.d: New.
	* ld-arm/tls-gdesc-got.s: New.
	* ld-arm/tls-gdesc-nlazy.g: New.
	* ld-arm/tls-gdesc-nlazy.s: New.
	* ld-arm/tls-gdesc.d: New.
	* ld-arm/tls-gdesc.r: New.
	* ld-arm/tls-gdesc.s: New.
	* ld-arm/tls-gdierelax.d: New.
	* ld-arm/tls-gdierelax.s: New.
	* ld-arm/tls-gdierelax2.d: New.
	* ld-arm/tls-gdierelax2.s: New.
	* ld-arm/tls-gdlerelax.d: New.
	* ld-arm/tls-gdlerelax.s: New.
	* ld-arm/tls-lib-loc.d: New.
	* ld-arm/tls-lib-loc.r: New.
	* ld-arm/tls-lib-loc.s: New.
	* ld-arm/tls-longplt-lib.d: New.
	* ld-arm/tls-longplt-lib.s: New.
	* ld-arm/tls-longplt.d: New.
	* ld-arm/tls-longplt.s: New.
	* ld-arm/tls-mixed.r: New.
	* ld-arm/tls-mixed.s: New.
	* ld-arm/tls-thumb1.d: New.
	* ld-arm/tls-thumb1.s: New.
	* ld-arm/arm-elf.exp: New.
 2011-01-10 08:40:19 +00:00
Quentin Neill
87973e9f82 Add docs and arch tests to BMI. 
gas/
2011-01-07  Quentin Neill  <quentin.neill@amd.com>

	* config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS.

	* doc/c-i386.texi (i386-BMI): New section.

gas/testsuite/
2011-01-07  Quentin Neill  <quentin.neill@amd.com>

	* gas/i386/arch-10.s: Add a BMI instruction.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/arch-10.d: Add bmi flag and BMI instruction pattern.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/arch-10-1.l: Add BMI instruction pattern.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
 2011-01-07 17:44:30 +00:00
Paul Koning
12505806d0 * config/tc-pdp11.c (parse_op_no_deferred): Allow PC-relative 
references to absolute addresses.
 2011-01-06 16:41:35 +00:00
DJ Delorie
9689e3a3a7 * reloc.c: Add BFD_RELOC_RX_OP_NEG. 
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* elf32-rx.c: Add it to the list, corresponding to R_RX_OPneg.

* config/tc-rx.c (tc_gen_reloc): Emit an RX_OP_NEG expression
instead of an RH_NEG32 one.
 2011-01-05 22:04:09 +00:00
H.J. Lu
f12dc42220 Implement BMI instructions. 2011-01-05 00:16:57 +00:00
Dave Anglin
3c853d9313 PR gas/11395 
* config/tc-hppa.c (pa_ip): Revert last change.  Add variable need_cond
	to determine whether a 64-bit condition is needed for 'A' and 'S'
	conditions.  Default to 32-bit never condition for logical and unit
	instructions.  Add error message for missing branch on bit condition.

	* hppa.h (pa_opcodes): Revert last change.  Exchange 32 and 64-bit
	"bb" entries.

	* hppa-dis.c (compare_cond_64_names): Change never condition to ",*".
	(add_cond_64_names): Likewise.
	(logical_cond_64_names): Likewise.
	(unit_cond_64_names): Likewise.
 2010-12-31 16:43:46 +00:00
Richard Sandiford
aeffff6722 bfd/ 
2010-12-23  Robert Millan  <rmh@gnu.org>

	* config.bfd: Recognize mips-freebsd and mips-kfreebsd-gnu.
	* configure.host: Likewise.
	* configure.in: Support for `bfd_elf32_ntradbigmips_freebsd_vec',
	`bfd_elf32_ntradlittlemips_freebsd_vec',
	`bfd_elf32_tradbigmips_freebsd_vec',
	`bfd_elf32_tradlittlemips_freebsd_vec',
	`bfd_elf64_tradbigmips_freebsd_vec' and
	`bfd_elf64_tradlittlemips_freebsd_vec'.
	* configure: Regenerate.
	* elf32-mips.c: New target for FreeBSD support
	(same as traditional MIPS but overrides ELF_OSABI
	with ELFOSABI_FREEBSD).
	* elf64-mips.c: Likewise.
	* elfn32-mips.c: Likewise.
	* targets.c (_bfd_target_vector): Add
	`bfd_elf32_ntradbigmips_freebsd_vec',
	`bfd_elf32_ntradlittlemips_freebsd_vec',
	`bfd_elf32_tradbigmips_freebsd_vec',
	`bfd_elf32_tradlittlemips_freebsd_vec',
	`bfd_elf64_tradbigmips_freebsd_vec' and
	`bfd_elf64_tradlittlemips_freebsd_vec'.

ld/
2010-12-14  Robert Millan  <rmh@gnu.org>

	* configure.tgt: Recognize mips-freebsd and mips-kfreebsd-gnu.

	* emulparams/elf32btsmip_fbsd.sh: New file.
	* emulparams/elf32btsmipn32_fbsd.sh: Likewise.
	* emulparams/elf32ltsmip_fbsd.sh: Likewise.
	* emulparams/elf32ltsmipn32_fbsd.sh: Likewise.
	* emulparams/elf64btsmip_fbsd.sh: Likewise.
	* emulparams/elf64ltsmip_fbsd.sh: Likewise.

	* Makefile.am: Add build rules for `eelf32btsmip_fbsd.c',
	`eelf32btsmipn32_fbsd.c', `eelf32ltsmip_fbsd.c',
	`eelf32ltsmipn32_fbsd.c', `eelf64btsmip_fbsd.c' and
	`eelf64ltsmip_fbsd.c'.
	* Makefile.in: Regenerate.

gas/
2010-12-19  Robert Millan  <rmh@gnu.org>
	    Richard Sandiford  <rdsandiford@googlemail.com>

	* config/tc-mips.c (ELF_TARGET): New macro.  Generates target
	names accordingly to whether TE_FreeBSD and whether TE_TMIPS
	are defined.
	(mips_target_format): Refactor code using ELF_TARGET().
	(support_64bit_objects): Likewise.

	* configure.in: Recognize mips-freebsd and mips-kfreebsd-gnu.
	* configure.tgt: Likewise.
	* configure: Regenerate.

binutils/testsuite/
	* binutils-all/readelf.exp: Handle MIPS FreeBSD targets.

gas/testsuite/
	* gas/mips/e32el-rel2.d: Accept any file format.
	* gas/mips/elf-rel.d: Likewise.
	* gas/mips/elf-rel2.d: Likewise.
	* gas/mips/elf-rel3.d: Likewise.
	* gas/mips/elfel-rel.d: Likewise.
	* gas/mips/elfel-rel2.d: Likewise.
	* gas/mips/elfel-rel3.d: Likewise.
	* gas/mips/ldstla-32-mips3-shared.d: Likewise.
	* gas/mips/ldstla-32-mips3.d: Likewise.
	* gas/mips/ldstla-32-shared.d: Likewise.
	* gas/mips/ldstla-32.d: Likewise.
	* gas/mips/ldstla-n64-shared.d: Likewise.
	* gas/mips/ldstla-n64.d: Likewise.
	* gas/mips/noat-1.d: Likewise.
	* gas/mips/set-arch.d: Likewise.
	* gas/mips/tls-o32.d: Likewise.

ld/testsuite/
	* ld-mips-elf/mips-elf-flags.exp: Handle FreeBSD targets.
	* ld-mips-elf/mips-elf.exp: Likewise.
	* ld-mips-elf/mips16-call-global.d: Accept any file format.
	* ld-mips-elf/mips16-intermix.d: Likewise.
 2010-12-31 11:01:00 +00:00
H.J. Lu
351f65ca26 Add x86-64 ILP32 support. 
bfd/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* archures.c (bfd_mach_x64_32): New.
	(bfd_mach_x64_32_intel_syntax): Likewise.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf32_x86_64_vec for
	i[3-7]86-*-linux-*.
	(targ_selvecs): Add bfd_elf32_x86_64_vec for x86_64-*-linux-*.

	* configure.in: Support bfd_elf32_x86_64_vec.
	* configure: Regenerated.

	* cpu-i386.c (bfd_x64_32_arch_intel_syntax): New.
	(bfd_x64_32_arch): Likewise.

	* elf-bfd.h (elf_append_rela): New prototype.
	(elf_append_rel): Likewise.
	(elf64_r_info): Likewise.
	(elf32_r_info): Likewise.
	(elf64_r_sym): Likewise.
	(elf32_r_sym): Likewise.

	* elf64-x86-64.c (ABI_64_P): New.
	(elf_x86_64_info_to_howto): Replace ELF64_R_TYPE with
	ELF32_R_TYPE.  Replace ELF64_ST_TYPE with ELF_ST_TYPE.
	(elf_x86_64_check_tls_transition):Likewise.
	(elf_x86_64_check_relocs): Likewise.
	(elf_x86_64_gc_mark_hook):Likewise.
	(elf_x86_64_gc_sweep_hook): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_reloc_type_class): Likewise.
	(ELF_DYNAMIC_INTERPRETER): Renamed to ...
	(ELF64_DYNAMIC_INTERPRETER): This.
	(ELF32_DYNAMIC_INTERPRETER): New.
	(elf_x86_64_link_hash_table): Add r_info, r_sym, swap_reloca_out,
	dynamic_interpreter and dynamic_interpreter_size.
	(elf_x86_64_get_local_sym_hash): Replace ELF64_R_SYM with
	htab->r_sym.  Replace ELF64_R_INFO with htab->r_info.
	(elf_x86_64_get_local_sym_hash): Likewise.
	(elf_x86_64_check_tls_transition):Likewise.
	(elf_x86_64_check_relocs): Likewise.
	(elf_x86_64_gc_mark_hook):Likewise.
	(elf_x86_64_gc_sweep_hook): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_finish_dynamic_symbol): Likewise.
	(elf_x86_64_finish_local_dynamic_symbol): Likewise.
	(elf_x86_64_link_hash_table_create): Initialize r_info, r_sym,
	swap_reloca_out, dynamic_interpreter and dynamic_interpreter_size.
	(elf_x86_64_check_relocs): Check ABI_64_P when requesting for
	PIC.
	(elf_x86_64_relocate_section): Likewise.
	(elf64_x86_64_adjust_dynamic_symbol): Replace sizeof
	(Elf64_External_Rela) with bed->s->sizeof_rela.
	(elf64_x86_64_allocate_dynrelocs): Likewise.
	(elf64_x86_64_size_dynamic_sections): Likewise.
	(elf64_x86_64_finish_dynamic_symbol): Likewise.
	(elf64_x86_64_append_rela): Removed.
	(elf32_x86_64_elf_object_p): New.
	Add bfd_elf32_x86_64_vec.

	* elf64-x86-64.c (elf64_x86_64_xxx): Renamed to ...
	(elf_x86_64_xxx): This.

	* elflink.c (bfd_elf_final_link): Check ELF file class on error.
	(elf_append_rela): New.
	(elf_append_rel): Likewise.
	(elf64_r_info): Likewise.
	(elf32_r_info): Likewise.
	(elf64_r_sym): Likewise.
	(elf32_r_sym): Likewise.

	* targets.c (bfd_elf32_x86_64_vec): New.
	(_bfd_target_vector): Add bfd_elf32_x86_64_vec.

gas/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (x86_elf_abi): New.
	(i386_mach): Return bfd_mach_x64_32 for ILP32.
	(OPTION_N32): Likewise.
	(md_longopts): Add "n32" for ELF.
	(md_parse_option): Handle OPTION_N32.
	(md_show_usage): Add --n32.
	(i386_target_format): Update and check x86_elf_abi.

	* config/tc-i386.h (ELF_TARGET_FORMAT32): New.

	* doc/as.texinfo: Document --n32.
	* doc/c-i386.texi: Likewise.

gas/testsuite/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/ilp32/lns/ilp32.exp: New.
	* gas/i386/ilp32/lns/lns-common-1.d: Likewise.
	* gas/i386/ilp32/lns/lns-duplicate.d: Likewise.

	* gas/i386/ilp32/cfi/cfi-common-1.d: New.
	* gas/i386/ilp32/cfi/cfi-common-2.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-3.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-4.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-5.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-6.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-common-7.d: Likewise.
	* gas/i386/ilp32/cfi/cfi-x86_64.d: Likewise.
	* gas/i386/ilp32/cfi/ilp32.exp: Likewise.
	* gas/i386/ilp32/elf/ehopt0.d: Likewise.
	* gas/i386/ilp32/elf/equ-reloc.d: Likewise.
	* gas/i386/ilp32/elf/file.d: Likewise.
	* gas/i386/ilp32/elf/group0a.d: Likewise.
	* gas/i386/ilp32/elf/group0b.d: Likewise.
	* gas/i386/ilp32/elf/group1a.d: Likewise.
	* gas/i386/ilp32/elf/group1b.d: Likewise.
	* gas/i386/ilp32/elf/ifunc-1.d: Likewise.
	* gas/i386/ilp32/elf/ilp32.exp: Likewise.
	* gas/i386/ilp32/elf/redef.d: Likewise.
	* gas/i386/ilp32/elf/section0.d: Likewise.
	* gas/i386/ilp32/elf/section1.d: Likewise.
	* gas/i386/ilp32/elf/section3.d: Likewise.
	* gas/i386/ilp32/elf/section4.d: Likewise.
	* gas/i386/ilp32/elf/section6.d: Likewise.
	* gas/i386/ilp32/elf/section7.d: Likewise.
	* gas/i386/ilp32/elf/struct.d: Likewise.
	* gas/i386/ilp32/elf/symtab.d: Likewise.
	* gas/i386/ilp32/elf/symver.d: Likewise.

	* gas/i386/ilp32/ilp32.exp: New.
	* gas/i386/ilp32/immed64.d: Likewise.
	* gas/i386/ilp32/mixed-mode-reloc64.d: Likewise.
	* gas/i386/ilp32/reloc64.d: Likewise.
	* gas/i386/ilp32/rex.d: Likewise.
	* gas/i386/ilp32/rexw.d: Likewise.
	* gas/i386/ilp32/svme64.d: Likewise.
	* gas/i386/ilp32/x86-64-addr32.d: Likewise.
	* gas/i386/ilp32/x86-64-addr32-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-aes.d: Likewise.
	* gas/i386/ilp32/x86-64-aes-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-amdfam10.d: Likewise.
	* gas/i386/ilp32/x86-64-arch-1.d: Likewise.
	* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
	* gas/i386/ilp32/x86-64-avx.d: Likewise.
	* gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-avx-swap.d: Likewise.
	* gas/i386/ilp32/x86-64-avx-swap-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-branch.d: Likewise.
	* gas/i386/ilp32/x86-64-cbw.d: Likewise.
	* gas/i386/ilp32/x86-64-cbw-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-clmul.d: Likewise.
	* gas/i386/ilp32/x86-64-clmul-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-crc32.d: Likewise.
	* gas/i386/ilp32/x86-64-crc32-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-crx.d: Likewise.
	* gas/i386/ilp32/x86-64-crx-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64.d: Likewise.
	* gas/i386/ilp32/x86-64-disp.d: Likewise.
	* gas/i386/ilp32/x86-64-disp-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-drx.d: Likewise.
	* gas/i386/ilp32/x86-64-drx-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-ept.d: Likewise.
	* gas/i386/ilp32/x86-64-ept-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-fma4.d: Likewise.
	* gas/i386/ilp32/x86-64-fma.d: Likewise.
	* gas/i386/ilp32/x86-64-fma-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-gidt.d: Likewise.
	* gas/i386/ilp32/x86-64-ifunc.d: Likewise.
	* gas/i386/ilp32/x86-64-intel64.d: Likewise.
	* gas/i386/ilp32/x86-64-io.d: Likewise.
	* gas/i386/ilp32/x86-64-io-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-io-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-localpic.d: Likewise.
	* gas/i386/ilp32/x86-64-mem.d: Likewise.
	* gas/i386/ilp32/x86-64-mem-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-movbe.d: Likewise.
	* gas/i386/ilp32/x86-64-movbe-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-pentium.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-3.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-5.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops.d: Likewise.
	* gas/i386/ilp32/x86-64-opcode.d: Likewise.
	* gas/i386/ilp32/x86-64-opcode-inval.d: Likewise.
	* gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-opts.d: Likewise.
	* gas/i386/ilp32/x86-64-opts-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-pcrel.d: Likewise.
	* gas/i386/ilp32/x86-64-reg.d: Likewise.
	* gas/i386/ilp32/x86-64-reg-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-rep.d: Likewise.
	* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-rip.d: Likewise.
	* gas/i386/ilp32/x86-64-rip-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-sib.d: Likewise.
	* gas/i386/ilp32/x86-64-sib-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-simd.d: Likewise.
	* gas/i386/ilp32/x86-64-simd-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-simd-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-sse2avx.d: Likewise.
	* gas/i386/ilp32/x86-64-sse2avx-opts.d: Likewise.
	* gas/i386/ilp32/x86-64-sse2avx-opts-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-sse3.d: Likewise.
	* gas/i386/ilp32/x86-64-sse4_1.d: Likewise.
	* gas/i386/ilp32/x86-64-sse4_1-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-sse4_2.d: Likewise.
	* gas/i386/ilp32/x86-64-sse4_2-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-sse-check.d: Likewise.
	* gas/i386/ilp32/x86-64-sse-check-none.d: Likewise.
	* gas/i386/ilp32/x86-64-sse-check-warn.d: Likewise.
	* gas/i386/ilp32/x86-64-sse-noavx.d: Likewise.
	* gas/i386/ilp32/x86-64-ssse3.d: Likewise.
	* gas/i386/ilp32/x86-64-stack.d: Likewise.
	* gas/i386/ilp32/x86-64-stack-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-stack-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-unwind.d: Likewise.
	* gas/i386/ilp32/x86-64-vmx.d: Likewise.
	* gas/i386/ilp32/x86-64-xsave.d: Likewise.
	* gas/i386/ilp32/x86-64-xsave-intel.d: Likewise.

ld/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* emulparams/elf32_x86_64.sh: New.

	* configure.tgt (targ64_extra_emuls): Add elf32_x86_64 for
	i[3-7]86-*-linux-*.
	(targ_extra_libpath): Likewise.
	(targ_extra_emuls): Add elf32_x86_64 for x86_64-*-linux-*.
	(targ_extra_libpath): Likewise.

	* Makefile.am (ALL_64_EMULATION_SOURCES): Add eelf32_x86_64.c.
	(eelf32_x86_64.c): New.
	* Makefile.in: Regenerated.

opcodes/

2010-12-30  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Support bfd_mach_x64_32 and
	bfd_mach_x64_32_intel_syntax.
 2010-12-31 00:33:36 +00:00
Dave Anglin
a64718d3b1 PR gas/11395 
* config/tc-hppa.c (pa_ip): Set doubleword carry/borrow bit when a
	doubleword completer or doubleword condition is found in an add/sub
	instruction.  Reject match for 'A'/'S' only if there is no condition
	and d bit is not set.

	* gas/hppa/basic/add2.s: Add test for a simple doubleword carry
	instruction.
	* gas/hppa/basic/sub2.s: Add tests for simple word and doubleword
	borrow instructions.
	* gas/hppa/basic/basic.exp: Update regexps for above.

	* opcode/hppa.h: Clear "d" bit in "add" and "sub" patterns.
 2010-12-27 02:05:14 +00:00
Richard Sandiford
9867540240 include/opcode/ 
2010-12-14  Mingjie Xing  <mingjie.xing@gmail.com>

	* mips.h (OP_*_OFFSET_A, OP_*_OFFSET_B, OP_*_OFFSET_C)
	(OP_*_RZ, OP_*_FZ, INSN2_M_FP_D, INSN2_WRITE_GPR_Z, INSN2_WRITE_FPR_Z)
	(INSN2_READ_GPR_Z, INSN2_READ_FPR_Z, INSN2_READ_GPR_D): Define.

opcodes/
2010-12-14  Mingjie Xing  <mingjie.xing@gmail.com>

	* mips-opc.c (WR_z, WR_Z, RD_z, RD_Z, RD_d): Define.
	(mips_builtin_opcodes): Add loongson3a specific instructions.
	* mips-dis.c (print_insn_args): Handle the new arguments +a|b|c|z|Z.

gas/
2010-12-14  Mingjie Xing  <mingjie.xing@gmail.com>

	* config/tc-mips.c (insn_uses_reg): Handle the new flags
	INSN2_READ_FPR_Z, INSN2_READ_GPR_D and INSN2_READ_GPR_Z.
	(append_insn): Handle delay-slot filling for the new flags.
	(validate_mips_insn): Handle the new arguments +a|b|c|z|Z.
	(mips_ip): Handle the new arguments +a|b|c|z|Z.

gas/testsuite/
2010-12-14  Mingjie Xing  <mingjie.xing@gmail.com>

	* gas/mips/loongson-3a-2.s, gas/mips/loongson-3a-2.d,
	gas/mips/loongson-3a-3.s, gas/mips/loongson-3a-3.d: New tests.
	* gas/mips/mips.exp: Run them.
 2010-12-18 11:14:14 +00:00
DJ Delorie
e6a3fb4b5c * config/rx-parse.y (SUB): Correct subtraction of immediate 
pattern.
 2010-12-18 05:40:46 +00:00
DJ Delorie
e8ef21bff5 * reloc.c (BFD_RELOC_RX_ABS16_REV): Add. 
(BFD_RELOC_RX_ABS32_REV): Add.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf32-rx.c (rx_reloc_map): Add them.

* config/tc-rx.c (rx_validate_fix_sub): Permit subtraction in more
cases.
(tc_gen_reloc): Fix handling of subtraction (esp wrt endianness).
 2010-12-17 04:17:00 +00:00
Maciej W. Rozycki
a1facbec7a * symbols.c (symbol_clone_if_forward_ref): Call tc_new_dot_label 
for new fake labels created off the dot special symbol.
	* config/tc-mips.h (tc_new_dot_label): New macro.
	(mips_record_label): New prototype.
	* config/tc-mips.c (my_getExpression): Remove MIPS16 fake label
	annotation.
	(s_cons, s_float_cons, s_gpword, s_gpdword): Only clear labels
	recorded once data expressions have been evaluated.
	(mips_define_label): Move code to record labels over to...
	(mips_record_label): ... this new function.
	* doc/internals.texi: Document tc_new_dot_label.
 2010-12-16 18:48:28 +00:00
Maciej W. Rozycki
3ae8dd8d51 * config/tc-mips.h (TC_ADDRESS_BYTES): New macro. 
(mips_address_bytes): New prototype.
	* config/tc-mips.c (mips_address_bytes): New function.
 2010-12-10 14:25:05 +00:00
Maciej W. Rozycki
da7bc628fe * config/tc-mips.c (mips_ip): Remove dead format specifier code. 2010-12-09 23:59:12 +00:00
Maciej W. Rozycki
738f4d98b4 gas/ 
* config/tc-mips.c (file_ase_mips16): Adjust comment.
	(append_insn): Update file_ase_mips16.
	(mips_after_parse_args): Don't set file_ase_mips16 here.

	gas/testsuite/
	* gas/mips/elf_ase_mips16.d: Update test for new MIPS16 ASE flag
	semantics.
	* gas/mips/elf_ase_mips16-2.d: New test.
	* gas/mips/nop.s: Source for the new test.
	* gas/mips/mips.exp: Run the new test.

	binutils/testsuite/
	* lib/binutils-common.exp (regexp_diff): Implement inverse
	matching, requested by `!'.
 2010-12-09 23:57:22 +00:00
Maciej W. Rozycki
c7af427326 * config/tc-mips.c (macro) 
<M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T>: Remove
	dedicated return points.
 2010-12-09 23:46:06 +00:00
Maciej W. Rozycki
d5818fca0b * config/tc-mips.c (macro) <M_DEXT, M_DINS>: Correct types used 
for pos and size.
 2010-12-09 23:43:32 +00:00
Maciej W. Rozycki
842f8b2a1e gas/ 
* config/tc-mips.c (macro) <ld_st>: Don't load a zero into an
	auxiliary register when using a signed 16-bit constant offset.

	gas/testsuite/
	* gas/mips/ldstla-32.d: Update according to a 16-bit constant
	offset optimization.
	* gas/mips/ldstla-32-mips3.d: Likewise.
	* gas/mips/ldstla-32-shared.d: Likewise.
	* gas/mips/ldstla-32-mips3-shared.d: Likewise.
 2010-12-09 23:33:24 +00:00
Maciej W. Rozycki
34224acf36 * config/tc-mips.c (mips_ip): Remove lastregno's 
preinitialization.
 2010-12-09 23:21:51 +00:00
Maciej W. Rozycki
f9bbfb18be * config/tc-mips.c (mips_ip) <'('>: Don't let '4', '5' or '-' 
as a base register specifier.
 2010-12-09 23:19:22 +00:00
Maciej W. Rozycki
c4a68bea7a * config/tc-mips.c (macro) <M_S_DOB>: Fix the placement of code. 2010-12-09 22:56:46 +00:00
Maciej W. Rozycki
88320db2f7 * config/tc-mips.c (mips_ip) <'u'>: Report the value of the LUI 
argument complained about; reword the message.
 2010-12-09 22:52:54 +00:00
Maciej W. Rozycki
f01dc9538a * config/tc-mips.c (macro) 
<M_BGTUL_I, M_BGTU_I, M_BLEUL_I, M_BLEU_I>: Fix the constant
	used to compare against for the always-false/true case.
 2010-12-09 22:45:13 +00:00
Maciej W. Rozycki
a605d2b30b * config/tc-mips.c (macro): Remove a trailing 0 from NOP 
requests.
 2010-12-09 22:29:18 +00:00
Maciej W. Rozycki
bbea7ebcc5 * config/tc-mips.c (macro): Use EXTRACT_OPERAND to get register 
numbers.
 2010-12-09 22:17:27 +00:00
Maciej W. Rozycki
c80c840e30 * config/tc-mips.c (macro): Replace 0 with ZERO in macro_build 
and move_register calls referring to $0.
 2010-12-09 22:09:40 +00:00
Maciej W. Rozycki
f71d0d440e gas/ 
* config/tc-mips.c (macro, mips_ip): Correct message
	capitalization.

	gas/testsuite/
	* gas/mips/at-2.l: Adjust according to message capitalization
	fixes.
	* gas/mips/illegal.l: Likewise.
	* gas/mips/jalr.l: Likewise.
	* gas/mips/octeon-ill.l: Likewise.
	* gas/mips/tls-ill.l: Likewise.
 2010-12-09 22:04:43 +00:00
Arnold Metselaar
de6d4f0568 * config/tc-z80.c (md_apply_fix): Rename var to fix shadow warning. 2010-12-09 20:02:07 +00:00
Maciej W. Rozycki
90ecf1736c * config/tc-mips.c (macro_build, macro, mips_ip, md_apply_fix): 
Fix formatting.
 2010-12-09 19:07:07 +00:00
Arnold Metselaar
761025beb3 PR gas/12269 
* config/tc-z80.c (emit_mx, emit_ldxhl): Do not use
  symbol_get_value_expression on a symbol that may not yet have
  a value.
* testsuite/gas/z80/atend.s: New file, test case for bug 12269,
  provided by Chris Smith.
* testsuite/gas/z80/atend.d: New file, expected results for atend.s.
* testsuite/gas/z80/z80.exp: Run new test case.
 2010-12-05 21:44:08 +00:00
Maciej W. Rozycki
5f5f22c0ce * config/tc-mips.c (md_convert_frag): Remove a call to 
S_GET_VALUE and use the result of resolve_symbol_value as the
	value of the symbol processed in MIPS16 relaxation.
 2010-12-01 20:30:04 +00:00
Andreas Krebbel
1e8766d7c9 2010-11-25 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* config/tc-s390.c (current_cpu): Initialize with latest CPU.
	(init_default_arch): Default to z/Architecture mode if CPU provides it.
	Remove the check setting the CPU default.

2010-11-25  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* opcode/s390.h (enum s390_opcode_cpu_val): Add S390_OPCODE_MAXCPU.
 2010-11-25 09:33:54 +00:00
Nick Clifton
d051516a87 * mips.h (INSN_CHIP_MASK): Update according to INSN_LOONGSON_3A. 
(INSN_LOONGSON_3A): Clear bit 31.

	* elfxx-mips.c (mips_set_isa_flags): Move bfd_mach_loongson_3a
	after bfd_mach_mips_sb1.

	* config/tc-mips.c (mips_cpu_info_table): Move loongson3a after sb1.
 2010-11-23 17:04:13 +00:00
Rainer Orth
69b70cfe69 PR gas/12181 
* config/obj-elf.c (elf_adjust_symtab) [TE_SOLARIS]: Make sy
	weak hidden.
 2010-11-18 16:00:25 +00:00
H.J. Lu
bd937d2150 Mark parameters of elf_process_stab as ATTRIBUTE_UNUSED. 
2010-11-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/obj-elf.c (elf_process_stab): Mark parameters as
	ATTRIBUTE_UNUSED.
 2010-11-15 18:12:42 +00:00
Rainer Orth
bc6b4acc70 * config/obj-elf.c (elf_generate_asm_lineno): New function. 
(elf_process_stab): New function.
	(elf_format_ops): Always use them as generate_asm_lineno,
	process_stab members.
 2010-11-15 12:31:05 +00:00
Matthew Gretton-Dann
251665fc5f PR gas/12198 
* gas/config/tc-arm.c (arm_arch_v6m_only): New variable.
	(aeabi_set_public_attributes): Ensure we only set the Operating System
	Extension when we are on an M-profile core.
	* gas/testsuite/gas/arm/pr12198-1.d: New test.
	* gas/testsuite/gas/arm/pr12918-1.s: Likewise.
	* gas/testsuite/gas/arm/pr12198-2.d: Likewise.
	* gas/testsuite/gas/arm/pr12918-2.s: Likewise.
	* include/opcode/arm.h (ARM_AEXT_V6M_ONLY): New define.
	(ARM_AEXT_V6M): Rewrite in terms of ARM_AEXT_V6M_ONLY.
	(ARM_ARCH_V6M_ONLY): New define.
 2010-11-15 10:03:05 +00:00
Richard Sandiford
e391c02431 gas/ 
* config/tc-mips.c (macro_build): Remove gas_assert from 'o' case.
	Use a restricted gas_assert for 'i' and 'j'.

gas/testsuite/
	* gas/mips/elf-rel28.s, gas/mips/elf-rel28-n32.d,
	gas/mips/elf-rel28-n64.d: New test.
	* gas/mips/mips.exp: Run it.
 2010-11-13 11:59:21 +00:00
Nick Clifton
fd50354116 bfd/ 
* archures.c (bfd_mach_mips_loongson_3a): Defined.
	* bfd-in2.h (bfd_mach_mips_loongson_3a): Defined.
	* cpu-mips.c (I_loongson_3a): New add.
	(arch_info_struct): Add loongson_3a.
	* elfxx-mips.c (_bfd_elf_mips_mach): Add loongson_3a.
	(mips_set_isa_flags): Add loongson_3a.
	(mips_mach_extensions): Add loongson_3a in MIPS64 extensions.

	binutils/
	* readelf.c (get_machine_flags): Add loongson-3a.

	gas/
	* config/tc-mips.c (mips_cpu_info_table): Add loongson3a in MIPS 64.
	* doc/c-mips.texi (MIPS cpu): Add loongson3a.

	include/
	* elf/mips.h (E_MIPS_MACH_LS3A): Defined.
	* opcode/mips.h (INSN_LOONGSON_3A): Defined.
	(CPU_LOONGSON_3A): Defined.
	(OPCODE_IS_MEMBER): Add LOONGSON_3A.

	opcodes/
	* mips-dis.c (mips_arch_choices): Add loongson3a.
	* mips-opc.c (IL3A): Defined as INSN_LOONGSON_3A.
	(mips_builtin_opcodes): Modify some instructions' membership from
	IL2F to IL2F|IL3A, since these instructions are supported by Loongson_3A.
 2010-11-11 10:23:39 +00:00
Richard Sandiford
12d6b0b7ba gas/ 
* config/tc-arm.c (do_t_branch): Treat (PLT) branches as wide.

gas/testsuite/
	* gas/arm/plt-1.s, gas/arm/plt-1.d: New test.
 2010-11-10 13:36:31 +00:00
Nick Clifton
d75d1c9fe1 * config/tc-cr16.c (getprocreg_image): Fix typo MAX_PREG -> 
MAX_REG.
	(getprocregp_image): Likewise.
 2010-11-05 11:08:27 +00:00
Dave Korn
b851162aad * config/obj-coff.c (weak_altname2name): Don't infer from the presence 
of a period that the symbol has been already uniquify-d.
	(weak_uniquify): Don't worry that the symbol might have been already
	uniquify-d.
 2010-11-05 04:58:24 +00:00
Alan Modra
cef4f75472 * config/tc-ppc.c (nop_limit): New var. 
(OPTION_NOPS): Define.
	(md_longopts): Add --nops.
	(md_parse_option): Handle it.
	(md_show_usage): Publish.
	(ppc_handle_align): Pad with a branch followed by nops if more
	than nop_limit nops.
 2010-11-04 03:30:05 +00:00
H.J. Lu
27dee630aa Properly fold _GLOBAL_OFFSET_TABLE_ in Intel syntax. 
gas/

2010-11-03  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/12186
	* config/tc-i386-intel.c (i386_intel_fold): Properly fold
	_GLOBAL_OFFSET_TABLE_.

gas/testsuite/

2010-11-03  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/12186
	* gas/i386/gotpc.s: Add more _GLOBAL_OFFSET_TABLE_ test.
	* gas/i386/gotpc.d: Updated.
 2010-11-03 14:18:43 +00:00
Joseph Myers
877791769e bfd: 
* elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type): Except for
	Tag_ABI_compatibility, treat odd tags as strings and even ones as
	integers.
	(elf32_tic6x_obj_attrs_order, elf32_tic6x_tag_to_array_alignment,
	elf32_tic6x_array_alignment_to_tag): New.
	(elf32_tic6x_merge_attributes): Handle more attributes.  Set type
	for merged attributes.
	(elf_backend_obj_attrs_order): Define.

binutils:
	* readelf.c (display_tic6x_attribute): Handle more attributes.

gas:
	* config/tc-tic6x.c (OPTION_MPID, OPTION_MPIC, OPTION_MNO_PIC):
	New enum values.
	(md_longopts): Add options mpid, mpic and mno-pic.
	(tic6x_pid_type, tic6x_pid, tic6x_pic, tic6x_pid_type_table,
	tic6x_pid_types, tic6x_use_pid): New.
	(md_parse_option): Handle new options.
	(md_show_usage): Output help text for new options.
	(tic6x_set_attributes): Set PID and PIC attributes.
	* doc/as.texinfo: Document -mpid=, -mpic and -mno-pic.
	* doc/c-tic6x.texi (TIC6X Options): Likewise.

gas/testsuite:
	* gas/tic6x/attr-array-directive-1.d,
	gas/tic6x/attr-array-directive-1.s,
	gas/tic6x/attr-array-directive-2.d,
	gas/tic6x/attr-array-directive-2.s,
	gas/tic6x/attr-array-directive-3.d,
	gas/tic6x/attr-array-directive-3.s,
	gas/tic6x/attr-array-directive-4.d,
	gas/tic6x/attr-array-directive-4.s,
	gas/tic6x/attr-conformance-directive-1.d,
	gas/tic6x/attr-conformance-directive-1.s,
	gas/tic6x/attr-conformance-directive-2.d,
	gas/tic6x/attr-conformance-directive-2.s,
	gas/tic6x/attr-pic-directive-1.d,
	gas/tic6x/attr-pic-directive-1.s,
	gas/tic6x/attr-pic-directive-2.d,
	gas/tic6x/attr-pic-directive-2.s,
	gas/tic6x/attr-pic-opts-mno-pic.d, gas/tic6x/attr-pic-opts-mpic.d,
	gas/tic6x/attr-pid-directive-1.d,
	gas/tic6x/attr-pid-directive-1.s,
	gas/tic6x/attr-pid-directive-2.d,
	gas/tic6x/attr-pid-directive-2.s,
	gas/tic6x/attr-pid-opts-mpid-far.d,
	gas/tic6x/attr-pid-opts-mpid-near.d,
	gas/tic6x/attr-pid-opts-mpid-no.d,
	gas/tic6x/attr-stack-directive-1.d,
	gas/tic6x/attr-stack-directive-1.s,
	gas/tic6x/attr-stack-directive-2.d,
	gas/tic6x/attr-stack-directive-2.s,
	gas/tic6x/attr-wchar-directive-1.d,
	gas/tic6x/attr-wchar-directive-1.s,
	gas/tic6x/attr-wchar-directive-2.d,
	gas/tic6x/attr-wchar-directive-2.s: New tests.

include/elf:
	* tic6x-attrs.h (Tag_ABI_wchar_t, Tag_ABI_stack_align_needed,
	Tag_ABI_stack_align_preserved, Tag_ABI_PID, Tag_ABI_PIC,
	Tag_ABI_array_object_alignment,
	Tag_ABI_array_object_align_expected, Tag_ABI_conformance): Define.

ld/testsuite:
	* ld-tic6x/attr-array-16-16.d, ld-tic6x/attr-array-16-4.d,
	ld-tic6x/attr-array-16-416.d, ld-tic6x/attr-array-16-48.d,
	ld-tic6x/attr-array-16-8.d, ld-tic6x/attr-array-16-816.d,
	ld-tic6x/attr-array-16.s, ld-tic6x/attr-array-4-16.d,
	ld-tic6x/attr-array-4-4.d, ld-tic6x/attr-array-4-416.d,
	ld-tic6x/attr-array-4-48.d, ld-tic6x/attr-array-4-8.d,
	ld-tic6x/attr-array-4-816.d, ld-tic6x/attr-array-4.s,
	ld-tic6x/attr-array-416-16.d, ld-tic6x/attr-array-416-4.d,
	ld-tic6x/attr-array-416-416.d, ld-tic6x/attr-array-416-48.d,
	ld-tic6x/attr-array-416-8.d, ld-tic6x/attr-array-416-816.d,
	ld-tic6x/attr-array-416.s, ld-tic6x/attr-array-48-16.d,
	ld-tic6x/attr-array-48-4.d, ld-tic6x/attr-array-48-416.d,
	ld-tic6x/attr-array-48-48.d, ld-tic6x/attr-array-48-8.d,
	ld-tic6x/attr-array-48-816.d, ld-tic6x/attr-array-48.s,
	ld-tic6x/attr-array-8-16.d, ld-tic6x/attr-array-8-4.d,
	ld-tic6x/attr-array-8-416.d, ld-tic6x/attr-array-8-48.d,
	ld-tic6x/attr-array-8-8.d, ld-tic6x/attr-array-8-816.d,
	ld-tic6x/attr-array-8.s, ld-tic6x/attr-array-816-16.d,
	ld-tic6x/attr-array-816-4.d, ld-tic6x/attr-array-816-416.d,
	ld-tic6x/attr-array-816-48.d, ld-tic6x/attr-array-816-8.d,
	ld-tic6x/attr-array-816-816.d, ld-tic6x/attr-array-816.s,
	ld-tic6x/attr-conformance-10-10.d,
	ld-tic6x/attr-conformance-10-11.d,
	ld-tic6x/attr-conformance-10-none.d,
	ld-tic6x/attr-conformance-10.s, ld-tic6x/attr-conformance-11-10.d,
	ld-tic6x/attr-conformance-11-11.d,
	ld-tic6x/attr-conformance-11-none.d,
	ld-tic6x/attr-conformance-11.s,
	ld-tic6x/attr-conformance-none-10.d,
	ld-tic6x/attr-conformance-none-11.d,
	ld-tic6x/attr-conformance-none-none.d,
	ld-tic6x/attr-conformance-none.s, ld-tic6x/attr-pic-0.s,
	ld-tic6x/attr-pic-00.d, ld-tic6x/attr-pic-01.d,
	ld-tic6x/attr-pic-1.s, ld-tic6x/attr-pic-10.d,
	ld-tic6x/attr-pic-11.d, ld-tic6x/attr-pid-0.s,
	ld-tic6x/attr-pid-00.d, ld-tic6x/attr-pid-01.d,
	ld-tic6x/attr-pid-02.d, ld-tic6x/attr-pid-1.s,
	ld-tic6x/attr-pid-10.d, ld-tic6x/attr-pid-11.d,
	ld-tic6x/attr-pid-12.d, ld-tic6x/attr-pid-2.s,
	ld-tic6x/attr-pid-20.d, ld-tic6x/attr-pid-21.d,
	ld-tic6x/attr-pid-22.d, ld-tic6x/attr-stack-16-16.d,
	ld-tic6x/attr-stack-16-8.d, ld-tic6x/attr-stack-16-816.d,
	ld-tic6x/attr-stack-16.s, ld-tic6x/attr-stack-8-16.d,
	ld-tic6x/attr-stack-8-8.d, ld-tic6x/attr-stack-8-816.d,
	ld-tic6x/attr-stack-8.s, ld-tic6x/attr-stack-816-16.d,
	ld-tic6x/attr-stack-816-8.d, ld-tic6x/attr-stack-816-816.d,
	ld-tic6x/attr-stack-816.s, ld-tic6x/attr-wchar-0.s,
	ld-tic6x/attr-wchar-00.d, ld-tic6x/attr-wchar-01.d,
	ld-tic6x/attr-wchar-02.d, ld-tic6x/attr-wchar-1.s,
	ld-tic6x/attr-wchar-10.d, ld-tic6x/attr-wchar-11.d,
	ld-tic6x/attr-wchar-12.d, ld-tic6x/attr-wchar-2.s,
	ld-tic6x/attr-wchar-20.d, ld-tic6x/attr-wchar-21.d,
	ld-tic6x/attr-wchar-22.d: New tests.
 2010-11-02 14:36:39 +00:00
Maciej W. Rozycki
4614d8454f * config/tc-mips.c (macro)[M_LD_OB, M_SD_OB]: Use the offset 
reloc supplied.
	(mips_ip)['o']: Initialise offset_reloc.
 2010-11-01 09:53:55 +00:00
Joseph Myers
b559362370 bfd: 
2010-10-29  Bernd Schmidt  <bernds@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>

	* elf32-tic6x.c (elf32_tic6x_merge_attributes): Check for mismatch
	of DSBT attributes.

binutils:
2010-10-29  Bernd Schmidt  <bernds@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>

	* readelf.c (display_tic6x_attribute): Handle Tag_ABI_DSBT.

gas:
2010-10-29  Bernd Schmidt  <bernds@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>

	* config/tc-tic6x.c (OPTION_MDSBT, OPTION_MNO_DSBT): New enum
	values.
	(md_longopts): Add mdsbt and mno-dsbt.
	(tic6x_dsbt): New static variable.
	(md_parse_option): Handle OPTION_MDSBT and OPTION_MNO_DSBT.
	(md_show_usage): Output help text for -mdsbt and -mno-dsbt.
	(TAG): Add comma at the end.
	(tic6x_set_attributes): Set Tag_ABI_DSBT.
	* doc/as.texinfo: Document -mdsbt and -mno-dsbt.
	* doc/c-tic6x.texi (TIC6X Options): Likewise.
	(TIC6X Directives): Mention Tag_ABI_DSBT.

gas/testsuite:
2010-10-29  Bernd Schmidt  <bernds@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>

	* gas/tic6x/attr-dsbt-directive-1.d,
	gas/tic6x/attr-dsbt-directive-1.s,
	gas/tic6x/attr-dsbt-directive-2.d,
	gas/tic6x/attr-dsbt-directive-2.s,
	gas/tic6x/attr-dsbt-opts-mdsbt.d,
	gas/tic6x/attr-dsbt-opts-mno-dsbt.d: New tests.

include/elf:
2010-10-29  Bernd Schmidt  <bernds@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>

	* tic6x-attrs.h (Tag_ABI_DSBT): New.

ld/testsuite:
2010-10-29  Bernd Schmidt  <bernds@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>

	* ld-tic6x/attr-dsbt-0.s, ld-tic6x/attr-dsbt-00.d,
	ld-tic6x/attr-dsbt-01.d, ld-tic6x/attr-dsbt-1.s,
	ld-tic6x/attr-dsbt-10.d, ld-tic6x/attr-dsbt-11.d: New tests.
 2010-10-29 00:15:59 +00:00
Andreas Krebbel
be7a250d1a 2010-10-28 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* config/tc-s390.c (md_begin): Only add to hash table if cpu and
	mode mask fit.

2010-10-28  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390-opc.txt: cfxr, cfdr and cfer z900 -> g5.
 2010-10-28 07:37:45 +00:00
Alan Modra
c2ce945a08 * config/tc-d30v.c (d30v_cons_align): Don't align .eh_frame. 2010-10-28 05:34:55 +00:00
Alan Modra
6309d59106 * config/obj-coff.c (coff_format_ops): Fix typo. 2010-10-26 03:44:39 +00:00
Richard Sandiford
3b4f793136 gas/ 
* config/tc-mips.c (macro2): Delete.
 2010-10-25 21:15:14 +00:00
Nathan Sidwell
c0621d88b0 bfd/ 
* elf32-tic6x.c: Add attribution.

	gas/
	* config/tc-tic6x.c: Add attribution.

	opcodes/
	* tic6x-dis.c: Add attribution.
 2010-10-25 15:33:54 +00:00
Alan Modra
645ea3ea62 * obj.h (struct format_ops): Add adjust_symtab. 
* config/obj-multi.h (obj_adjust_symtab): Define.
	* config/obj-aout.c (aout_format_ops): Init new field.
	* config/obj-coff.c (coff_format_ops): Likewise.
	* config/obj-ecoff.c (ecoff_format_ops): Likewise.
	* config/obj-elf.c (elf_format_ops): Likewise.
 2010-10-25 12:38:42 +00:00
Mark Mitchell
709001e957 2010-10-23 Mark Mitchell <mark@codesourcery.com> 
* config/obj-elf.c (elf_adjust_symtab): New.  Move group section
	processing here from elf_frob_file.  Ensure that group signature
	symbols have the name of the group.
	(elf_frob_file): Move group section processing to
	elf_adjust_symtab.
	* config/obj-elf.h (elf_adjust_symtab): Declare.
	(obj_adjust_symtab): Define.
	* config/tc-arm.c (arm_adjust_symtab): Call elf_adjust_symtab.

2010-10-23  Mark Mitchell  <mark@codesourcery.com>

	* gas/elf/elf.exp: Add group0c test.
	* gas/elf/group0c.d: New.
	* gas/elf/group0a.d: Expect ".group" for the name of group
	sections.
	* gas/elf/group0b.d: Likewise.
	* gas/elf/group1a.d: Likewise.
	* gas/elf/group1b.d: Likewise.
	* gas/elf/groupautoa.d: Likewise.
	* gas/elf/groupautob.d: Likewise.
	* gas/elf/section4.d: Likewise.
	* gas/ia64/group-1.d: Likewise.  Adjust hard-coded constants.

2010-10-22  Mark Mitchell  <mark@codesourcery.com>

	* binutils-all/group-5.d: Expect ".group" for the name of group
	sections.
	* binutils-all/strip-2.d: Likewise.

2010-10-23  Mark Mitchell  <mark@codesourcery.com>

	* ld-elf/group10.d: Expect ".group" for the name of group
	sections.
	* ld-elf/group2.d: Likewise.
	* ld-elf/group7.d: Likewise.
 2010-10-23 18:05:10 +00:00
Rainer Orth
1360ba7676 ld: 
* emulparams/elf32_sparc_sol2.sh (OUTPUT_FORMAT): Set to
	elf32-sparc-sol2.
	* emulparams/elf64_sparc_sol2.sh (OUTPUT_FORMAT): Set to
	elf64-sparc-sol2.

	gas:
	* config/tc-sparc.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define as
	elf32-sparc-sol2.
	(ELF64_TARGET_FORMAT): Define as elf64-sparc-sol2.

	bfd:
	* elfxx-sparc.c (tpoff): Define bed, static_tls_size.
	Consider static_tls_alignment.

	* elf32-sparc.c (TARGET_BIG_SYM): Redefine to
	bfd_elf32_sparc_sol2_vec.
	(TARGET_BIG_NAME): Redefine to elf32-sparc-sol2.
	(elf32_bed): Redefine to elf32_sparc_sol2_bed.
	(elf_backend_static_tls_alignment): Redefine to 8.
	Include elf32-target.h.
	(elf_backend_static_tls_alignment): Undef again for VxWorks.

	* elf64-sparc.c (TARGET_BIG_SYM): Redefine to
	bfd_elf64_sparc_sol2_vec.
	(TARGET_BIG_NAME): Redefine to elf64-sparc-sol2.
	(ELF_OSABI): Undef.
	(elf64_bed): Redefine to elf64_sparc_sol2_bed.
	(elf_backend_static_tls_alignment): Redefine to 16.
	Include elf64-target.h.

	* config.bfd (sparc-*-solaris2.[0-6]): Split from sparc-*-elf*.
	Set targ_defvec to bfd_elf32_sparc_sol2_vec.
	[BFD64] (sparc-*-solaris2*): Set targ_defvec to
	bfd_elf32_sparc_sol2_vec.
	Replace bfd_elf64_sparc_vec by bfd_elf64_sparc_sol2_vec in
	targ_selvecs.

	* configure.in: Handle bfd_elf32_sparc_sol2_vec,
	bfd_elf64_sparc_sol2_vec.
	* configure: Regenerate.

	* targets.c (bfd_elf32_sparc_sol2_vec): Declare.
	(bfd_elf64_sparc_sol2_vec): Declare.
	(_bfd_target_vector): Add bfd_elf32_sparc_sol2_vec,
	bfd_elf64_sparc_sol2_vec.
 2010-10-22 12:08:32 +00:00
Joseph Myers
75fa6dc1e8 bfd: 
* elf32-tic6x.c (elf32_tic6x_merge_arch_attributes): Update for
	attribute renaming.
	(elf_backend_obj_attrs_section): Change to ".c6xabi.attributes".

binutils:
	* readelf.c (display_tic6x_attribute): Update for attribute
	renaming.

gas:
	* config/tc-tic6x.c (tic6x_arch_attribute, tic6x_arches,
	md_assemble, tic6x_set_attributes): Update for attribute renaming.
	* doc/c-tic6x.texi: Update for attribute renaming.

gas/testsuite:
	* gas/tic6x/attr-arch-directive-1.d,
	gas/tic6x/attr-arch-directive-2.d,
	gas/tic6x/attr-arch-directive-3.d,
	gas/tic6x/attr-arch-directive-4.d,
	gas/tic6x/attr-arch-directive-4.s,
	gas/tic6x/attr-arch-directive-5.d,
	gas/tic6x/attr-arch-directive-5.s,
	gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d,
	gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d,
	gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d,
	gas/tic6x/attr-arch-opts-none-1.d,
	gas/tic6x/attr-arch-opts-none-2.d,
	gas/tic6x/attr-arch-opts-override-1.d,
	gas/tic6x/attr-arch-opts-override-2.d: Update for attribute
	renaming and renumbering.

include/elf:
	* tic6x-attrs.h (Tag_C6XABI_Tag_CPU_arch): Change to Tag_ISA,
	value 4.
	* tic6x.h (Values for Tag_C6XABI_Tag_CPU_arch): Rename for
	attribute renaming.

ld:
	* emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Use
	.c6xabi.attributes, not __TI_build_attributes.

ld/testsuite:
	* ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d,
	ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d,
	ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d,
	ld-tic6x/attr-arch-c64x+-c62x.d, ld-tic6x/attr-arch-c64x+-c64x+.d,
	ld-tic6x/attr-arch-c64x+-c64x.d, ld-tic6x/attr-arch-c64x+-c674x.d,
	ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d,
	ld-tic6x/attr-arch-c64x-c62x.d, ld-tic6x/attr-arch-c64x-c64x+.d,
	ld-tic6x/attr-arch-c64x-c64x.d, ld-tic6x/attr-arch-c64x-c674x.d,
	ld-tic6x/attr-arch-c64x-c67x+.d, ld-tic6x/attr-arch-c64x-c67x.d,
	ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d,
	ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d,
	ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d,
	ld-tic6x/attr-arch-c67x+-c62x.d, ld-tic6x/attr-arch-c67x+-c64x+.d,
	ld-tic6x/attr-arch-c67x+-c64x.d, ld-tic6x/attr-arch-c67x+-c674x.d,
	ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d,
	ld-tic6x/attr-arch-c67x-c62x.d, ld-tic6x/attr-arch-c67x-c64x+.d,
	ld-tic6x/attr-arch-c67x-c64x.d, ld-tic6x/attr-arch-c67x-c674x.d,
	ld-tic6x/attr-arch-c67x-c67x+.d, ld-tic6x/attr-arch-c67x-c67x.d:
	Update for attribute renaming.
 2010-10-21 21:16:54 +00:00
Maciej W. Rozycki
0970e49e1a * config/tc-mips.c (macro)[ldd_std]: Fix the relaxation variant 
for absolute addressing.
 2010-10-18 00:17:43 +00:00
Maciej W. Rozycki
704897fbef opcodes/ 
* mips-opc.c (mips_builtin_opcodes): Move M_LD_OB and M_SD_OB
	macros before their corresponding MIPS III hardware instructions.

	gas/
	* config/tc-mips.c (macro)[M_LD_OB, M_SD_OB]: Handle 64-bit ABIs.

	gas/testsuite/
	* gas/mips/lineno.s: Convert to o32.
	* gas/mips/lineno.d: Adjust patterns accordingly.  Force the o32
	ABI.
 2010-10-18 00:15:35 +00:00
Maciej W. Rozycki
998b3c3643 * config/tc-mips.c (mips_pseudo_table): Add "sbss". 
(s_change_sec): Handle it.
 2010-10-18 00:11:08 +00:00
Mike Frysinger
e1791cb8b5 gas: blackfin: fix encoding of BYTEOP2M insn 
The BYTEOP2M parser incorrectly calls BYTEOP2P to generate the opcode.
Once we've fixed that, it's easy to see that the disassembler also likes
to decode this insn incorrectly.  So fix that and then add some tests.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2010-10-15 20:44:46 +00:00
H.J. Lu
56ffb74112 Add CheckRegSize to instructions which require register size check. 
gas/

2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Check checkregsize
	instead of w for register size check.

gas/testsuite/

2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run inval-reg.

	* gas/i386/inval-reg.l: New.
	* gas/i386/inval-reg.s: Likewise.

opcodes/

2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add CheckRegSize.

	* i386-opc.h (CheckRegSize): New.
	(i386_opcode_modifier): Add checkregsize.

	* i386-opc.tbl: Add CheckRegSize to instructions which
	require register size check.
	* i386-tbl.h: Regenerated.
 2010-10-14 18:45:10 +00:00
H.J. Lu
f8a5c26697 Add .d32 encoding suffix. 
gas/

2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (_i386_insn): Add disp32_encoding.
	(md_assemble): Don't call optimize_disp if disp32_encoding is
	set.
	(parse_insn): Support .d32 to force 32bit displacement.
	(output_branch): Use BIG if disp32_encoding is set.

	* doc/c-i386.texi: Document .d32 encoding suffix.

gas/testsuite/

2010-10-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/disp32.d: New.
	* gas/i386/disp32.s: Likewise.
	* gas/i386/x86-64-disp32.d: Likewise.
	* gas/i386/x86-64-disp32.s: Likewise.

	* gas/i386/i386.exp: Run disp32 and x86-64-disp32.
 2010-10-14 13:31:13 +00:00
Mike Frysinger
65646555b2 gas: blackfin: reign in overeager insn flag handling 
Currently, trying to declare single letter variables in Blackfin assembly
can sometimes lead to parser errors if that letter is used for insn flags.
For example, X, Z, S, M, and T are used to change the behavior of insns:
    R0 = 1; R0 = 1 (X); R0 = 1 (Z);
But the current parser just looks for single letter tokens rather than
ones that show up in the (FLAGS) field.  So only match these letters as
flags when they're in parentheses.

Not a complete fix, but it at least lets gcc tests pass now (the test
gcc/testsuite/gcc.c-torture/compile/mangle-1.c to be exact).  A complete
fix would require a significant parser rewrite in order to handle:
    R0 = (x) (x);   /* zero extend the address of the symbol "x" */
    R0 = W; R0 = W[P0];

Signed-off-by: Steve Kilbane <steve.kilbane@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2010-10-11 08:37:20 +00:00
Mike Frysinger
5664043466 gas: blackfin: support numeric local labels with LOOP_BEGIN/LOOP_END pseudo insns 
The current LOOP_BEGIN/LOOP_END pseudo insns hit parser errors when trying
to use numeric local labels.  So add support for them.

Signed-off-by: David Gibson <david.gibson@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2010-10-11 08:36:30 +00:00
Mike Frysinger
71ef6f79bc gas: blackfin: fix LOOP_BEGIN/LOOP_END pseudo insns handling of local labels 
The current LOOP_BEGIN/LOOP_END pseudo insns hit "Internal errors" when
using local labels as the loop names due to attempts at removing them.

Signed-off-by: David Gibson <david.gibson@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2010-10-11 08:35:53 +00:00
Alan Modra
9ccb8af972 Fix build with -DDEBUG=7 2010-10-08 14:00:50 +00:00
Bernd Schmidt
5d4c71e127 gas/ 
* config/tc-tic6x.c (tic6x_try_encode): Correct encoding of fstg field
	in SPKERNEL instructions.

opcodes/
	* tic6x-dis.c (print_insn_tic6x): Correct decoding of fstg field
	in SPKERNEL instructions.

gas/testsuite/
	* gas/tic6x/insns-c674x-sploop.d: Add two more sploop/spkernel tests.
	* gas/tic6x/insns-c674x-sploop.s: Likewise.
 2010-10-07 11:28:49 +00:00
Nathan Sidwell
9ae92b05cc bfd/ 
* elf32-arm.c (elf32_arm_stub_long_branch_any_arm_pic,
	elf32_arm_stub_long_branch_any_arm_pic): Use a consistent name for
	ip/r12.
	(arm_type_of_stub): Remove superfluous braces.

	gas/
	* config/tc-arm.c (encode_branch): Remove superfluous braces.
	(do_t_branch): Move reloc setting to end of routine.
 2010-10-06 08:22:21 +00:00
David Daney
d954098fc1 2010-10-04 David Daney <ddaney@caviumnetworks.com> 
* config/tc-mips.c (mips_fix_cn63xxp1): New variable.
	(mips_ip):  Add errata work around when mips_fix_cn63xxp1 set.
	(OPTION_FIX_CN63XXP1, OPTION_NO_FIX_CN63XXP1): New enum options
	enumerations.
	(md_longopts): Add options for -mfix-cn63xxp1 and -mno-fix-cn63xxp1.
	(md_parse_option): Handle OPTION_FIX_CN63XXP1 and
	OPTION_NO_FIX_CN63XXP1.
	(md_show_usage): Add documentation for -mfix-cn63xxp1.
	* doc/c-mips.texi (-mfix-cn63xxp1, -mno-fix-cn63xxp1): Document
	the new options.

2010-10-04  David Daney  <ddaney@caviumnetworks.com>

	* gas/mips/mips.exp (octeon-pref): Run the new test.
	* gas/mips/octeon-pref.s: New test.
	* gas/mips/octeon-pref.d: New expected results for the new test.
 2010-10-04 15:24:49 +00:00
Bernd Schmidt
43bb514a1c gas/ 
* config/tc-tic6x.c (tic6x_fix_adjustable): New function.
	* config/tc-tic6x.h (tic6x_fix_adjustable): Declare.
	(tc_fix_adjustable): New macro.

gas/testsuite/
	* gas/tic6x/got-reloc.s: New test.
	* gas/tic6x/got-reloc.d: New test.
 2010-09-27 15:52:40 +00:00
Andreas Krebbel
d9aee5d7f7 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196.
	(main): Recognize the new CPU string.
	* s390-opc.c: Add new instruction formats and masks.
	* s390-opc.txt: Add new z196 instructions.

2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val.

2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/tc-s390.c: (md_parse_option): New option -march=z196.
	* doc/c-s390.texi: Document new option.

2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/s390.exp: Run the zarch-z196 test.
	* gas/s390/zarch-z196.d: Add new instructions.
	* gas/s390/zarch-z196.s: Likewise.
	* gas/s390/zarch-z9-109.d: Likewise.
	* gas/s390/zarch-z9-109.s: Likewise.
 2010-09-27 13:36:48 +00:00
Matthew Gretton-Dann
6844b2c2db 2010-09-27 Tejas Belagod <tejas.belagod@arm.com> 
* gas/config/tc-arm.c (do_neon_ldr_str): Deprecate ARM-mode PC-relative
	VSTR, issue an error in THUMB mode.
	* opcodes/arm_dis.c (print_insn_coprocessor): Apply off-by-alignment
	correction to unaligned PCs while printing comment.
	* gas/testsuite/gas/arm/vldr.s: New test for pc-relative VLDR disassembly comment.
	* gas/testsuite/gas/arm/vldr.d: Likewise.
	* gas/testsuite/gas/arm/vstr-bad.s: New test for PC-relative VSTR.
	* gas/testsuite/gas/arm/vstr-thumb-bad.l: Likewise.
	* gas/testsuite/gas/arm/vstr-thumb-bad.d: Likewise.
	* gas/testsuite/gas/arm/vstr-arm-bad.l: Likewise.
	* gas/testsuite/gas/arm/vstr-arm-bad.d: Likewise.
 2010-09-27 09:47:05 +00:00
Matthew Gretton-Dann
90ec0d684e * bfd/bfd-in2.h (BFD_RELOC_ARM_HVC): New enum value. 
* gas/config/tc-arm.c (arm_ext_virt): New variable.
	(arm_reg_type): Add REG_TYPE_RNB for banked registers.
	(reg_entry): Allow registers to be larger than a byte.
	(reg_alias): Fix type warning.
	(parse_operands): Parse banked registers when appropriate.
	(do_mrs): Add support for Virtualization Extensions.
	(do_hvc): New function.
	(do_t_mrs): Add support for Virtualization Extensions.
	(do_t_msr): Likewise.
	(do_t_hvc): New function.
	(SPLRBANK): New define.
	(reg_names): Add banked registers.
	(insns): Add support for Virtualization Extensions.
	(md_apply_fixup): Likewise.
	(arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions.
	(arm_extensions): Add 'virt' extension.
	(aeabi_set_public_attributes): Add support for Virtualization
	Extensions.
	* gas/doc/c-arm.texi: Document 'virt' extension.
	* gas/testsuite/gas/arm/armv7-a+virt.d: New test.
	* gas/testsuite/gas/arm/armv7-a+virt.s: Likewise.
	* gas/testsuite/gas/arm/attr-march-all.d: Update for Virtualization Extensions.
	* gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: New test.
	* gas/testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise.
	* include/opcode/arm.h (ARM_EXT_VIRT): New define.
	(ARM_ARCH_V7A_IDIV_MP_SEC): Rename...
	(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization
	Extensions.
	* opcodes/arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
	(thumb32_opcodes): Likewise.
	(banked_regname): New function.
	(print_insn_arm): Add Virtualization Extensions support.
	(print_insn_thumb32): Likewise.
 2010-09-23 15:52:19 +00:00
Matthew Gretton-Dann
eea54501f7 * gas/config/tc-arm.c (arm_ext_adiv): New variable. 
(do_div): New function.
	(insns): Accept UDIV and SDIV in ARM state.
	(arm_cpus): The cortex-a15 option has all current v7-A extensions.
	(arm_extensions): Add 'idiv' extension.
	(aeabi_set_public_attributes): Update Tag_DIV_use values for the
	Integer Divide extension.
	* gas/doc/c-arm.texi: Document the idiv extension.
	* gas/testsuite/gas/arm/armv7-a+idiv.d: New test.
	* gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise.
	* gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension.
	* gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test.
	* include/opcode/arm.h (ARM_AEXT_ADIV): New define.
	(ARM_ARCH_V7A_IDIV_MP_SEC): Likewise.
	* opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
	ARM state.
 2010-09-23 15:37:45 +00:00
Matthew Gretton-Dann
b2a5fbdc94 * config/tc-arm.c (arm_ext_v6m): New variable. 
(arm_ext_m): Add support for OS extension.
	(arm_ext_os): New variable.
	(do_t_swi): In v6-M ensure we have the OS extension.
	(arm_cpus): The cortex-m1 and cortex-m0 options have the OS
	extension by default.
	(arm_archs): Add armv6s-m.
	(arm_extensions): Add 'os' extension.
	(cpu_arch_ver): Add support for v6S-M.
	* gas/doc/c-arm.texi: Document the OS Extension, and v6-m and v6s-m
	architecture options.
	* gas/testsuite/gas/arm/archv6s-m-bad.d: New test.
	* gas/testsuite/gas/arm/archv6s-m-bad.l: Likewise.
	* gas/testsuite/gas/arm/archv6s-m.d: Likewise.
	* gas/testsuite/gas/arm/archv6s-m.s: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
	* include/opcode/arm.h (ARM_EXT_OS): New define.
	(ARM_AEXT_V6SM): Likewise.
	(ARM_ARCH_V6SM): Likewise.
 2010-09-23 15:31:34 +00:00
Matthew Gretton-Dann
f4c65163c7 * gas/config/tc-arm.c (arm_ext_v6z): Remove. 
(arm_ext_sec): New variable.
	(do_t_smc): In Thumb state SMC requires v7-A.
	(insns): Make SMC depend on Security Extensions.
	(arm_cpus): All -mcpu=cortex-a* options have the Security Extensions.
	(arm_extensions): Add 'sec' extension.
	(cpu_arch_ver): Reorder.
	(aeabi_set_public_attributes): Emit Tag_Virtualization_use as
	appropriate.
	* gas/doc/c-arm.texi: Document Security Extensions.
	* gas/testsuite/gas/arm/attr-march-all.d: Update for Security Extensions..
	* gas/testsuite/gas/arm/attr-march-armv6k+sec.d: New test.
	* gas/testsuite/gas/arm/attr-march-armv6z.d: Update for Security Extensions.
	* gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: New test.
	* gas/testsuite/gas/arm/attr-mcpu.d: Update for Security Extensions.
	* gas/testsuite/gas/arm/thumb32.d: Likewise.
	* gas/testsuite/gas/arm/thumb32.s: Likewise.
	* include/opcode/arm.h (ARM_EXT_V6Z): Remove.
	(ARM_EXT_SEC): New define.
	(ARM_AEXT_V6Z): Use Security Extensions.
	(ARM_AEXT_V6ZK): Likeiwse.
	(ARM_AEXT_V6ZT2): Likewise.
	(ARM_AEXT_V6ZKT2): Likewise.
	(ARM_AEXT_V7_ARM): Base v7 does not have Security Extensions.
	(ARM_ARCH_V7A_SEC): New define.
	(ARM_ARCH_V7A_MP): Rename...
	(ARM_ARCH_V7A_MP_SEC): ...to this and add Security Extensions.
	* ld/testsuite/ld-arm/attr-merge-6.attr: Update for Security Extensions.
	* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
	* opcodes/arm-dis.c (arm_opcodes): SMC implies Security Extensions.
	(thumb32_opcodes): Likewise.
 2010-09-23 15:26:24 +00:00
Matthew Gretton-Dann
60e5ef9f19 * gas/config/tc-arm.c (arm_ext_mp): Add. 
(do_pld): Update comment.
	(insns): Add support for pldw.
	(arm_cpus): Update cortex-a5, cortex-a9, and cortex-a15 to support
	MP extension.
	(arm_extensions): Add 'mp' extension.
	(aeabi_set_public_attributes): Emit correct build attribute when
	MP extension is enabled.
	* gas/doc/c-arm.texi: Update for MP extensions.
	* gas/testsuite/gas/arm/arch7a-mp.d: Add.
	* gas/testsuite/gas/arm/arch7ar-mp.s: Likewise.
	* gas/testsuite/gas/arm/arch7r-mp.d: Likewise.
	* gas/testsuite/gas/arm/armv2-mp-bad.d: Likewise.
	* gas/testsuite/gas/arm/armv2-mp-bad.l: Likewise.
	* gas/testsuite/gas/arm/attr-march-all.d: Update for MP extension.
	* gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Add.
	* gas/testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise.
	* include/opcode/arm.h (ARM_EXT_MP): Add.
	(ARM_ARCH_V7A_MP): Likewise.
	* opcodes/arm-dis.c (arm_opcodes): Add support for pldw.
	(thumb32_opcodes): Likewise.
 2010-09-23 15:18:19 +00:00
Matthew Gretton-Dann
6913386316 * gas/config/tc-arm.c (md_pseduo_table): Add .arch_extension directive. 
(arm_option_extension_value_table): Add.
	(arm_extensions): Change type.
	(arm_option_cpu_table): Rename...
	(arm_option_fpu_table): ...to this.
	(arm_fpus): Change type.
	(arm_parse_extension): Enforce alphabetical order.  Allow
	extensions to be removed.
	(arm_parse_arch): Allow extensions to be specified with -march.
	(s_arm_arch_extension): Add.
	(s_arm_fpu): Update for type changes.
	* gas/doc/c-arm.texi: Document changes to infrastructure.
 2010-09-23 15:11:56 +00:00
Alan Modra
57b3551ee8 * config/tc-mn10300.c (tc_gen_reloc): Replace absolute symbols 
with the absolute section symbol.
 2010-09-23 12:11:31 +00:00
Mike Frysinger
f9e3222117 gas: blackfin: fix typo in BYTEOP16P comment 
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2010-09-22 21:34:10 +00:00
Mike Frysinger
db3b8e53b5 gas: blackfin: reject multiple store insns in parallel insns 
Check for & reject attempts to use multiple store insns in a single
parallel insn combination.  These are illegal per the Blackfin ISA.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2010-09-22 21:31:18 +00:00
Mike Frysinger
9d2eed0673 gas: blackfin: add missing register move insns 
The Blackfin ISA supports moving just about anything to/from EMUDAT, so
make sure the assembler accepts these insns too.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2010-09-22 21:30:35 +00:00
Mike Frysinger
a2c28b80f1 gas: blackfin: clarify some errors with register usage in insns 
Using "Register mismatch" everywhere can be a bit vague, so clarify
why exactly we're barfing on these unsupported insns.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
 2010-09-22 21:29:41 +00:00