bfd/
* elfxx-mips.c (update_mips_abiflags_isa): Add E_MIPS_ARCH_32R6
and E_MIPS_ARCH_64R6 support.
ld/testsuite/
* ld-mips-elf/abiflags-strip10-ph.d: New file.
* ld-mips-elf/mips-eld.exp: Run the new test.
gas/
* config/tc-mips.c (mips_elf_final_processing): Add INSN_ISA32R6
and INSN_ISA64R6 support.
gas/testsuite/
* gas/mips/elf_arch_mips32r6.d: New file.
* gas/mips/elf_arch_mips64r6.d: New file.
* gas/mips/mips.exp: Run the new tests.
The @ character is a comment character on ARM, so use % instead. Also
use a wider glob for matching ARM targets to make sure the test gets
run.
ld/testsuite/ChangeLog:
2014-10-30 Will Newton <will.newton@linaro.org>
* ld-unique/unique.exp: Use a wider glob for matching ARM
targets.
* ld-unique/unique.s: Use % instead of @ in .type directive.
* ld-unique/unique_shared.s: Likewise.
2014-10-22 Tejas Belagod <tejas.belagod@arm.com>
bfd/
* bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter.
* bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise.
* elfnn-aarch64.c (aarch64_erratum_835769_stub): New.
(elf_aarch64_stub_type): Add new type
aarch64_stub_erratum_835769_veneer.
(elf_aarch64_stub_hash_entry): New fields for erratum 835769.
(aarch64_erratum_835769_fix): New data struct to record erratum
835769.
(elf_aarch64_link_hash_table: Global flags for 835769.
(aarch64_build_one_stub): Add case for 835769.
(aarch64_size_one_stub): Likewise.
(aarch64_mem_op_p, aarch64_mlxl_p,
aarch64_erratum_sequence,erratum_835769_scan):
New. Decode and scan functions for erratum 835769.
(elf_aarch64_create_or_find_stub_sec): New.
(elfNN_aarch64_size_stubs): Look for erratum 835769 and record
them.
(bfd_elfNN_aarch64_set_options: Set global flag for 835769.
(erratum_835769_branch_to_stub_data,
make_branch_to_erratum_835769_stub):New. Connect up all the
erratum stubs to occurances by branches.
(elfNN_aarch64_write_section): New hook.
(aarch64_map_one_stub): Output erratum stub symbol.
(elfNN_aarch64_size_dynamic_sections): Init mapping symbol
information for erratum 835769.
(elf_backend_write_section): Define.
ld/
* emultempl/aarch64elf.em: Add command-line option for erratum
835769.
ld/testsuite/
* ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum
835769 tests.
* ld-aarch64/erratum835769.d: New.
* ld-aarch64/erratum835769.s: New.
* ld-scripts/sysroot-prefix.exp: Log $ld_sysroot. Handle sysroot
== "/" as a separate sysroot-configuration with separable
test-types.
(sysroot_prefix_tests): Include all existing sysroot tests in
sysroot == "/" tests except exclude those where a --sysroot option
is not specified.
* lib/ld-lib.exp (check_sysroot_available): Rewrite to use
--print-sysroot instead of relying on error code from using
--sysroot=... Also, set $ld_sysroot.
The reason we exclude not just the failing "full-path =-prefixed
without" but also the passing "plain =-prefixed without but -Lpath"
for sysroot == "/" is that for the latter to succeed, we have to make
assumptions about the system not having a /sysroot directory or
assumptions about its contents etc.
When passing --enable-targets=all --enable-64-bit-bfd (the
latter not required for a "64-bit-host" of course) the ld --help
output got too much to handle for poor tcl (or maybe dejagnu is
to blame) and remote_exec exited with an error, so the
configuration being tested was mishandled as being a
sysroot-less configuration. Using --version instead of --help
would work too, but the new --print-sysroot option calls for
nominal coverage, so why not use that instead.
* ld-scripts/sysroot-prefix.exp, ld-scripts/sysroot-prefix-x.s,
ld-scripts/sysroot-prefix-y.s: New files.
N.B: full coverage is only possible with complementary use of
--with-sysroot when configuring.
These are useless because they can't match any address. In fact,
worse than useless because the .eh_frame_hdr lookup table matching
addresses to FDEs does not contain information about the FDE range.
The table is sorted by address; Range is inferred by the address
delta from one entry to the next. So if a zero address range FDE is
followed by a normal non-zero range FDE for the same address,
everything is good. However, the qsort could just as easily sort the
FDEs in the other order, in which case the normal FDE would
effectively be seen to have a zero range.
bfd/
PR 17447
* elf-bfd.h (struct eh_cie_fde): Comment re NULL u.fde.cie_inf.
* elf-eh-frame.c (_bfd_elf_parse_eh_frame): Mark zero address
range FDEs for discarding.
(vma_compare): Sort on range after address.
(_bfd_elf_gc_mark_fdes): Test for NULL u.fde.cie_inf.
(_bfd_elf_discard_section_eh_frame): Likewise. Write "FDE" in
error message rather than "fde".
(_bfd_elf_write_section_eh_frame_hdr): Write "PC" and "FDE" in
error message.
ld/testsuite/
* ld-elf/eh1.s: Don't create FDEs with zero address ranges.
* ld-elf/eh3.s: Likewise.
* ld-elf/eh1.d, * ld-elf/eh2.d, * ld-elf/eh3.d: Adjust.
* ld-mips-elf/eh-frame1-n32.d: Warning match update.
* ld-mips-elf/eh-frame1-n64.d: Likewise.
* ld-mips-elf/eh-frame2-n32.d: Likewise.
* ld-mips-elf/eh-frame2-n64.d: Likewise.
I originally had this as --print-prog-name and changed back to
--print-file-name to suit older gcc, neglecting to check whether
gcc-5.0 --print-file-name finds the lto plugin. It doesn't.
* ld-plugin/lto.exp: Use both --print-file-name and --print-prog-name
when looking for lto plugin.
different architecture tags. Add a test case to make sure that this works,
and update readelf so that it will not seg-fault when trying to display the
attributes of binaries with invalid architecture tags.
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Return false if
failed to merge.
* ld-arm/attr-merge-arch-2.d: New test case.
* ld-arm/attr-merge-arch-2a.s: New test case source file.
* ld-arm/attr-merge-arch-2b.s: Likewise.
* ld-arm/arm-elf.exp: Run new test case.
* readelf.c (display_arm_attribute): Use unsigned int type for
tag, val and type variables.
2014-08-26 Jiong Wang <jiong.wang@arm.com>
bfd/
* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Initialize non_got_ref
properly for MOVW_G0/1/2_NC and MOVW_G3. Reject them when linking
shared library.
(elfNN_aarch64_gc_sweep_hook): Add check on these relocs.
ld/testsuite/
* ld-aarch64/copy-relocs-so.s: New test file.
* ld-aarch64/copy-relocs-exe.s: Likewise.
* ld-aarch64/copy-relocs.d: New expectation file.
* ld-aarch64/emit-relocs-264-bad.d: New test file.
* ld-aarch64/emit-relocs-266-bad.d: Likewise.
* ld-aarch64/emit-relocs-268-bad.d: Likewise.
* ld-aarch64/emit-relocs-269-bad.d: Likewise.
* ld-aarch64/aarch64-elf.exp: Run new added test.
Resolves PR 17312
* ld-aarch64/eh-frame-foo.s: Use 8-byte offset for X30.
* ld-aarch64/eh-frame-bar.s: Likewise.
* ld-aarch64/eh-frame.d: Updated to match current readelf output.
* ld-elf/eh5.d: Allow any register names.
Only set the VLE flag if the instruction has been pulled via the VLE
instruction set. This way the flag is guaranteed to be set for VLE-only
instructions or for VLE-only processors, however it'll remain clear for
dual-mode instructions on dual-mode and, more importantly, standard-mode
processors.
gas/
* config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE
flag if both the processor and opcode flags match.
ld/testsuite/
* ld-powerpc/apuinfo-vle.rd: New test.
* ld-powerpc/apuinfo-vle.s: New test source.
* ld-powerpc/apuinfo.rd: Adjust according to GAS PPC_APUINFO_VLE
handling change.
* ld-powerpc/powerpc.exp: Run the new test.
2014-08-21 Tony Wang <tony.wang@arm.com>
* elf32-arm.c (elf32_arm_final_link_relocate): Implement
the veneer routine for R_ARM_THM_JUMP19.
(arm_type_of_stub): Add conditional clause for R_ARM_THM_JUMP19
(elf32_arm_size_stub): Ditto.
ld/testsuite/ChangeLog
2014-08-21 Tony Wang <tony.wang@arm.com>
* ld-arm/jump-reloc-veneers-cond.s: New test.
* ld-arm/farcall-cond-thumb-arm.s: Ditto.
* ld-arm/jump-reloc-veneers-cond-short.d: Expected output
for target without a veneer generation.
* ld-arm/jump-reloc-veneers-cond-long.d: Expected output
for target with a veneer generation.
* ld-arm/farcall-cond-thumb-arm.d: Expected output for
inter working veneer generation.
* ld-arm/arm-elf.exp: Add tests for conditional branch veneer.
bfd/
PR ld/17277
* elf32-arm.c (elf32_arm_check_relocs): Increment P->pc_count for
all reloc types with pc_relative set in the howto, not just for
R_ARM_REL32 and R_ARM_REL32_NOI.
(allocate_dynrelocs_for_symbol): Update comment.
(elf32_arm_gc_sweep_hook): For all reloc types with pc_relative
set in the howto, set call_reloc_p and may_need_local_target_p but
not may_become_dynamic_p; not only for R_ARM_REL32 and R_ARM_REL32_NOI.
(elf32_arm_check_relocs): Likewise.
ld/testsuite/
PR ld/17277
* ld-arm/pcrel-shared.s: New file.
* ld-arm/pcrel-shared.rd: New file.
* ld-arm/arm-elf.exp (armelftests_common): Add it.
PR 17287
bfd/
* elflink.c (on_needed_list): Only consider libraries that have
been loaded.
ld/
* ld.texinfo (--as-needed): Clarify that references from libraries
must be from needed libraries.
ld/testsuite/
* ld-plugin/needed3.c: New file.
* ld-elf/shared.exp: Add needed3 test.
* lib/ld-lib.exp (check_lto_fat_available): New.
(check_lto_available): Remove -ffat-lto-objects test.
* ld-plugin/lto.exp: Use [list ] rather than { } to set up list
variables, allowing substition of vars. Set lto_fat and plug_opt
and add to various tests.
Relocations against .got.plt section may not be in the same order as
entries in PLT section. It is incorrect to assume that the Ith reloction
index against .got.plt section always maps to the (I + 1)th entry in PLT
section. This patch matches the .got.plt relocation offset/index in PLT
entry against the index in .got.plt relocation table. It only checks
R_*_JUMP_SLOT and R_*_IRELATIVE relocations. It ignores R_*_TLS_DESC
and R_*_TLSDESC relocations since they have different PLT entries.
bfd/
PR binutils/17154
* elf32-i386.c (elf_i386_plt_sym_val): Only match R_*_JUMP_SLOT
and R_*_IRELATIVE relocation offset with PLT entry.
* elf64-x86-64.c (elf_x86_64_plt_sym_val): Likewise.
(elf_x86_64_plt_sym_val_offset_plt_bnd): New.
(elf_x86_64_get_synthetic_symtab): Use it.
ld/testsuite/
PR binutils/17154
* ld-ifunc/pr17154-i386.d: New file.
* ld-ifunc/pr17154-x86-64.d: Likewise.
* ld-ifunc/pr17154-x86.s: Likewise.
* ld-x86-64/bnd-ifunc-2.d: Likewise.
* ld-x86-64/bnd-ifunc-2.s: Likewise.
* ld-x86-64/mpx.exp: Run bnd-ifunc-2.
* ld-x86-64/tlsdesc-nacl.pd: Updated.
* ld-x86-64/tlsdesc.pd: Likewise.
Commit e1f987424b changed how
next_tls_desc_index was set up. This patch updates
elf_i386_compute_jump_table_size to use elf.srelplt->reloc_count
instead of next_tls_desc_index.
bfd/
PR ld/17057
* elf32-i386.c (elf_i386_compute_jump_table_size): Replace
next_tls_desc_index with elf.srelplt->reloc_count.
ld/testsuite/
PR ld/17057
* ld-i386/i386.exp: Run pr17057.
* ld-i386/pr17057.d: New file.
* ld-i386/pr17057.s: Likewise.
Specify -T relocs.ld for emit-relocs-local-addend.d to be consistent
will all other emit-relocs* testcases
ld/testsuite/
* ld-aarch64/emit-relocs-local-addend.d: Use target linker script.
With this change all gas and most ld tests pass when configured for
arm-linux. It doesn't look like these configurations have been
tested in a long time but this attempts to stem the bit-rot slightly.
gas/testsuite/ChangeLog:
2014-07-10 Will Newton <will.newton@linaro.org>
* gas/arm/bl-local-2.d: Only enable the test on EABI and
NaCl configurations.
* gas/arm/bl-local-v4t.d: Likewise.
* gas/arm/blx-local.d: Likewise.
* gas/arm/branch-reloc.d: Likewise.
ld/testsuite/ChangeLog:
2014-07-10 Will Newton <will.newton@linaro.org>
* ld-arm/arm-elf.exp (armelftests_nonacl): Move Cortex-A8 fix
tests, IFUNC tests and other EABI requiring tests to...
(armeabitests_nonacl): ...here.
* ld-arm/arm-app-abs32.d: Loosen regex for architecture type
to allow test to pass on configurations without an attributes
section.
* ld-arm/arm-app.d: Likewise.
* ld-arm/arm-lib-plt32.d: Likewise.
* ld-arm/arm-lib.d: Likewise.
* ld-arm/arm-static-app.d: Likewise.
* ld-arm/armthumb-lib.d: Likewise.
* ld-arm/cortex-a8-far.d: Likewise.
* ld-arm/farcall-mixed-app.d: Likewise.
* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* ld-arm/farcall-mixed-lib.d: Likewise.
* ld-arm/mixed-app-v5.d: Likewise.
* ld-arm/mixed-app.d: Likewise.
* ld-arm/mixed-lib.d: Likewise.
* ld-arm/tls-app.d: Likewise.
* ld-arm/tls-descrelax-be32.d: Likewise.
* ld-arm/tls-descrelax.d: Likewise.
* ld-arm/tls-descseq.d: Likewise.
* ld-arm/tls-gdesc-got.d: Likewise.
* ld-arm/tls-gdesc.d: Likewise.
* ld-arm/tls-gdierelax.d: Likewise.
* ld-arm/tls-gdierelax2.d: Likewise.
* ld-arm/tls-gdlerelax.d: Likewise.
* ld-arm/tls-lib-loc.d: Likewise.
* ld-arm/tls-lib.d: Likewise.
* ld-arm/tls-thumb1.d: Likewise.
ARM doesn't support non-PIC shared libraries so don't run those
tests.
ld/testsuite/ChangeLog:
2014-07-10 Will Newton <will.newton@linaro.org>
* ld-elfvers/vers.exp: Set pic to yes for ARM targets.
Increase the maximum page size to 64kB and align the TEXT_START_ADDR
to a 64kB boundary. This brings AArch32 in line with AArch64 and
improves compatability under certain conditions.
bfd/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
value to 64kB and remove custom setting for NaCl.
ld/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
alignment to 64kB boundary.
ld/testsuite/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
match bfd.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
take into account increased segment alignment.
* ld-arm/ifunc-gdesc.r: Likewise.
* ld-arm/tls-lib.d: Likewise.
This fixes a problem seen on powerpc64le ELFv2 when creating a
function symbol alias with ld --defsym. st_other needs to be copied
from the source symbol to the alias in order to set up the local entry
offset for the alias. I decided to make this change in the generic
ELF code rather than in elf64-ppc.c since it looks like other targets
that use st_other bits might benefit too.
bfd/
* elflink.c (_bfd_elf_copy_link_hash_symbol_type): Copy st_other
bits from source to dest.
* linker.c (_bfd_generic_copy_link_hash_symbol_type): Update comment.
* targets.c (struct bfd_target <_bfd_copy_link_hash_symbol_type>):
Likewise.
* bfd-in2.h: Regenerate.
ld/testsuite/
* ld-powerpc/defsym.s, * ld-powerpc/defsym.d: New test.
* ld-powerpc/powerpc.exp: Run it.
Objects built with -fno-fat-lto-objects (the default for gcc-4.9) have
no normal symbols, except things like __gnu_lto_slim. These useless
symbols are the ones put into the archive index, and of course nothing
references them so no objects are extracted by the linker. Running
ar with --plugin changes ar behaviour to put the lto symbols into the
archive index.
PR 17112
* ld-plugin/lto.exp: When building liblti-11.a, pass
--plugin path_to_gcc/liblto_plugin.so to ar.
toolchain that just contains the binutils - ie without a compiler.
* lib/ld-lib.exp (check_lto_available): Check that a compiler is
available before testing for LTO support.
Various ld-elf/shared.exp and ld-plugin/lto.exp tests simply appended
the testsuite -B options intended to force gcc use the linker under test.
This fails if $CC itself has -B options, as when setting CC to run gcc
out of a build directory. Net result is that tests were run using
the gcc build dir collect-ld.
* config/default.exp: Don't make tmpdir/gas. Put as symlink into
tmpdir/ld.
(gcc_gas_flag, gcc_ld_flag): Delete.
(gcc_B_opt, ld_L_opt): New globals.
ld-elf/shared.exp: Remove all refs to gcc_gas_flag and gcc_ld_flag.
ld-plugin/lto.exp: Likewise.
lib/ld-lib.exp (run_host_cmd): Add gcc_B_opt and ld_L_opt here.
(ld_simple_link): Remove -B handling now that this is done in
run_host_cmd. Simplify.
(default_ld_compile): Simplify.
(check_lto_available): Use run_host_cmd_yesno.
(check_lto_shared_available): Likewise.
libdummy.a is used to make run_cc_link_tests compile objects and
archive them. libdummy.a isn't used. What we're really doing is
preventing a final link. So do that directly.
* lib/ld-lib.exp (run_ld_link_tests): Stop after assembling objects
if binfile is empty.
(run_ld_link_exec_tests, run_cc_link_tests): Likewise. Tidy
status checks.
* ld-plugin/lto.exp: Don't use libdummy.a trick to compile objects.
Instead use an empty output file.
When a shared library appears within --start-group/--end-group ld may
only discover a need for loading the library on the second or
subsequent pass over archive libraries, as more objects are extracted.
ld/
PR 17068
* ldlang.c (load_symbols): Always check flags.reload.
(open_input_bfds): Always reload --as-needed shared libraries,
not just when rescanning.
* ldlang.h (struct lang_input_statement_flags): Update reload comment.
* plugin.c (plugin_should_reload): Assume shared library arg.
* plugin.h (plugin_should_reload): Update comment.
ld/testsuite
* ld-elf/pr17068.s: New.
* ld-elf/pr17068a.s: New.
* ld-elf/pr17068b.s: New.
* ld-elf/pr17068c.s: New.
* ld-elf/pr17068d.s: New.
* ld-elf/pr17068e.s: New.
* ld-elf/pr17068ez.s: New.
* ld-elf/elf.exp: Run new test.
doesn't always mean you need to define a function symbol on plt code.
If all references are in read-write sections, then using dynamic relocs
is OK.
bfd/
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Clear
pointer_equality_needed when !readonly_dynrelocs.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise.
ld/testsuite/
* ld-powerpc/ambiguousv1.d: Match symbol table too.
* ld-powerpc/ambiguousv2.d: Likewise.
* ld-powerpc/ambiguousv1b.d: New.
* ld-powerpc/ambiguousv2b.d: New.
* ld-powerpc/powerpc.exp: Run new tests.
Addition of DF_STATIC_TLS in eea6dad2 results in the addition of
flags to the dynamic section, which in turn changes these addresses.
Fix them up to match their new positions.
ld/testsuite/Changelog:
2014-06-24 Kyle McMartin <kyle@redhat.com>
* ld-arm/tls-gdierelax2.d: Fix expected offsets.
Combining TLS descriptors and GNU indirect functions in the same
object could lead to assertions or multiple dynamic relocations
for the same GOT slot. Fix the bookkeeping so this doesn't happen.
This allows building and make checking glibc with -mtls-dialect=gnu2.
bfd/ChangeLog:
2014-06-16 Will Newton <will.newton@linaro.org>
* elf32-arm.c (elf32_arm_allocate_plt_entry): Increment
htab->next_tls_desc_index in the non-IPLT case.
Calculate GOT offset correctly for the non-IPLT case.
(allocate_dynrelocs_for_symbol): Don't increment
htab->next_tls_desc_index here.
ld/testsuite/ChangeLog:
2014-06-16 Will Newton <will.newton@linaro.org>
* ld-arm/arm-elf.exp: Add ifunc-gdesc test.
* ld-arm/ifunc-gdesc.r: New file.
* ld-arm/ifunc-gdesc.s: Likewise.
* ld-arm/ifunc-gdesc.ver: Likewise.
Power8 fuses addis,addi and addis,ld sequences when the target of the
addis is the same as the addi/ld. Thus
addis r12,r2,xxx@ha
addi r12,r12,xxx@l / ld r12,xxx@l(r12)
is faster than
addis r11,r2,xxx@ha
addi r12,r11,xxx@l / ld r12,xxx@l(r11)
So use the form that allows fusion in plt call and branch stubs.
bfd/
* elf64-ppc.c (ADDIS_R12_R2): Define.
(build_plt_stub): Support fusion on ELFv2 stub.
(ppc_build_one_stub): Likewise for plt branch stubs.
gold/
* powerpc.cc (addis_12_2): Define.
(Stub_table::do_write): Support fusion on ELFv2 stubs.
ld/testsuite/
* ld-powerpc/elfv2exe.d: Update for changed plt call stubs.
gdb/
* ppc64-tdep.c (ppc64_standard_linkage8): New.
(ppc64_skip_trampoline_code): Recognise ELFv2 stub supporting fusion.
ld/testsuite/
* lib/ld-lib.exp: Add objcopy_objects command to run_dump_test.
This allows each input object to be optionally run through
objcopy before linking.
aarch64 does not support building non-PIC shared objects, so mark
tests for these as xfail.
ld/testsuite/ChangeLog:
2014-05-20 Will Newton <will.newton@linaro.org>
* ld-shared/shared.exp: Mark non-PIC shared object tests
as xfail on aarch64.
* ld-elf/shared.exp: Introduce the extralibs variable to control
the libraries to be linked. Don't link -ldl on *-*-freebsd*.
* ld-bootstrap/bootstrap.exp: Do not add -ldl to the extralibs on
*-*-freebsd*.
ld:
* ldlang.c (lang_finish): Don't call bfd_link_hash_table_free here.
(output_bfd_hash_table_free_fn): New variable.
(open_output): Save the _bfd_link_hash_table_free function for the
output_bfd into output_bfd_hash_table_free_fn.
* ldmain.c (ld_cleanup): If set, call output_bfd_hash_table_free_fn
on link_info.hash.
* ldlang.h (output_bfd_hash_table_free_fn): Declare.
ld/testsuite:
* ld-mmix/wrap1.d, ld-mmix/wrap1a.s, ld-mmix/wrap1b.s,
ld-mmix/wrap1c.s, ld-mmix/wrap2.d, ld-mmix/wrap3.d,
ld-mmix/wrap3a.s, ld-mmix/wrap3b.s, ld-mmix/wrap4.d: New
tests.
R_XTENSA_DIFF relocation offsets are in fact signed. Treat them as such.
Add testcase that examines ld behaviour on R_XTENSA_DIFF relocation
changing sign during relaxation.
2014-05-02 Volodymyr Arbatov <arbatov@cadence.com>
David Weatherford <weath@cadence.com>
Max Filippov <jcmvbkbc@gmail.com>
bfd/
* elf32-xtensa.c (relax_section): treat R_XTENSA_DIFF* relocations as
signed.
gas/
* config/tc-xtensa.c (md_apply_fix): mark BFD_RELOC_XTENSA_DIFF*
fixups as signed.
ld/testsuite/
* ld-xtensa/diff_overflow.exp, * ld-xtensa/diff_overflow1.s,
* ld-xtensa/diff_overflow2.s: Add test for DIFF* relocation
signedness and overflow checking.
be placed towards the front of local GOT space, while entries addressed
via a 32-bit index are placed towards the rear.
Provided that there are fewer than ~16K local GOT entries addressed via
a 16-bit index in total, this should eliminate any relocation overflows
caused by such GOT entries being allocated beyond the addressable range.
bfd/
* elfxx-mips.c (struct mips_got_info): Delete assigned_gotno
field. Add assigned_low_gotno and assigned_high_gotno fields.
(mips_elf_create_local_got_entry): Update out-of-space condition.
Set index of new GOT entry to assigned_low_gotno if required by
the current relocation, else set it to assigned_high_gotno.
(mips_elf_set_global_gotidx): Replace uses of assigned_gotno
with assigned_low_gotno.
(mips_elf_multi_got): Initialize assigned_low_gotno and
assigned_high_gotno in secondary GOTs. Use assigned_low_gotno
in place of assigned_gotno when handling global GOT entries.
(mips_elf_lay_out_got): Initialize assigned_low_gotno and
assigned_high_gotno.
(_bfd_mips_elf_finish_dynamic_sections): Account for a possible
gap in the middle of local GOT space.
ld/testsuite/
* ld-mips-elf/elf-rel-xgot-n32.d: Update for new GOT layout.
* ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise.
The AArch64 TLSDESC to IE relaxation code uses a bit mask intended to
ensure that destination register in a relaxed ldr instruction is
always X0. The mask has an off by one error resulting in the most
significant bit of the destination register being retained in the
relaxed instruction. The issue generally appears when the compiler
emits TLS accesses code under high register pressure resulting in a
broken code sequence.
When aligning input sections, we are supposed to take the fill pattern
from a FILL statement, if there is one in the output section statement.
ld/
* ldlang.c (lang_size_sections_1 <lang_input_section_enum>): Use
current "fill", not "output_section_statement->fill".
ld/testsuite/
* ld-scripts/fill.d, * ld-scripts/fill.t, * ld-scripts/fill_0.s,
* ld-scripts/fill_1.s, * ld-scripts/fill_2.s: New test.
* ld-scripts/data.exp: Run it.
This patch scans all input files for symbol reference warning if the
symbol reference doesn't exist in the current input file.
ld/
PR ld/16756
* ldmain.c (symbol_warning): New function.
(warning_callback): Use it. Scan all input files for a reference
to SYMBOL.
ld/testsuite/
PR ld/16756
* ld-plugin/lto.exp: Expect filename and line number for PR
ld/12760 test.
ELFv2 needs to create plt entries in a non-PIC executable for an
address reference to a function defined in a shared object. It's
possible that an object file has no features that distinguish it as
ELFv1 or ELFv2, eg. an object only containing data. Such files need
to be handled like those that are known to be ELFv2.
However, this unnecessarily creates plt entries for the analogous
ELFv1 case, so arrange to set output abi version earlier, and use the
output abi version to further distinguish ambiguous input files.
bfd/
* elf64-ppc.c (ppc64_elf_check_relocs): Account for possibly
needed plt entries when taking the address of functions for
abiversion == 0 (ie. unknown) as well as abiversion == 2.
Move opd setup and abiversion checks to..
(ppc64_elf_before_check_relocs): ..here. Renamed from
ppc64_elf_process_dot_syms. Set output abiversion from input and
input abiversion from output, if either is not set.
(ppc64_elf_merge_private_bfd_data): Don't merge flags here.
(elf_backend_check_directives): Update.
ld/testsuite/
* ld-powerpc/startv1.s, * ld-powerpc/startv2.s, * ld-powerpc/funref.s,
* ld-powerpc/funv1.s, * ld-powerpc/funv2.s,
* ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv2.d: New test files.
* ld-powerpc/powerpc.exp: Run new tests.
The current code subtracts the size of the output section containing
relplt from RELASZ. In some cases this will be the same output
section as the dynamic relocs causing a value of zero to be output.
Calculating the size from input sections seems to make more sense.
bfd/ChangeLog:
2014-03-25 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections):
Set value of DT_PLTRELSZ and DT_RELASZ based on the size
of input sections rather than output sections.
ld/testsuite/ChangeLog:
2014-03-25 Will Newton <will.newton@linaro.org>
* ld-aarch64/aarch64-elf.exp: Add relasz dump test.
* ld-aarch64/relasz.d: New file.
* ld-aarch64/relasz.s: Likewise.
Unless pointer_equality_needed is set then set st_value to be zero
for undefined symbols.
bfd/ChangeLog:
2014-03-20 Will Newton <will.newton@linaro.org>
PR ld/16715
* elf32-arm.c (elf32_arm_check_relocs): Set
pointer_equality_needed for absolute references within
executable links.
(elf32_arm_finish_dynamic_symbol): Set st_value to zero
unless pointer_equality_needed is set.
ld/testsuite/ChangeLog:
2014-03-20 Will Newton <will.newton@linaro.org>
* ld-arm/ifunc-14.rd: Update symbol values.
ld/testsuite/
* ld-arm/gc-hidden-1.d: Remove target, add not-target to match
other ELF-only tests in this directory. Loosen regexps so they
don't care what the exact addresses are.
This adds support for "func@localentry", an expression that returns the
ELFv2 local entry point address of function "func". I've excluded
dynamic relocation support because that obviously would require glibc
changes.
include/elf/
* ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
bfd/
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry.
(ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL.
(ppc64_elf_check_relocs): Likewise.
(ppc64_elf_relocate_section): Likewise.
* Add BFD_RELOC_PPC64_ADDR64_LOCAL.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Support @localentry.
(md_apply_fix): Support R_PPC64_ADDR64_LOCAL.
ld/testsuite/
* ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files.
* ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files.
* ld-powerpc/powerpc.exp: Run new test.
elfcpp/
* powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::local, global): Support
R_PPC64_ADDR64_LOCAL.
(Target_powerpc::Relocate::relocate): Likewise.
Enabled via the use of a new linker command line option: --long-plt.
* bfd-in.h: Add export of bfd_elf32_arm_use_long_plt.
* bfd-in2.h: Regenerate.
* elf32-arm.c (elf32_arm_plt_entry_long): New array.
(elf32_arm_link_hash_table_create): Set plt_entry_size to 16 if
using long PLT entries.
(bfd_elf32_arm_use_long_plt): New function.
(elf32_arm_populate_plt_entry): Add support for long PLT entries.
* emultempl/armelf.em (OPTION_LONG_PLT): Define.
(PARSE_AND_LIST_LONGOPTS): Add long-plt.
(PARSE_AND_LIST_OPTIONS): Likewise.
(PARSE_AND_LIST_ARGS_CASES): Handle long-plt.
* ld.texinfo: Document --long-plt.
* ld-arm/long-plt-format.s: New test case.
* ld-arm/long-plt-format.d: Expected disassembly.
* ld-arm/arm-elf.exp: Run the new test.
The manifest is necessary in order for the linked binaries to be executed in a Windows 8 environment.
The manifest is added using a linker script so that this feature will be compiler-neutral. The resource
merging code in the linker means that if an application provides its own manifest then the default
manifest will be ignored.
* configure.in (all_emul_extra_binaries): New variable. Populated
by invoking configure.tgt.
(EMUL_EXTRA_BINARIES): New substitution.
* configure: Regenerate.
* configure.tgt (target_extra_binaries): New variable. Set to
default-manifest.o for Cygwin and MinGW targets.
* Makefile.am (EMUL_EXTRA_BINARIES): New variable. Initialised
by the configure script.
(ALL_EMUL_EXTRA_BINARIES): New variable.
(default-manifest.o): New rule to build the default manifest.
(ld_new_DEPENDENCIES): Add EMUL_EXTRA_BINARIES.
(install-data-local): Add EMUL_EXTRA_BINARIES.
* Makefile.in: Regenerate.
* ld.texinfo: Document default manifest support.
* emulparams/i386pe.sh (DEFAULT_MANIFEST): Define.
* emulparams/i386pep.sh (DEFAULT_MANIFEST): Define.
* emultempl/default-manifest.rc: New file.
* scripttempl/pe.sc (R_RSRC): Include DEFAULT_MANIFEST, if defined.
* scripttempl/pep.sc (R_RSRC): Likewise.
* ld-pe/longsecn-1.d: Allow for extra sections.
* ld-pe/longsecn-2.d: Likewise.
* ld-pe/longsecn.d: Likewise.
* ld-pe/secrel.d: Likewise.
I was running this by hand to test out --ppc476-workaround. Another
bootstrap test doesn't take all that long, so let's add it to the
testsuite.
* ld-bootstrap/bootstrap.exp: Add ppc476 workaround test.
* ld-bootstrap/ppc476.t: New file.
Intel MPX introduces 4 bound registers, which will be used for parameter
passing in x86-64. Bound registers are cleared by branch instructions.
Branch instructions with BND prefix will keep bound register contents.
This leads to 2 requirements to 64-bit MPX run-time:
1. Dynamic linker (ld.so) should save and restore bound registers during
symbol lookup.
2. Change the current 16-byte PLT0:
ff 35 08 00 00 00 pushq GOT+8(%rip)
ff 25 00 10 00 jmpq *GOT+16(%rip)
0f 1f 40 00 nopl 0x0(%rax)
and 16-byte PLT1:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
which clear bound registers, to preserve bound registers.
We use 2 new relocations:
to mark branch instructions with BND prefix.
When linker sees any R_X86_64_PC32_BND or R_X86_64_PLT32_BND relocations,
it switches to a different PLT0:
ff 35 08 00 00 00 pushq GOT+8(%rip)
f2 ff 25 00 10 00 bnd jmpq *GOT+16(%rip)
0f 1f 00 nopl (%rax)
to preserve bound registers for symbol lookup and it also creates an
external PLT section, .pl.bnd. Linker will create a BND PLT1 entry
in .plt:
68 00 00 00 00 pushq $index
f2 e9 00 00 00 00 bnd jmpq PLT0
0f 1f 44 00 00 nopl 0(%rax,%rax,1)
and a 8-byte BND PLT entry in .plt.bnd:
f2 ff 25 00 00 00 00 bnd jmpq *name@GOTPCREL(%rip)
90 nop
Otherwise, linker will create a legacy PLT1 entry in .plt:
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
66 0f 1f 44 00 00 nopw 0(%rax,%rax,1)
and a 8-byte legacy PLT in .plt.bnd:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
66 90 xchg %ax,%ax
The initial value of the GOT entry for "name" will be set to the the
"pushq" instruction in the corresponding entry in .plt. Linker will
resolve reference of symbol "name" to the entry in the second PLT,
.plt.bnd.
Prelink stores the offset of pushq of PLT1 (plt_base + 0x10) in GOT[1]
and GOT[1] is stored in GOT[3]. We can undo prelink in GOT by computing
the corresponding the pushq offset with
GOT[1] + (GOT offset - &GOT[3]) * 2
Since for each entry in .plt except for PLT0 we create a 8-byte entry in
.plt.bnd, there is extra 8-byte per PLT symbol.
We also investigated the 16-byte entry for .plt.bnd. We compared the
8-byte entry vs the the 16-byte entry for .plt.bnd on Sandy Bridge.
There are no performance differences in SPEC CPU 2000/2006 as well as
micro benchmarks.
Pros:
No change to undo prelink in dynamic linker.
Only 8-byte memory overhead for each PLT symbol.
Cons:
Extra .plt.bnd section is needed.
Extra 8 byte for legacy branches to PLT.
GDB is unware of the new layout of .plt and .plt.bnd.
bfd/
* elf64-x86-64.c (elf_x86_64_bnd_plt0_entry): New.
(elf_x86_64_legacy_plt_entry): Likewise.
(elf_x86_64_bnd_plt_entry): Likewise.
(elf_x86_64_legacy_plt2_entry): Likewise.
(elf_x86_64_bnd_plt2_entry): Likewise.
(elf_x86_64_bnd_arch_bed): Likewise.
(elf_x86_64_link_hash_entry): Add has_bnd_reloc and plt_bnd.
(elf_x86_64_link_hash_table): Add plt_bnd.
(elf_x86_64_link_hash_newfunc): Initialize has_bnd_reloc and
plt_bnd.
(elf_x86_64_copy_indirect_symbol): Also copy has_bnd_reloc.
(elf_x86_64_check_relocs): Create the second PLT for Intel MPX
in 64-bit mode.
(elf_x86_64_allocate_dynrelocs): Handle the second PLT for IFUNC
symbols. Resolve call to the second PLT if it is created.
(elf_x86_64_size_dynamic_sections): Keep the second PLT section.
(elf_x86_64_relocate_section): Resolve PLT references to the
second PLT if it is created.
(elf_x86_64_finish_dynamic_symbol): Use BND PLT0 and fill the
second PLT entry for BND relocation.
(elf_x86_64_finish_dynamic_sections): Use MPX backend data if
the second PLT is created.
(elf_x86_64_get_synthetic_symtab): New.
(bfd_elf64_get_synthetic_symtab): Likewise. Undefine for NaCl.
ld/
* emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): New.
ld/testsuite/
* ld-x86-64/mpx.exp: Run bnd-ifunc-1 and bnd-plt-1.
* ld-x86-64/bnd-ifunc-1.d: New file.
* ld-x86-64/bnd-ifunc-1.s: Likewise.
* ld-x86-64/bnd-plt-1.d: Likewise.
execute permission regardless of the underlying PT_LOAD segment permissions.
Deleting this code allows the default linker behavior which is to set the
dynamic segment to the same permissions as the sections that make it up.
This change alters one existing test case to check the segment flags for
PT_DYNAMIC.
bfd/ChangeLog
* elfxx-mips.c(_bfd_mips_elf_modify_segment_map): Deleted hard coding of
PT_DYNAMIC segment flags.
ld/testsuite/ChangeLog
* ld-mips-elf/pic-and-nonpic-3a.sd: Check DYNAMIC segment flags.
It is added for
commit 409ff343a4
Author: Alan Modra <amodra@gmail.com>
Date: Tue Nov 8 13:49:11 2011 +0000
* elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Mark syms in
executables when export_dynamic.
* ld-elf/rdynamic-1.c: New file.
* ld-elf/rdynamic-1.rd: Likewise.
* ld-elf/shared.exp (build_tests): Add rdynamic-1.
An assignment to dot in an output section that allocates space of
course keeps the output section. Here, I'm changing the behaviour for
assignments that don't allocate space. The idea is not so much to
allow people to force output of an empty section with ". = .", but
to fix cases where an otherwise empty section has padding added by an
alignment expression that changes with relaxation or .eh_frame
editing. Such a section might have zero size before relaxation and so
be stripped incorrectly.
ld/
* ld.texinfo (Output Section Discarding): Mention assigning to dot
as a way of keeping otherwise empty sections.
* ldexp.c (is_dot, is_value, is_sym_value, is_dot_ne_0,
is_dot_plus_0, is_align_conditional): New predicates.
(exp_fold_tree_1): Set SEC_KEEP when assigning to dot inside an
output section, except for some special cases.
* scripttempl/elfmicroblaze.sc: Use canonical form to align at
end of .heap and .stack.
ld/testsuite/
* ld-shared/elf-offset.ld: Align end of .bss with canonical form
of ALIGN that allows an empty .bss to be removed.
* ld-arm/arm-dyn.ld: Likewise.
* ld-arm/arm-lib.ld: Likewise.
* ld-elfvsb/elf-offset.ld: Likewise.
* ld-mips-elf/mips-dyn.ld: Likewise.
* ld-mips-elf/mips-lib.ld: Likewise.
* ld-arm/arm-no-rel-plt.ld: Remove duplicate ALIGN.
* ld-powerpc/vle-multiseg-1.ld: Remove ALIGN at start of section.
ALIGN address of section instead.
* ld-powerpc/vle-multiseg-2.ld: Likewise.
* ld-powerpc/vle-multiseg-3.ld: Likewise.
* ld-powerpc/vle-multiseg-4.ld: Likewise.
* ld-powerpc/vle-multiseg-6.ld: Likewise.
* ld-scripts/empty-aligned.d: Check section headers not program
headers. Remove xfail and notarget.
* ld-scripts/empty-aligned.t: Use canonical ALIGN for end of .text2.
After resolving a versioned reference, foo@VER1, to a default versioned
definition, foo@@VER1, from a shared object, we also merge it with
the existing regular default symbol definition, foo. When foo is IFUNC
and foo@@VER1 aren't, we will merge 2 incompatible definitions. This
patch avoids merging foo@@VER1 definition with foo definition if
one is IFUNC and the other isn't.
There is nothing linker can do when a type mismatched default definition
are made dynamic by info->shared, info->export_dynamic or h->ref_dynamic.
But we do want to avoid exporting it when building PIE. Let's remove
those checks.
bfd/
PR ld/2404
* elflink.c (_bfd_elf_merge_symbol): Don't check info->shared,
info->export_dynamic, nor !h->ref_dynamic for type mismatch when
adding the default version.
ld/testsuite/
PR ld/2404
* ld-elf/shared.exp: Add a PIE test for PR ld/2404.
PR ld/2404 was fixed without a testcase. This patch to add one.
PR ld/2404
* ld-elf/pr2404.out: New file.
* ld-elf/pr2404a.c: Likewise.
* ld-elf/pr2404b.c: Likewise.
* ld-elf/shared.exp (build_tests): Build libpr2404a.so and
libpr2404b.a.
(run_tests): Run pr2404.
Modifies ld machinery tracking linker script assignments to notice all
assignments, not just those symbols mentioned in DEFINED().
ld/
PR ld/14962
* ldlang.h (struct lang_definedness_hash_entry): Add by_object and
by_script. Make iteration a single bit field.
(lang_track_definedness, lang_symbol_definition_iteration): Delete.
(lang_symbol_defined): Declare.
* ldlang.c (lang_statement_iteration): Expand comment a little.
(lang_init <lang_definedness_table>): Make it bigger.
(lang_track_definedness, lang_symbol_definition): Delete.
(lang_definedness_newfunc): Update.
(lang_symbol_defined): New function.
(lang_update_definedness): Create entries here. Do track whether
script definition of symbol is valid, even when also defined in
an object file.
* ldexp.c (fold_name <DEFINED>): Update.
(fold_name <NAME>): Allow self-assignment for absolute symbols
defined in a linker script.
ld/testsuite/
* ld-scripts/pr14962-2.d,
* ld-scripts/pr14962-2.t: New test.
* ld-scripts/expr.exp: Run it.
Rather than hacking every backend to not discard dynamic relocations
against an undefined hidden __ehdr_start, make it appear to be defined
early. We want __ehdr_start hidden before size_dynamic_sections so
that it isn't put in .dynsym, but we do need the dynamic relocations
for a PIE or shared library with a non-PIC reference. Defining it
early is wrong if we don't actually define the symbol later to its
proper value. (In some cases we want to leave the symbol undefined,
for example, when the ELF header isn't loaded, and we don't have this
infomation available in before_allocation.)
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation): Define
__ehdr_start before size_dynamic_sections and restore afterwards.
ld/testsuite/
* ld-elf/ehdr_start-shared.d: New.
* ld-elf/ehdr_start-userdef.d: xfail frv.
* ld-elf/ehdr_start-weak.d: Likewise.
* ld-elf/ehdr_start.d: Likewise.
This patch fixes 2 GNU_RELRO segment bugs:
1. lang_size_sections didn't properly align base to the maximum
alignment power of sections between DATA_SEGMENT_ALIGN and
DATA_SEGMENT_RELRO_END.
2. ld failed to adjust LOAD segment to generate GNU_RELRO segment
when LOAD segment doesn't fit GNU_RELRO segment. This is
https://sourceware.org/bugzilla/show_bug.cgi?id=14207
We "fixed" ld by not generating GNU_RELRO segment. This patch
adjusts LOAD segment to generate GNU_RELRO segment. It fixes
PR ld/16322 and at the same time it also fixes PR binutils/16323
since now we can adjust LOAD segment if it is too small.
bfd/
PR ld/14207
PR ld/16322
PR binutils/16323
* elf.c (_bfd_elf_map_sections_to_segments): Don't check section
size for PT_GNU_RELRO segment.
(assign_file_positions_for_load_sections): If PT_LOAD segment
doesn't fit PT_GNU_RELRO segment, adjust its p_filesz and p_memsz.
ld/
PR ld/14207
PR ld/16322
PR binutils/16323
* ldlang.c (lang_size_sections): Properly align RELRO base.
ld/testsuite/
PR ld/14207
PR ld/16322
PR binutils/16323
* ld-elf/pr16322.d: New file.
* ld-elf/pr16322.s: Likewise.
* ld-x86-64/pr14207.d: Expect PT_GNU_RELRO segment.
It is a good pratice to set the SHF_INFO_LINK bit when the sh_info field
represents a section header index.
bfd/
PR binutils/16317
* elf.c (assign_section_numbers): Set the SHF_INFO_LINK bit for
SHT_REL/SHT_RELA sections when setting the sh_info field.
binutils/testsuite/
PR binutils/16317
* binutils-all/readelf.s: Updated.
* binutils-all/readelf.s-64: Likewise.
ld/testsuite/
PR binutils/16317
* ld-elf/linkinfo1.s: New file.
* ld-elf/linkinfo1a.d: Likewise.
* ld-elf/linkinfo1b.d: Likewise.
2013-12-18 Vidya Praveen <vidyapraveen@arm.com>
* lib/ld-lib.exp (check_lto_available): Support cflags, ldflags and
test by compiling for an executable rather than shared library.
bfd/
* elf.c (assign_file_positions_except_relocs): Set e_type in ELF
header to ET_EXEC for -pie -Ttext-segment=.
2013-12-10 H.J. Lu <hongjiu.lu@intel.com>
* ld-pie/vaddr-0.d: New file.
* ld-pie/vaddr-1.d: Likewise.
* ld-pie/vaddr.s: Likewise.
Make the ifunc-21 and ifunc-22 tests more generic to support
aarch64_be and ELF targets.
ld/testsuite/ChangeLog:
2013-12-11 Will Newton <will.newton@linaro.org>
* ld-aarch64/ifunc-21.d: Make test more generic to support
aarch64_be and ELF targets.
* ld-aarch64/ifunc-22.d: Likewise.
These files are source files and have no business being +x. We couldn't
easily fix it in CVS (you need login+write access to the raw rcs files),
but we can fix this w/git.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com>
* binutils-all/objcopy.exp: Consider mips-mti-elf the same as
mips-sde-elf
* binutils-all/readelf.exp: Likewise
gas/testsuite/
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com>
* gas/mips/mips.exp: Consider mips-mti-elf the same as mips-sde-elf
ld/testsuite/
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com>
* ld-mips-elf/mips-elf.exp: Consider mips-mti-elf the same as
mips-sde-elf
The code for handling GOT references to ifunc symbols in static links
was missing.
bfd/ChangeLog:
2013-11-26 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol):
Handle STT_GNU_IFUNC symbols correctly in static links.
ld/testsuite/ChangeLog:
2013-11-26 Will Newton <will.newton@linaro.org>
* ld-aarch64/aarch64-elf.exp: Add ifunc-22.
* ld-aarch64/ifunc-22.d: New file.
* ld-aarch64/ifunc-22.s: Likewise.
The .got.plt header size was not being correctly taken into account
when calculating the offset for relocations against ifunc symbols.
bfd/ChangeLog:
2013-11-26 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Ensure
PLT_INDEX is calculated using correct header size.
ld/testsuite/ChangeLog:
2013-11-26 Will Newton <will.newton@linaro.org>
* ld-aarch64/aarch64-elf.exp: Add ifunc-21 test.
* ld-aarch64/ifunc-21.d: New file.
* ld-aarch64/ifunc-21.s: Likewise.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation):
Don't use bfd_elf_record_link_assignment to mark __ehdr_start
hidden. Instead, just do it directly here, and only if it was
referenced but not defined.
ld/testsuite/
* ld-elf/ehdr_start-userdef.t: New file.
* ld-elf/ehdr_start-userdef.d: New file.
* ld-elf/ehdr_start-strongref.s: New file.
* ld-elf/ehdr_start-missing.t: New file.
* ld-elf/ehdr_start-missing.d: New file.
* ld-elf/ehdr_start-weak.d: New file.
* ld-mips-elf/ehdr_start-2.nd: Expect __ehdr_start to be global.
Commit 34a79995c4 changed how STT_FILE
symbols were emitted but this testcase got missed in the cleanup.
ld/testsuite/ChangeLog:
2013-11-14 Will Newton <will.newton@linaro.org>
* ld-arm/script-type.sym: Remove redundant STT_FILE symbol.
bfd/
* archures.c (bfd_mach_i386_nacl): Fix definition so it doesn't
collide with bfd_mach_l1om.
* bfd-in2.h: Regenerate.
* elf32-i386.c (elf32_i386_nacl_elf_object_p): New function.
(elf_backend_object_p): Use that in elf32-i386-nacl definition.
* elf64-x86-64.c (elf64_x86_64_nacl_elf_object_p): New function.
(elf_backend_object_p): Use that in elf64-x86-64-nacl definition.
(elf32_x86_64_nacl_elf_object_p): New function.
(elf_backend_object_p): Use that in elf32-x86-64-nacl definition.
binutils/
* objdump.c (dump_dwarf): Grok bfd_mach_x86_64_nacl and
bfd_mach_x64_32_nacl as equivalent to bfd_mach_x86_64.
ld/testsuite/
* ld-x86-64/x86-64.exp (mixed1, mixed2): Loosen error string match
so it accepts "i386:nacl" in place of "i386".
* ld-x86-64/ilp32-2.d: Likewise.
* ld-x86-64/ilp32-3.d: Likewise.
* ld-x86-64/lp64-2.d: Likewise.
* ld-x86-64/lp64-3.d: Likewise.
Changing addis r2,r12,..; addi r2,r2,.. to lis r2,..; addi r2,r2..
in non-PIC executables has the benefit of removing a dependency on r12.
bfd/
* elf64-ppc.c (ppc64_elf_relocate_section): Edit global entry
prologue to non-PIC in non-PIC executables.
ld/testsuite/
* ld-powerpc/elfv2exe.d: Adjust for non-PIC global entry.
On PowerPC64 ELFv2 readelf emits [<localentry>: 8] describing extra
symbol st_other bits.
* ld-elfvers/vers24.rd: Allow extra readelf output after
symbol visibility.
* ld-ifunc/ifunc.exp: Likewise.
I think HJ has already fixed the binutils and ld tests with his
2013-09-27 readelf change, but this allows them to pass with wider
address output as per Nick's 2013-09-12 readelf change.
binutils/testsuite/
* binutils-all/x86-64/compressed-1a.d: Allow wide display of addresses.
gas/testsuite/
* gas/cfi/cfi-x86_64.d: Match when lacking end of section padding.
ld/testsuite/
* ld-pe/cfi.d: Allow wide display of addresses.
This change is to support the new ELFv2 ABI, which uses the value in
r12 on function entry to calculate the got/toc pointer.
bfd/
* elf64-ppc.c (build_plt_stub): Switch stubs to use r11 as base
reg and r12 as destination.
(ppc_build_one_stub): Likewise.
(ppc64_elf_build_stubs): Likewise for glink.
ld/testsuite/
* ld-powerpc/tls.s: Add proper .opd entry for _start.
* ld-powerpc/tlstoc.s: Likewise.
* ld-powerpc/relbrlt.d: Update for changed stubs.
* ld-powerpc/tls.d: Update for changed stubs and _start .opd entry.
* ld-powerpc/tls.g: Likewise.
* ld-powerpc/tlsexe.d: Likewise.
* ld-powerpc/tlsexe.g: Likewise.
* ld-powerpc/tlsexe.r: Likewise.
* ld-powerpc/tlsexetoc.d: Likewise.
* ld-powerpc/tlsexetoc.g: Likewise.
* ld-powerpc/tlsexetoc.r: Likewise.
* ld-powerpc/tlsso.d: Likewise.
* ld-powerpc/tlsso.g: Likewise.
* ld-powerpc/tlsso.r: Likewise.
* ld-powerpc/tlstoc.d: Likewise.
* ld-powerpc/tlstoc.g: Likewise.
* ld-powerpc/tlstocso.d: Likewise.
* ld-powerpc/tlstocso.g: Likewise.
* ld-powerpc/tlstocso.r: Likewise.
There's no real need to emit these always: They're needed only if we
indeed want to emit a localized symbol. Hence defer emission until we
at least did the basic early checks that would lead to no such symbol
getting emitted. This in particular avoids emitting such a symbol in
the majority of (if not all) "ld -r" cases.
I hope my set of cross build tests caught all the test cases needing
adjustment - please forgive if I missed a few.
bfd/
2013-10-29 Jan Beulich <jbeulich@suse.com>
* elflink.c (struct elf_outext_info): Add field file_sym_done.
(bfd_elf_final_link): Initialize new field. Move fake STT_FILE
symbol emission from here ...
(elf_link_output_extsym): ... to here.
gas/testsuite/
2013-10-29 Jan Beulich <jbeulich@suse.com>
* gas/microblaze/relax_size.elf: Drop expectation of no longer
present STT_FILE symbol.
* gas/microblaze/relax_size2.elf: Likewise.
ld/testsuite/
2013-10-29 Jan Beulich <jbeulich@suse.com>
* ld-cris/tls-e-tpoffcomm1.d: Drop expectation of no longer
present STT_FILE symbol.
* ld-mmix/bpo-18.d: Likewise.
* ld-mmix/bpo-22.d: Likewise.
* ld-mmix/greg-6.d: Likewise.
* ld-mmix/greg-7.d: Likewise.
* ld-mmix/loc4.d: Likewise.
* ld-mmix/local1.d: Likewise.
* ld-mmix/local3.d: Likewise.
* ld-mmix/local5.d: Likewise.
* ld-mmix/local7.d: Likewise.
* ld-mmix/loct-1.d: Likewise.
* ld-sh/sh64/abi32.xd: Likewise.
* ld-sh/sh64/abi64.xd: Likewise.
* ld-sh/sh64/cmpct1.xd: Likewise.
* ld-sh/sh64/crange1.rd: Likewise.
* ld-sh/sh64/crange2.rd: Likewise.
* ld-sh/sh64/crange3-cmpct.rd: Likewise.
* ld-sh/sh64/crange3-media.rd: Likewise.
* ld-sh/sh64/crange3.rd: Likewise.
* ld-sh/sh64/crangerel1.rd: Likewise.
* ld-sh/sh64/crangerel2.rd: Likewise.
* ld-sh/sh64/mix1.xd: Likewise.
* ld-sh/sh64/mix2.xd: Likewise.
* ld-sh/sh64/shdl32.xd: Likewise.
* ld-sh/sh64/shdl64.xd: Likewise.
* elfxx-mips.c (mips_use_local_got_p): New function.
(mips_elf_count_got_symbols, mips_elf_calculate_relocation): Use it.
(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
GOT and absolute references.
ld/testsuite/
* ld-mips-elf/pic-and-nonpic-6-n32.ad,
ld-mips-elf/pic-and-nonpic-6-n32.dd,
ld-mips-elf/pic-and-nonpic-6-n32.gd,
ld-mips-elf/pic-and-nonpic-6-n32.nd,
ld-mips-elf/pic-and-nonpic-6-n32.rd,
ld-mips-elf/pic-and-nonpic-6-n64.ad,
ld-mips-elf/pic-and-nonpic-6-n64.dd,
ld-mips-elf/pic-and-nonpic-6-n64.gd,
ld-mips-elf/pic-and-nonpic-6-n64.nd,
ld-mips-elf/pic-and-nonpic-6-n64.rd,
ld-mips-elf/pic-and-nonpic-6-o32.ad,
ld-mips-elf/pic-and-nonpic-6-o32.dd,
ld-mips-elf/pic-and-nonpic-6-o32.gd,
ld-mips-elf/pic-and-nonpic-6-o32.nd,
ld-mips-elf/pic-and-nonpic-6-o32.rd: Fix symbol value of extf4.
No longer expect extf3, extf4 and extd2 to be in the global GOT.
* archures.c (bfd_mach_i386_nacl, bfd_mach_i386_i386_nacl): New macros.
(bfd_mach_x86_64_nacl, bfd_mach_x64_32_nacl): New macros.
* cpu-i386.c (bfd_arch_i386_onebyte_nop_fill): New function.
(bfd_i386_nacl_arch): New variable.
(bfd_x86_64_nacl_arch, bfd_x64_32_nacl_arch): New variables.
(bfd_x64_32_arch_intel_syntax): Link them into the list.
* bfd-in2.h: Regenerate.
ld/
* emulparams/elf_i386_nacl.sh (ARCH): Set to i386:nacl.
* emulparams/elf_x86_64_nacl.sh (ARCH): Set to i386:x86-64:nacl.
* emulparams/elf32_x86_64_nacl.sh (ARCH): Set to i386:x64-32:nacl.
ld/testsuite/
* ld-x86-64/x86-64.exp (Mixed x86_64 and i386 input test 1):
Loosen string match to admit i386:x86-64*.
(Mixed x86_64 and i386 input test 2): Likewise.
* ld-x86-64/ilp32-2.d: Likewise.
* ld-x86-64/ilp32-3.d: Likewise.
* ld-x86-64/lp64-2.d: Likewise.
* ld-x86-64/lp64-3.d: Likewise.
* ld-x86-64/ia32-2.d: Likewise, and i386.* too.
* ld-x86-64/ia32-3.d: Likewise.
* elf-nacl.c (nacl_modify_segment_map): Fix logic reordering the
elf_segment_map list. If an executable segment is page-aligned
but does not end with a full page, then append a fake section into
the segment map entry that pads out the page.
(nacl_final_write_processing): New function. Write the code fill
laid out in nacl_modify_segment_map.
* elf-nacl.h: Declare it.
* elf32-arm.c (elf32_arm_nacl_final_write_processing): New function.
(elf_backend_final_write_processing): Define it for NaCl backend.
* elf32-i386.c (elf_backend_final_write_processing): Likewise.
* elf64-x86-64.c (elf_backend_final_write_processing): Likewise.
* elf-nacl.c (segment_eligible_for_headers): Rename MAXPAGESIZE
parameter to MINPAGESIZE.
(nacl_modify_segment_map): Use minpagesize instead of maxpagesize.
* elf32-arm.c (ELF_MINPAGESIZE, ELF_COMMONPAGESIZE): Set to
0x10000 for NaCl targets.
ld/testsuite/
* ld-x86-64/ilp32-4-nacl.d: Loosen .shstrtab line regexp to match
any file offset.
* ld-x86-64/tlsbin-nacl.rd: Update expected code segment PT_LOAD.
* ld-x86-64/tlsbindesc-nacl.rd: Likewise.
* ld-scripts/rgn-at3.d: XFAIL for *-*-nacl* targets.
* ld-scripts/rgn-over8-ok.d: Likewise.
explicit patterns for test target qualification. Define extra
tool flags for *-*-hpux* and tic6x-*-* targets. Link with a
linker script. Use alternative patterns for targets that do not
eliminate copy relocs, currently mn10300-*-* and vax-*-*.
* ld-elf/comm-data2.s: Handle HPUX's `.comm' syntax.
* ld-elf/comm-data2.ld: New test linker script.
* ld-elf/comm-data2.xd: Match section's VMA too. Ignore ASCII
data dump.
* ld-elf/comm-data2r.rd: New test pattern.
* ld-elf/comm-data2r.sd: New test pattern.
* ld-elf/comm-data2r.xd: New test pattern.
* ld-mips-elf/comm-data.exp: Use check_shared_lib_support rather
than an explicit pattern for test target qualification. Link
with a linker script.
* ldgram.y: Likewise
* ldlex.l: Likewise
* NEWS: Mention the new feature.
* ld.texinfo: Document the new feature.
* ld-scripts/log2.exp: New: Run the new log2 test.
* ld-scripts/log2.s: Source for the new test.
* ld-scripts/log2.t: Linker script for new test.
* elf32-arm.c (elf32_arm_final_link_relocate): Use origin of output
segment containing the relocating symbol instead of assuming 0 for
sb group relocations.
* ld-arm/group-relocs-ldr-bad.s: Redefine bar into foo section
beyond 16 bit offset width.
* ld-arm/group-relocs-ldrs-bad.s: Likewise.
* ld-arm/group-relocs-ldr-bad.d: Adjust expected result.
* ld-arm/group-relocs-ldrs-bad.d: Likewise.
* ld-arm/group-relocs.s: Add comments. Move symbols used for sb
group relocations into .data section. Drop section zero. Use pc/r0
as base register when pc/sb group relocations are used.
* ld-arm/group-relocs.d: Adjust expected result.
* ld-arm/group-relocs-alu-bad-2.d: New test for sb group relocation.
* ld-arm/group-relocs-ldc-bad-2.d: Likewise.
* ld-arm/group-relocs-ldr-bad-2.d: New test for pc group relocation.
* ld-arm/group-relocs-ldrs-bad-2.d: Likewise.
* ld-arm/unresolved-2.d: Add sb relocation failure test.
* ld-arm/group-relocs-alu-bad-2.s: New test source.
* ld-arm/group-relocs-ldr-bad-2.s: Likewise.
* ld-arm/group-relocs-ldrs-bad-2.s: Likewise.
* ld-arm/group-relocs-ldc-bad-2.s: Likewise.
* ld-arm/unresolved-2.s: Likewise.
* ld-arm/arm-elf.exp: For group-relocs, drop section zero start
definition. Run the new tests.
* ld-vax-elf/export-class-call.rd: New test.
* ld-vax-elf/export-class-call.xd: New test.
* ld-vax-elf/export-class-data.dd: New test.
* ld-vax-elf/export-class-data.rd: New test.
* ld-vax-elf/export-class-data.xd: New test.
* ld-vax-elf/export-class.ld: New test linker script.
* ld-vax-elf/export-class-call.s: New test source.
* ld-vax-elf/export-class-data.s: New test source.
* ld-vax-elf/export-class-def.s: New test source.
* ld-vax-elf/vax-elf.exp: Run the new tests.
* ld-vax-elf/vax-export-class.rd: New test.
* ld-vax-elf/vax-export-class.xd: New test.
* ld-vax-elf/export-class.exp: New test script.
* elf32-vax.c (elf_vax_check_relocs) <R_VAX_GOT32, R_VAX_PLT32>:
Don't check symbol visibility here. Remove a check already
asserted for.
(elf_vax_instantiate_got_entries): Use SYMBOL_REFERENCES_LOCAL
instead of individual checks.
(elf_vax_relocate_section) <R_VAX_GOT32, R_VAX_PLT32>: Only
check the offset to decide if produce a GOT or PLT entry.
Remove redundant assertions. Remove code to produce GOT entries
for local symbols. Remove a duplicate comment and add a comment
on GOT relocations.
(elf_vax_finish_dynamic_symbol): Remove code to produce RELATIVE
dynamic relocs.
ld/testsuite/
* ld-vax-elf/got-local-exe.xd: New test.
* ld-vax-elf/got-local-lib.xd: New test.
* ld-vax-elf/got-local-aux.s: New test source.
* ld-vax-elf/got-local-def.s: New test source.
* ld-vax-elf/got-local-ref.s: New test source.
* ld-vax-elf/vax-elf.exp: Run the new tests.
PR ld/15762
* ld-elf/shared.exp (build_tests): Check .gnu.warning section
in the libbarw.so library.
* ld-elf/libbarw.rd: New.
* lib/ld-lib.exp (run_cc_link_tests): Support checking on
output with warning message.
thumb only targets.
(elf32_arm_final_link_relocate): Likewise.
* ld-arm/thumb-b-lks-sym.d: Updated to be more flexible.
* ld-arm/thumb-bl-lks-sym.d: Likewise.
(elf32_arm_stub_long_branch_arm_nacl_pic): New variable.
(arm_build_one_stub): Increase MAXRELOCS to 3.
(arm_type_of_stub): Use them if GLOBALS->nacl_p.
(struct elf32_arm_link_hash_table): Give add_stub_section member's
pointee type a third argument.
(elf32_arm_create_or_find_stub_sec): Update caller.
(elf32_arm_size_stubs): Update argument type.
* bfd-in.h (elf32_arm_size_stubs): Update decl.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* emultempl/armelf.em (elf32_arm_add_stub_section): Take third
argument ALIGNMENT_POWER, use it instead of constant 3.
* ld-arm/farcall-arm-nacl.d: New file.
* ld-arm/farcall-arm-nacl-pic.d: New file.
* ld-arm/farcall-data-nacl.d: New file.
* ld-arm/arm-elf.exp (armeabitests_common): Add extra element to
"action" lists for those cases to use a different dump file for NaCl
targets.
Massage $armeabitests_common to drop the extra element or the one
before it, depending on [istarget "arm*-*-nacl*"].
* ld-arm/arm-elf.exp (armelftests_common): Move all "Cortex-A8
erratum fix", Thumb-only and interworking cases to ...
(armelftests_nonacl): ... here.
(armeabitests_common): Move all "erratum 760522 fix", Thumb-only
and interworking cases to ...
(armeabitests_nonacl): ... here.
* mips.h (EF_MIPS_NAN2008): New macro.
bfd/
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Handle
EF_MIPS_NAN2008.
(_bfd_mips_elf_print_private_bfd_data): Likewise.
binutils/
* readelf.c (get_machine_flags): Handle EF_MIPS_NAN2008.
gas/
* config/tc-mips.c (mips_flag_nan2008): New variable.
(options): Add OPTION_NAN enum value.
(md_longopts): Handle it.
(md_parse_option): Likewise.
(s_nan): New function.
(mips_elf_final_processing): Handle EF_MIPS_NAN2008.
(md_show_usage): Add -mnan.
* doc/as.texinfo (Overview): Add -mnan.
* doc/c-mips.texi (MIPS Opts): Document -mnan.
(MIPS NaN Encodings): New node. Document .nan directive.
(MIPS-Dependent): List the new node.
gas/testsuite/
* gas/mips/nan-2008-1.d: New test.
* gas/mips/nan-2008-2.d: New test.
* gas/mips/nan-2008-3.d: New test.
* gas/mips/nan-2008-4.d: New test.
* gas/mips/nan-legacy-1.d: New test.
* gas/mips/nan-legacy-2.d: New test.
* gas/mips/nan-legacy-3.d: New test.
* gas/mips/nan-legacy-4.d: New test.
* gas/mips/nan-legacy-5.d: New test.
* gas/mips/nan-error-1.l: New list test.
* gas/mips/nan-error-2.l: New list test.
* gas/mips/nan-2008-override.s: New test source.
* gas/mips/nan-2008.s: New test source.
* gas/mips/nan-legacy-override.s: New test source.
* gas/mips/nan-legacy.s: New test source.
* gas/mips/nan-error-1.s: New test source.
* gas/mips/nan-error-2.s: New test source.
* gas/mips/mips.exp: Run the new tests.
ld/testsuite/
* ld-mips-elf/nan-2008.d: New test.
* ld-mips-elf/nan-legacy.d: New test.
* ld-mips-elf/nan-mixed-1.d: New test.
* ld-mips-elf/nan-mixed-2.d: New test.
* ld-mips-elf/nan-2008.s: New test source.
* ld-mips-elf/nan-legacy.s: New test source.
* elfxx-mips.h (_bfd_mips_elf_get_synthetic_symtab): New
prototype.
* elf32-mips.c (elf_backend_plt_sym_val): Remove macro.
(bfd_elf32_get_synthetic_symtab): New macro.
* elfxx-mips.c (plt_entry): New structure.
(mips_elf_link_hash_entry): Add use_plt_entry member.
(mips_elf_link_hash_table): Rename plt_entry_size member to
plt_mips_entry_size. Add plt_comp_entry_size, plt_mips_offset,
plt_comp_offset, plt_got_index entries and plt_header_is_comp
members.
(STUB_LW_MICROMIPS, STUB_MOVE_MICROMIPS): New macros.
(STUB_LUI_MICROMIPS, STUB_JALR_MICROMIPS): Likewise.
(STUB_ORI_MICROMIPS, STUB_LI16U_MICROMIPS): Likewise.
(STUB_LI16S_MICROMIPS): Likewise.
(MICROMIPS_FUNCTION_STUB_NORMAL_SIZE): Likewise.
(MICROMIPS_FUNCTION_STUB_BIG_SIZE): Likewise.
(micromips_o32_exec_plt0_entry): New variable.
(mips16_o32_exec_plt_entry): Likewise.
(micromips_o32_exec_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize use_plt_entry.
(mips_elf_output_extsym): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_gotplt_index): Likewise. Remove the VxWorks
restriction. Use MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_elf_count_got_symbols): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_calculate_relocation): Handle MIPS16/microMIPS PLT
entries.
(_bfd_mips_elf_create_dynamic_sections): Don't set PLT sizes
here.
(mips_elf_make_plt_record): New function.
(_bfd_mips_elf_check_relocs): Update comment. Record occurences
of JAL relocations that might need a PLT entry.
(_bfd_mips_elf_adjust_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Set individual
PLT entry sizes here. Handle MIPS16/microMIPS PLT entries.
Don't set the symbol's value in the symbol table for PLT
references here. Don't set the PLT or PLT GOT section sizes
here.
(mips_elf_estimate_stub_size): Handle microMIPS stubs.
(mips_elf_allocate_lazy_stub): Likewise.
(mips_elf_lay_out_lazy_stubs): Likewise. Define a _MIPS_STUBS_
magic symbol.
(mips_elf_set_plt_sym_value): New function.
(_bfd_mips_elf_size_dynamic_sections): Set PLT header size and
PLT and PLT GOT section sizes here. Set the symbol values in
the symbol table for PLT references here. Handle microMIPS
annotation of the _PROCEDURE_LINKAGE_TABLE_ magic symbol.
(_bfd_mips_elf_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Handle
MIPS16/microMIPS PLT entries. Handle microMIPS stubs.
(_bfd_mips_vxworks_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Use
MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_finish_exec_plt): Handle microMIPS PLT. Return status.
(_bfd_mips_elf_finish_dynamic_sections): Handle result from
mips_finish_exec_plt.
(_bfd_mips_elf_link_hash_table_create): Update to use
gotplt_union's plist member rather than offset.
(_bfd_mips_elf_get_synthetic_symtab): New function.
include/elf/
* mips.h (ELF_ST_IS_MIPS_PLT): Respect STO_MIPS16 setting.
(ELF_ST_SET_MIPS_PLT): Likewise.
gdb/
* mips-tdep.c (mips_elf_make_msymbol_special): Handle MIPS16 and
microMIPS synthetic symbols.
ld/
* emulparams/elf32btsmip.sh: Arrange for .got.plt to be placed
as close to .plt as possible.
* scripttempl/elf.sc: Handle $INITIAL_READWRITE_SECTIONS and
$PLT_NEXT_DATA variables.
ld/testsuite/
* ld-mips-elf/jalx-2.dd: Update for microMIPS PLT support.
* ld-mips-elf/pic-and-nonpic-3a.dd: Update for the _MIPS_STUBS_
magic symbol.
* ld-mips-elf/pic-and-nonpic-3b.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise.
* ld-mips-elf/stub-dynsym-1-10000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-2fe80.d: Likewise.
* ld-mips-elf/stub-dynsym-1-7fff.d: Likewise.
* ld-mips-elf/stub-dynsym-1-8000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-fff0.d: Likewise.
* ld-mips-elf/tlslib-o32.d: Likewise.
opcodes/
* mips-dis.c (is_mips16_plt_tail): New function.
(print_insn_mips16): Handle MIPS16 PLT entry's GOT slot address
word.
(is_compressed_mode_p): Handle MIPS16/microMIPS PLT entries.
* elf64-aarch64.c (elf64_aarch64_final_link_relocate): Call
aarch64_resolve_relocation and bfd_elf_aarch64_put_addend to
handle the relocations of R_AARCH64_JUMP26, R_AARCH64_CALL26,
R_AARCH64_LD64_GOT_LO12_NC, R_AARCH64_ADR_GOT_PAGE and
R_AARCH64_GOT_LD_PREL19.
ld/testsuite/
* ld-aarch64/aarch64-elf.exp: Add 'ifunc-7c'.
* ld-aarch64/ifunc-7c.d: New test.
* elf32-arm.c (allocate_dynrelocs_for_symbol): Transform
ST_BRANCH_TO_ARM into ST_BRANCH_TO_THUMB if the target only
supports thumb instructions.
PR ld/15302
* ld-arm/branch-lks-sym.ld: New script.
* ld-arm/thumb-b-lks-sym.s: New test.
* ld-arm/thumb-b-lks-sym.d: Expected disassembly.
* ld-arm/thumb-bl-lks-sym.s: New test.
* ld-arm/thumb-bl-lks-sym.d: Expected disassembly.
* ld-arm/arm-elf.exp: Run the new tests.
* write.c (resolve_reloc_expr_symbols): On REL targets don't
convert relocs who have no relocatable field either. Rephrase
the conditional so that the PC-relative check is only applied
for REL targets.
gas/testsuite/
* gas/mips/jalr3.d: New test.
* gas/mips/jalr3-n32.d: New test.
* gas/mips/jalr3-n64.d: New test.
* gas/mips/jalr3.s: New test source.
* gas/mips/mips.exp: Run the new tests.
ld/testsuite/
* ld-mips-elf/jalr3.dd: New test.
* ld-mips-elf/jalr3.ld: New test linker script.
* ld-mips-elf/mips-elf.exp: Run the new test.
The .except, .loader and .typchk are not mapped to memory,
so do not set their SEC_ALLOC flag.
bfd/ChangeLog:
* coffcode.h (styp_to_sec_flags) [RS6000COFF_C]: Add handling
of STYP_EXCEPT, STYP_LOADER and STYP_TYPCHK sections.
ld/testsuite/ChangeLog:
* ld-powerpc/aix-core-sec-1.hd, ld-powerpc/aix-core-sec-2.hd,
ld-powerpc/aix-core-sec-3.hd: Adjust expected section flags
for section .loader.
PR ld/15365
* layout.cc (Layout::finalize): Make __ehdr_start STV_HIDDEN.
ld/
PR ld/15365
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation):
Restrict __ehdr_start's export class to no less than STV_HIDDEN.
ld/testsuite/
PR ld/15365
* ld-elf/ehdr_start.d: Expect __ehdr_start to be STB_LOCAL.
* ld-mips-elf/ehdr_start-1.nd: New test.
* ld-mips-elf/ehdr_start-2.nd: New test.
* ld-mips-elf/ehdr_start-1.ld: New test linker script.
* ld-mips-elf/ehdr_start-2.ld: New test linker script.
* ld-mips-elf/ehdr_start-new.s: New test source.
* ld-mips-elf/ehdr_start-o32.s: New test source.
* ld-mips-elf/mips-elf.exp: Run the new tests.
* ld-elf/provide-hidden-abs.nd: New test.
* ld-elf/provide-hidden-def.nd: New test.
* ld-elf/provide-hidden-dyn.nd: New test.
* ld-elf/provide-hidden-sec.nd: New test.
* ld-elf/provide-hidden-dynabs.nd: New test.
* ld-elf/provide-hidden-dynsec.nd: New test.
* ld-elf/provide-hidden-s.ld: New test linker script.
* ld-elf/provide-hidden-1.ld: New test linker script.
* ld-elf/provide-hidden-2.ld: New test linker script.
* ld-elf/provide-hidden-1.s: New test source.
* ld-elf/provide-hidden-2.s: New test source.
* ld-elf/provide-hidden-3.s: New test source.
* ld-elf/provide-hidden-4.s: New test source.
* ld-elf/provide-hidden.exp: New test script.
* config.bfd (msp430): Define targ_selvecs.
* configure.in: Add bfd_elf32_msp430_ti_vec.
* cpu-msp430.c: Add some more MSP430 machine numbers.
* elf32-msp430.c Add support for MSP430X relocations.
Add support for TI compiler generated relocations.
Add support for sym_diff relocations.
Add support for relaxing out of range short branches into long
branches.
Add support for MSP430 attribute section.
* reloc.c: Add MSP430X relocations.
* targets.c: Add bfd_elf32_msp430_ti_vec.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* readelf.c: Add support for MSP430X architecture.
* readelf.exp: Expect -wi test to fail for the MSP430.
* config/tc-msp430.c: Add support for the MSP430X architecture.
Add code to insert a NOP instruction after any instruction that
might change the interrupt state.
Add support for the LARGE memory model.
Add code to initialise the .MSP430.attributes section.
* config/tc-msp430.h: Add support for the MSP430X architecture.
* doc/c-msp430.texi: Document the new -mL and -mN command line
options.
* NEWS: Mention support for the MSP430X architecture.
* gas/all/gas.exp: Skip the DIFF1 test for the MSP430.
Expect the FORWARD test to pass for the MSP430.
Skip the REDEF tests for the MSP430.
Expect the 930509A test to fail for the MSP430.
* gas/all/sleb128-4.d: Skip for the MSP430.
* gas/elf/elf.exp: Set target_machine to msp430 for the MSP430.
Skip the EHOPT0 test for the MSP430.
Skip the REDEF and EQU-RELOC tests for the MSP430.
* gas/elf/section2.e-msp430: New file.
* gas/lns/lns-big-delta.d: Remove expectation of 20-bit
addresses.
* gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430.
* gas/msp430/msp430x.s: New test.
* gas/msp430/msp430x.d: Expected disassembly.
* gas/msp430/msp430.exp: Run new test.
* gas/msp430/opcode.d: Update expected disassembly.
* msp430.h: Add MSP430X relocs.
Add some more MSP430 machine numbers.
Add values used by .MSP430.attributes section.
* msp430.h: Add patterns for MSP430X instructions.
* Makefile.am: Add emsp430X.c
* Makefine.in: Regenerate.
* configure.tgt (msp430): Add msp430X emulation.
* ldmain.c (multiple_definition): Only disable relaxation if it
was enabled by the user.
* ldmain.h (RELAXATION_ENABLED_BY_USER): New macro.
* emulparams/msp430all.sh: Add support for MSP430X.
* emultempl/generic.em: (before_parse): Enable relaxation for the
MSP430.
* scripttempl/msp430.sc: Reorganize sections. Add .rodata
section.
* scripttempl/msp430_3.sc: Likewise.
* NEWS: Mention support for MSP430X.
* ld-elf/flags1.d: Expect this test to pass on the MSP430.
* ld-elf/init-fini-arrays.d: Expect this test to fail on the
MSP430.
* ld-elf/merge.d: Expect this test to pass on the MSP430.
* ld-elf/sec64k.exp: Skip these tests for the MSP430.
* ld-gc/pr13683.d: Expect this test to fail on the MSP430.
* ld-srec/srec.exp: Expect these tests to fail on the MSP430.
* ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to
fail on the MSP430.
* msp430-dis.c: Add support for MSP430X instructions.
ld/testsuite/ChangeLog:
2013-04-30 Will Newton <will.newton@linaro.org>
* ld-arm/arm-elf.exp: Use linker script for IFUNC test 17.
* ld-arm/ifunc-17.dd: Update offsets for linker script.
* ld-arm/ifunc-17.gd: Likewise.
* ld-arm/ifunc-17.rd: Likewise.
The test for ld/12942 fails with gcc versions before 4.7.0. This patch
disables this test with these versions of gcc.
ld/testsuite/ChangeLog:
2013-04-29 Will Newton <will.newton@linaro.org>
* ld-plugin/lto.exp: Disable ld/12942 test for gcc < 4.7.0.
non_got_ref may not be set when building shared library. We need to set
non_got_ref if there are any non-PIC relocations. But we only did this
when there were no PLT/GOT relocations. It failed when there is a PLT
relocation. This checkin moves the non_got_ref check out.
bfd/
2013-04-15 H.J. Lu <hongjiu.lu@intel.com>
PR ld/15371
* elf-ifunc.c (_bfd_elf_allocate_ifunc_dyn_relocs): Check
regular reference without non-GOT reference when building
shared library.
ld/testsuite/
2013-04-15 H.J. Lu <hongjiu.lu@intel.com>
PR ld/15371
* ld-ifunc/ifunc-20-i386.d: New file.
* ld-ifunc/ifunc-20-x86-64.d: Likewise.
* ld-ifunc/ifunc-20.s: Likewise.
diff --git a/bfd/elf-ifunc.c b/bfd/elf-ifunc.c
index e56427d..7e7ec36 100644
--- a/bfd/elf-ifunc.c
+++ b/bfd/elf-ifunc.c
@@ -187,23 +187,20 @@ _bfd_elf_allocate_ifunc_dyn_relocs (struct bfd_link_info *info,
htab = elf_hash_table (info);
+ /* When building shared library, we need to handle the case where it is
+ marked with regular reference, but not non-GOT reference since the
+ non-GOT reference bit may not be set here. */
+ if (info->shared && !h->non_got_ref && h->ref_regular)
+ for (p = *head; p != NULL; p = p->next)
+ if (p->count)
+ {
+ h->non_got_ref = 1;
+ goto keep;
+ }
+
/* Support garbage collection against STT_GNU_IFUNC symbols. */
if (h->plt.refcount <= 0 && h->got.refcount <= 0)
{
- /* When building shared library, we need to handle the case
- where it is marked with regular reference, but not non-GOT
- reference. It may happen if we didn't see STT_GNU_IFUNC
- symbol at the time when checking relocations. */
- if (info->shared
- && !h->non_got_ref
- && h->ref_regular)
- for (p = *head; p != NULL; p = p->next)
- if (p->count)
- {
- h->non_got_ref = 1;
- goto keep;
- }
-
h->got = htab->init_got_offset;
h->plt = htab->init_plt_offset;
*head = NULL;
diff --git a/ld/testsuite/ld-ifunc/ifunc-20-i386.d b/ld/testsuite/ld-ifunc/ifunc-20-i386.d
new file mode 100644
index 0000000..9373fcf
--- /dev/null
+++ b/ld/testsuite/ld-ifunc/ifunc-20-i386.d
@@ -0,0 +1,13 @@
+#source: ifunc-20.s
+#ld: -shared -m elf_i386 -z nocombreloc
+#as: --32
+#readelf: -r --wide
+#target: x86_64-*-* i?86-*-*
+
+Relocation section '.rel.ifunc' at offset 0x[0-9a-f]+ contains 1 entries:
+[ ]+Offset[ ]+Info[ ]+Type[ ]+.*
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_386_32[ ]+ifunc\(\)[ ]+ifunc
+
+Relocation section '.rel.plt' at offset 0x[0-9a-f]+ contains 1 entries:
+[ ]+Offset[ ]+Info[ ]+Type[ ]+.*
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_386_JUMP_SLOT[ ]+ifunc\(\)[ ]+ifunc
diff --git a/ld/testsuite/ld-ifunc/ifunc-20-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-20-x86-64.d
new file mode 100644
index 0000000..39492d4
--- /dev/null
+++ b/ld/testsuite/ld-ifunc/ifunc-20-x86-64.d
@@ -0,0 +1,13 @@
+#source: ifunc-20.s
+#ld: -shared -m elf_x86_64 -z nocombreloc
+#as: --64
+#readelf: -r --wide
+#target: x86_64-*-*
+
+Relocation section '.rela.ifunc' at offset 0x[0-9a-f]+ contains 1 entries:
+[ ]+Offset[ ]+Info[ ]+Type[ ]+.*
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_X86_64_64[ ]+ifunc\(\)[ ]+ifunc \+ 0
+
+Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 1 entries:
+[ ]+Offset[ ]+Info[ ]+Type[ ]+.*
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_X86_64_JUMP_SLOT[ ]+ifunc\(\)[ ]+ifunc \+ 0
diff --git a/ld/testsuite/ld-ifunc/ifunc-20.s b/ld/testsuite/ld-ifunc/ifunc-20.s
new file mode 100644
index 0000000..9d45455
--- /dev/null
+++ b/ld/testsuite/ld-ifunc/ifunc-20.s
@@ -0,0 +1,16 @@
+ .section .data.rel,"aw",@progbits
+ .globl ifunc_ptrt
+ .type ifunc_ptr, @object
+ifunc_ptr:
+ .dc.a ifunc
+ .text
+ .type ifunc, @gnu_indirect_function
+ .globl ifunc
+ifunc:
+ ret
+ .size ifunc, .-ifunc
+ .type bar, @function
+ .globl bar
+bar:
+ call ifunc@PLT
+ .size bar, .-bar
* ld-plugin/lto.exp (PR ld/12942 (3)): Remove file name and
line number from regexp.
(PR ld/15146 (2)): Similarly.
* ld-plugin/pr12942a.cc (main): Use __builtin_abort.
bfd/
PR ld/15323
* elf32-i386.c (elf_i386_check_relocs): Set non_ir_ref if a
symbol is referenced by a non-shared object.
* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
ld/testsuite/
PR ld/15323
* ld-plugin/lto.exp (lto_link_tests): Add pr15323a-r.o.
(lto_run_tests): Add a test for PR ld/15323.
* ld-plugin/pr15323.out: New file.
* ld-plugin/pr15323a.c: Likewise.
* ld-plugin/pr15323b.c: Likewise.
