Commit graph

63 commits

Author SHA1 Message Date
Jan Beulich
3d456fa193 gas/testsuite/
2005-05-25  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelok.d: Account for 32-bit displacements being shown
	in hex.

opcodes/
2005-05-25  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
	hex (but retain it being displayed as signed). Remove redundant
	checks. Add handling of displacements for 16-bit addressing in Intel
	mode.
2005-05-25 06:50:23 +00:00
Jan Beulich
2888cb7a54 opcodes/
2005-05-25  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (prefix_name): Remove pointless mode_64bit check.
	(OP_E): Remove redundant REX_EXTZ handling. Remove pointless
	masking of 'rm' in 16-bit memory address handling.
2005-05-25 06:47:58 +00:00
H.J. Lu
003519a7c2 gas/testsuite/
2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR 843
	* gas/i386/i386.exp: Add x86-64-branch.

	* gas/i386/x86-64-branch.d: New.
	* gas/i386/x86-64-branch.s: New.

opcodes/

2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR 843
	* i386-dis.c (branch_v_mode): New.
	(indirEv): Use branch_v_mode instead of v_mode.
	(OP_E): Handle branch_v_mode.
2005-05-07 13:30:02 +00:00
Nick Clifton
f432110413 Update the address and phone number of the FSF 2005-05-07 07:34:31 +00:00
Mark Kettenis
791fe84908 gas/ChangeLog:
* config/tc-i386.c (md_begin): Allow hyphens in mnemonics.
include/opcode/ChangeLog:
* i386.h: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.  Provide aliases without hyphens.
opcodes/ChangeLog:
* i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.
2005-04-18 20:59:20 +00:00
Jan Beulich
6128c599ed opcodes/
2005-04-01  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
	visible operands in Intel mode. The first operand of monitor is
	%rax in 64-bit mode.
2005-04-01 16:06:40 +00:00
Jan Beulich
373ff435a8 include/opcode/
2005-04-01  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Add rdtscp.

opcodes/
2005-04-01  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
	easier future additions.
2005-04-01 16:03:40 +00:00
H.J. Lu
4cc91dba12 gas/testsuite/
2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run segment and inval-seg for i386. Run
	x86-64-segment and x86-64-inval-seg for x86-64.

	* gas/i386/intel.d: Expect movw for moving between memory and
	segment register.
	* gas/i386/naked.d: Likewise.
	* gas/i386/opcode.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.

	* gas/i386/opcode.s: Use movw for moving between memory and
	segment register.
	* gas/i386/x86-64-opcode.s: Likewise.

	* : Likewise.

	* gas/i386/inval-seg.l: New.
	* gas/i386/inval-seg.s: New.
	* gas/i386/segment.l: New.
	* gas/i386/segment.s: New.
	* gas/i386/x86-64-inval-seg.l: New.
	* gas/i386/x86-64-inval-seg.s: New.
	* gas/i386/x86-64-segment.l: New.
	* gas/i386/x86-64-segment.s: New.

include/opcode/

2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Don't allow the `l' suffix for moving
	moving between memory and segment register. Allow movq for
	moving between general-purpose register and segment register.

opcodes/

2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (SEG_Fixup): New.
	(Sv): New.
	(dis386): Use "Sv" for 0x8c and 0x8e.
2005-03-29 19:30:47 +00:00
Alan Modra
aef6203bd6 update copyright dates 2005-03-03 11:52:12 +00:00
Jan Beulich
c4a530c529 gas/
2005-03-02  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (build_modrm_byte): Add lock prefix for cr8...15
	accesses.
	(parse_register): Allow cr8...15 in all modes.

gas/testsuite/
2005-03-02  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/cr-err.[ls]: New.
	* gas/i386/crx.[ds]: New.
	* gas/i386/i386.exp: Run new tests.

opcodes/
2005-03-02  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
	accesses.
	(OP_C): Consider lock prefix in non-64-bit modes.
2005-03-02 08:01:32 +00:00
H.J. Lu
9df48ba9fd 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
2005-01-12 19:40:20 +00:00
H.J. Lu
2033b4b97d gas/testsuite/
2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386/i386.exp: Run "sib".

	* gas/i386/sib.d: New file.
	* gas/i386/sib.s: Likewise.

opcodes/

2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
2005-01-12 19:12:52 +00:00
Jan Beulich
9306ca4a20 gas/
2004-11-04 Jan Beulich <jbeulich@novell.com>

	* config/tc-i386.c (set_intel_syntax): Allow % in symbol names when
	intel syntax and no register prefix, allow $ in symbol names when
	intel syntax.
	(set_16bit_gcc_code_flag): Replace literal 'l' by LONG_MNEM_SUFFIX.
	(intel_float_operand): Add fourth return value indicating math control
	operations. Make classification more precise.
	(md_assemble): Complain if memory operand of mov[sz]x has no size
	specified.
	(parse_insn): Translate word operands to floating point instructions
	operating on integers as well as control instructions to short ones
	as expected by AT&T syntax. Translate 'd' suffix to short one only for
	floating point instructions operating on non-integer operands.
	(match_template): Remove fldcw special case. Adjust q-suffix handling
	to permit it on fild/fistp/fisttp in AT&T mode.
	(process_suffix): Don't guess DefaultSize insns' suffix from
	stackop_size for certain floating point control instructions. Guess
	suffix for branch and [ls][gi]dt based on flag_code. Split error
	messages for Intel and AT&T syntax, and make the condition more strict
	for the former. Adjust suppressing of generation of operand size
	overrides.
	(intel parser): Allow the full set of MASM operators. Add FWORD, TBYTE,
	OWORD, and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add
	more error checking.
	* config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR XWORD_PTR
	SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines.

gas/testsuite/
2004-11-04 Jan Beulich <jbeulich@novell.com>
	* gas/i386/i386.exp: Execute new tests intelbad and intelok.
	* gas/i386/intelbad.[sl]: New test to check for various things not
	permitted in Intel mode.
	* gas/i386/intel.d, gas/i386/opcode.d, gas/i386/x86-64-opcode.d:
	Adjust for change to segment register store.
	* gas/i386/intelok.[sd]: New test to check various Intel mode specific
	things get handled correctly.
	* gas/i386/x86_64.[sd]: Remove unsupported constructs referring to
	'high' and 'low' parts of an operand, which the parser previously
	accepted while neither telling that it's not supported nor that it
	ignored the remainder of the line following these supposed keywords.

include/opcode/
2004-11-04 Jan Beulich <jbeulich@novell.com>

	* i386.h (sldx_Suf): Remove.
	(FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
	(q_FP): Define, implying no REX64.
	(x_FP, sl_FP): Imply FloatMF.
	(i386_optab): Split reg and mem forms of moving from segment registers
	so that the memory forms can ignore the 16-/32-bit operand size
	distinction. Adjust a few others for Intel mode. Remove *FP uses from
	all non-floating-point instructions. Unite 32- and 64-bit forms of
	movsx, movzx, and movd. Adjust floating point operations for the above
	changes to the *FP macros. Add DefaultSize to floating point control
	insns operating on larger memory ranges. Remove left over comments
	hinting at certain insns being Intel-syntax ones where the ones
	actually meant are already gone.

opcodes/
2004-11-04 Jan Beulich <jbeulich@novell.com>

	* i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
	(indirEb): Remove.
	(Mp): Use f_mode rather than none at all.
	(t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
	replaces what previously was x_mode; x_mode now means 128-bit SSE
	operands.
	(dis386): Make far jumps and calls have an 'l' prefix only in AT&T
	mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
	pinsrw's second operand is Edqw.
	(grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
	operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
	fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
	mode when an operand size override is present or always suffixing.
	More instructions will need to be added to this group.
	(putop): Handle new macro chars 'C' (short/long suffix selector),
	'I' (Intel mode override for following macro char), and 'J' (for
	adding the 'l' prefix to far branches in AT&T mode). When an
	alternative was specified in the template, honor macro character when
	specified for Intel mode.
	(OP_E): Handle new *_mode values. Correct pointer specifications for
	memory operands. Consolidate output of index register.
	(OP_G): Handle new *_mode values.
	(OP_I): Handle const_1_mode.
	(OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
	respective opcode prefix bits have been consumed.
	(OP_EM, OP_EX): Provide some default handling for generating pointer
	specifications.
2004-11-04 09:16:09 +00:00
Michal Ludvig
30d1c83669 Added new instructions for next version of VIA PadLock core. 2004-07-30 12:36:38 +00:00
Nick Clifton
20f0a1fc7d Corrections for x86_64 assembly. 2004-07-21 16:09:43 +00:00
Alan Modra
1d9f512f33 include/opcode/
* i386.h (i386_optab): Remove fildd, fistpd and fisttpd.

opcodes/
	* i386-dis.c (x_mode): Comment.
	(two_source_ops): File scope.
	(float_mem): Correct fisttpll and fistpll.
	(float_mem_mode): New table.
	(dofloat): Use it.
	(OP_E): Correct intel mode PTR output.
	(ptr_reg): Use open_char and close_char.
	(PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
	operands.  Set two_source_ops.

gas/testsuite/
	* gas/i386/prescott.s: Remove fisttpd and fisttpq.
	* gas/i386/prescott.d: Update.
2004-06-23 15:06:58 +00:00
Michal Ludvig
7ffdda930b 2004-03-12 Michal Ludvig <mludvig@suse.cz>
* i386-dis.c (GRPPLOCK): Delete.
	(grps): Detele GRPPLOCK entry.
2004-03-12 13:38:16 +00:00
Alan Modra
cc0ec05165 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
(M, Mp): Use OP_M.
	(None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
	(GRPPADLCK): Define.
	(dis386): Use NOP_Fixup on "nop".
	(dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
	(twobyte_has_modrm): Set for 0xa7.
	(padlock_table): Delete.  Move to..
	(grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
	and clflush.
	(print_insn): Revert PADLOCK_SPECIAL code.
	(OP_E): Delete sfence, lfence, mfence checks.

	* gas/i386/katmai.d: Revert last change.
2004-03-12 13:06:50 +00:00
Jakub Jelinek
4fd61dcb07 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
(INVLPG_Fixup): New function.
	(PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.

	* opcode/i386.h (i386_optab): Remove CpuNo64 from sysenter and
	sysexit.
2004-03-12 10:47:49 +00:00
Michal Ludvig
0f10071e3d 2004-03-12 Michal Ludvig <mludvig@suse.cz>
* gas/config/tc-i386.c (output_insn): Handle PadLock instructions.
	* gas/config/tc-i386.h (CpuPadLock): New define.
	(CpuUnknownFlags): Added CpuPadLock.
	* include/opcode/i386.h (i386_optab): Added xstore/xcrypt insns.
	* opcodes/i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
	(dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
	(padlock_table): New struct with PadLock instructions.
	(print_insn): Handle PADLOCK_SPECIAL.
2004-03-12 10:14:29 +00:00
Alan Modra
c02908d2c0 opcodes/
* i386-dis.c (grps): Use clflush by default for 0x0fae/7.
	(OP_E): Twiddle clflush to sfence here.

gas/testsuite/
	* gas/i386/katmai.d: Adjust for clflush change.
2004-03-12 07:01:37 +00:00
Alan Modra
a02a862a31 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1.  Don't print scale factor on AT&T mode when index missing.
2004-01-18 23:12:47 +00:00
Andreas Jaeger
26ca545091 * i386-dis.c: Convert to ISO C90 prototypes.
* i370-dis.c: Likewise.
	* i370-opc.c: Likewiwse.
	* i960-dis.c: Likewise.
	* ia64-opc.c: Likewise.
2003-09-14 15:16:57 +00:00
H.J. Lu
ca164297eb gas/
2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (md_assemble): Support Intel Precott New
	Instructions.

	* gas/config/tc-i386.h (CpuPNI): New.
	(CpuUnknownFlags): Add CpuPNI.

gas/testsuite/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add prescott.

	* gas/i386/prescott.d: New file.
	* gas/i386/prescott.s: Likewise.

include/opcode/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel Precott New Instructions.

opcodes/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
	Intel Precott New Instructions.
	(PREGRP27): New. Added for "addsubpd" and "addsubps".
	(PREGRP28): New. Added for "haddpd" and "haddps".
	(PREGRP29): New. Added for "hsubpd" and "hsubps".
	(PREGRP30): New. Added for "movsldup" and "movddup".
	(PREGRP31): New. Added for "movshdup" and "movhpd".
	(PREGRP32): New. Added for "lddqu".
	(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
	Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
	entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
	entry 0xd0. Use PREGRP32 for entry 0xf0.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(grps): Use PNI_Fixup in the "sidtQ" entry.
	(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
	PREGRP31 and PREGRP32.
	(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
	Use "fisttpll" in entry 1 in opcode 0xdd.
	Use "fisttp" in entry 1 in opcode 0xdf.
2003-06-23 20:15:34 +00:00
Alan Modra
8373f9713f * i386-dis.c (print_insn): Test intel_syntax against (char) -1 in
case char is unsigned.
2003-05-09 11:36:43 +00:00
Doug Evans
067186e45f * i386-dis.c (dis386): Recognize icebp (0xf1). 2003-03-22 18:56:45 +00:00
Alan Modra
db6eb5be2c * i386-dis.c (dq_mode, Edq): Define.
(dis386_twobyte): Correct movd operands.
	(OP_E): Handle dq_mode case.
2003-02-06 01:48:41 +00:00
Klee Dienes
84037f8c66 2002-11-18 Klee Dienes <kdienes@apple.com>
* arc.h (arc_ext_opcodes): Declare as extern.
	(arc_ext_operands): Declare as extern.
	* i860.h (i860_opcodes): Declare as const.

2002-11-18  Klee Dienes  <kdienes@apple.com>

	* arc-opc.c (arc_ext_opcodes): Define.
	(arc_ext_operands): Define.
	* i386-dis.c (Suffix3DNow): Declare as const.
	* arm-opc.h (arm_opcodes): Declare as const.
	(thumb_opcodes): Declare as const.
	* h8500-opc.h (h8500_table): Declare as const.
	(h8500_table): Use a NULL for the opcode in the terminator, so
	that code testing (opcode->name) behaves correctly.
	* mcore-opc.h (mcore_table): Declare as const.
	* sh-opc.h (sh_table): Declare as const.
	* w65-opc.h (optable): Declare as const.
	* z8k-opc.h (z8k_table): Declare as const.
2002-11-18 16:50:05 +00:00
Jan Hubicka
c1a64871f9 * i386-dis.c (prefix_name): Fix handling of 32bit address prefix
in 64bit mode.
	(print_insn) Likewise.
	(putop): Fix handling of 'E'
	(OP_E, OP_OFF): handle 32bit addressing mode in 64bit.
	(ptr_reg): Likewise.
2002-03-18 20:11:49 +00:00
Andreas Jaeger
fa405d97a1 * i386-dis.c (print_insn): Use x86-64 as option. 2001-11-14 12:01:12 +00:00
Alan Modra
e396998b18 binutils/ChangeLog
* doc/binutils.texi (objdump): Document x86 -M options.
include/ChangeLog
 	* dis-asm.h (print_insn_i386): Declare.
opcodes/ChangeLog
	* disassemble.c (disassembler): Call print_insn_i386.
	* i386-dis.c (SUFFIX_ALWAYS): Define.
	(struct dis_private): Add orig_sizeflag.
	(print_insn_i386): Make it a wrapper, calling..
	(print_insn): ..The old body of print_insn_i386.  Avoid longjmp
	warning without using volatile by moving orig_sizeflag to priv,
	and removing inbuf.  Parse disassembler_options.
	(print_insn_i386_att, print_insn_i386_intel): Move initialisation
	code to print_insn.
	(putop): Remove #ifdef SUFFIX_ALWAYS.
2001-11-14 03:15:28 +00:00
Alan Modra
e5470cdc92 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
accept WordReg.
	* i386-dis.c (grps): Change "sldt", "str", and "smsw" entries
	to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand
	category instead of Ew.
2001-11-13 01:03:55 +00:00
Alan Modra
8227b51f45 * i386-dis.c (grps): Don't print the implicit al/ax/eax register
for opcode 0xf6 or 0xf7 forms of mul, imul, div, idiv insns.
2001-09-04 01:58:07 +00:00
Kazu Hirata
6608db5792 * i386-dis.c: Fix formatting. 2001-07-29 05:00:14 +00:00
Alan Modra
d708bcbabb * i386-dis.c: Change formatting conventions for architecture
i386:intel to better match the format of various intel i386
	assemblers, like nasm, tasm or masm.
2001-07-28 07:13:34 +00:00
Alan Modra
bcb5558b05 * i386-dis.c (grps): Print l or w suffix, and require mem modrm
for lgdt, lidt, sgdt, sidt.
2001-07-18 13:33:12 +00:00
Andreas Jaeger
7081ff0445 2001-07-09 Andreas Jaeger <aj@suse.de>, Karsten Keil <kkeil@suse.de>
* i386-dis.c (set_op): Handle 64 bit and 32 bit mode.
	(OP_J): Use bfd_vma for mask to work properly with 64 bits.
	(op_address,op_riprel): Use bfd_vma to handle 64 bits.
2001-07-09 14:22:11 +00:00
Alan Modra
6439fc285d Merge insn decode tables, and generally tidy. 2001-06-11 13:25:07 +00:00
Alan Modra
5dd0794dca Branch hints for Pentium4 as insn modifiers, and some minor tweaks
to formatting.
2001-06-10 14:07:12 +00:00
Alan Modra
3ffd33cf59 * i386-dis.c (cond_jump_flag, loop_jcxz_flag): Define.
(cond_jump_mode, loop_jcxz_mode): Define.
	(dis386_att): Add cond_jump_flag and loop_jcxz_flag as
	appropriate, and 'F' suffix to loop insns.
	(disx86_64_att): Likewise.
	(dis386_twobyte_att): Likewise.
	(print_insn_i386): Don't output addr prefix for loop, jcxz insns.
	Output data size prefix for long conditional jumps.  Output cs and
	ds branch hints.
	(putop): Handle 'F', and mark PREFIX_ADDR used for case 'E'.
	(OP_J): Don't make PREFIX_DATA used.
2001-06-06 10:24:18 +00:00
H.J. Lu
8d5ec59972 2001-05-12 H.J. Lu <hjl@gnu.org>
* i386-dis.c (print_insn_i386): Always set `mod', `reg' and
	`rm'.
2001-05-12 15:19:22 +00:00
Alan Modra
4bba68155d * i386-dis.c (twobyte_has_modrm): Update table.
(need_modrm): Give it file scope.
	(MODRM_CHECK): Define.
	(dofloat): Use MODRM_CHECK.
	(OP_E): Likewise.
	(OP_EM): Likewise.
	(OP_EX): Likewise.
and fix testsuite yet again now that we are getting correct disassembly.
2001-05-12 12:07:10 +00:00
Alan Modra
67d6227df7 Correct cvtps2dq, movdq2q, movq2dq, and movq problems. 2001-05-12 09:52:40 +00:00
Alan Modra
992aaec9a9 Assorted fixes to pinsrw, pextrw, pmovmskb, movmskp, maskmovq. 2001-05-04 11:10:55 +00:00
Andreas Jaeger
c241941156 * i386-dis.c: Add ffreep instruction. 2001-04-06 09:27:33 +00:00
Alan Modra
0f17484fd3 Small tweaks to sse2 instructions. 2001-03-24 06:29:16 +00:00
Alan Modra
87890af05c paddq and psubq support. 2001-03-22 02:27:54 +00:00
Nick Clifton
060d22b0d0 Fix typos in ChangeLogs; fix dates in copyright notices 2001-03-13 22:58:38 +00:00
Jan Hubicka
76f227a511 * i386.h (i386_optab): SSE integer converison instructions have
64bit versions on x86-64.
	* i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison
	instructions.
	(putop): Handle 'Y'
2001-02-12 16:42:49 +00:00
Jan Hubicka
905308801e * (dis386_att, grps): Use 'T' for push/pop
(putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax
2001-02-01 15:30:55 +00:00