* emulparams/d10velf.sh: Changes needed for D10V-EVA board.
Set TEXT_START_ADDR to 0x1000000. Set READONLY_START_ADDR to
0x2000000.
* scripttempl/elfd10v.sc: Fix calculation of .text. Change
.stack to start at 0x2007ffe.
* interp.c (sim_size): Now allocates unified memory for imap segments
0,1,2, and 127. Initializes imap0 and imap1 to 0x1000. Initializes dmap to 0.
(sim_write): Just call xfer_mem().
(sim_read): Just call xfer_mem().
(xfer_mem): New function. Does appropriate memory mapping and copies bytes.
(dmem_addr): New function. Reads dmap register and translates data
addresses to local addresses.
(pc_addr): New function. Reads imap register and computes local address
corresponding to contents of the PC.
(sim_resume): Change to use pc_addr().
(sim_create_inferior): Change reinitialization code. Also reinitializes
imap[01] and dmap.
(sim_fetch_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
(sim_store_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
* simops.c (MEMPTR): Redefine to use dmem_addr().
(OP_5F00): Replace references to STate.imem with dmem_addr().
* d10v-sim.h (State): Remove mem_min and mem_max. Add umem[128].
(RB,SW,RW,SLW,RLW): Redefine to use dmem_addr().
(IMAP0,IMAP1,DMAP,SET_IMAP,SET_IMAP1,SET_DMAP): Define.
* config/tc-v850.c: Fix some indention problems.
(md_relax_table): Define for D9->D99 branch displacement
relaxing.
(md_convert_frag): Do something useful instead of aborting.
(md_estimate_size_before_relax): Likewise.
(md_assemble): Note if the matching instruction has a relaxable
operand. If it does, allocate frag with frag_var and don't
do any fixups.
So we can do 9bit displacement to 22bit displacement relaxing.
(start_stab): Initialize function_end.
(finish_stab): Pass info->function_end to debug_end_function.
(parse_stab): If info->function_end is set, use it as the address
which ends a function.
that are up to 0x1000 bytes apart, not just 64.
(ieee_add_bb11_blocks): Don't bother to emit a BB11 that is less
than 0x100 bytes.
(ieee_lineno): Only emit line numbers that are less than
info->highaddr.
the entry to the exit system call to detect termination of the
inferior stopped working. Trace termination of the inferior via
PRFS_STOPTERM instead.
(procfs_init_inferior): Do not trace entry to exit system call
if PIOCSSPCACT is defined.
(procfs_wait): Handle PR_DEAD event, which signals the termination
of the inferior if PRFS_STOPTERM is set.
* mdebugread.c (parse_partial_symbols): Ignore stNil section
start address symbols.
* sparc-tdep.c (get_saved_register): Get saved PC from the
frame info if not in innermost frame.
(ieee_enum_type): If the enum tag has been seen before but not
defined, reuse the same type index, and define it.
(ieee_tag_type): If this enum has not been defined, add an
undefined entry to the list of enums.
PR 10946.
hacks to improve parsing of complex hi, lo, zda, etc
expressions.
(md_assemble): Don't demand and eat a trailing ')' after finding
a v850 relocation prefix. Sign extend the constant in a
BFD_RELOC_LO16 expression. Do eat a trailing ')' after a complete
operand.
(parse_cons_expression_v850): Don't eat a trailing ')' after
finding a v850 relocation prefix.
Trying to get nec's sample code to assemble. Why oh why didn't JT try
to assemble any of their code...
(TC_CONS_FIX_NEW): Likewise.
* config/tc-v850.c (parse_cons_expression_v850): New function.
(cons_fix_new_v850): Likewise.
So we can handle ".hword lo(_foo)".
(long_options): Add "prefix-addresses".
(compare_symbols): Sort BSF_FUNCTION symbols before other
symbols.
(find_symbol_for_address): New static function, broken out of
objdump_print_address.
(objdump_print_addr_with_sym): New static function, broken out of
objdump_print_address.
(objdump_print_address): Call new functions.
(disassemble_bytes): New static function, broken out of
disassemble_data. Change disassembly format, unless
prefix_addresses is set.
(disassemble_data): Call disassemble_bytes. Unless
prefix_addresses is set, disassemble in chunks headed by a
symbol.
* binutils.texi, objdump.1: Document --prefix-addresses.
markers correctly; this fixes problem on Vr5000 where all
functions in a module had the same address.
* configure.in, configure.tgt, configure.host, gdbserver/configure.in:
Correct for pc-linux-gnu problem in config.guess.
* configure: Regenerate.
(OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
is zero extended for sst/sld instructions.
* v850_sim.h (SEX7): Delete. It's no longer needed (and it
was incorrect anyway).
So we properly simulate sst/sld instructions.
autoconf.
* gencode.c (write_opcodes): Pad operands field to account for
MSVC braindamage.
* simops.c: Include errno.h. Exclude SYS_chown, since MSVC
doesn't support it. (Why is this here in the first place?!?)
* v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's.
Change number of operands in struct simops from 9 to 6. Define
SIGTRAP and SIGQUIT for MSVC.
