Commit graph

1474 commits

Author SHA1 Message Date
Andrew Cagney
aba672aac5 * mn10300_sim.h: Declare all functions in op_utils.c using INLINE_SIM_MAIN.
* op_utils.c: Ditto.
* sim-main.c: New file.  Include op_utils.c.
1998-04-14 04:26:04 +00:00
Andrew Cagney
13eaae2fd0 Broke parsing of !<val>!<val> when adding support for =<field>. Fix.
Add support for the -S<suffix> option.
1998-04-14 04:24:47 +00:00
Andrew Cagney
1e23866b9b o Use new !<field>' and =<field>' operators in spec of
MOV and CMP instructions.
o	Enable basic inlining.  Diable use of SIM_MAIN_INLINE.
1998-04-14 00:59:30 +00:00
Andrew Cagney
346a3d6c11 Add support for instruction word conditionals of the form `XXX!YYY'
and XXX=YYY'.  See mn10300 for examples.
1998-04-14 00:00:15 +00:00
Frank Ch. Eigler
1e83118b79 * COP2 testing changes.
[ChangeLog]

Mon Apr 13 16:51:00 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* Makefile.in (*): Added .vuout/.vuexpect/.vuok test targets
	for confirming VU instruction trace.
	(t-cop2): Test COP2 sim using above facility.

	* t-cop2.vuexpect: New file.
1998-04-13 20:55:26 +00:00
Frank Ch. Eigler
96a4eb30da * Fixed a one-character typo in COP2 instruction synthesis.
[ChangeLog]
	Mon Apr 13 16:28:52 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Add proper 1000000 bit-string at top
	of VU lower instruction.
1998-04-13 20:31:29 +00:00
Doug Evans
e0a85af6eb * cpu.h,decode.c,decode.h,extract.c,sem.c,sem-switch.c: Regenerate.
* cpux.h,decodex.c,decodex.h,readx.c,semx.c: Regenerate.
Main change is to remove ordinal from format names.
1998-04-11 01:26:47 +00:00
Frank Ch. Eigler
b0b39eb2de * Backed out week-old attempt at enabling quadword memory access on
MIPS sim; added PKE sim code fixes.  No COP2 testing progress today.

[ChangeLog]

Thu Apr  9 16:38:23 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
	instead of QUADWORD.

	* sim-main.h: Removed attempt at allowing 128-bit access.

[ChangeLog.sky]

Thu Apr  9 16:42:54 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-pke.c (read_pke_pc): Corrected PKE PC calculation
	to word granularity.
1998-04-09 20:56:00 +00:00
Frank Ch. Eigler
e5cccb7177 * Added one PKE test after finding unexpected #### for a block of
code in gcov output.
1998-04-09 20:31:18 +00:00
Jillian Ye
ef23b3efd1 c_gen.pl : Added handling for data from GIF path1/2/3 FIFO. 1998-04-09 17:06:19 +00:00
Ian Carmichael
05c29245c9 * Fixed testcase. 1,$ s/ITOP 412/ITOP 421/ 1998-04-09 03:57:20 +00:00
Ian Carmichael
7dba069e20 * Fixed up blank lines in file. 1998-04-09 03:24:13 +00:00
Ian Carmichael
2fd7c40770 * Temporarily change LOADDRMASK in sky build. 1998-04-09 03:17:43 +00:00
Mark Alexander
ecd4a90b86 * erc32.c (sim_stop): Handle SIGINT gracefully.
* interf.c (sim_open): Don't catch SIGINT; GDB will do that for us.
1998-04-09 02:40:31 +00:00
Mark Alexander
e2324e2944 * exec.c (dispatch_instruction): Change how carry out is calculated
in DIVSCC.  Add emulation of SMULCC, UMUL, and UMULCC.
1998-04-09 01:42:44 +00:00
Frank Ch. Eigler
11c47f314b * R5900 sky COP2 testing continuing. Today only small
VCALLMS-related were found/fixed.

[ChangeLog.sky]

	* sky-vu.c ({read,write}_vu_special_reg): Add CMSAR[01] as special
 	registers for a VU.  Behavior not as mandated.
	({read,write}_vu_{misc,special}_reg): Create sim_io_error upon
	access to unknown register.  Behavior not as mandated.

	* sky-vu.h (anonymous register numbering enum): Add CMSAR[01].

	* sky-libvpe.c (indebug): Cache $ENV{'SKY_DEBUG'}.

[ChangeLog]


	* Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.

	* interp.c (decode_coproc): Refer to VU CIA as a "special"
	register, not as a "misc" register.  Aha.  Add activity
	assertions after VCALLMS* instructions.
1998-04-08 22:22:58 +00:00
Frank Ch. Eigler
4118c63ccd * COP2 test case update. 1998-04-08 22:10:38 +00:00
Jillian Ye
4cc9cd5474 c_gen.pl: Added subroutine perform_test_read_only 1998-04-08 20:57:28 +00:00
Ian Carmichael
997d07bb70 * Add sky-vudis.h, sky-vudis.c. 1998-04-08 20:14:44 +00:00
Jillian Ye
1430343e6b sce_main.c Fixing address used (line 100): DMA_D1_MADR -> DMA_D1_TADR 1998-04-08 19:46:08 +00:00
Jillian Ye
a41a7ce2fd Update testcase to use the correct include files.
: ----------------------------------------------------------------------
1998-04-08 19:01:01 +00:00
Jillian Ye
b652cad7c0 *** empty log message *** 1998-04-08 18:07:54 +00:00
Jillian Ye
356d8c8c00 Take out sce_testcase from "make check" until they can run more stably.
Added "check_sce" target for driving the Sce_testcases.
1998-04-08 18:03:03 +00:00
Jillian Ye
b03c88a371 Update testcase to compile with the lastest DVP AS 1998-04-08 17:27:47 +00:00
Jillian Ye
2e7f8e7beb Update testcase to compile with latest DVP-AS
: ----------------------------------------------------------------------
1998-04-08 17:15:24 +00:00
Andrew Cagney
8764538f22 Keep sim-main.c and tx.igen 1998-04-07 23:15:53 +00:00
Doug Evans
4b61e1073f Keep sky-gs.[ch] if sky. 1998-04-07 22:54:10 +00:00
Frank Ch. Eigler
0b2289b6b3 * Oops, keep new file. 1998-04-07 22:50:02 +00:00
Frank Ch. Eigler
174ff2242b * R5900 COP2 sim testing in progress. The majority of instructions actually
work!

[ChangeLog.sky]

	* sky-vu.h (vu_device): Represent "macro instruction just stuffed
 	into fetch buffer" condition with new "m" bit.  Rename old "m" to
 	"l".

	* sky-libvpe.c (indebug): Save snapshot of environment value;
 	workaround for suspected memory corruption.
	(fetch_inst): Respect new "m" macro-instruction flag for reporting
 	successful fetch to caller.
	(exec_inst): Disassemble instruction here instead of fetch time.
  	Renamed old "m" -> "l" flag in VU state to track interlock
 	release.
	(vpecallms_cycle): Call exec_inst only if fetch_inst did some
 	work.

	* sky-vu.c (vu_attach, vu[01]_device): Revamped initialization to
 	ensure complete clear of tail part of struct at attach time.
	(vu0_busy): Fix thinko.
	(vu0_macro_issue): Adapt to new "l" flag.
	(vu0_micro_interlock_released): Ditto.
 	(write_vu_special_reg): Ditto.
	(read_vu_special_reg): Compute VBS0/VBS1 bits more explicitly.
  	The other VU status bits are not yet computed.

[ChangeLog]

	* interp.c (decode_coproc): Do not apply superfluous E (end) flag
 	to upper code of generated VU instruction.
1998-04-07 22:47:53 +00:00
Frank Ch. Eigler
0dee6af299 * COP2 testing in progress.
Tue Apr  7 18:31:47 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* t-cop2.s: New test for COP2 function.

	* Makefile.in: Added rule to assemble self-contained R5900 asm tests.
1998-04-07 22:45:56 +00:00
Doug Evans
34c1c9b86a Update. 1998-04-07 22:44:49 +00:00
Jillian Ye
373df64120 Update Makefile.in to use dvp-el-as for SKY testcases.
: ----------------------------------------------------------------------
1998-04-07 21:10:30 +00:00
Ian Carmichael
5faa69dac3 * Added missing ITOP instructions to test40,41,42,43. 1998-04-07 20:20:34 +00:00
Jillian Ye
f8c732a164 sce_main.c : Added "return 0;" to the end of main.
: ----------------------------------------------------------------------
1998-04-07 16:34:29 +00:00
Jillian Ye
5087a6057a sce* : files added for the SCE (feb28) testsuite (modified).
sce*_testN.* corresponds to the original testN/test.*
       *.vuasm    : MICRO code
       *.dvpasm   : DMAtag and VIF code description
       *.out_gif.dat : GIF output values for the corresponding testcase.
sce_main.c : driver file for the SCE testcases
sce_macro.s : SCE provided macro file needed by the SCE (feb28) testcases
refresh.s   : Needed by sce_main.c
Makefile.in : Updated to run make and run the SCE testsuite.

: ----------------------------------------------------------------------
1998-04-07 16:23:41 +00:00
Frank Ch. Eigler
2ebb2a6855 * R5900 COP2 is now ready for testing. Let loose the dogs!
Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (cop_[ls]q): Replaced stub with proper COP2 code.

	* sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
 	for TARGET_SKY.

	* r5900.igen (SQC2): Thinko.
1998-04-07 00:01:31 +00:00
Jillian Ye
0eebcbd7ab c_gen.pl: Added sub-routine perform_test64 to read and verify 64bit register. 1998-04-06 20:49:47 +00:00
Frank Ch. Eigler
ebcfd86a2e * R5900 COP2 function nearly complete. PKE sim now aware of new GPUIF
masking facility for PATH3 transfers.

[ChangeLog.sky]

Sun Apr  5 12:11:45 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-libvpe.c (exec-inst): Added "M" bit detection for upper
 	instruction.

	* sky-pke.c (pke_check_stall): Added more assertions.
	(pke_code_mskpath3): Use new GPUIF M3P control register.

	* sky-pke.h (VU[01]_CIA): New macros that give VU CIA
 	pseudo-register addresses.

	* sky-vu.h (vu_device, VectorUnitState): Merged structs.
	(VectorUnitState.mflag): New field.
	(VU_REG_{CMSAR0,CMSAR1,FBRST}) Added missing control registers.

	* sky-vu.c (vu0_busy): New function.
	(vu0_q_busy): New function.
	(vu0_macro_issue): New function.
	(vu0_micro_interlock_released): New function.
	(vu0_busy_in_{micro,macro}_mode): Deleted stubs.
	(vu0_macro_hazard_check): Deleted stubs.
	(vu_attach): Adapted code to merged device & state struct.
	(read_vu_special_reg): Compute VBS0/VBS1 bits in STAT register.

[ChangeLog]
start-sanitize-sky
Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (*): Adapt code to merged VU device & state structs.
	(decode_coproc): Execute COP2 each macroinstruction without
 	pipelining, by stepping VU to completion state.  Adapted to
	read_vu_*_reg style of register access.

	* mips.igen ([SL]QC2): Removed these COP2 instructions.

	* r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.

	* sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.

end-sanitize-sky
1998-04-05 16:40:03 +00:00
Frank Ch. Eigler
d61cc1d4b1 * Test case patch for more functional GPUIF implementation
Sun Apr  5 12:34:56 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* t-pke3.trc: Modified to confirm parts of GPUIF PATH3-masking
 	functionality.
1998-04-05 16:37:04 +00:00
Andrew Cagney
64ed8b6a8c aclocal.m4: Don't enable inlining when cross-compiling.
mips/*: Tune mips simulator - allow all memory transfer code to be inlined.
1998-04-05 07:16:54 +00:00
Andrew Cagney
278bda4050 Cleanup INLINE support for simulators using common framework.
Make IGEN responsible for co-ordinating inlining of generated files.
By default, aclocal.m4 disabled all inlining.
1998-04-04 12:33:11 +00:00
Jillian Ye
f6f81e4a92 c_gen.pl: Added sub-routine process_data_reg64 to handle 64bit register
writes.
1998-04-03 19:59:11 +00:00
Andrew Cagney
72a08ce565 Don't bother generating trace prefix string when not tracing. 1998-04-03 17:13:40 +00:00
Ron Unrau
c567d0b941 * sim-main.h: add vif registers
* interp.c: incorporate vif register load/store
        * sky-pke.[ch]: add register load/store routines
        * sku-vu.c: P register is float
1998-04-02 21:02:38 +00:00
Andrew Cagney
69d5a56645 Re-do load/store operations so that they work for both 32 and 64 bit
ISAs.
Enable tx39 as igen again.
1998-04-02 19:35:39 +00:00
Andrew Cagney
725fc5d927 For mips get_mem_size call. Force the return of a 32 bit value
regardless of the target's word bitsize.
1998-04-02 03:27:24 +00:00
Ron Unrau
2151467d63 sky-vu.[ch]: prototype decls, cast floats to ints before register transfer
interp.c: integrate VU register read/writes
sim-main.h : track tm-txvu.h
1998-04-01 17:31:24 +00:00
Frank Ch. Eigler
6b0c51c929 * You bop one on the head ... another one appears.
Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
1998-04-01 13:19:07 +00:00
Andrew Cagney
e1fe7a7966 * configure.in (SIM_AC_OPTION_WARNINGS): Add.
configure: Re-generate.
1998-04-01 02:56:05 +00:00
James Lemke
1ff39ecb10 * sky-dma.c: Clarify text in warning msg.
* interp.c: Add global option "float-type".
	* sky-vu.h: Add SIM_DESC sd; to VectorUnitState for accessing
	global options.
1998-03-31 21:46:31 +00:00