opcodes/
* aarch64-opc.c (operand_general_constraint_met_p): Change to check
the alignment of addr.offset.imm instead of that of shifter.amount for
operand type AARCH64_OPND_ADDR_UIMM12.
gas/testsuite/
* gas/aarch64/illegal-2.s: Add test case.
* gas/aarch64/illegal-2.l: Likewise.
* arm-dis.c: Use preferred form of vrint instruction variants
for disassembly.
2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gas/arm/armv8-a+fp.d: Use preferred form of vrint instruction
variants for disassembly.
* gas/arm/armv8-a+fp.s: Likewise.
* gas/arm/armv8-a+simd.d: Likewise.
* gas/arm/armv8-a+simd.s: Likewise.
register operand of clr1, not1, set1 and tst1 instructions.
* config/tc-v850.c (v850_insert_operand): Use a static buffer for
the error message.
* gas/v850/v850e1.d: Fix expected disassembly of clr1, not1, set1
and tst1 insns.
* config/tc-s390.c (s390_parse_cpu): Add new option zEC12.
* doc/as.texinfo: Document new option zEC12.
* doc/c-s390.texi: Likewise.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/s390.exp: Run zEC12 tests.
* gas/s390/zarch-zEC12.d: New file.
* gas/s390/zarch-zEC12.s: New file.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-mkopc.c: Support new option zEC12.
* s390-opc.c: Add new instruction formats.
* s390-opc.txt: Add new instructions for zEC12.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
2012-09-23 Maciej W. Rozycki <macro@codesourcery.com>
* gas/mips/hilo-diff-eb.d: New test.
* gas/mips/hilo-diff-eb-n32.d: New test.
* gas/mips/hilo-diff-eb-n64.d: New test.
* gas/mips/hilo-diff-el.d: New test.
* gas/mips/hilo-diff-el-n32.d: New test.
* gas/mips/hilo-diff-el-n64.d: New test.
* gas/mips/mips16@hilo-diff-eb.d: New test.
* gas/mips/mips16@hilo-diff-eb-n32.d: New test.
* gas/mips/mips16@hilo-diff-eb-n64.d: New test.
* gas/mips/mips16@hilo-diff-el.d: New test.
* gas/mips/mips16@hilo-diff-el-n32.d: New test.
* gas/mips/mips16@hilo-diff-el-n64.d: New test.
* gas/mips/micromips@hilo-diff-eb.d: New test.
* gas/mips/micromips@hilo-diff-eb-n32.d: New test.
* gas/mips/micromips@hilo-diff-eb-n64.d: New test.
* gas/mips/micromips@hilo-diff-el.d: New test.
* gas/mips/micromips@hilo-diff-el-n32.d: New test.
* gas/mips/micromips@hilo-diff-el-n64.d: New test.
* gas/mips/hilo-diff.s: New test source.
* gas/mips/mips.exp: Run the new tests.
* config/tc-mips.h (TC_FORCE_RELOCATION): Remove comment.
* config/tc-mips.c (calculate_reloc): New function.
(append_insn): Use it. Do not resolve compound relocations here.
(mips16_macro_build, mips16_ip): Use calculate_reloc.
(mips16_immed_extend): New function, split out from...
(mips16_immed): ...here.
(mips_frob_file): Handle null symbols.
(mips_force_relocation): Remove NEWABI handling.
(read_reloc_insn, write_reloc_insn): New functions.
(md_apply_fix): Report TLS relocations against constants.
Use read_reloc_insn, calculate_reloc and write_reloc_insn.
Report relocations against constants that can't be resolved
at assembly time.
gas/testsuite/
* gas/mips/elf-rel22.s, gas/mips/elf-rel22.d: Add more tests.
* gas/mips/elf-rel29.s, gas/mips/elf-rel29.d,
gas/mips/micromips@elf-rel29.d, gas/mips/elf-rel30.s,
gas/mips/elf-rel30.l: New tests.
* gas/mips/mips.exp: Run them.
2012-09-23 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.c (append_insn) <BFD_RELOC_MIPS_JMP>: Don't
mark as incomplete for constant expressions.
<BFD_RELOC_MIPS16_JMP>: Likewise.
2012-09-23 Richard Sandiford <rdsandiford@googlemail.com>
Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.h (mips_record_label): Delete.
(mips_add_dot_label): Declare.
(tc_new_dot_label): Use it.
* config/tc-mips.c (mips_assembling_insn): New variable.
(md_assemble): Call mips_mark_labels. Set mips_assembling_insn
while the main part of the function is executing.
(mips_compressed_mark_label): New function, split out from...
(mips_compressed_mark_labels): ...here.
(append_insn): Don't call mips_mark_labels here.
(mips_record_label): Make local.
(mips_add_dot_label): New function.
gas/testsuite/
* gas/mips/dot-1.s, gas/mips/dot-1.d, gas/mips/micromips@dot-1.d,
gas/mips/mips16@dot-1.d: New test.
* gas/mips/mips.exp: Run it.
* config/tc-mips.c (SEXT_16BIT): New macro.
(mips16_immed): Take the reloc type as a parameter. Do not impose
a signed vs. unsigned distinction on the value when a relocation
operator was used.
(mips16_macro_build, mips16_ip, md_convert_frag): Pass the reloc
type to mips16_immed.
(macro): Use SEXT_16BIT.
* config/tc-mips.c (read_insn, write_insn, read_compressed_insn):
New functions.
(install_insn, md_apply_fix, md_convert_frag, mips_handle_align):
Use them, and write_compressed_insn.
* config/tc-mips.c (mips_cl_insn): Remove use_extend and extend.
(MIPS16_EXTEND): New macro.
(mips16_opcode_length): New function.
(insn_length): Use it.
(create_insn): Update after mips_cl_insn change.
(write_compressed_insn): New function.
(install_insn): Use it.
(append_insn): Use insn_length to check for unextended MIPS16
instructions.
(mips16_macro_build): Update call to mips16_immed.
(mips16_ip): Likewise. Use MIPS16_EXTEND to force an extended
instruction.
(mips16_immed): Remove use_extend and extend; install EXTEND
opcodes in the upper 16 bits of *INSN instead. Keep the
instruction extended if it already is. Replace warn, small
and ext with a forced_insn_length-like parameter.
(md_convert_frag): Update call mips16_immed.
Use write_compressed_insn.
opcodes:
* arm-dis.c: Changed ldra and strl-form mnemonics
to lda and stl-form.
gas:
* config/tc-arm.c: Changed ldra and strl-form mnemonics
to lda and stl-form for armv8.
gas/testsuite:
* gas/arm/armv8-a-bad.l: Updated for changed mnemonics.
* gas/arm/armv8-a-bad.s: Likewise.
* gas/arm/armv8-a.d: Likewise.
* gas/arm/armv8-a.s: Likewise.
* gas/arm/inst.s: Added test for ldrt encoding compatibly with ldralt.
* gas/arm/inst.d: Updated.
bfd/
* bfd-in2.h: Regenerated.
* elf64-aarch64.c
(elf64_aarch64_howto_table): Add R_AARCH64_GOT_LD_PREL19 reloc to HOWTO.
(elf64_aarch64_reloc_map): Add reloc entry.
(aarch64_resolve_relocation): Likewise.
(bfd_elf_aarch64_put_addend): Likewise.
(aarch64_reloc_got_type): Likewise.
(elf64_aarch64_final_link_relocate): Likewise.
(lf64_aarch64_check_relocs): Likewise.
(elf64_aarch64_check_relocs): New case for R_AARCH64_ADR_PREL_LO21
reloc.
* libbfd.h: Regenerated.
* reloc.c (R_AARCH64_GOT_LD_PREL19): New reloc.
gas/
* config/tc-aarch64.c
(reloc_table): Add reloc to table entry.
(parse_address_main): Add support for #:<reloc_op>:<symbol>.
(parse_operands): Check for unused reloc.
(md_apply_fix): New case for reloc.
(aarch64_force_relocation): Likewise.
gas/testsuite
* gas/aarch64/reloc-insn.d
(BFD_RELOC_AARCH64_GOT_LD_PREL19): Add expected asm for new reloc test.
* gas/aarch64/reloc-insn.s
(BFD_RELOC_AARCH64_GOT_LD_PREL19): Add test for reloc.
include/
* elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc.
ld/testsuite
* ld-aarch64/aarch64-elf.exp: New reloc tests.
* ld-aarch64/emit-relocs-309-low-bad.d: New file. Expected asm for test
failure (lower bound overflow).
* ld-aarch64/emit-relocs-309-low.d: New file. Expected asm for test
success (lower bound).
* ld-aarch64/emit-relocs-309-up-bad.d: New file. Expected asm for test
failure (upper bound overflow).
* ld-aarch64/emit-relocs-309-up.d: New file. Expected asm for test
success (upper bound).
* ld-aarch64/emit-relocs-309.s: New file. Asm for new reloc tests.
* config/tc-s390.c (set_highgprs_p): New variable.
(s390_machinemode): New function.
(md_pseudo_table): Add new pseudo command machinemode.
(md_parse_option): Set set_highgprs_p to TRUE if -mzarch was
specified on command line.
(s390_elf_final_processing): Set the highgprs flag in the ELF
header depending on set_highgprs_p.
* doc/c-s390.texi: Document new pseudo machinemode.
bfd/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* cpu-ia64-opc.c (ins_cnt6a): New function.
(ext_cnt6a): Ditto.
(ins_strd5b): Ditto.
(ext_strd5b): Ditto.
(elf64_ia64_operands): Add new operand types.
gas/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* config/tc-ia64.c (reg_symbol): Add a new register.
(indirect_reg): Ditto.
(pseudo_func): Add new symbolic constants.
(operand_match): Add new operand types recognition.
(operand_insn): Add new register recognition.
(md_begin): Add new register definition.
(specify_resource): Add new register recognition.
gas/testsuite/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* gas/testsuite/gas/ia64/psn.d: New file.
* gas/testsuite/gas/ia64/psn.s: New file.
* gas/testsuite/gas/ia64/ia64.exp: Add new testcase.
* gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests.
* gas/testsuite/gas/ia64/opc-m.d: Ditto.
include/opcode/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64.h (ia64_opnd): Add new operand types.
opcodes/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
* ia64-gen.c: Promote completer index type to longlong.
(irf_operand): Add new register recognition.
(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
(lookup_specifier): Add new resource recognition.
(insert_bit_table_ent): Relax abort condition according to the
changed completer index type.
(print_dis_table): Fix printf format for completer index.
* ia64-ic.tbl: Add a new instruction class.
* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
* ia64-opc.h: Define short names for new operand types.
* ia64-raw.tbl: Add new RAW resource for DAHR register.
* ia64-waw.tbl: Add new WAW resource for DAHR register.
* ia64-asmtab.c: Regenerate.
