Commit graph

90 commits

Author SHA1 Message Date
Joel Brobecker
5f3ef9d035 Define PACKAGE macro in all sims' config.h.
Some of the common includes in include/gdb such as callback.h
include bfd.h.  But there was a recent change in bfd-in.h to
require that config.h be included before bfd.h can be included:

    /* PR 14072: Ensure that config.h is included first.  */
    #if !defined PACKAGE && !defined PACKAGE_VERSION
    #error config.h must be included before this header
    #endif

PACKAGE_VERSION is always defined by default by the AC_INIT autoconf
macro, but PACKAGE isn't.  This patch updates the SIM_AC_COMMON macro
to define it, and then regenerates all configure scripts and config.in
files.

sim/common/changeLog:

        * acinclude.m4 (SIM_AC_COMMON): Define PACKAGE.
        * config.in, configure: Regenerate.

sim/ChangeLog:

        * configure: Regenerate.

sim/arm/ChangeLog:

        * config.in, configure: Regenerate.

sim/avr/ChangeLog:

	* config.in, configure: Regenerate.

sim/bfin/ChangeLog:

	* config.in, configure: Regenerate.

sim/cr16/ChangeLog:

	* config.in, configure: Regenerate.

sim/cris/ChangeLog:

	* config.in, configure: Regenerate.

sim/d10v/ChangeLog:

	* config.in, configure: Regenerate.

sim/erc32/ChangeLog:

	* config.in, configure: Regenerate.

sim/frv/ChangeLog:

	* config.in, configure: Regenerate.

sim/h8300/ChangeLog:

	* config.in, configure: Regenerate.

sim/iq2000/ChangeLog:

	* config.in, configure: Regenerate.

sim/lm32/ChangeLog:

	* config.in, configure: Regenerate.

sim/m32c/ChangeLog:

	* config.in, configure: Regenerate.

sim/m32r/ChangeLog:

	* config.in, configure: Regenerate.

sim/m68hc11/ChangeLog:

	* config.in, configure: Regenerate.

sim/mcore/ChangeLog:

	* config.in, configure: Regenerate.

sim/microblaze/ChangeLog:

	* config.in, configure: Regenerate.

sim/mips/ChangeLog:

	* config.in, configure: Regenerate.

sim/mn10300/ChangeLog:

	* config.in, configure: Regenerate.

sim/moxie/ChangeLog:

	* config.in, configure: Regenerate.

sim/ppc/ChangeLog:

	* configure: Regenerate.

sim/rl78/ChangeLog:

	* config.in, configure: Regenerate.

sim/rx/ChangeLog:

	* config.in, configure: Regenerate.

sim/sh/ChangeLog:

	* config.in, configure: Regenerate.

sim/sh64/ChangeLog:

	* config.in, configure: Regenerate.

sim/v850/ChangeLog:

	* config.in, configure: Regenerate.

sim/testsuite/ChangeLog:

	* configure: Regenerate.
2012-06-15 17:20:10 +00:00
Mike Frysinger
050396e533 sim: bfin: new PINT model
Newer BF54x parts feature an updated GPIO block where all the interrupt
handling is split off, so create a new model for the pin interrupts.

This is missing the port forwarding aspects, but at least the register
interface should be there.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 06:13:06 +00:00
Mike Frysinger
07c5891d6c sim: bfin: new GPIO model
Newer BF54x parts feature an updated GPIO block, so create a new
model for it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 06:11:41 +00:00
Mike Frysinger
c0c463826f sim: bfin: fix ASTAT issues in immediate shifts
More ASTAT directed fixes, but this time at the dsp32shift insns.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 05:56:32 +00:00
Mike Frysinger
ef0b041e05 sim: bfin: fix ASTAT/correctness issues with arithmetic shifts
This improves some of the arithmetic shifts to better match the
hardware (especially wrt ASTAT behavior).  We hit areas where
the published documentation is thin so we have to rely on tests
run on the hardware to figure out how things should behave.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 05:52:38 +00:00
Mike Frysinger
ab04c00066 sim: bfin: more parallel insn checks
Now that we keep track of the exact parallel insn slot we're in, we can
make sure that the current insn being decoded is valid for that slot.
This brings us much closer to the hardware in flagging invalid parallel
insn combinations.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 03:59:10 +00:00
Mike Frysinger
99265d6b00 sim: bfin: keep track of the exact position of parallel insns
Some insns need to know which slot they're in to determine whether they
are valid.  So add an enum for each slot, and check that rather than the
overall insn len.  This makes tracking things in the code much clearer.
However, this code is functionally the same, so a follow up patch will
leverage this more to properly flag invalid parallel insn combos.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 03:49:30 +00:00
Mike Frysinger
a8a0e37c8b sim: bfin: drop excess space in negation insn
The amod1 helper includes a leading space so it can expand into the empty
string when need be, which means the caller need not add spacing itself.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-08 20:48:20 +00:00
Mike Frysinger
1d18e9892e sim: bfin: throw VEC_ILGAL_I with 32bit insn in group1/group2 slots
Parallel insns can only do one 32bit, then two 16bits.  So if we see
a 2nd 32bit insn after the first 32bit in a parallel insn, abort.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01 04:31:46 +00:00
Mike Frysinger
2fa7a0570b sim: bfin: simplify field width processing and fix build warnings
This fix the build time warning:
warning: format not a string literal, argument types not checked [-Wformat-nonliteral]

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01 04:23:40 +00:00
Mike Frysinger
02bb38cc80 sim: bfin: fix unused bfrom handling for BF535
machs.c: In function 'bfin_model_cpu_init':
machs.c:1657:1: warning: 'bfrom' may be used uninitialized
	in this function [-Wuninitialized]

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01 04:21:03 +00:00
Mike Frysinger
e4967d72f9 sim: bfin: fix build warning/style with auxvt_size
Fix warning about mixing decls and code by moving auxvt_size decl
down to the scope where it is used.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01 02:39:12 +00:00
Mike Frysinger
8d72c97073 sim: bfin: fix typo in BF54x SIC init
The current code triggers a warning:
dv-bfin_sic.c: In function 'bfin_sic_finish':
dv-bfin_sic.c:930:41: warning: operation on 'sic-><U78e8>.bf54x.iwr1'
	may be undefined [-Wsequence-point]

This points out the IWR2 register was not being setup because of a typo.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-31 18:48:20 +00:00
Mike Frysinger
a4a66f7132 sim: bfin: include devices.h to fix build warnings
The place where these funcs get defined do not include the header that
declares their prototypes.  Add that to fix -Wmissing-prototypes:

devices.c:59:1: warning: no previous prototype for 'dv_bfin_mmr_invalid'
devices.c:66:1: warning: no previous prototype for 'dv_bfin_mmr_require'
devices.c:99:1: warning: no previous prototype for 'dv_bfin_mmr_check'
devices.c:159:14: warning: no previous prototype for 'dv_get_bus_num'

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-31 18:44:43 +00:00
Mike Frysinger
2232061b1c [PATCH] sim: make sure to include strsignal prototype
Before POSIX standardized strsignal(), old systems would hide the
prototype unless the normal extension defines were enabled.  So use
the AC_USE_SYSTEM_EXTENSIONS helper for that.

Then make sure we include string.h ourselves in nrun.c rather than
relying on implicit includes via other sim headers.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-24 05:38:43 +00:00
Mike Frysinger
e62bb22a4b sim: bfin: fix corner case Logical shift issues
From: Robin Getz <robin.getz@analog.com>

Overflow with shift operations happens independently of saturation, but
we have the logic merged.  Extend the lshift function so that callers
can tell it when to handle each independently, and then do so when it's
needed.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 05:06:23 +00:00
Mike Frysinger
8dbfaed8e2 sim: bfin: ebiu_amc: push down hardcoded base addresses
To make it easier to support ebiu banks at other addresses, move the base to
a runtime parameter rather than structure.  Future work will make this more
dynamic, but I'm waiting for more details first.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 03:09:20 +00:00
Mike Frysinger
410bbc9498 sim: bfin: use ARRAY_SIZE
Rather than hardcode the constant, use ARRAY_SIZE to get it.  Should be no
functional changes here.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 01:16:25 +00:00
Mike Frysinger
84de2f06d8 sim: bfin: drop old linux/mii.h workarounds
We had some workarounds for old linux/mii.h headers, but it breaks with
newer ones.  So tweak the checks a bit to work with newer ones.  We'll
worry about older systems once someone complains.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-04 19:56:57 +00:00
Joel Brobecker
c5a5708100 Copyright year update in most files of the GDB Project.
gdb/ChangeLog:

        Copyright year update in most files of the GDB Project.
2012-01-04 08:28:28 +00:00
Mike Frysinger
cc5add8c1c sim: bfin: lookup target strings when tracing system calls
Parsing target addresses is hard if not generally useless, so use the new
cb_get_string function to lookup the associated strings as well.  Now the
trace output is quickly useful instead of just marginally so.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-12-03 19:05:15 +00:00
Mike Frysinger
db2e4d67e7 sim: generate build dependencies on the fly
Lift the code that GDB is using to generate dependencies on the fly and
port it over to the sim.  Now people shouldn't have to manually maintain
these in their Makefile's.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-12-03 18:23:51 +00:00
Mike Frysinger
4399a56be2 sim: dv-cfi: check for log2 support in libm when enabled
The dv-cfi model uses log2() internally, so make sure we automatically
link in libm when required.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-19 21:28:27 +00:00
Mike Frysinger
9c082ca86e sim: rename common/aclocal.m4 to common/acinclude.m4
Automake likes to dump macros automatically used into the aclocal.m4
file, but the common/aclocal.m4 naming prevents that.  So rename it
to the more normal "acinclude.m4" so the aclocal tool can work.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-18 00:31:00 +00:00
Mike Frysinger
6ffe910a7e sim: move from common.m4 to SIM_AC_COMMON
Now that the sourceware tree generally requires autoconf-2.64, update
the sim tree to require that too.

This allows us to drop the long standing SIM_AC_COMMON/common.m4
workaround as autoconf 2.64+ seems to work for me.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-18 00:17:24 +00:00
Mike Frysinger
39c1f96aef sim: bfin: use store buffer for VIT_MAX insns
The VIT_MAX insns can be used in parallel, so we need to use the store
buffer so we don't clobber the output register before we get a chance
to do a memory store with it.

Reported-by: Kai Iskratsch <kai@stella.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-09-29 03:19:47 +00:00
Mike Frysinger
2419798b80 sim: start a unified sim_do_command
Since sim_do_command for many people simply calls sim_args_command, start
a unified version of it.  For people who handle their own options, they
could switch to this by using sim_add_option_table instead.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-05 19:06:38 +00:00
Mike Frysinger
a931db6a07 sim: bfin: implement stat_map for virtual environments (libgloss)
The stat syscalls cannot work without a stat map, so declare one that
matches libgloss for virtual environments.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-01 21:53:03 +00:00
Mike Frysinger
ce2486ab20 sim: bfin: pass up result2/errcode with libgloss syscalls
Now that the Blackfin libgloss code extracts the 2nd result and the
error code from the R1/R2 registers, have the sim fill them up.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-22 04:21:29 +00:00
Mike Frysinger
1f20b1457b sim: bfin: set ASTAT AV/AVS when shifting accumulators overflow
The LSHIFT/ASHIFT insns that work with accumulators lacked AV/AVS
handling in the ASTAT register, so add it to match the hardware.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 22:03:10 +00:00
Mike Frysinger
b4876e0485 sim: bfin: do not touch ASTAT[V] when shifting accumulators
If we're shifting accumulators, we don't want to touch the V bit in
ASTAT, so add size checks to the ashiftrt/lshiftrt helpers.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 21:59:38 +00:00
Mike Frysinger
d5fcd950e4 sim: bfin: do not extend accumulator in LSHIFT insns
The logical shift insn does not sign extend before shifting, so
we shouldn't either.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 21:58:08 +00:00
Mike Frysinger
a56a195412 sim: bfin: tweak saturation handling with TFU/FU modes and MM bit
This too should have been squashed into an earlier change.  It covers
a few more cases in the V/VS saturation patch when working with TFU
and FU modes of dsp insns.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 21:22:50 +00:00
Mike Frysinger
90e13d65c1 sim: bfin: handle large shift values with accumulator shift insns
When the shift magnitude exceeds 32 bits, the values rotate around (since
the hardware is actually a barrel shifter).  So handle this edge case,
update the corresponding AV bit in ASTAT which was missing previously,
and tweak the AZ setting based on how the hardware behaves.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:59:54 +00:00
Mike Frysinger
99dcc4dc65 sim: bfin: handle odd shift values with shift insns
The shift magnitude is a 5-bit signed value.  When it is between 0 and
15, then we do the requested shift, but when it is outside of that, we
have to do the opposite.

That means we flip between lshift and ashiftrt to match the hardware.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:59:24 +00:00
Mike Frysinger
a0a71a7f8b sim: bfin: fix M_IH saturation size
This reverts the previous commit and does it right.  This change got
lost in the shuffle of patches I have pending.

Basically the logic is to change the 32bit saturation (and then masked
to 16bits) to a proper 16bit saturation.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:10:57 +00:00
Mike Frysinger
388aa9fe20 sim: bfin: handle V/VS saturation in dsp mac insns
Some saturation cases with dsp mac insns were not setting the V flag.
So implement that part and split up the logic between the dual macs.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:04:32 +00:00
Mike Frysinger
f2a56d0ad7 sim: bfin: handle the MM flag in M_IU/M_TFU modes with dsp insns
Our handling of the M_IU/M_TFU modes are missing signed saturation when
the MM flag is set, so add it to match the hardware behavior.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 19:44:14 +00:00
Mike Frysinger
ef26d60eba sim: bfin: fix sign extension in dsp insns with MM flag
After testing the hardware with all the different dsp flags, the MM flag
triggers sign extension in all modes.  So drop the limited use of it, and
the local custom helper that was also extending unsigned values.  We also
can see that the flag checks in the mult/mac insns have the same behavior
with sign extending, so add a helper func to keep the logic the same in
both places.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 19:42:55 +00:00
Mike Frysinger
075a845a92 sim: bfin: fix dsp insns IH saturation/rounding behavior
When using the IH modifier, we need to first saturate the value before
rounding it, and then further saturate it a bit more.  This makes the
sim match the hardware behavior with these insns.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 19:24:57 +00:00
Mike Frysinger
b02cc5b9df sim: bfin: fix inverted changelog entry 2011-06-18 18:09:35 +00:00
Mike Frysinger
73aae8efb2 sim: bfin: fix accumulator edge case saturation
When the accumulator saturates, it needs to be greater than, but not
equal to, the largest unsigned value as this is what the hardware does.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 17:27:01 +00:00
Mike Frysinger
886ea33b69 sim: bfin: use freeargv for freeing argvs
Since the argv array was allocated with dupargv, it needs to be freed
with freeargv to avoid leaks.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 17:20:38 +00:00
Mike Frysinger
eb3243445a sim: bfin: add support for glued SIC interrupt lines
The BF537 family glues a bunch of peripherals into single interrupt lines
that run into the SIC.  To model this same behavior in the sim, we need to
use the glue-or device, and in order to use that, we need to tweak things
a bit in the mach code to allow declaring of these new devices.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:18:04 +00:00
Mike Frysinger
082e1c4a87 sim: bfin: push SIC mappings to device tree
The machs.c file is the best place for holding cpu-specific details, so
restructure the way the SIC manages its ports to do just that.  Now the
SIC's have a standard set of input pins and the different line routing
from peripherals is kept in the device tree only.  This better models
the hardware where the SIC doesn't care about the exact peripheral that
is sending it stuff, just which input pin it gets it on.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:11:19 +00:00
Mike Frysinger
36f3e98103 sim: bfin: dma: fix indentation 2011-06-03 05:03:31 +00:00
Mike Frysinger
ea1f7d4c8e sim: bfin: switch to new syscall trace level
Now that the common code supports the syscall trace level, change the
Blackfin code from using the event level to the syscall level.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-26 00:14:43 +00:00
Mike Frysinger
f2db709f4f sim: bfin: move model data into machs.h
Pull the model data (register addresses/sizes) out of the different model
files and into the machs.h header.  The models themselves don't care about
where they're mapped, only the mach code does.  This allows us to keep the
model headers from being included in the mach code which can cause issues
with model-specific names colliding.  Such as when a newer device model is
created, but with incompatible register names/layouts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:54:19 +00:00
Mike Frysinger
c43aadcaa6 sim: bfin: add a performance monitor stub
No counters get updated, but there is enough here for software to
poke things and work.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:41:29 +00:00
Mike Frysinger
dfb61fb66f sim: bfin: add bf526-0.2/bf54x-0.4 rom regions
Add regions for the on-chip roms on some newer Blackfin parts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:35:05 +00:00