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Author SHA1 Message Date
Andrew Cagney
c10ae9ad33 Test/fix d10v RTE instruction. 1997-12-09 05:46:48 +00:00
Nick Clifton
0c4f6dc21a Removed disasm_symaddr() function and switched detection of Arm vs Thumb 
mode over to state of info->symbol, ala the MIPS port.
 1997-12-08 19:26:40 +00:00
Nick Clifton
c08a4e6be3 Add support for displaying disassembled Thumb instrucitons. 1997-12-02 18:20:31 +00:00
Nick Clifton
3c8e082494 Display nop pseudo ops alongside equivalent disassembly. 1997-12-02 17:56:03 +00:00
Ian Lance Taylor
1f3880e1f0 Mon Dec 1 12:25:57 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> 
* m68k-opc.c (btst): Change Dd@s to Dd;b.

	* m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q',
	and 'v' as operand types.
 1997-12-01 17:34:36 +00:00
Ian Lance Taylor
4df3dd02c1 * m68k-opc.c: Add argument for lpstop. From Olivier Carmona 
<olivier.carmona@di.epfl.ch>.
	* m68k-dis.c (print_insn_m68k): Handle special case of lpstop,
	which has a two word opcode with a one word argument.
 1997-12-01 17:05:40 +00:00
Richard Henderson
04b26b0008 * sh-dis.c (print_insn_shx): Recognize all sh4 additions. 
* sh-opc.h (fmov): Add @<REG_M>+,<DX_REG_N> variant for sh4.
        (ftrv): Slay the cut-and-paste monster.

        * tc-sh.c (parse_reg): Properly quote for fv4.

pr14044
 1997-11-20 22:01:30 +00:00
Joern Rennecke
74f79ec566 * d10v-dis.c (print_operand): 
Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
Addendum for PR 13985.
 1997-11-18 23:34:55 +00:00
Joern Rennecke
fe00b2ed0f * include/opcode/d10v.h (OPERAND_FLAG): Split into: 
(OPERAND_FFLAG, OPERAND_CFLAG) .
	* opcodes/d10v-opc.c (OPERAND_FLAG): Split into:
	(OPERAND_FFLAG, OPERAND_CFLAG) .
	(FSRC): Split into:
	(FFSRC, CFSRC).
	* gas/config/tc-d10v.c (parallel_ok, find_opcode):
	Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.
Fix for PR 13985.
 1997-11-18 19:41:44 +00:00
Gavin Romig-Koch
cfcbe03ff7 mips-opc.c (sync,cache): These are 3900 insns. 1997-11-12 15:18:56 +00:00
Joern Rennecke
3c7ad09f36 sh-opc.h (sh_table): Remove ftst/nan. 
Fixes gcc/13330.
 1997-11-12 00:02:37 +00:00
Ken Raeburn
cfca14e759 make vr5400 disassembly work; fix bugs in some vr5400 insns 1997-11-03 18:28:35 +00:00
Gavin Romig-Koch
0cca41d47a * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp): 
Add tx49 insns and configury.
 1997-10-29 20:33:43 +00:00
Ken Raeburn
a0539c6102 * mips-opc.c (ffc, ffs): Fix mask. 1997-10-28 23:03:12 +00:00
Michael Meissner
8357d96073 Add eit_vb, int_s, and int_m control registers 1997-10-28 21:36:04 +00:00
Ken Raeburn
a3066d9ac8 Duh. Check in the vr5400 stuff from the directory that doesn't have 
it sanitized out this time...
 1997-10-28 03:44:27 +00:00
Ken Raeburn
581c03af3e added vr5400 stuff, fixed "not" mask 1997-10-28 03:42:29 +00:00
Nick Clifton
04789fe9ab Removed C++ ism 1997-10-23 21:53:56 +00:00
Richard Henderson
81dac216f9 * sparc-opc.c: Add wr & rd for v9a asr's. 
* sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's.
        (v9a_asr_reg_names): New variable.
        Patch from David Miller <davem@vger.rutgers.edu>.
 1997-10-23 00:32:49 +00:00
Richard Henderson
36e75fe3ec * sparc-opc.c (v9notv9a): New insn type. 
(IMPDEP): Move to the end to not conflict with edge8 et al.
        Patch from David Miller <davem@vger.rutgers.edu>.
 1997-10-23 00:17:25 +00:00
Gavin Romig-Koch
d7727fe96b opcodes/mips-opc.c (bnezl,beqzl): Mark these as also tx39. 1997-10-17 17:26:45 +00:00
Gavin Romig-Koch
b7dd310d55 opcodes/mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1. 1997-10-16 16:03:22 +00:00
Nick Clifton
3516c09c60 New dummy function for symbol_at_address_func field of disassemble_info 
structure.
Add code to use this field in v850 disassembly.
 1997-10-14 23:09:59 +00:00
Nick Clifton
5ff4668dea Fixed bug extracting displacement from a JR instruction. 1997-10-10 23:41:43 +00:00
Gavin Romig-Koch
80ae705d30 opcodes/mips-opc.c: Three op mult is not an ISA insn. 1997-10-08 03:46:38 +00:00
Gavin Romig-Koch
b0326e92a5 opcodes/mips-opc.c: Fix formatting. 1997-10-08 03:42:27 +00:00
Nick Clifton
43d759900d Use symbolic names rather than numbers for higher value system registers. 1997-10-02 20:34:06 +00:00
Nick Clifton
404d6e4fd1 Fixed disassembler to use processor type when decoding instructions. 1997-10-02 00:01:10 +00:00
Ian Lance Taylor
2e2ef09d24 * configure.in: Use a diversion to set enable_shared before the 
arguments are parsed.
	* configure: Rebuild.
 1997-10-01 18:11:48 +00:00
Ian Lance Taylor
f849a33ee3 * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire. 1997-09-24 23:03:55 +00:00
Ian Lance Taylor
8ebe0ec1bb * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32. 1997-09-24 17:41:04 +00:00
Ian Lance Taylor
d97a8f952c * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr 
for mcf5200.
 1997-09-24 17:09:48 +00:00
Ian Lance Taylor
805c3d70bd * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL. 
* aclocal.m4: Rebuild with new libtool.
	* configure: Rebuild.
 1997-09-24 15:30:03 +00:00
Andrew Cagney
1379884be1 Correct ordering of args for cmov insn. 1997-09-19 02:16:41 +00:00
David Edelsohn
6d70d47fb7 * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr. 1997-09-18 18:23:30 +00:00
Felix Lee
3e906c081a sanitization fixes. typoes, missing fences, "start" instead of "end", etc. 1997-09-18 06:03:52 +00:00
Nick Clifton
714229c39a Further rearrangements of the opcodes. 1997-09-16 22:15:48 +00:00
Ken Raeburn
e9fa596ff2 * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change. (PR 13051) 1997-09-16 21:31:03 +00:00
Nick Clifton
1a1ec983c0 Entries in v850_opcodes reordered to put same named entries adjacent to each other. 1997-09-16 16:47:05 +00:00
Gavin Romig-Koch
d9a52316c1 * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret. 
* mips16-opc.c: Added mips16 sdbbp.
 1997-09-16 14:07:50 +00:00
Nick Clifton
9bbbb61220 Add initialisation of the processors field of the v850_opcode structure. 1997-09-16 01:29:02 +00:00
Ken Raeburn
d51bcb7064 merge from d30v-970225-branch 1997-09-15 18:26:17 +00:00
Peter Schauer
f8c35bc3b0 * ChangeLog: Fix misspelled `end-sanitize-r5900' for Jun 26 
ChangeLog entry.
 1997-09-13 15:02:36 +00:00
Peter Schauer
b72b716cc8 * ChangeLog: Fix duplicate `start-sanitize-r5900' around 
Jul 28 ChangeLog entry.
 1997-09-13 14:46:36 +00:00
Nick Clifton
d0fd63cb8f Improved display of register lists. 1997-09-12 18:41:26 +00:00
David Edelsohn
44457cbcc2 * sparc-opc.c (sparc_opcodes): Fix assembler args to 
fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s,
	fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s,
	fandnot1s, fandnot2s.
 1997-09-12 00:41:47 +00:00
David Edelsohn
22a25680ba * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq. 1997-09-09 17:08:01 +00:00
David Edelsohn
3fb84577f9 * cgen-asm.c (cgen_parse_address): New argument resultp. 
All callers updated.
	* m32r-asm.c (parse_h_hi16): Right shift numbers by 16.
 1997-09-08 21:07:42 +00:00
Nick Clifton
010916c2e6 Removed v850 sanitization. 1997-09-03 22:19:11 +00:00
Jeff Law
9d53ae4faf * mn10200.h (INITIALIZE_TRAMPOLINE): PC relative instructions are 
relative to the next instruction, not the current instruction.
pr13171.
 1997-09-03 00:39:49 +00:00
Nick Clifton
1f302a3bd9 Removed use of V850_OPERNAD_ADJUST_SHORT_MEMORY. 
Fixed several operand patterns.
 1997-09-02 22:40:39 +00:00
Joern Rennecke
bf5ac1b8ed SH4 assembler extensions. 1997-08-29 19:03:06 +00:00
Nick Clifton
33e2f5278c Made immediate parameter of MOVHI be unsigned 1997-08-26 16:40:28 +00:00
Chris Provenzano
a3515171ce Rebuilt configure with latest devo autoconf for NT support. 1997-08-25 22:58:36 +00:00
Nick Clifton
d87a154282 Updated from specs in HDD-tool-0611 document. 1997-08-22 17:35:24 +00:00
Nick Clifton
0c51939934 Moved divh opcodes next to each other. 1997-08-21 18:09:20 +00:00
Nick Clifton
ab11a82c2d Add support for v850e and v850eq targets. 1997-08-18 18:12:54 +00:00
David Edelsohn
2b0c643b8d Remove ARC sanitization. 1997-08-15 12:20:57 +00:00
Nick Clifton
3ff7258ec3 Tidied up sanitization 1997-08-14 19:42:22 +00:00
Nick Clifton
f61b671ddd Add support for v850E and v850EQ instructions. 1997-08-14 01:55:51 +00:00
Ian Lance Taylor
2f403ada9f * configure.in: Set enable_shared before AM_PROG_LIBTOOL. 
* acinclude.m4: Just include acinclude.m4 from BFD.
	* aclocal.m4, configure: Rebuild.
 1997-08-01 17:03:25 +00:00
Ian Lance Taylor
1daed53f64 * Makefile.am: New file, based on old Makefile.in. 
* acconfig.h: New file.
	* acinclude.m4: New file.
	* stamp-h.in: New file.
	* configure.in: Call AM_INIT_AUTOMAKE and AM_PROG_LIBTOOL.
	Removed shared library handling; now handled by libtool.  Replace
	AC_CONFIG_HEADER with AM_CONFIG_HEADER.  Call AM_MAINTAINER_MODE,
	AM_CYGWIN32, and AM_EXEEXT.  Replace AC_PROG_INSTALL with
	AM_PROG_INSTALL.  Change all .o files to .lo.  Remove stamp-h
	handling in AC_OUTPUT.
	* dep-in.sed: Change .o to .lo.
	* Makefile.in: Now built with automake.
	* aclocal.m4: Now built with aclocal.
	* config.in, configure: Rebuild.
 1997-08-01 01:49:13 +00:00
Jeff Law
fea90b62c1 * mips-opc.c: Fix typo/thinko in "eret" instruction. 1997-07-29 03:48:51 +00:00
Andrew Cagney
6546a590b4 Fix MTSA opcode encoding. 1997-07-28 13:45:45 +00:00
David Edelsohn
8deb997b30 * sparc-opc.c (sparc_opcodes): Make array const. 
* sparc-dis.c (sorted_opcodes): New static local.
	(struct opcode_hash): `opcode' is pointer to const element.
	(build_hash): First arg is now table of sorted pointers.
	(print_insn_sparc): Sort opcodes by sorting table of pointers.
	(compare_opcodes): Update.
 1997-07-24 22:21:05 +00:00
David Edelsohn
3f9382002f * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns. 1997-07-24 20:05:46 +00:00
David Edelsohn
0d7c678ec1 * cgen-opc.c: #include <ctype.h>. 
(hash_keyword_name): New arg `case_sensitive_p'.  Callers updated.
	Handle case insensitive hashing.
	(hash_keyword_value): Change type of `value' to unsigned int.
 1997-07-15 20:02:47 +00:00
Jeff Law
4bb0ae107d * mips-opc.c (mips_builtin_opcodes): If an insn uses single 
precision FP, mark it as such.  Likewise for double precision
        FP.  Mark ISA1 insns.  Consolidate duplicate opcodes where
        possible.
        (mips_builtin_opcodes): Remove non-existant r5900 instructions
toshiba_5900 stuff
 1997-07-11 16:13:42 +00:00
Jeff Law
d0efa46b2d * mips-opc.c (mips_builtin_opcodes): Add "pinteh", "pexeh" and 
"pexew" as synonyms for "pintoh", "pexoh", "pexow".

pr12399.
 1997-06-30 15:06:50 +00:00
Felix Lee
9fd0d551fc * ppc-opc.c (extract_nsi): make unsigned expression signed before 
negating it.
	(UNUSED): remove one level of parens, so MSVC doesn't choke on
 	nesting depth when all the macros are expanded.
 1997-06-25 22:35:14 +00:00
Ian Lance Taylor
3d116ccd46 * sparc-opc.c: The fcmp v9a instructions take an integer register 
as a destination, not a floating point register.  From Christian
	Kuehnke <Christian.Kuehnke@arbi.Informatik.Uni-Oldenburg.DE>.
 1997-06-17 21:03:18 +00:00
Ian Lance Taylor
2896b00885 * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@() 
syntax.  From Roman Hodek
	<rnhodek@faui22c.informatik.uni-erlangen.de>.
 1997-06-16 18:31:32 +00:00
Ian Lance Taylor
0a185c4899 * i386-dis.c (twobyte_has_modrm): Fix pand. 1997-06-16 18:14:13 +00:00
Ian Lance Taylor
eedca9daa9 Mon Jun 16 14:08:38 1997 Michael Taylor <mbt@mit.edu> 
* i386-dis.c (dis386_twobyte): Fix pand and pandn.
 1997-06-16 18:09:28 +00:00
Ian Lance Taylor
a5f269e919 Tue Jun 10 11:26:47 1997 H.J. Lu <hjl@gnu.ai.mit.edu> 
* arm-dis.c: Add prototypes for arm_decode_shift and
	print_insn_arm.
 1997-06-10 15:27:52 +00:00
Ian Lance Taylor
f0b796d00a Tue May 27 11:02:08 1997 Alan Modra <alan@spri.levels.unisa.edu.au> 
* i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl
	to pushS/popS for segment regs and byte constant so that
	pushw/popw printed when in 16 bit data mode.

	* i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to
	print cbtw, cwtd in 16 bit data mode.
	* i386-dis.c (putop): extra case W to support above.

	* i386-dis.c (print_insn_x86): print addr32 prefix when given
	address size prefix in 16 bit address mode.
 1997-05-27 15:05:40 +00:00
Ian Lance Taylor
54a93a7266 * sh-dis.c: Reindent. Rename local variable fprintf to 
fprintf_fn.
 1997-05-23 20:52:06 +00:00
David Edelsohn
0b852861f3 * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2. 1997-05-22 21:06:57 +00:00
Gavin Romig-Koch
e17449bcfd Move mips INSN_ISA subfield into new membership field. 1997-05-20 15:29:25 +00:00
Ian Lance Taylor
d72ace420d * i386-dis.c: (dis386_twobyte): Add MMX instructions. 
(twobyte_has_modrm): Likewise.
	(grps): Likewise.
	(OP_MMX, OP_EM, OP_MS): New static functions.
 1997-05-05 21:19:09 +00:00
Ian Lance Taylor
41b96d55e8 * i386-dis.c: Revert patch of April 4. The output now matches 
what gcc generates.
 1997-05-05 18:30:06 +00:00
David Edelsohn
cb6301058d * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead 
of $simm16.
 1997-05-02 19:49:19 +00:00
David Edelsohn
9c1858b400 * cgen-*.c, m32r-*.c: #include sysdep.h instead of config.h. 
Delete string{,s}.h support.
 1997-04-14 00:52:36 +00:00
David Edelsohn
a394e3262f * cgen-asm.c (cgen_parse_operand_fn): New global. 
(cgen_parse_{{,un}signed_integer,address}): Update call to
	cgen_parse_operand_fn.
	(cgen_init_parse_operand): New function.
	* m32r-asm.c (parse_insn_normal): cgen_init_parse_operand renamed
	from cgen_asm_init_parse.
	(m32r_cgen_assemble_insn): New operand `errmsg'.
	Delete call to as_bad, return error message to caller.
	(m32r_cgen_asm_hash_keywords): #if 0 out.
 1997-04-10 23:39:51 +00:00
David Edelsohn
5b3b8cb071 * cgen-asm.c (cgen_asm_parse_operand_fn): New global. 
(cgen_parse_{{,un}signed_integer,address}): Update call to
	cgen_asm_parse_operand_fn.
	* m32r-asm.c (parse_insn_normal): Delete call to cgen_asm_init_parse.
	(m32r_cgen_assemble_insn): New operand `errmsg'.
	Delete call to as_bad, return error message to caller.
	(m32r_cgen_asm_hash_keywords): #if 0 out.
 1997-04-10 21:58:28 +00:00
Ian Lance Taylor
47332446f5 Wed Apr 9 12:05:25 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> 
* m68k-dis.c (print_insn_arg) [case 'd']: Print as address register,
	not data register.
	[case 'J']: Fix typo in register name.
 1997-04-09 16:10:45 +00:00
Ian Lance Taylor
b4aa23f244 * configure.in: Substitute SHLIB_LIBS. 
* configure: Rebuild.
	* Makefile.in (SHLIB_LIBS): New variable.
	($(SHLIB)): Use $(SHLIB_LIBS).
 1997-04-07 21:01:00 +00:00
David Edelsohn
21b4ac1768 * cgen-dis.c (build_dis_hash_table): Fix xmalloc size computation. 1997-04-07 19:45:47 +00:00
David Edelsohn
70bb1aa163 * cgen-opc.c (hash_keyword_name): Improve algorithm. 1997-04-07 19:27:12 +00:00
David Edelsohn
e4ba4112e3 * disassemble.c (disassembler): Handle m32r. 1997-04-07 18:46:21 +00:00
Ian Lance Taylor
e358a062c9 * configure.in: Correct file names for bfd_mn10[23]00_arch. 
* configure: Rebuild.
 1997-04-05 00:57:46 +00:00
David Edelsohn
9c03036a8f * m32r-asm.c, m32r-dis.c, m32r-opc.c, m32r-opc.h: New files. 
* cgen-asm.c, cgen-dis.c, cgen-opc.c: New files.
	* Makefile.in (CFILES): Add them.
	(ALL_MACHINES): Add them.
	(dependencies): Regenerate.
	* configure.in (cgen_files): New variable.
	(bfd_m32r_arch): Add entry.
	* configure: Regenerate.
 1997-04-04 21:07:02 +00:00
Ian Lance Taylor
bb6dafe912 * Makefile.in: Rebuild dependencies. 1997-04-04 19:36:26 +00:00
Ian Lance Taylor
71cc7ceb3c * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h". 1997-04-04 19:25:29 +00:00
Ian Lance Taylor
fdb6ae6818 * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and 
fdivp.
 1997-04-04 19:05:12 +00:00
Ian Lance Taylor
bef474032d * Branched binutils 2.8. 1997-04-03 18:23:17 +00:00
Ian Lance Taylor
d02305b214 * mips16-opc.c: Add mul and dmul macros. 
PR 11982.
 1997-04-02 17:25:03 +00:00
Ian Lance Taylor
77090cfa9d Tue Apr 1 16:27:45 1997 Klaus Kaempf <kkaempf@progis.de> 
* makefile.vms: Update CFLAGS, add clean target.
 1997-04-01 21:28:15 +00:00
Ian Lance Taylor
af65db5730 * configure.in: Add stdlib.h to AC_CHECK_HEADERS list. 
* configure, config.in: Rebuild.
	* sysdep.h: Include <stdlib.h> if it exists.
	* sparc-dis.c: Include <stdio.h> and "sysdep.h".  Don't include
	<string.h>.
	* Makefile.in: Rebuild dependencies.
 1997-03-28 17:11:55 +00:00
Ian Lance Taylor
88a257cbfb * ppc-opc.c: Add PPC 403 instructions and extended opcodes. From 
Andrew Bray <andy@madhouse.demon.co.uk>.
 1997-03-28 17:07:47 +00:00
Ian Lance Taylor
a21e1e96be * mips-opc.c: Add cast when setting mips_opcodes. 1997-03-27 19:25:01 +00:00
Ian Lance Taylor
b8306c6b3d * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s. 
The documented instructions are bf/s and bt/s.
 1997-03-24 19:59:06 +00:00
Ian Lance Taylor
9ab49ef840 * mips-opc.c: Add dctr and dctw. 1997-03-24 18:32:03 +00:00
Martin Hunt
b7f7f20702 Sun Mar 23 18:08:10 1997 Martin M. Hunt <hunt@pizza.cygnus.com> 
* d30v-dis.c (print_insn): Change the way signed constants
	are displayed.
 1997-03-24 02:24:51 +00:00
Ian Lance Taylor
f76db60bbb * Makefile.in (BFD_H): New variable. 
(HFILES): New variable.
	(CFILES): Add all C files.
	(.dep, .dep1, dep.sed, dep, dep-in): New targets.
	Delete old dependencies, and build new ones.
	* dep-in.sed: New file.
 1997-03-21 19:39:26 +00:00
Ian Lance Taylor
9b07de4901 Thu Mar 20 19:03:30 1997 Philippe De Muyter <phdm@info.ucl.ac.be> 
* m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}.
 1997-03-21 00:04:16 +00:00
Jeff Law
4e4dd8765f * mn10200-opc.c: Change "trap" to "syscall". 
* mn10300-opc.c: Add new "syscall" instruction.
Cleanups for beta release.
 1997-03-18 21:20:29 +00:00
J.T. Conklin
437579d508 * m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and 
mulul insns on the coldfire.
 1997-03-17 16:50:51 +00:00
Ian Lance Taylor
6784be526f * arm-dis.c (print_insn_arm): Don't print instruction bytes. 
(print_insn_big_arm): Set bytes_per_chunk and display_endian.
	(print_insn_little_arm): Likewise.
 1997-03-15 22:15:00 +00:00
Ian Lance Taylor
b6fab42bc2 Based on patches from H.J. Lu <hjl@lucon.org>: 
* i386-dis.c (fetch_data): Add prototype.
	* m68k-dis.c (fetch_data): Add prototype.
	(dummy_print_address): Add prototype.  Make static.
	* ppc-opc.c (valid_bo): Add prototype.
	* sparc-dis.c (build_hash_table): Add prototype.
	(is_delayed_branch, compute_arch_mask): Add prototypes.
	(print_insn_sparc): Make several local variables const.
	(compare_opcodes): Change arguments to const PTR.  Add prototype.
	* sparc-opc.c (arg): Change name field to be const.
	(lookup_name, lookup_value): Add prototypes.  Change table and
	name parameters to be const.
	(sparc_encode_asi): Change name parameter to be const.
	(sparc_encode_membar, sparc_encode_prefetch): Likewise.
	(sparc_encode_sparclet_cpreg): Likewise.
	(sparc_decode_asi): Change return type to be const.
	(sparc_decode_membar, sparc_decode_prefetch): Likewise.
	(sparc_decode_sparclet_cpreg): Likewise.
 1997-03-14 20:21:19 +00:00
Jeff Law
c654d69e03 * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these 
as relaxable.
For the relaxing assembler.
 1997-03-06 23:52:48 +00:00
J.T. Conklin
c5e5b13f9b * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on 
the mc68000.
 1997-03-03 15:49:49 +00:00
Ian Lance Taylor
0270516b96 Thu Feb 27 14:04:32 1997 Philippe De Muyter <phdm@info.ucl.ac.be> 
* m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
 1997-02-27 19:06:15 +00:00
Michael Meissner
dcbf6f077f Deal with 64 bit instruction sizes on the tic80 1997-02-27 16:37:37 +00:00
Michael Meissner
6757ae582b Define r25 1997-02-26 21:59:58 +00:00
Ian Lance Taylor
2ef564d268 Wed Feb 26 13:38:30 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> 
* m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use
	floatformat_to_double to make portable.
	(print_insn_arg): Use NEXTEXTEND macro when extracting extended
	precision float.
 1997-02-26 18:53:18 +00:00
Fred Fish
17990badfc * tic80-opc.c (LSI_SCALED): Renamed from this ... 
(OFF_SL_BR_SCALED): ... to this, and added the flag
	TIC80_OPERAND_BASEREL to the flags word.
	(tic80_opcodes): Replace all occurances of LSI_SCALED with
	OFF_SL_BR_SCALED.
 1997-02-24 21:46:54 +00:00
Dawn Perchik
a2768484d9 * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3. 
Change mips_opcodes from const array to a pointer,
	and change bfd_mips_num_opcodes from const int to int,
	so that we can increase the size of the mips opcodes table
	dynamically.
 1997-02-23 22:26:01 +00:00
Fred Fish
c7583da0b6 * tic80-opc.c (tic80_predefined_symbols): Revert change to 
store BITNUM values in the table in one's complement form
	to match behavior when assembler is given a raw numeric
	value for a BITNUM operand.
	* tic80-dis.c (print_operand_bitnum): Ditto.
 1997-02-23 04:06:51 +00:00
Martin Hunt
4fe23bdd06 Fri Feb 21 16:31:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com> 
* d30v-opc.c: Removed references to FLAG_X.
 1997-02-22 00:32:23 +00:00
Michael Meissner
c6c7035cfb Since d10v is public now, remove all sanitization statements 1997-02-20 16:05:18 +00:00
Ian Lance Taylor
7adf26304e * Makefile.in: Add dependencies on ../bfd/bfd.h as required. 1997-02-19 19:52:17 +00:00
Martin Hunt
b2e3f8442a Tue Feb 18 17:43:43 1997 Martin M. Hunt <hunt@pizza.cygnus.com> 
* Makefile.in: Added d30v object files.
	* configure: (bfd_d30v_arch) Rebuilt.
	* configure.in: (bfd_d30v_arch) Added new case.
	* d30v-dis.c: New file.
	* d30v-opc.c: New file.
	* disassemble.c (disassembler) Add entry for d30v.
 1997-02-19 01:53:26 +00:00
Fred Fish
49d1bbbef2 * tic80-opc.c (tic80_predefined_symbols): Add symbolic 
representations for the floating point BITNUM values.
 1997-02-18 23:34:35 +00:00
Gavin Romig-Koch
1d339e4849 fixes bugs caused by adding 5900 1997-02-14 18:57:43 +00:00
Ian Lance Taylor
246c54580e Thu Feb 13 21:56:51 1997 Klaus Kaempf <kkaempf@progis.de> 
* makefile.vms: Remove 8 bit characters.  Update to latest
	gcc release.
 1997-02-14 02:57:52 +00:00
Ian Lance Taylor
03514bc871 Thu Feb 13 20:41:22 1997 Philippe De Muyter <phdm@info.ucl.ac.be> 
* m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction.
 1997-02-14 01:43:14 +00:00
Jeff Law
9bd0068fc8 * mn10200-opc.c (IMM16_PCREL): This is a signed operand. 
(IMM24_PCREL): Likewise.
Fixes bugs exposed by disassembler testsuite.
 1997-02-13 23:31:53 +00:00
Ian Lance Taylor
6617b927da * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base 
address for an extended PC relative instruction that is not a
	branch.
 1997-02-13 18:29:25 +00:00
Ian Lance Taylor
d1c52e5b5c Wed Feb 12 12:27:40 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> 
* m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and
	bytes_per_line.
 1997-02-12 17:28:14 +00:00
Fred Fish
e2773136e0 * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'. 
(tic80_opcodes): Sort entries so that long immediate forms
	come after short immediate forms, making it easier for
	assembler to select the right one for a given operand.
 1997-02-11 23:48:15 +00:00
Ian Lance Taylor
2ea116f49b * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and 
display_endian.
	(print_insn_mips16): Likewise.
 1997-02-11 20:46:14 +00:00
Gavin Romig-Koch
276c2d7dc8 Add r5900 1997-02-11 13:26:34 +00:00
Fred Fish
c37555c141 * tic80-opc.c (tic80_symbol_to_value): Changed to accept 
a symbol class that restricts translation to just that
	class (general register, condition code, etc).
 1997-02-10 17:16:28 +00:00
Fred Fish
cceb79baa8 * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E, 
and REG_DEST_E for register operands that have to be
	an even numbered register.  Add REG_FPA for operands that
	are one of the floating point accumulator registers.
	Add TIC80_OPERAND_MASK to flags for ENDMASK operand.
	(tic80_opcodes): Change entries that need even numbered
	register operands to use the new operand table entries.
	Add "or" entries that are identical to "or.tt" entries.
 1997-02-07 00:38:44 +00:00
Ian Lance Taylor
0d52464ce4 * mips16-opc.c: Add new cases of exit instruction for 
disassembler.
	* mips-dis.c (print_mips16_insn_arg): Display floating point
	registers in operands of exit instruction.  Print `$' before
	register names in operands of entry and exit instructions.
 1997-02-05 16:14:26 +00:00
Fred Fish
6cb5b585c5 * tic80-opc.c (tic80_predefined_symbols): Table of name/value 
pairs for all predefined symbols recognized by the assembler.
	Also used by the disassembling routines.
	(tic80_symbol_to_value): New function.
	(tic80_value_to_symbol): New function.
	* tic80-dis.c (print_operand_control_register,
 	print_operand_condition_code, print_operand_bitnum):
	Remove private tables and use tic80_value_to_symbol function.
 1997-01-30 21:16:46 +00:00
Martin Hunt
f28d34be74 Thu Jan 30 11:30:45 1997 Martin M. Hunt <hunt@pizza.cygnus.com> 
* d10v-dis.c (print_operand): Change address printing
	to correctly handle PC wrapping.  Fixes PR11490.
 1997-01-30 19:33:11 +00:00
Jeff Law
c9f649022e * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative 
branchs relaxable.
 1997-01-29 16:40:15 +00:00
Ian Lance Taylor
20d4301801 * mips-dis.c (print_insn_mips16): Set insn_info information. 
(print_mips16_insn_arg): Likewise.
 1997-01-28 21:49:18 +00:00
Ian Lance Taylor
c4f19df2ef * mips-dis.c (print_insn_mips16): Better handling of an extend 
opcode followed by an instruction which can not be extended.
 1997-01-28 20:58:28 +00:00
J.T. Conklin
071ad7f0e0 * m68k-opc.c (m68k_opcodes): Changed operand specifier for the 
coldfire moveb instruction to not allow an address register as
destination.  Although the documentation does not indicate that
this is invalid, experiments uncovered unexpected behavior.
Added a comment explaining the situation.  Thanks to Andreas
Schwab for pointing this out to me.
 1997-01-24 20:14:26 +00:00
Fred Fish
1eb54bb463 * tic80-opc.c (tic80_opcodes): Expand comment to note that the 
entries are presorted so that entries with the same mnemonic are
	adjacent to each other in the table.  Sort the entries for each
	instruction so that this is true.
 1997-01-23 03:17:45 +00:00
Ian Lance Taylor
84be8dcf9e Mon Jan 20 12:48:57 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> 
* m68k-dis.c: Include <libiberty.h>.
	(print_insn_m68k): Sort the opcode table on the most significant
	nibble of the opcode.
 1997-01-20 17:50:34 +00:00
Fred Fish
68c7761c42 * tic80-dis.c (tic80_opcodes): Add "wrcr", "vmpy", "vrnd", 
"vsub", "vst", "xnor", and "xor" instructions.
      (V_a1): Renamed from V_a, msb of accumulator reg number.
      (V_a0): Add macro, lsb of accumulator reg number.
 1997-01-19 22:24:21 +00:00
Fred Fish
8fdffbc4b3 * tic80-dis.c (print_insn_tic80): Broke excessively long 
function up into several smaller ones and arranged for
        the instruction printing function to be callable recursively
        to print vector instructions that have both a load and a
        math instruction packed into a single opcode.
        * tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
        to explain why it comes after the other vector opcodes.
 1997-01-19 18:33:10 +00:00
J.T. Conklin
c49bbc27db fix operand mask in the "moveml" entries for the coldfire. 1997-01-18 00:37:30 +00:00
J.T. Conklin
a3d4e445d2 From the coldfire branch: 
* m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
	move insns to handle immediate operands.

From Andreas Schwab:

        * m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
 1997-01-18 00:27:23 +00:00
Fred Fish
c977d8fb7b * tic80-opc.c (V_a, V_m, V_S, V_Z, V_p, OP_V, MASK_V): 
New macros for building vector instruction opcodes.
	(tic80_opcodes): Remove all uses of FMT_SI, FMT_REG, and
	FMT_LI, which were unused.  The field is now a flags field.
	Remove some opcodes that are possible, but illegal, such
	as long immediate instructions with doubles for immediate
	values.  Add "vadd" and "vld" instructions.
 1997-01-17 04:00:56 +00:00
Fred Fish
5fdeceb477 * tic80-opc.c (tic80_operands): Reorder some table entries to make 
the order more logical.  Move the shift alias instructions ("rotl",
	"shl", "ins", "rotr", "extu", "exts", "srl", and "sra" to be
 	interspersed with the regular sr.x and sl.x instructions.  Add
	and test new instruction opcodes for "sl", "sli", "sr", "sri", "st",
 	"sub", "subu", "swcr", and "trap".
 1997-01-16 02:10:17 +00:00