(mips_frob_file): Declare.
* config/tc-mips.c (struct mips_hi_fixup): Define.
(mips_hi_fixup_list): New static variable.
(imm_unmatched_hi): New static variable.
(md_assemble): Clear imm_reloc, imm_unmatched_hi, and
offset_reloc. Pass imm_unmatched_hi to append_insn.
(append_insn): Add unmatched_hi parameter. If it is set, add the
new fixup to mips_hi_fixup_list. Change all callers.
(mips_ip): Set imm_unmatched_hi when appropriate.
(mips_frob_file): New function.
(s_extern): Don't declare.
(reg_needs_delay): New static function.
(macro_build): Permit GOT/CALL_HI/LO relocs.
(macro_build_lui): If place is not NULL, use the number in the
expression.
(load_address): Handle mips_big_got case.
(macro): Handle mips_big_got for M_LA_AB, M_JAL_A, and load and
store macros.
(OPTION_XGOT): Define.
(md_longopts): Add "xgot" if OBJ_ELF.
(md_parse_option): Handle -xgot.
(md_show_usage): Mention -xgot.
(md_apply_fix): Permit GOT/CALL_HI/LO relocs.
(tc_gen_reloc): Handle GOT/CALL_HI/LO relocs.
* config/tc-mips.c (mips_4010): New static variable.
(interlocks): New static variable.
(md_begin): Check for a cpu of "r4010". Set mips_4010 correctly.
If mips_4650 or mips_4010, set interlocks.
(append_insn): Check interlocks, not mips_4650.
(mips_emit_delays): Likewise.
(mips_ip): Only permit INSN_4010 instructions if mips_4010.
(md_longopts): Add "m4010" and "no-m4010".
(md_parse_option): Accept -mcpu=r4010. Handle -m4010 and
-no-m4010.
(md_show_usage): Document -m4010 and -no-m4010.
(ecoff_directive_def): Set ecoff_debugging_seen.
(ecoff_stab): Likewise.
* ecoff.h: Make idempotent.
(ecoff_debugging_seen): Declare.
* config/tc-mips.c: Include ecoff.h.
(mips_debug): New static variable.
(s_stringer, s_mips_space): Remove unneeded declarations.
(md_parse_option): In case 'g', set mips_debug to debugging level.
(mips_local_label): New function.
* tc-mips.h (LOCAL_LABEL): Call mips_local_label.
(mips_local_label): Declare.
PR 6978.
* config/obj-multi.h (obj_frob_symbol, obj_frob_file, S_GET_SIZE, S_SET_SIZE,
S_GET_ALIGN, S_SET_ALIGN, obj_copy_symbol_attributes, OBJ_PROCESS_STAB): New
macros.
* config/tc-mips.c: Protect against redefining them also when including
obj-elf.h. Test only OBJ_ELF for including elf/mips.h.
* config/tc-mips.c (mips_target_format): Changed to a function, checking flavor
and byte order at run time.
(md_parse_option, cases OPTION_EB and OPTION_EL): Set target_big_endian here.
(md_begin): Not here.
* config/tc-mips.h (mips_target_format): Adjust declaration.
(TARGET_FORMAT): Call mips_target_format.
* config/tc-mips.h (USE_GLOBAL_POINTER_OPT): Define in terms of OUTPUT_FLAVOR.
* config/tc-mips.c (g_switch_value, g_switch_seen): Define unconditionally.
(md_begin, mips_ip, md_parse_option, s_change_sec, s_option, s_abicalls,
nopic_need_relax): Check USE_GLOBAL_POINTER_OPT at run time, instead of
compiling conditionally on GPOPT.
(GPOPT): Don't define.
(md_shortopts): Always include -G.
(RDATA_SECTION_NAME): Select at run time.
(md_begin): Test for ELF format at run time instead of compile time.
(mips_ip, s_change_sec): Ditto.
(md_parse_option, cases OPTION_CALL_SHARED and OPTION_NON_SHARED): Ditto.
(OPTION_CALL_SHARED, OPTION_NON_SHARED, mips_regmask_frag): Define
unconditionally.
(nopic_need_relax): New static function, split out from
md_estimate_size_before_relax.
(md_estimate_size_before_relax): Call it.
(load_address, macro): In NO_PIC branches, if nopic_need_relax returns nonzero,
don't attempt GP optimization.
* subsegs.c (subsegs_begin): Don't do it here.
* as.c (main): Call frag_init before subsegs_begin.
* frags.c (frag_append_1_char): New function.
* frags.h (frag_append_1_char): Declare it.
(FRAG_APPEND_1_CHAR): Call it. Old definition is commented out for now.
* as.h (struct frag): Added (but commented out) new fields for tracking current
alignment.
(frag_now_fix): Changed macro to function declaration.
* frags.c (frag_now_fix): Define function here.
(frag_new): Use it instead of accessing `frags' directly.
* frags.h (frags): Change comment to indicate it shouldn't be accessed directly.
* subsegs.h (struct frchain): New field frch_obstack, intended to eventually
replace global `frags' obstack.
* subsegs.c (subseg_set_rest): Use frag_now_fix instead of accessing `frags'
directly. Initialize fields of new frchainS explicitly instead of with memset.
* config/obj-coff.c (obj_coff_ln) [!BFD_ASSEMBLER]: Use frag_now_fix.
* config/tc-mips.c (s_loc), config/obj-vms.c (vms_resolve_symbol_redef),
symbols.c (colon): Likewise.
(md_begin): Don't mips_cpu if it was already set.
(md_parse_option): For -mipsN, don't set mips_cpu if it was
already set. For -mcpu=, just set mips_cpu, not mips_isa.
(s_elf_section): New static function.
* ecoff.c (ecoff_build_symbols): Don't abort if we don't recognize
the section when setting the storage class; default to sc_Data.
(s_mips_globl): New static function; needed for Irix 5 support.
* ecoff.c (ecoff_build_symbols): If BSF_FUNCTION is set for an
external symbol with no type, set the type to st_Proc rather than
st_Global. Don't set the index of an external st_Proc or
st_StaticProc symbol unless it is also a local symbol.
(insns_since_cache_access): New static variable.
(md_begin): Set mips_cpu as well as mips_isa.
(append_insn): If mips_cpu is 4600, require four nop instructions
between an instruction which accesses the cache and certain CACHE
instructions. Keep track of the number of instructions seen since
an instruction which accesses the cache.
(md_parse_option): Set mips_cpu as well as mips_isa.
PR 5433.
(macro): Correct M_LI_SS SVR4_PIC/EMBEDDED_PIC case. After M_LI_D
or M_L_DOB or label dob, force a new frag to avoid getting
confused in tc_gen_reloc.
(mips_ip): Use RDATA_SECTION_NAME, not .rdata.
(s_change_sec): Likewise.
with the preceding instruction even if .set nobopt has been seen.
.set nobopt actually controls whether to bring up an instruction
from the branch target, which gas does not currently support.
* config/tc-mips.c (macro_build): Permit BFD_RELOC_PCREL_LO16 for
certain cases of 'i', 'j' and 'o'. Change 'u' to take an
argument, the reloc type.
(load_register): Pass reloc type to macro_build for 'u'.
(macro): Likewise. For M_LA_AB permit a difference expression
when generating embedded PIC code between an arbitrary symbol and
a symbol in the .text section.
(mips_force_relocation): Force BFD_RELOC_PCREL_HI16_S and
BFD_RELOC_PCREL_LO16 to be emitted.
(md_apply_fix): Check that most relocs are not PC relative.
Handle BFD_RELOC_PCREL_HI16_S and BFD_RELOC_PCREL_LO16.
(tc_gen_reloc): Change #error to as_fatal. Handle
BFD_RELOC_PCREL_LO16 and BFD_RELOC_PCREL_HI16_S.
macro_build for nori case.
(SWITCH_TABLE): Define.
(mips_force_relocation): Force a relocation for a switch table
entry.
(md_apply_fix): Write switch table entry value into file.
(tc_gen_reloc): Use BFD_RELOC_GPREL32 for a switch table entry,
and set the addend to the difference between the reloc address and
the subtrahend.
embedded PIC code, accept the difference between two local symbols
as being constant.
(mips_force_relocation): Only force a reloc to be generated for a
PC relative fixup.
(md_apply_fix): For BFD_RELOC_32 and BFD_RELOC_LO16, put the fixup
value into the file if the fixup will not generate a reloc.
branch with an instruction that uses $at, in case the branch is
later expanded.
(macro): If EMBEDDED_PIC, case M_JAL_A may use $at.
(md_pcrel_from): If not OBJ_AOUT, return 4 for an undefined symbol
to make it pcrel_offset.
(tc_gen_reloc): If not OBJ_AOUT, set the reloc addend to
reloc->address; another gruesome hack to get gas reloc handling to
do the right thing.
(mips_pic): Change from int to enum mips_pic_level. Change all
uses (0 becomes NO_PIC, 2 becomes SVR4_PIC).
(load_address): Handle EMBEDDED_PIC.
(macro): Handle EMBEDDED_PIC in all PIC cases.
(md_parse_option): Accept -membedded-pic to use EMBEDDED_PIC. If
OBJ_ELF, accept -KPIC and -call_shared to use SVR4_PIC and accept
-non_shared to use NO_PIC (this is how the Irix 5 assembler
works). Do not permit -G with SVR4_PIC.
(s_abicalls): Warn if -G was used, and force -G 0.
(tc_gen_reloc): Set reloc->addend to 0 for a PC relative reloc for
anything but a.out, not just for ELF. For ECOFF, don't generate a
BFD_RELOC_16_PCREL_S2 reloc unless using EMBEDDED_PIC.
(md_parse_option): Set g_switch_seen for -G option.
(s_option): If creating PIC code, force the GP size to be 0. Warn
if -G switch used with a non-zero value.
* listing.c: Include subsegs.h.
(listing_prev_line): New function.
(calc_hex): Reset byte_in_frag to zero for each new frag.
* config/tc-mips.c (append_insn): Call listing_prev_line after
emitting nop instructions.
* Makefile.in (listing.o): Depends upon subsegs.h.
OBJ_ECOFF in many cases.
(mips_any_noreorder): New variable.
(mips_cprestore_offset): Initialize to -1.
(mips_frame_reg): New variable.
(RELAX_ENCODE, RELAX_OLD, RELAX_NEW, RELAX_RELOC1,
RELAX_RELOC2, RELAX_RELOC3, RELAX_WARN): New macros.
(md_pseudo_table): Handle "gpword" and "cpadd".
(md_begin): Initialize ok to false. If OBJ_ELF, set alignment
of text, data and bss sections to 4. Set alignment of
.reginfo section to 2. If ECOFF_DEBUGGING, create .mdebug
section.
(ALIGN_ERR, ALIGN_ERR2): Removed unused and useless alignment
check.
(append_insn, macro_build, macro_build_lui): Take place
argument. Changed all callers.
(append_insn): If appending a nop, don't emit one.
(macro_build): Changed assertion for 'i', 'j', 'o' case.
(gp_reference): Removed.
(load_address): New function.
(macro): If mips_noreorder is used, set mips_any_noreorder.
Extensive changes to handle GP and PIC symbols differently.
Build both possible code choices using a variant frag, and
make a final decision at the end of assembly when all
information is known. Added PIC support for all symbol
references.
(mips_ip): Don't permit anything but a number after $ for a
coprocessor register. Don't use .lit4 or .lit8 sections when
generating PIC code. If OBJ_ELF, set alignment of .lit4 or
.lit8 section to 4.
(md_apply_fix): Accept and ignore GOT16 and GPREL32 relocs.
(s_change_sec): Set alignment of ELF .rodata or .sdata section
to 4.
(s_mipsset): If .set noreorder, set mips_any_noreorder.
(s_cpload): Ignore .cpload if not generating PIC code. Warn
if .cpload is not in noreorder section.
(s_cprestore): Ignore .cprestore if not generating PIC code.
(s_gpword, s_cpadd): New functions.
(tc_get_register): Added frame argument; if true, set
mips_frame_reg to return value. Changed all callers.
(md_estimate_size_before_relax): Don't error out, but instead
determine how much a frag should grow.
(tc_gen_reloc): Return multiple relocs if appropriate, as
determined by md_estimate_size_before_relax.
(md_convert_frag): New function.
(mips_elf_final_processing): Set ELF header flags based on
mips_any_noreorder and mips_pic.
* config/tc-mips.h (RELOC_EXPANSION_POSSIBLE): Define.
(MAX_RELOC_EXPANSION): Define to be 3.
(md_relax_frag): Define to be 0.
(md_convert_frag): Don't define.
(tc_get_register): Changed declaration.
(mips_regmask_frag): New static variable, if OBJ_ELF.
(md_begin): If OBJ_ELF, create .reginfo section and set
mips_regmask_frag to a frag.
(mips_elf_final_processing): New function, if OBJ_ELF. Set
mips_regmask_frag to register mask information.
* config/tc-mips.h (elf_tc_final_processing): New macro, defined
if OBJ_ELF.
hold register masks.
(md_begin): Initialize them to zero.
(append_insn): Update mips_gprmask and mips_cprmask. Also add
register variables pinfo and prev_pinfo.
* config/tc-mips.h (mips_gprmask, mips_cprmask): Declare.
* config/obj-ecoff.c (ecoff_frob_file): If TC_MIPS, set gprmask
and cprmask from mips_gprmask and mips_cprmask.
* config/tc-mips.c (GPOPT): Define if OBJ_ECOFF or OBJ_ELF.
(various): Change all references to GP references to apply if
GPOPT, not if OBJ_ECOFF.
(s_change_sec): Rearrange somewhat. If OBJ_ELF, use .rodata
instead of .rdata. If OBJ_ELF, set section flags for .rodata and
.sdata sections.
(s_frame, s_loc, s_mask): Comment out entire functions, rather
than just body. They're not used anyhow.
* configure.in: Set cpu_type to mips for mips*. Accept
mips-*-elfl* and mips-*-elf*.
Wrote non-BFD_ASSEMBLER subseg_new. Now subseg_new always takes a
section name, and subseg_set always takes a segT. Changed all
callers as appropriate.
* config/obj-coffbfd.c (change_to_section): Renamed to
obj_coff_add_segment. Corrected. Made callers use subseg_new.
* config/obj-coffbfd.h (obj_segment_name, obj_add_segment):
Define.
Also some more gcc warning removal.
* config/tc-mips.c (macro_build): Accept 'z', and ignore it.
(macro): Use "z,s,t" for div instructions to match corresponding
change in opcode table.
(mips_ip): Added 'z'--must be zero register.
load_register.
(set_at_unsigned): Removed; changed callers to use set_at.
(load_register): Removed unused ip argument. Changed callers.
(append_insn): Don't swap branch and branch likely.
(macro_build): Handle 'u'.
(load_register): Handle 64 bit constants.
(macro): Added M_DABS, removed M_ABSU. Numerous changes to
support 64 bit constants.
(mips_ip): Use hex constants in range checks for clarity.
(md_number_to_chars): Support 8 byte values.
(md_begin): Initialize mips_isa based on TARGET_CPU. Don't sanity
check macros. Set text alignment and GP size here.
(md_assemble): Don't set text alignment and GP size here.
(append_insn): Don't insert NOPs for load delays if mips_isa >= 2.
Use the right mask and shift for WRITE_FPR_T and WRITE_FPR_S. Add
a NOP after a branch likely.
(mips_emit_delays): Don't insert NOPS for load delays if mips_isa
>= 2.
(macro): Support r6000 and r4000 macros.
(mips_ip): Check insn ISA level against mips_isa before using it.
Added 'x' case for ignored register.
(md_parse_option): Handle -mipsN and -mcpu=XX.
if .set nobopt or .set volatile.
(gp_reference): .lit8 and .lit4 are accessed via the GP register.
(macro): Added cases M_LI_S, M_LI_SS. Fixed M_LI_D and M_LI_DD.
(mips_ip): Added cases 'F', 'L', 'f', 'l' for floating point.
* config/obj-ecoff.c: Renamed some variables to avoid shadow
warnings.
davidj@ICSI.Berkeley.EDU (David Johnson): Don't accept symbolic
names for 'E' and 'G' argument types (coprocessor registers) and
don't warn if $1 is used on the coprocessor.
* config/tc-mips.c: Many changes to support simple assembler
optimization.
(insn_label, prev_insn, prev_prev_insn, dummy_opcode,
prev_insn_valid, prev_insn_frag, prev_insn_where,
prev_insn_fixp, prev_insn_is_delay_slot): New static
variables.
(insn_uses_reg, mips_no_prev_insn, mips_emit_delays,
mips_align, s_stringer, s_mips_space): New static functions.
(mips_define_label): New global function.
(md_pseudo_table): For "ascii", "asciz", "asciiz", call
s_stringer. Changed argument to float_cons from 0 or 1 to 'f'
or 'd'. For "space" call s_mips_space.
(md_begin): Call mips_no_prev_insn.
(append_insn): Only insert necessary NOP instructions.
(macro): Call mips_emit_delays before setting mips_noreorder.
Increment and decrement mips_noreorder rather than using
save_reorder_condition. Don't bother to use noreorder in
M_L_DOB and M_L_DAB, since append_insn will not insert a NOP.
(md_atof): Handle floating point numbers correctly for both
big and little endian targets.
(s_align, s_cons): Call mips_align rather than frag_align.
(s_change_seg, s_cons): Call mips_emit_delays.
(s_float_cons): Let float_cons do the work.
(s_mipsset): Call mips_emit_delays when setting noreorder.
* config/tc-mips.h (tc_frob_label): Define to be
mips_define_label.
* config/tc-mips.c: Include opcode/mips.h rather than
mips-opcode.h.
(append_insn): An extra NOP is only needed after instructions
which set HI or LO, not after instructions which read it.
(macro_build, mips_ip): Support new 'E', 'G' and 'B' arguments.
(macro): cfc1 and ctc1 now take "t,G" rather than "t,d".
* config/tc-mips.h (struct mips_opcode): Don't define.
* config/mips-big.mt, config/mips-lit.mt (TARG_CPU_DEPENDENTS):
Set to $(srcdir)/../include/opcode/mips.h.
Get the MIPS assembler up to speed with other gas changes:
* config/obj-ecoff.c (ecoff_set_vma, ecoff_frob_symbol):
Removed; don't change the symbol value.
(ecoff_build_symbols, ecoff_build_procs, ecoff_frob_file): Use
bfd_asymbol_value rather than S_GET_VALUE to include section
vma in symbol value.
(ecoff_frob_file): Ignore BSF_SECTION_SYM symbols, since ECOFF
doesn't output them. Set the vma of sections.
* config/obj-ecoff.h: Don't define obj_frob_symbol.
* config/tc-mips.c (tc_gen_reloc): Adjustment by section vma is no
longer necessary.
(various): use valueT rather than long.
comment_chars.
(do_scrub_next_char): If a line comment character is not at the
start of a line, treat it as a comment character if it is one.
For a CPP line comment use pseudo-op .appline rather than .line.
* input-scrub.c (logical_input_line): Make int rather than
unsigned.
(input_scrub_push, input_scrub_begin): Initialize
logical_input_line to -1 rather than 0.
(bump_line_counters): Increment logical_input_line.
(new_logical_line): If line_number is -2, decrement
logical_input_line.
(as_where): Use logical_input_line even if it is 0.
* read.h (s_app_file prototype): Now takes an int argument.
* read.c (potable): Make .appfile call s_app_file with 1. New
.appline pseudo-op calls s_app_line.
(s_app_file): If .appfile, call new_logical_line with -2 to
account for newline inserted by do_scrub_next_char. If listing,
call listing_source_file.
(s_app_line): New function to handle fake pseudo-op .appline.
* config/obj-coff.c (obj_pseudo_table): Make .appline call
obj_coff_ln.
(obj_coff_ln): Added argument to indicate whether .appline.
* config/obj-coffbfd.c (obj_pseudo_table): Make .appline call
obj_coff_ln.
(obj_coff_ln): Added argument to indicate whether .appline.
* config/tc-mips.c (s_file): Pass argument to s_app_file.
* as.c (perform_an_assemly_pass): Don't set output_section here.
* expr.c (expr_part, expr): Turn off section assertions for ECOFF,
since it has additional sections.
* read.c (s_lcomm): For MIPS ECOFF, put small objects in .sbss,
not bss_section.
* config/obj-ecoff.h (TARGET_SYMBOL_FIELDS): Added
ecoff_undefined field.
* config/obj-ecoff.c (obj_symbol_new_hook): Initialize
ecoff_undefined field.
(add_file): If using stabs, just output a stabs symbol rather than
creating a new fdr.
(obj_ecoff_begin, obj_ecoff_bend): Ignore line number by reading
it with get_absolute_expression, rather than skipping it by hand.
(obj_ecoff_loc): If using stabs, just output a stabs symbol rather
than ECOFF line number information.
(obj_ecoff_stab): Accept non-zero values for stabs line number.
(ecoff_build_symbols): Set ifilesym correctly. Set storage class
to small, undefined and/or readonly sections if appropriate.
Don't output symbol names containing \001 characters.
(ecoff_frob_file): Make sure at least one fdr is output.
* config/tc-mips.h: Define TC_MIPS.
* config/tc-mips.c (g_switch_value): New static variable.
(md_assemble): Set gp size of output BFD.
(gp_reference): New function; returns 1 if expression can be
accesssed via gp. Always returns 0 if not using ECOFF.
(macro_build): Convert BFD_RELOC_LO16 to BFD_RELOC_MIPS_GPREL if
possible.
(macro): Generate sequences using gp if possible.
(md_parse_option): Ignore -EL and -EB. Parse -G.
(md_apply_fix): Added BFD_RELOC_MIPS_GPREL to ignored case.
(s_change_sec): Handle .rdata and .sdata for ECOFF.
(s_extern): Mark symbol as external. Set ecoff_undefined field.
dropping a space immediately following an identifier.
* expr.c, write.c: Rewrote assert expressions to not use multiple
lines; I don't think that can be done portably.
* config/tc-mips.c (macro): Use $AT if target register is zero in
load instruction, which it can be for a floating point load.
Also a bunch more changes to config/obj-ecoff.c, still in flux.
the section contents.
* config/obj-ecoff.h, config/obj-ecoff.c: Numerous changes to get
symbol table and values right.
* config/tc-mips.h (LOCAL_LABEL): If OBJ_ECOFF, any label starting
with $L is local.
* config/tc-mips.c (tc_gen_reloc): If OBJ_ECOFF, adjust the addend
by the section vma.
* config/z8k.mt (TARG_CPU_DEPENDENTS): The relevant file is
z8k-opc.h, not z8k.h.
