"sfcr", and "dfcr" as synonyms for existing entries.
(md_begin): In MRI mode, force flag_reg_prefix_optional to 1.
(md_parse_option): Removed unused locals i and arch. Change type
of arch (another one) to unsigned long.
(tc_coff_sizemachdep): Add return after abort to avoid warning.
(md_relax_table): No longer const. Add PCINDEX entries.
(m68k_ip): For AINDX with simple symbol operand, generate a PCINDEX frag if PC
is used, or do normal non-AINDX processing for address register.
(m68k_init_after_args): If cpu is 68000 or 68010, fix md_relax_table to prevent
relaxation of PCINDEX/BYTE mode to SHORT, since they don't support that mode.
(md_convert_frag_1, case PCLEA/LONG): Add 4 to offset, not 2. Add support for
new PCINDEX modes.
(md_estimate_size_before_relax): Process PCINDEX/SZ_UNDEF mode.
(md_convert_frag_1, case PCLEA/SHORT): Add 2 to offset.
(m68k_ip, case most punctuation/AOFF): If using PC, call add_frag using PCLEA.
comments.
(struct m68k_cpu): New type.
(archs, n_archs): New variables, with single list of name/enum mapping and
aliases.
(m68k_ip): Delete the table here.
(m68k_init_after_args): Use the new table here instead of open-coding it.
(md_parse_option, case 'm'): Ditto.
m68k_aout_machtype.
* config/tc-m68k.c (omagic): Remove obsolete and unused variable.
(m68k_aout_machtype): New variable, if OBJ_AOUT.
(md_assemble): Initialize m68k_aout_machtype based on
current_architecture, if OBJ_AOUT.
(md_parse_option): Remove obsolete reference to omagic.
expr.c (__): Undefine before defining.
as.c (got_sig): Don't return anything; return type might be void.
Whitespace/comment cleanup in frags.c.
Some patches for `-pedantic' or `-fno-common' compilation.
(Some of these changes are from Michael Meissner; see change log.)
Removed some unneeded files.
obj-coff.c (obj_coff_endef): Use as_warn, not fprintf.
tc-m68k.c (md_assemble): 68000+68881 is okay -- could be emulating.
p3 into devo.
* tc-m68k.c (m68k_reg_parse): If REGISTER_PREFIX isn't defined,
still accept (but don't require) OPTIONAL_REGISTER_PREFIX before
the register name.
* tc-m68k.h (OPTIONAL_REGISTER_PREFIX): Define to be "%", if not
M68KCOFF.
support when using /opt/SUNWspro/SC2.0/acc.
Tue Nov 10 09:50:25 1992 Ian Lance Taylor (ian@cygnus.com)
* obj-coffbfd.c (fill_section): set STYP_NOLOAD bit for .bss
section.
* atof-ieee.c, atof-ns32k.c, tc-*.c: made EXP_CHARS, FLT_CHARS,
comment_chars, line_comment_chars and line_seperator_chars
consistently const, and always initialized them. Included read.h.
* tc-m68k.c (m68k_ip, m68k_ip_op, get_num, try_moto_index): merge
Motorola and MIT syntax; gas can now assemble either type of
file.
tc-m68kmote.c, tc-m68kmote.h: removed now superfluous files.
From Steve Chamberlain:
m68kcoff.mt: for m68k COFF.
obj-coffbfd.c: (fixup_mdeps) added
(size_section) removed bad sanity check
(fill_section) added rs_machine_dependent case
(write_object_file) call fixup_mdeps
(fixup_segment) set fx_subsy to 0.
obj-coffbfd.h: define WORKING_DOT_WORD (too hard to support) and
handle m68k.
tc-m68k.c, config/tc-m68k.h: added m68k COFF support and Motorala
pseudo ops.
data, so that "bc" is available to 68040 cache instructions. Added
"tt0", "tt1", and 68ec030 variants.
(md_assemble): Complain if 68000 (only) and 68881 are specified.
(enum _register): Added TT0, TT1.
(m68k_ip, cases '3' and 't'): Handle new operand type codes. Pass
line number correctly in "internal error" messages. Don't print
architecture-mismatch message for operand errors.
From Colin Smith (colin@wrs.com):
* config/tc-m68k.c (m68k_ip, case '_'): Use addword twice rather than
install_operand.
* tc-m68k.c: use TARGET_CPU to choose default cpu type.
* te-generic.h: default to LOCAL_LABELS_DOLLAR and LOCAL_LABELS_FB
so that we can assemble hand-written libgcc code.
Wed Aug 19 11:20:59 1992 Ian Lance Taylor (ian@cygnus.com)
* tc-m68k.c, tc-m68kmote.c: the cas2 instruction is supposed to be
written with indirection on the last two operands, which can be
either data or address registers. Added a new operand type 'r'
which accepts either register type. Added '(' to notend stuff in
tc-m68kmote.c to accept (a0):(a2) in cas2 instruction.
assembling for an older CPU than a 68020.
This bug was found at Adobe because GAS did not diagnose incorrect
68020 code generated by GCC when compiling for 68010. We had to debug it
in the target system as failing instructions.
processor/opcode mismatch, so reword the error message.
(md_assemble): If no CPU has been set (even if FPU/PMMU
characteristics have been), default to 68020. Don't need extra
quotes around error string.
* read.c (potable): align should be nbytes, not ptwo!
* write.c (write_object_file): extra glue for new bss attributes
(relax_segment): SEG_BSS is ok now
* config/tc-m68k.c (m68k_ip_op): can now parse more @( modes
* tc-m68k.c (m68kip): Fix typo so that only arch's >=68020 do
pcrel data stuff. (md_estimate_size_before_relax): when relaxing a
68010 bxx into a bra+6 jmpxx, put the bytes of the jmp opcode into
the right place. (s_bss): Don't put .bss stuff into SEG_DATA, put
it into SEG_BSS
* expr.c(expr): allow SEG_REGISTER in expressions.
* read.c(pseudo_set): register expressions can be the source of a
set.
* subsegs.c (subseg_new): Now -R forces all changes to SEG_DATA to
goto SEG_TEXT (if a.out)
* write.c (write_object_file): If a.out don't use the old way for
-R.
* config/obj-a.out (s_sect): complain if the user tries to use a
subsegment with a value which might interfere with out -R hackery.
* config/tc-m68k.c (m68k_reg_parse): lookup names in symbol table
rather than use ugly if tree. (init_regtable): insert register
names into symbol table.
