Ensure we null-terminate the string we copy at the start of
m68k_reg_parse.
This commit is contained in:
Michael Tiemann
parent
5bcc23e3b2
commit
865a2edf64
1 changed files with 118 additions and 108 deletions
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@ -314,8 +314,11 @@ struct m68k_it {
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} reloc[5]; /* Five is enough??? */
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};
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#define cpu_of_arch(x) ((x) & m68000up)
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#define float_of_arch(x) ((x) & mfloat)
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#define mmu_of_arch(x) ((x) & mmmu)
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static struct m68k_it the_ins; /* the instruction being assembled */
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static enum m68k_architecture max_arch_this_insn;
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/* Macros for adding things to the m68k_it struct */
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@ -412,14 +415,7 @@ static void s_proc();
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#endif /* __STDC__ */
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static enum m68k_architecture current_architecture = m68020
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#ifndef NO_68881
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| m68881
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#endif
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#ifndef NO_68851
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| m68851
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#endif
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;
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static enum m68k_architecture current_architecture = 0;
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/* BCC68000 is for patching in an extra jmp instruction for long offsets
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on the 68000. The 68000 doesn't support long branches with branchs */
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@ -558,9 +554,16 @@ register char **ccp;
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} /* need prefix */
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#endif
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for (p = c, q = ccp[0]; p < c + MAX_REG_NAME_LEN && *q != 0; ++p, ++q) {
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*p = mklower(*q);
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} /* downcase */
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for (p = c, q = ccp[0]; p < c + MAX_REG_NAME_LEN; ++p, ++q)
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{
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if (*q == 0)
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{
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*p = 0;
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break;
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}
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else
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*p = mklower(*q);
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} /* downcase */
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switch(c[0]) {
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case 'a':
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@ -835,38 +838,37 @@ register struct m68k_op *opP;
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if(i!=FAIL && (*str=='/' || *str=='-')) {
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opP->mode=REGLST;
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return get_regs(i,str,opP);
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return(get_regs(i,str,opP));
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}
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if ((stmp=strchr(str,'@')) != '\0') {
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opP->con1=add_exp(str,stmp-1);
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if(stmp==strend) {
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opP->mode=AINDX;
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return OK;
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return(OK);
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}
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if ((current_architecture & m68020up) == 0) {
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return(FAIL);
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} /* if target is not a '20 or better */
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stmp++;
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if(*stmp++!='(' || *strend--!=')') {
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opP->error="Malformed operand";
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return FAIL;
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return(FAIL);
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}
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i=try_index(&stmp,opP);
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opP->con2=add_exp(stmp,strend);
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if (i == FAIL) {
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opP->mode=AMIND;
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if (max_arch_this_insn < m68020) {
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max_arch_this_insn = m68020;
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} /* bump arch */
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} else {
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opP->mode=APODX;
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if (max_arch_this_insn < m68020) {
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max_arch_this_insn = m68020;
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} /* bump arch */
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}
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return OK;
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return(OK);
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} /* if there's an '@' */
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opP->mode=ABSL;
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opP->con1=add_exp(str,strend);
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return OK;
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opP->mode = ABSL;
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opP->con1 = add_exp(str,strend);
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return(OK);
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} /* not a register, not exactly a register, or no '@' */
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opP->reg=i;
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@ -957,89 +959,84 @@ register struct m68k_op *opP;
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}
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/* We've now got offset) offset,reg) or reg) */
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if(*str=='\0') {
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if (*str == '\0') {
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/* Th-the-thats all folks */
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if(opP->reg==FAIL) opP->mode=AINDX; /* Other form of indirect */
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else if(opP->ireg==FAIL) opP->mode=AOFF;
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else opP->mode=AINDX;
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return OK;
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if (opP->reg == FAIL) opP->mode = AINDX; /* Other form of indirect */
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else if(opP->ireg == FAIL) opP->mode = AOFF;
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else opP->mode = AINDX;
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return(OK);
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}
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/* Next thing had better be another @ */
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if(*str!='@' || str[1]!='(') {
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opP->error="junk after indirect";
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return FAIL;
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opP->error = "junk after indirect";
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return(FAIL);
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}
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if ((current_architecture & m68020up) == 0) {
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return(FAIL);
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} /* if target is not a '20 or better */
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str+=2;
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if(opP->ireg!=FAIL) {
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opP->mode=APRDX;
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if (max_arch_this_insn < m68020) {
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max_arch_this_insn = m68020;
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} /* bump arch */
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i=try_index(&str,opP);
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if(i!=FAIL) {
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opP->error="Two index registers! not allowed!";
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return FAIL;
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if(opP->ireg != FAIL) {
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opP->mode = APRDX;
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i = try_index(&str, opP);
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if (i != FAIL) {
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opP->error = "Two index registers! not allowed!";
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return(FAIL);
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}
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} else
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i=try_index(&str,opP);
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} else {
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i = try_index(&str, opP);
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}
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if (i == FAIL) {
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char *beg_str;
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beg_str=str;
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for(i=1;i;) {
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beg_str = str;
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for (i = 1; i; ) {
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switch(*str++) {
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case '\0':
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opP->error="Missing )";
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return FAIL;
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return(FAIL);
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case ',': i=0; break;
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case '(': i++; break;
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case ')': --i; break;
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}
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}
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opP->con2=add_exp(beg_str,str-2);
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if(str[-1]==',') {
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if(opP->ireg!=FAIL) {
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opP->error="Can't have two index regs";
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return FAIL;
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if (str[-1] == ',') {
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if (opP->ireg != FAIL) {
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opP->error = "Can't have two index regs";
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return(FAIL);
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}
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i=try_index(&str,opP);
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if(i==FAIL) {
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opP->error="malformed index reg";
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return FAIL;
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i = try_index(&str, opP);
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if (i == FAIL) {
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opP->error = "malformed index reg";
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return(FAIL);
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}
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opP->mode=APODX;
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if (max_arch_this_insn < m68020) {
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max_arch_this_insn = m68020;
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} /* bump arch */
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} else if(opP->ireg!=FAIL) {
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opP->mode=APRDX;
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if (max_arch_this_insn < m68020) {
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max_arch_this_insn = m68020;
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} /* bump arch */
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opP->mode = APODX;
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} else if (opP->ireg != FAIL) {
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opP->mode = APRDX;
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} else {
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opP->mode=AMIND;
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if (max_arch_this_insn < m68020) {
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max_arch_this_insn = m68020;
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} /* bump arch */
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opP->mode = AMIND;
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}
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} else {
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opP->mode=APODX;
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if (max_arch_this_insn < m68020) {
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max_arch_this_insn = m68020;
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} /* bump arch */
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opP->mode = APODX;
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}
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if(*str!='\0') {
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opP->error="Junk after indirect";
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return FAIL;
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}
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return OK;
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}
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return(OK);
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} /* m68k_ip_op() */
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/*
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*
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@ -1206,8 +1203,6 @@ char *instring;
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LITTLENUM_TYPE words[6];
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LITTLENUM_TYPE *wordp;
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max_arch_this_insn = m68000;
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if (*instring == ' ')
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instring++; /* skip leading whitespace */
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@ -1253,7 +1248,7 @@ char *instring;
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}
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}
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opsfound=opP- &the_ins.operands[0];
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opsfound = opP - &the_ins.operands[0];
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/* This ugly hack is to support the floating pt opcodes in their standard form */
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/* Essentially, we fake a first enty of type COP#1 */
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@ -1272,13 +1267,13 @@ char *instring;
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/* We've got the operands. Find an opcode that'll accept them */
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for (losing = 0; ; ) {
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/* if we didn't get the right number of ops, or either
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the modes of our args or this op line itself are out
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of order... */
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/* if we didn't get the right number of ops,
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or we have no common model with this pattern
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then reject this pattern. */
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if ((opsfound != opcode->m_opnum)
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|| ((max_arch_this_insn > current_architecture)
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|| (opcode->m_arch > current_architecture))) {
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if (opsfound != opcode->m_opnum
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|| ((opcode->m_arch & current_architecture) == 0)) {
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++losing;
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} else {
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@ -1291,8 +1286,10 @@ char *instring;
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it belongs to. I hope this makes sense. */
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switch(*s) {
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case '!':
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if(opP->mode==MSCR || opP->mode==IMMED ||
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opP->mode==DREG || opP->mode==AREG || opP->mode==AINC || opP->mode==ADEC || opP->mode==REGLST)
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if (opP->mode == MSCR || opP->mode == IMMED
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|| opP->mode == DREG || opP->mode == AREG
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|| opP->mode == AINC || opP->mode == ADEC
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|| opP->mode == REGLST)
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losing++;
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break;
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@ -1429,13 +1426,13 @@ char *instring;
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if (opP->mode != MSCR
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|| opP->reg < USP
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|| opP->reg > URP
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|| (current_architecture & m68000up) < m68010 /* before 68010 had none */
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|| ((current_architecture & m68020up) == 0
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|| cpu_of_arch(current_architecture) < m68010 /* before 68010 had none */
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|| (cpu_of_arch(current_architecture) < m68020
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&& opP->reg != SFC
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&& opP->reg != DFC
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&& opP->reg != USP
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&& opP->reg != VBR) /* 68010's had only these */
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|| ((current_architecture & m68040) == 0
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|| (cpu_of_arch(current_architecture) < m68040
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&& opP->reg != SFC
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&& opP->reg != DFC
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&& opP->reg != USP
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@ -1444,7 +1441,7 @@ char *instring;
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&& opP->reg != CAAR
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&& opP->reg != MSP
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&& opP->reg != ISP) /* 680[23]0's have only these */
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|| ((current_architecture & m68040) /* 68040 has all but this */
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|| (cpu_of_arch(current_architecture) == m68040 /* 68040 has all but this */
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&& opP->reg == CAAR)) {
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losing++;
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} /* doesn't cut it */
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@ -1609,7 +1606,8 @@ char *instring;
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losing = 0;
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}
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/* now assemble it */
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the_ins.args=opcode->m_operands;
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the_ins.numargs=opcode->m_opnum;
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the_ins.numo=opcode->m_codenum;
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@ -1778,9 +1776,7 @@ char *instring;
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case APODX:
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case AMIND:
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case APRDX:
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if (max_arch_this_insn < m68020) {
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max_arch_this_insn = m68020;
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} /* bump arch */
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know(current_architecture & m68020up);
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/* intentional fall-through */
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case AINDX:
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nextword=0;
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@ -1839,7 +1835,7 @@ char *instring;
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/* It aint simple */
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nextword|=0x100;
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/* If the guy specified a width, we assume that
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it is wide enough. Maybe it isn't. Ifso, we lose
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it is wide enough. Maybe it isn't. If so, we lose
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*/
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switch(siz1) {
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case 0:
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@ -1934,7 +1930,7 @@ char *instring;
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&& !subs(opP->con1)
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&& seg(opP->con1) == SEG_TEXT
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&& now_seg == SEG_TEXT
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&& (current_architecture & m68000up) <= m68010
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&& cpu_of_arch(current_architecture) < m68020
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&& !flagseen['S']
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&& !strchr("~%&$?", s[0])) {
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tmpreg=0x3A; /* 7.2 */
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@ -2045,7 +2041,7 @@ char *instring;
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break;
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case 'L':
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long_branch:
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if(current_architecture <= m68010) /* 68000 or 010 */
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if (cpu_of_arch(current_architecture) < m68020) /* 68000 or 010 */
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as_warn("Can't use long branches on 68000/68010");
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the_ins.opcode[the_ins.numo-1]|=0xff;
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/* Offset the displacement to be relative to byte disp location */
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@ -2066,7 +2062,7 @@ char *instring;
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where opnd is absolute (it needs
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to use the 68000 hack since no
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conditional abs jumps). */
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if (((current_architecture <= m68010) || (0==adds(opP->con1)))
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if (((cpu_of_arch(current_architecture) < m68020) || (0==adds(opP->con1)))
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&& (the_ins.opcode[0] >= 0x6200)
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&& (the_ins.opcode[0] <= 0x6f00)) {
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add_frag(adds(opP->con1),offs(opP->con1),TAB(BCC68000,SZ_UNDEF));
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@ -2667,6 +2663,18 @@ char *str;
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char *to_beg_P;
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int shorts_this_frag;
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if (current_architecture == 0) {
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current_architecture = (m68020
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#ifndef NO_68881
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| m68881
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#endif
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#ifndef NO_68851
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| m68851
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#endif
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);
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} /* default current_architecture */
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bzero((char *)(&the_ins),sizeof(the_ins)); /* JF for paranoia sake */
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m68k_ip(str);
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er=the_ins.error;
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@ -2759,7 +2767,7 @@ char *str;
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the_ins.reloc[m].pcrel,
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NO_RELOC);
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}
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know(the_ins.fragb[n].fadd);
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/* know(the_ins.fragb[n].fadd); */
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(void)frag_var(rs_machine_dependent,10,0,(relax_substateT)(the_ins.fragb[n].fragty),
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the_ins.fragb[n].fadd,the_ins.fragb[n].foff,to_beg_P);
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}
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@ -3054,7 +3062,7 @@ register fragS *fragP;
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ext=2;
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break;
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case TAB(BRANCH,LONG):
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if (current_architecture <= m68010) {
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if (cpu_of_arch(current_architecture) < m68020) {
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if (fragP->fr_opcode[0]==0x61) {
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fragP->fr_opcode[0]= 0x4E;
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fragP->fr_opcode[1]= 0xB9; /* JBSR with ABSL LONG offset */
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@ -3276,7 +3284,7 @@ segT segment;
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&& S_GET_SEGMENT(fragP->fr_symbol) == segment) {
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fragP->fr_subtype=TAB(TABTYPE(fragP->fr_subtype),BYTE);
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break;
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} else if((fragP->fr_symbol == 0) || (current_architecture <= m68010)) {
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} else if((fragP->fr_symbol == 0) || (cpu_of_arch(current_architecture) < m68020)) {
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/* On 68000, or for absolute value, switch to abs long */
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/* FIXME, we should check abs val, pick short or long */
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if(fragP->fr_opcode[0]==0x61) {
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@ -3453,7 +3461,7 @@ symbolS *to_symbol;
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{
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long offset;
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if (current_architecture <= m68010) {
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if (cpu_of_arch(current_architecture) < m68020) {
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offset=to_addr-S_GET_VALUE(to_symbol);
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md_number_to_chars(ptr ,(long)0x4EF9,2);
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md_number_to_chars(ptr+2,(long)offset,4);
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@ -3752,14 +3760,16 @@ char ***vecP;
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current_architecture |= m68040;
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#ifndef NO_68881
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} else if (!strcmp(*argP, "68881")
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|| !strcmp(*argP, "68882")) {
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current_architecture |= m68040;
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} else if (!strcmp(*argP, "68881")) {
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current_architecture |= m68881;
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} else if (!strcmp(*argP, "68882")) {
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current_architecture |= m68882;
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#endif /* NO_68881 */
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#ifndef NO_68851
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} else if (!strcmp(*argP,"68851")) {
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current_architecture |= m68040;
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current_architecture |= m68851;
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#endif /* NO_68851 */
|
||||
} else {
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||||
|
|
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|||
Loading…
Reference in a new issue