David Ung <davidu@mips.com>
* mips-opc.c: Change membership to I1 for instructions ssnop and
ehb.
2010-05-26 Catherine Moore <clm@codesoucery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
* gas/mips/set-arch.d: Expect ehb.
Joseph Myers <joseph@codesourcery.com>
Andrew Stubbs <ams@codesourcery.com>
bfd/
* config.bfd (sh-*-uclinux* | sh[12]-*-uclinux*): Add
bfd_elf32_shl_vec, and FDPIC vectors to targ_selvecs.
* configure.in: Handle FDPIC vectors.
* elf32-sh-relocs.h: Add FDPIC and movi20 relocations.
* elf32-sh.c (DEFAULT_STACK_SIZE): Define.
(SYMBOL_FUNCDESC_LOCAL): Define. Use it instead of
SYMBOL_REFERENCES_LOCAL for function descriptors.
(fdpic_object_p): New.
(sh_reloc_map): Add FDPIC and movi20 relocations.
(sh_elf_info_to_howto, sh_elf_relocate_section): Handle new invalid
range.
(struct elf_sh_plt_info): Add got20 and short_plt. Update all
definitions.
(FDPIC_PLT_ENTRY_SIZE, FDPIC_PLT_LAZY_OFFSET): Define.
(fdpic_sh_plt_entry_be, fdpic_sh_plt_entry_le, fdpic_sh_plts): New.
(FDPIC_SH2A_PLT_ENTRY_SIZE, FDPIC_SH2A_PLT_LAZY_OFFSET): Define.
(fdpic_sh2a_plt_entry_be, fdpic_sh2a_plt_entry_le)
(fdpic_sh2a_short_plt_be, fdpic_sh2a_short_plt_le, fdpic_sh2a_plts):
New.
(get_plt_info): Handle FDPIC.
(MAX_SHORT_PLT): Define.
(get_plt_index, get_plt_offset): Handle short_plt.
(union gotref): New.
(struct elf_sh_link_hash_entry): Add funcdesc, rename tls_type to
got_type and adjust all uses. Add GOT_FUNCDESC.
(struct sh_elf_obj_tdata): Add local_funcdesc. Rename
local_got_tls_type to local_got_type.
(sh_elf_local_got_type): Renamed from sh_elf_local_got_tls_type. All
users changed.
(sh_elf_local_funcdesc): Define.
(struct elf_sh_link_hash_table): Add sfuncdesc, srelfuncdesc, fdpic_p,
and srofixup.
(sh_elf_link_hash_newfunc): Initialize new fields.
(sh_elf_link_hash_table_create): Set fdpic_p.
(sh_elf_omit_section_dynsym): New.
(create_got_section): Create .got.funcdesc, .rela.got.funcdesc
and .rofixup.
(allocate_dynrelocs): Allocate local function descriptors and space
for R_SH_FUNCDESC-related relocations, and for rofixups.
Handle GOT_FUNCDESC. Create fixups. Handle GOT entries which
require function descriptors.
(sh_elf_always_size_sections): Handle PT_GNU_STACK and __stacksize.
(sh_elf_modify_program_headers): New.
(sh_elf_size_dynamic_sections): Allocate function descriptors for
local symbols. Allocate .got.funcdesc contents. Allocate rofixups.
Handle local GOT entries of type GOT_FUNCDESC. Create fixups for
local GOT entries. Ensure that FDPIC libraries always have a PLTGOT
entry in the .dynamic section.
(sh_elf_add_dyn_reloc, sh_elf_got_offset, sh_elf_initialize_funcdesc)
(sh_elf_add_rofixup, sh_elf_osec_to_segment)
(sh_elf_osec_readonly_p, install_movi20_field): New functions.
(sh_elf_relocate_section): Handle new relocations, R_SH_FUNCDESC,
R_SH_GOTFUNCDESC and R_SH_GOTOFFFUNCDESC. Use sh_elf_got_offset
and .got.plt throughout to find _GLOBAL_OFFSET_TABLE_. Add rofixup
read-only section warnings. Handle undefined weak symbols. Generate
fixups for R_SH_DIR32 and GOT entries. Check for cross-segment
relocations and clear EF_SH_PIC. Handle 20-bit relocations.
Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_gc_sweep_hook): Handle R_SH_FUNCDESC, R_SH_GOTOFF20,
R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20, and R_SH_GOTOFFFUNCDESC.
Handle 20-bit relocations.
(sh_elf_copy_indirect_symbol): Copy function descriptor reference
counts.
(sh_elf_check_relocs): Handle new relocations. Make symbols
dynamic for FDPIC relocs. Account for rofixups. Error for FDPIC
symbol mismatches. Allocate a GOT for R_SH_DIR32. Allocate fixups
for R_SH_DIR32.
(sh_elf_copy_private_data): Copy PT_GNU_STACK size.
(sh_elf_merge_private_data): Copy initial flags. Do not clobber
non-mach flags. Set EF_SH_PIC for FDPIC. Reject FDPIC mismatches.
(sh_elf_finish_dynamic_symbol): Do not handle got_funcdesc entries
here. Rename sgot to sgotplt and srel to srelplt. Handle short_plt,
FDPIC descriptors, and got20. Create R_SH_FUNCDESC_VALUE for FDPIC.
Use install_movi20_field. Rename srel to srelgot. Always generate
R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE.
(sh_elf_finish_dynamic_sections): Fill in the GOT pointer in rofixup.
Do not fill in reserved GOT entries for FDPIC. Correct DT_PLTGOT.
Rename sgot to sgotplt. Assert that the right number of rofixups
and dynamic relocations were allocated.
(sh_elf_use_relative_eh_frame, sh_elf_encode_eh_address): New.
(elf_backend_omit_section_dynsym): Use sh_elf_omit_section_dynsym.
(elf_backend_can_make_relative_eh_frame)
(elf_backend_can_make_lsda_relative_eh_frame)
(elf_backend_encode_eh_address): Define.
(TARGET_BIG_SYM, TARGET_BIG_NAME, TARGET_LITTLE_SYM)
(TARGET_LITTLE_NAME, elf_backend_modify_program_headers, elf32_bed):
Redefine for FDPIC vector.
* reloc.c: Add SH FDPIC and movi20 relocations.
* targets.c (_bfd_target_vector): Add FDPIC vectors.
* configure, bfd-in2.h, libbfd.h: Regenerated.
binutils/
* readelf.c (get_machine_flags): Handle EF_SH_PIC and EF_SH_FDPIC.
gas/
* config/tc-sh.c (sh_fdpic): New.
(sh_check_fixup): Handle relocations on movi20.
(parse_exp): Do not reject PIC operators here.
(build_Mytes): Check for unhandled PIC operators here. Use
sh_check_fixup for movi20.
(enum options): Add OPTION_FDPIC.
(md_longopts, md_parse_option, md_show_usage): Add --fdpic.
(sh_fix_adjustable, md_apply_fix): Handle FDPIC and movi20 relocations.
(sh_elf_final_processing): Handle --fdpic.
(sh_uclinux_target_format): New.
(sh_parse_name): Handle FDPIC relocation operators.
* config/tc-sh.h (TARGET_FORMAT): Define specially for TE_UCLINUX.
(sh_uclinux_target_format): Declare for TE_UCLINUX.
* configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): Set
em=uclinux.
* doc/c-sh.texi (SH Options): Document --fdpic.
gas/testsuite/
* gas/sh/basic.exp: Run new tests. Handle uClinux like Linux.
* gas/sh/fdpic.d: New file.
* gas/sh/fdpic.s: New file.
* gas/sh/reg-prefix.d: Force big-endian.
* gas/sh/sh2a-pic.d: New file.
* gas/sh/sh2a-pic.s: New file.
* lib/gas-defs.exp (is_elf_format): Include sh*-*-uclinux*.
include/elf/
* sh.h (EF_SH_PIC, EF_SH_FDPIC): Define.
(R_SH_FIRST_INVALID_RELOC_6, R_SH_LAST_INVALID_RELOC_6): New. Adjust
other invalid ranges.
(R_SH_GOT20, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20)
(R_SH_GOTOFFFUNCDESC, R_SH_GOTOFFFUNCDESC20, R_SH_FUNCDESC)
(R_SH_FUNCDESC_VALUE): New.
ld/
* Makefile.am (ALL_EMULATIONS): Add eshelf_fd.o and eshlelf_fd.o.
(eshelf_fd.c, eshlelf_fd.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh-*-uclinux*): Add shelf_fd and shlelf_fd
emulations.
* emulparams/shelf_fd.sh: New file.
* emulparams/shlelf_fd.sh: New file.
* emulparams/shlelf_linux.sh: Update comment.
ld/testsuite/
* ld-sh/sh.exp: Handle uClinux like Linux.
* lib/ld-lib.exp (is_elf_format): Include sh*-*-uclinux*.
* ld-sh/fdpic-funcdesc-shared.d: New file.
* ld-sh/fdpic-funcdesc-shared.s: New file.
* ld-sh/fdpic-funcdesc-static.d: New file.
* ld-sh/fdpic-funcdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesc-shared.d: New file.
* ld-sh/fdpic-gotfuncdesc-shared.s: New file.
* ld-sh/fdpic-gotfuncdesc-static.d: New file.
* ld-sh/fdpic-gotfuncdesc-static.s: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotfuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotfuncdesci20-static.d: New file.
* ld-sh/fdpic-gotfuncdesci20-static.s: New file.
* ld-sh/fdpic-goti20-shared.d: New file.
* ld-sh/fdpic-goti20-shared.s: New file.
* ld-sh/fdpic-goti20-static.d: New file.
* ld-sh/fdpic-goti20-static.s: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesc-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesc-static.d: New file.
* ld-sh/fdpic-gotofffuncdesc-static.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-shared.s: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.d: New file.
* ld-sh/fdpic-gotofffuncdesci20-static.s: New file.
* ld-sh/fdpic-gotoffi20-shared.d: New file.
* ld-sh/fdpic-gotoffi20-shared.s: New file.
* ld-sh/fdpic-gotoffi20-static.d: New file.
* ld-sh/fdpic-gotoffi20-static.s: New file.
* ld-sh/fdpic-plt-be.d: New file.
* ld-sh/fdpic-plt-le.d: New file.
* ld-sh/fdpic-plt.s: New file.
* ld-sh/fdpic-plti20-be.d: New file.
* ld-sh/fdpic-plti20-le.d: New file.
* ld-sh/fdpic-stack-default.d: New file.
* ld-sh/fdpic-stack-size.d: New file.
* ld-sh/fdpic-stack.s: New file.
defined weak symbol is in.
* config/tc-arm.c (relax_adr, relax_branch, md_apply_fix): Treat
weak symbols as not known to be in the same section, even if they
are defined.
* gas/arm/weakdef-1.s: New.
* gas/arm/weakdef-1.d: New.
* gas/arm/weakdef-2.s: New.
* gas/arm/weakdef-2.d: New.
* gas/arm/weakdef-2.l: New.
* config/tc-tic6x.h (tic6x_label_list): New.
(tic6x_segment_info_type): Keep a list of labels and a current
frag instead of a boolean for whether labels seen and a count of
instructions.
(tic6x_frag_info, TC_FRAG_TYPE, TC_FRAG_INIT, tic6x_frag_init,
md_do_align, tic6x_do_align, md_end, tic6x_end): New.
* config/tc-tic6x.c (tic6x_frob_label): Put label on list.
(tic6x_cleanup): Correct comment.
(tic6x_free_label_list): New.
(tic6x_cons_align): Free label list and update for
tic6x_segment_info_type changes.
(tic6x_do_align): New.
(md_assemble): Handle list of labels and saved frag for execute
packet. Create machine-dependent frag for new execute packet and
adjust labels accordingly.
(tic6x_adjust_section, tic6x_frag_init, tic6x_end): New.
(md_convert_frag, md_estimate_size_before_relax): Update comments.
gas/testsuite:
* gas/tic6x/align-1-be.d, gas/tic6x/align-1.d,
gas/tic6x/align-1.s, gas/tic6x/align-2.d, gas/tic6x/align-2.s:
New.
gas/
2010-04-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11509
* config/tc-i386-intel.c (i386_intel_simplify_register): New.
(i386_intel_simplify): Use i386_is_register and
i386_intel_simplify_register. Set X_md for O_register and
check X_md for O_constant.
(i386_intel_operand): Use i386_is_register.
* config/tc-i386.c (i386_is_register): New.
(x86_cons): Initialize the X_md field. Use i386_is_register.
(parse_register): Use i386_is_register.
(tc_x86_parse_to_dw2regnum): Likewise.
gas/testsuite/
2010-04-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11509
* gas/i386/equ.s: Add tests for ".equ symbol, reg + NUM".
* gas/i386/equ.d: Updated.
* macro.c (macro_expand_body): Do not treat LOCAL as a keyword in
altmacro mode if found inside a quoted string.
* gas/macros/altmacro.s: New test.
* gas/macros/altmacro.d: Expected output.
* config/tc-hppa.c (pa_ip): Do not allow 64-bit add condition
matcher to accept and unconditional 32-bit add instruction.
(pa_build_unwind_subspace): Cope with error conditions not
allowing the start symbol to be set.
* gas/hppa/basic/add2.s: Add test of simple 32-bit instruction.
* gas/hppa/basic/basic.exp (do_add2): Add grep for expected
disassembly.
Quentin Neill <quentin.neill@amd.com>
opcodes/
* i386-dis.c (OP_LWP_I): Removed.
(reg_table): Do not use OP_LWP_I, use Iq.
(OP_LWPCB_E): Remove use of names16.
(OP_LWP_E): Same.
* i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
should not set the Vex.length bit.
* i386-tbl.h: Regenerated.
gas/
* testsuite/gas/i386/x86-64-lwp.s: Remove use of 16bit LWP insns.
* testsuite/gas/i386/lwp.s: Same.
* testsuite/gas/i386/x86-64-lwp.d: Updated.
* testsuite/gas/i386/lwp.d: Updated.
that two mapping symbols have the same value.
testsuite/
* gas/arm/mapmisc.s: Add the test case for two mapping
symbols having the same value.
* gas/arm/mapmisc.d: Likewise.
* config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
alignment.
testsuite/
* gas/arm/neon-ldst-align-bad.d: New test.
* gas/arm/neon-ldst-align-bad.l: New test.
* gas/arm/neon-ldst-align-bad.s: New test.
mips_fix_loongson2f_jump): New variables.
(md_longopts): Add New options -mfix-loongson2f-nop/jump,
-mno-fix-loongson2f-nop/jump.
(md_parse_option): Initialize variables via above options.
(options): New enums for the above options.
(md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
(fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
New functions.
(append_insn): call fix_loongson2f().
(mips_handle_align): Replace the implicit nops.
* config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
for the new mips_handle_align().
* doc/c-mips.texi: Document the new options.
* gas/mips/loongson-2f-2.s: New test of -mfix-loongson2f-nop.
* gas/mips/loongson-2f-2.d: Likewise.
* gas/mips/loongson-2f-3.s: New test of -mfix-loongson2f-jump.
* gas/mips/loongson-2f-3.d: Likewise.
* gas/mips/mips.exp: Run the new tests.
* opcode/mips.h (LOONGSON2F_NOP_INSN): New macro.
* config/tc-arm.c (do_rd_rm_rn): Added warning.
gas/testsuite/
* gas/arm/depr-swp.d: New test case.
* gas/arm/depr-swp.s: New file.
* gas/arm/depr-swp.l: New file.
gas/
* config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
BFD_RELOC_ARM_PCREL_CALL)
gas/testsuite/
* gas/arm/branch-reloc.s, gas/arm/branch-reloc.d,
gas/arm/branch-reloc.l: New tests and expected results with all
variants of call: ARM/Thumb, local/global, inter/intra-section,
using BL/BLX.
a new address, so as not to reuse a previous, non-related reloc.
* gas/arm/arm-it-auto.d, gas/arm/bl-local-v4t.d,
gas/arm/blx-local.d, gas/arm/thumb-w-good.d: Update expected
results.
gas/
* config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
(i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
* config/tc-i386.h (processor_type): Same.
* doc/c-i386.texi: Change amdfam15 to bdver1.
opcodes/
* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
to CPU_BDVER1_FLAGS
* i386-init.h: Regenerated.
testsuite/
* gas/i386/i386.exp: Rename amdfam15 test cases to bdver1.
* gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to
gas/i386/x86-64-nops-1-bdver1.d.
* gas/i386/nops-1-amdfam15.d: Renamed test case to
gas/i386/nops-1-bdver1.d.
* gas/arm/dis-data.d: Update test name. Do not expect
.word output.
* gas/arm/dis-data2.d, gas/arm/dis-data2.s,
gas/arm/dis-data3.d, gas/arm/dis-data3.s: New tests.
opcodes/
* opcodes/arm-dis.c (struct arm_private_data): New.
(print_insn_coprocessor, print_insn_arm): Update to use struct
arm_private_data.
(is_mapping_symbol, get_map_sym_type): New functions.
(get_sym_code_type): Check the symbol's section. Do not check
mapping symbols.
(print_insn): Default to disassembling ARM mode code. Check
for mapping symbols separately from other symbols. Use
struct arm_private_data.
* objdump.c (only): Replace with linked list.
(only_size, only_used): Replace with only_list.
(process_section_p): Set seen field on matches sections.
(add_only): New function.
(free_only_list): New function.
(disassemble_section): Check only_list.
(main): Use add_only and free_only_list.
* gas/pe/aligncomm-c.d: Dump all sections.
* ld-sh/refdbg-0-dso.d: Dump all sections.
* NEWS: Mention new feature.
* config/obj-coff.c (obj_coff_section): Accept digits and use
to override default section alignment power if specified.
* doc/as.texinfo (.section directive): Update documentation.
gas/testsuite/ChangeLog:
* gas/pe/section-align-1.s: New test source file.
* gas/pe/section-align-1.d: Likewise control script.
* gas/pe/section-align-2.s: Likewise ...
* gas/pe/section-align-2.d: ... and likewise.
* gas/pe/pe.exp: Invoke new testcases.
* coff-rs6000.c (xcoff_howto_table): Change size to 0 and bitsize to 1.
(_bfd_xcoff_reloc_type_lookup): Handle BFD_RELOC_NONE.
* coff64-rs6000.c (xcoff64_howto_table): Change size to 0 and
bitsize to 1.
(xcoff64_reloc_type_lookup): Handle BFD_RELOC_NONE.
gas/
* write.h (fix_at_start): Declare.
* write.c (fix_new_internal): Add at_beginning parameter.
Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
(fix_new, fix_new_exp): Update accordingly.
(fix_at_start): New function.
* config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
(ppc_ref): New function, for OBJ_XCOFF.
(md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
* config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
gas/testsuite/
* gas/ppc/xcoff-ref-1.s, gas/ppc/xcoff-ref-1.l: New test.
* gas/ppc/aix.exp: Run it.
ld/testsuite/
* ld-powerpc/aix-ref-1-32.od, ld-powerpc/aix-ref-1-64.od,
ld-powerpc/aix-ref-1.s: New tests.
* ld-powerpc/aix52.exp: Run them.
gas/
* config/tc-i386.c (md_assemble): Before accessing the IMM field
check that it's not an XOP insn.
gas/testsuite/
* gas/i386/x86-64-xop.d: Add missing patterns.
* gas/i386/x86-64-xop.s: Same.
* gas/i386/xop.d: Same.
* gas/i386/xop.s: Same.
opcodes/
* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
* i386-tbl.h: Regenerated.
warning message if a new section is created without setting any
attributes for it.
(md_pseudo_table): Intercept section creation pseudos.
(md_pcrel_from): Replace abort with an error message.
* config/obj-elf.c (obj_elf_section_name): Export this function.
* config/obj-elf.h (obj_elf_section_name): Prototype.
* gas/elf/section0.d: Skip this test for the h8300.
* gas/elf/section1.d: Likewise.
* gas/elf/section6.d: Likewise.
* gas/elf/elf.exp: Skip section2 and section5 tests when the
target is the h8300.
* ld-scrips/sort.exp: Skip these tests when the target is the
h8300.
gas/
* config/tc-arm.c (do_neon_logic): Accept imm value
in the third operand too.
(operand_parse_code): OP_RNDQ_IMVNb renamed to
OP_RNDQ_Ibig.
(parse_operands): OP_NILO case removed, applied renaming.
(insns): Neon shape changed for some logic instructions.
gas/testsuite/
* gas/arm/neon-logic.d: New test case.
* gas/arm/neon-logic.s: New file.
gas/
* config/tc-arm.c (do_neon_ldx_stx): Added
validation for vector load/store insns.
gas/testsuite/
* gas/arm/neon-addressing-bad.d: New test case.
* gas/arm/neon-addressing-bad.s: New file.
* gas/arm/neon-addressing-bad.l: New file.
* config/tc-mips.c (s_mips_ent): Also set BSF_FUNCTION for
".aent".
gas/testsuite/
* gas/mips/aent.d: New test.
* gas/mips/aent.s: Source for the new test.
* gas/mips/mips.exp: Run it.
* config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
register.
(do_mrs): Likewise.
(do_mul): Likewise.
* arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
unique register numbers. Extend support for %<>R format to
thumb32 and coprocessor instructions.
* gas/arm/unpredictable.s: Add more unpredictable instructions.
* gas/arm/unpredictable.d: Add expected disassemblies.
* arm-dis.c (arm_opcodes): Specify %R in cases where using r15
results in unpredictable behaviour.
(print_insn_arm): Handle %R.
* gas/arm/unpredictable.s: New test case - checks the disassembly
of instructions with unpredictable behaviour.
* gas/arm/unpredictable.d: New file - expected disassembly.
gas/testsuite/
* gas/i386/fma4.d: Add test cases.
* gas/i386/fma4.s: Add test cases.
* gas/i386/x86-64-fma4.d: Add test cases.
* gas/i386/x86-64-fma4.s: Add test cases.
opcodes/
* i386-dis.c (get_vex_imm8): Extend logic to apply in all
cases, to avoid fetching ahead for the immediate bytes when
OP_E_memory has already been called. Fix indentation.
Sebastian Pop <sebastian.pop@amd.com>
gas/testsuite/
* gas/i386/x86-64-fma4.d: Add new patterns.
* gas/i386/x86-64-fma4.s: Same.
* gas/i386/x86-64-xop.d: Adjusted.
opcodes/
* i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
decoding the second source operand from the immediate byte.
(OP_EX_VexW): Pass an extra integer to identify the second
and third source arguments.
* gas/arm/arch4t-eabi.d: Restore previous expected dissambly of
instructions using Immediate Offset addressing with an offset of
zero.
* gas/arm/arch4t.d: Likewise.
* gas/arm/arm7t.d: Likewise.
* gas/arm/xscale.d: Likewise.
* gas/arm/wince-inst.d: Remove 'p' suffix from cmp, cmn, teq and
tst instructions.
PR binutils/10924
* arm-dis.c (print_insn_arm): Do not print an offset of zero when
decoding Immediaate Offset addressing.
PR binutils/10924
* gas/arm/arch4t-eabi.d: Update expected disassembly.
* gas/arm/arch4t.d: Likewise.
* gas/arm/archv6t2.d: Likewise.
* gas/arm/arm7t.d: Likewise.
* gas/arm/inst.d: Likewise.
* gas/arm/xscale.d: Likewise.
PR binutils/10924
* arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
instruction variants. Add pattern for MRS variant that was being
confused with CMP.
(arm_decode_shift): Place error message in a comment.
(print_insn_arm): Note that writing back to the PC is
unpredictable.
Only print 'p' variants of cmp/cmn/teq/tst instructions if
decoding for pre-V6 architectures.
* opcodes/i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
the xop_table.
(get_valid_dis386): Removed unused condition (from cut/n/paste) for
XOP instructions.
* gas/testsuite/gas/i386/x86-64-lwp.s: Updated to also contain
patterns with r[8-15] registers.
* gas/testsuite/gas/i386/x86-64-lwp.d: Same.
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* config/tc-i386.c (build_modrm_byte): Do not swap REG and
NDS operands for FMA4.
gas/testsuite/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* gas/i386/fma4.d: Updated patterns.
* gas/i386/x86-64-fma4.d: Same.
opcodes/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* i386-dis.c (OP_VEX_FMA): Removed.
(VexFMA): Removed.
(Vex128FMA): Removed.
(prefix_table): First source operand of FMA4 insns is decoded
with Vex not with VexFMA.
(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
when vex.w is set. Third source operand is decoded with
get_vex_imm8 when vex.w is cleared.
(OP_VEX_FMA): Removed.
* expr.c (resolve_expression): Only add "left" value to O_symbol
expression when the symbol is undefined and different from the
original symbol. Simplify negative logic.
* gas/i386/intelpic.d: Correct.
gas/
* macro.c: Delete unnecessary function declarations.
(buffer_and_nest): Support multiple labels per line for
LABELS_WITHOUT_COLONS targets if the labels do have colons.
(free_macro): Move so that we don't need forward declaration.
* read.c (read_a_source_file): Take a copy of macro expansion line
before we trim labels.
* listing.c (listing_newline): Adjust stdin line save for
input_line_pointer still at start of line.
gas/testsuite/
* gas/macros/dot.s: Don't start macro invocations is first column.
* gas/macros/dot.l: Update.
* gas/macros/macros.exp: Run dot test on more targets.
2009-10-07 Vincent Riviere <vincent.riviere@freesbee.fr>
PR gas/3041
* config/tc-m68k.c (tc_gen_reloc): Fix addend for relocations
located in data section an referencing a weak symbol.
gas/testsuite:
2009-10-07 Vincent Riviere <vincent.riviere@freesbee.fr>
PR gas/3041
* gas/m68k/all.exp: Added "p3041data".
* gas/m68k/p3041.d, gas/m68k/p3041.s: Added tests of weak references
from text section to all possible sections.
* gas/m68k/p3041data.d, gas/m68k/p3041data.s: New test. Check weak
references from data section.
* gas/mips/eret-2.d: Likewise.
* gas/mips/eret-3.d: Likewise.
* gas/mips/eret-1.s: Reformat for readability. Add a label
at the beginning.
* gas/mips/eret-2.s: Add a label at the beginning.
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10637
* config/tc-i386-intel.c (intel_state): Add has_offset.
(i386_intel_simplify): Set intel_state.has_offset to 1 for
O_offset.
(i386_intel_operand): Turn on intel_state.is_mem if
intel_state.has_offset is 0 and the last char is ']'.
gas/testsuite/
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10637
* gas/i386/disp.s: Add tests for Intel syntax.
* gas/i386/x86-64-disp.s: Likewise.
* gas/i386/disp.d: Updated.
* gas/i386/intelok.d: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/disp-intel.d: New.
* gas/i386/x86-64-disp-intel.d: Likewise.
* gas/i386/i386.exp: Run disp-intel and x86-64-disp-intel.
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10636
* config/tc-i386.c (optimize_disp): Set disp32 for 64bit only
if there is an ADDR_PREFIX.
(i386_finalize_displacement): Repor error if signed 32bit
displacement is out of range.
gas/testsuite/
2009-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10636
* gas/i386/disp.d: New.
* gas/i386/disp.s: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/x86-64-disp.s: Likewise.
* gas/i386/i386.exp: Run disp and x86-64-disp.
* gas/i386/x86-64-addr32.s: Add high 32bit displacement tests.
* gas/i386/x86-64-addr32.d: Updated.
* gas/i386/x86-64-addr32-intel.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/x86-64-prescott.d: Likewise.
* gas/i386/x86-64-inval.s: Add invalid displacement tests.
* gas/i386/x86-64-prescott.s: Replace 0x90909090 displacement
with 0x909090.
* config/tc-mips.c (MIPS_JALR_HINT_P): Take an expr argument.
Require the target to be a bare symbol on targets with
in-place addends.
(macro_build_jalr): Update accordingly.
(mips_fix_adjustable): Don't reduce R_MIPS_JALRs on targets
with in-place addends.
gas/testsuite/
* gas/mips/jalr2.s, gas/mips/jalr2.d: New test.
* gas/mips/jal-svr4pic.d: Don't expect R_MIPS_JALRs to be reduced.
* gas/mips/jal-xgot.d: Likewise.
* gas/mips/mips-abi32-pic2.d: Likewise.
* gas/mips/mips.exp: Run it.
* config/tc-d10v.c: Include dwarf2dbg.h.
(write_long, write_1_short, write_2_short): Call dwarf2_emit_insn.
(d10v_frob_label): New function.
* config/tc-d10v.h (d10v_frob_label): Declare.
(tc_frob_label): Define as d10v_frob_label.
gas/testsuite/
* gas/lns/lns-common-1.s: Use two nops between each .loc.
* gas/lns/lns.exp: Don't exclude d10v.
* config/gas/bfin-parse.y (asm_1): Clean up and unify error handling
for load and store insns.
(neg_value): Delete function.
testsuite/
From Bernd Schmidt <bernd.schmidt@analog.com>
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
Check error messages for invalid load/store insns.
(read_a_source_file): Pass the beginning of the symbol through
the new argument of TC_START_LABEL.
* config/tc-arm.h (TC_START_LABEL): Add a new argument.
* config/tc-bfin.c (bfin_start_label): Only search '(' and '['
from the beginning of the symbol.
* config/tc-bfin.h (TC_START_LABEL): Add the new argument.
* config/tc-d30v.h (TC_START_LABEL): Likewise.
* config/tc-fr30.h (TC_START_LABEL): Likewise.
* config/tc-m32c.h (TC_START_LABEL): Likewise.
* config/tc-m32r.h (TC_START_LABEL): Likewise.
* config/tc-mep.h (TC_START_LABEL): Likewise.
testsuite/
* gas/bfin/stack2.s: Add pop multiple instruction with a label
on the same line.
* gas/bfin/stack2.d: Adjust accordingly.
* config/tc-arm.c (do_t_mov_cmp): Do not silently ignore shifted
operands.
* gas/arm/t16-bad.l: Update expected messages for moves with
shifted operands.
* config/tc-arm.c (marked_pr_dependency, mapstate): Delete global
variables.
(mapping_state): Use the section's mapstate.
(mapping_state_2): Likewise. Skip special sections.
(s_arm_unwind_fnend): Use the section's marked_pr_dependency.
(arm_elf_change_section): Do not set deleted globals.
* config/tc-arm.h (struct arm_segment_info_type): Document
marked_pr_dependency.
gas/testsuite/
* gas/arm/mapping2.s: Test code after .ident.
* binutils-all/arm/thumb2-cond.s: Use instructions instead of
.short.
gas/
* config/obj-elf.c (obj_elf_ident): Notify section change to the hook.
* config/tc-arm.c (make_mapping_symbol): New function, from
mapping_state. Save mapping symbols in the frag.
(insert_data_mapping_symbol): New.
(mapping_state): Use make_mapping_symbol, improve state transitions.
(mapping_state_2): New. Provide dummy definition.
(opcode_select): Do not call mapping_state.
(s_bss): Call md_elf_section_change_hook instead of mapping_state.
(output_inst): Update use of tc_frag_data.
(new_automatic_it_block): Call mapping_state before emitting the
IT instruction.
(md_assemble): Move mapping_state to just before outputting the
new instruction.
(arm_handle_align): Update use of tc_frag_data.
Call insert_data_mapping_symbol.
(arm_init_frag): Update use of tc_frag_data. Call
mapping_state_2.
(arm_elf_change_section): Always update the mapping symbol FSM state.
(check_mapping_symbols): New function.
(arm_adjust_symtab): Use check_mapping_symbols.
* config/tc-arm.h (struct arm_frag_type): New.
(TC_FRAG_TYPE): Change to struct arm_frag_type.
(TC_FRAG_INIT): Pass max_chars.
(arm_init_frag): Update prototype.
gas/testsuite/
* gas/arm/mapdir.d, gas/arm/mapdir.s: New files.
* gas/arm/mapping.d: Adapted to new symbols generation.
* gas/arm/mapping2.d: New test case.
* gas/arm/mapping2.s: New file.
* gas/arm/mapping3.d: New test case.
* gas/arm/mapping3.s: New file.
* gas/arm/mapping4.d: New test case.
* gas/arm/mapping4.s: New file.
* gas/arm/mapshort-eabi.d: Adapted to new symbols generation.
* gas/elf/section2.e-armeabi: Adapted to new symbols generation.
2009-07-27 Jan Beulich <jbeulich@novell.com>
* obj-elf.c (elf_file_symbol): Replace symbol name set up by
symbol_new() with the passed in, unmodified one.
gas/testsuite/
2009-07-27 Jan Beulich <jbeulich@novell.com>
* gas/elf/file.[ds]: New.
* gas/elf/elf.exp: Run new test.
gnu_unique_object.
* doc/as.texinfo: Document new feature of .type directive.
* NEWS: Mention support for gnu_unique_object symbol type.
* common.h (STB_GNU_UNIQUE): Define.
* NEWS: Mention the linker's support for symbols with a binding of
STB_GNU_UNIQUE.
* gas/elf/type.s: Add unique global symbol definition.
* gas/elf/type.e: Add expected readelf output for global unique
symbol.
* elfcpp.h (enum STB): Add STB_GNU_UNIQUE.
* readelf.c (get_symbol_binding): For Linux targeted files return
UNIQUE for symbols with the STB_GNU_UNIQUE binding.
* doc/binutils.texi: Document the meaning of the 'u' symbol
binding in the output of nm and objdump --syms.
* elf-bfd.h (struct elf_link_hash_entry): Add unique_global field.
* elf.c (swap_out_syms): Set binding to STB_GNU_UNIQUE for symbols
with the BSF_GNU_UNIQUE flag bit set.
* elfcode.h (elf_slurp_symbol_table): Set the BSF_GNU_UNIQUE flag
for symbols with STB_GNU_UNIQUE binding.
* elflink.c (_bfd_elf_merge_symbol): Set unique_global for symbols
with the STB_GNU_UNIQUE binding.
(elf_link_add_object_symbols): Set the BSF_GNU_UNIQUE flag for
symbols with STB_GNU_UNIQUE binding. Set STB_GNU_UNIQUE for
symbols with the unique_global field set.
(elf_link_output_extsym): Set unique_global field for symbols with
the STB_GNU_UNIQUE binding.
* syms.c (struct bfd_symbol): Define BSF_GNU_UNIQUE flag bit.
(bfd_print_symbol_vandf): Print a 'u' character for BSF_GNU_UNIQUE
symbols.
(bfd_decode_symclass): Return a 'u' character for BSF_GNU_UNIQUE
symbols.
* bfd-in2.h: Regenerate.
2009-07-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10420
* config/tc-i386.c (i386_align_code): Tune for 32bit nops in
64bit.
(i386_target_format): Set cpu_arch_isa_flags.bitfield.cpulm
for 64bit.
gas/testsuite/
2009-07-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10420
* gas/i386/i386.exp: Run x86-64-nops-1-pentium.
* gas/i386/x86-64-nops-1-pentium.d: New.
(MAX_MEM_FOR_RS_ALIGN_CODE): Define in terms of
MAX_MEM_ALIGNMENT_BYTES.
* config/tc-arm.c (arm_frag_align_code): Replace hard coded
constant with MAX_MEM_FOR_RS_ALIGN_CODE.
* gas/arm/align64.s: New test case.
* gas/arm/align64.d: Expected disassembly.
* config/tc-arm.c (md_assemble): Added validation.
gas/testsuite
* gas/arm/thumb-w-bad.d: New test case.
* gas/arm/thumb-w-bad.l: New file.
* gas/arm/thumb-w-bad.s: New file.
* gas/arm/thumb-w-good.d: New test case.
* gas/arm/thumb-w-good.s: New file.
(set_it_insn_type_nonvoid): New macro.
(emit_thumb32_expr): New function.
(thumb_insn_size): New function.
(emit_insn): New function.
(s_arm_elf_inst): New function.
(md_pseudo_table): New pseudo-opcode entries added.
* doc/c-arm.texi: New directive added.
* gas/arm/inst-po.d: New testcase.
* gas/arm/inst-po.s: New file.
* gas/arm/inst-po-2.d: New testcase.
* gas/arm/inst-po-2.s: New file.
* gas/arm/inst-po-2.l: New file.
* gas/arm/inst-po-3.d: New testcase.
* gas/arm/inst-po-3.s: New file.
* gas/arm/inst-po-be.d: New testcase.
* arm-dis.c (coprocessor): Print the LDC and STC versions of the
LFM and SFM instructions as comments,.
Improve consistency of formatting for instructions displayed as
comments and decimal values displayed with their hexadecimal
equivalents.
Formatting tidy ups.
Updated expected disassembler regexps.
* arm-dis.c (enum opcode_sentinels): New: Used to mark the
boundary between variaant and generic coprocessor instuctions.
(coprocessor): Use it.
Fix architecture version of MCRR and MRRC instructions.
(arm_opcdes): Fix patterns for STRB and STRH instructions.
(print_insn_coprocessor): Check architecture and extension masks.
Print a hexadecimal version of any decimal constant that is
outside of the range of -16 to +32.
(print_arm_address): Add a return value of the offset used in the
adress, if it is worth printing a hexadecimal version of it.
(print_insn_neon): Print a hexadecimal version of any decimal
constant that is outside of the range of -16 to +32.
(print_insn_arm): Likewise.
(print_insn_thumb16): Likewise.
(print_insn_thumb32): Likewise.
PR 10297
* arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
of an undefined instruction.
(arm_opcodes): Use it.
(thumb_opcod): Use it.
(thumb32_opc): Use it.
Update expected disassembly regrexps in GAS and LD testsuites.
(implicit_it_mode): New global.
(it_instruction_type): New enum.
(arm_parse_it_mode): New function.
(arm_long_opts): New option added.
(arm_it): New field.
(it_state): New enum.
(now_it): New macro.
(check_it_blocks_finished): New function.
(insns[]): Use the IT Thumb opcodes for ARM too.
(arm_cleanup): Call check_it_blocks_finished.
(now_it_compatible): New function.
(conditional_insn): New function.
(set_it_insn_type): New macro.
(set_it_insn_type_last): New macro.
(do_it): Call automatic IT machinery functions.
(do_t_add_sub): Likewise
(do_t_arit3): Likewise.
(do_t_arit3c): Likewise.
(do_t_blx): Likewise.
(do_t_branch): Likewise.
(do_t_bkpt): Likewise.
(do_t_branch23): Likewise.
(do_t_bx): Likewise.
(do_t_bxj): Likewise.
(do_t_cps): Likewise.
(do_t_cpsi): Likewise.
(do_t_cbz): Likewise.
(do_t_it): Likewise.
(encode_thumb2_ldmstm): Likewise.
(do_t_ldst): Likewise.
(do_t_mov_cmp): Likewise.
(do_t_mvn_tst): Likewise.
(do_t_mul): Likewise.
(do_t_neg): Likewise.
(do_t_setend): Likewise.
(do_t_shift): Likewise.
(do_t_tb): Likewise.
(output_it_inst): New function.
(new_automatic_it_block): New function.
(close_automatic_it_block): New function.
(now_it_add_mask): New function.
(it_fsm_pre_encode): New function.
(handle_it_state): New function.
(it_fsm_post_encode): New function.
(force_automatic_it_block_close): New function.
(in_it_block): New function.
(md_assemble): Call automatic IT block machinery functions.
(arm_frob_label): Likewise.
(arm_opts): New element.
* config/tc-arm.h (it_state): New enum.
(current_it): New struct.
(arm_segment_info_type): New member added.
* doc/c-arm.texi: New option -mimplicit-it documented.
* gas/arm/arm-it-auto.d: New test.
* gas/arm/arm-it-auto.s: New file.
* gas/arm/arm-it-auto-2.d: New test case.
* gas/arm/arm-it-auto-2.s: New file.
* gas/arm/arm-it-auto-3.d: New test case.
* gas/arm/arm-it-auto-3.s: New file.
* gas/arm/arm-it-bad.d: New test case.
* gas/arm/arm-it-bad.l: New file.
* gas/arm/arm-it-bad.s: New file.
* gas/arm/arm-it-bad-2.d: New test case.
* gas/arm/arm-it-bad-2.l: New file.
* gas/arm/arm-it-bad-2.s: New file.
* gas/arm/arm-it-bad-3.d: New test case.
* gas/arm/arm-it-bad-3.l: New file.
* gas/arm/arm-it-bad-3.s: New file.
* gas/arm/thumb2_it_auto.d: New test.
* gas/arm/thumb2_it_bad.l: Error message updated.
* gas/arm/thumb2_it_bad_auto.d: New test.
* gas/arm/thumb2_it.d: Comment added.
* gas/arm/thumb2_it_bad.d: Comment added.
* gas/tc-arm.c (do_t_ssat): Move common code from here...
(do_t_usat): ... and here to...
(do_t_ssat_usat): New function: ... here. Add code to check that
the shift value, if present, is in range.
* gas/arm/thumb2_bad_reg.s: Add tests for SSAT and USAT with an
out of range shift.
* gas/arm/thumb2_bad_reg.l: Update expected error messages.
* arm-dis.c (print_insn_coprocessor): Check that a user specified
ARM architecture supports the matched instruction.
(print_insn_arm): Likewise.
(select_arm_features): New function. Fills in the fields of an
arm_feature_set structure based on a given arm machine number.
(print_insn): Initialise an arm_feature_set structure.
* objdump.c (disassemble_bytes): Set the
USER_SPECIFIED_MACHINE_TYPE flag in the disassemble_info structure
if the user has invoked the -m switch.
* doc/binutils.texi: Document the additional behaviour of
objdump's -m switch for ARM targets.
* dis-asm.h (USER_SPECIFIED_MACHINE_TYPE): New value for the flags
field of struct disassemble_info.
* gas/arm/align.s: Add labels so that COFF based targets can
correctly locate THUMB code.
* gas/arm/copro.d: Do not pass --architecture switch to objdump.
* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
instruction.
* gas/arm/thumb32.d: Fix expected binary value of SEV.W instruction.
* config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W
instruction.
* config/tc-mips.c (nops_for_vr4130): Don't check noreorder_p.
(nops_for_insn): Likewise.
gas/testsuite/
* gas/mips/vr4130.s, gas/mips/vr4130.d: Expect part A to have nops.
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* cofflink.c (process_embedded_commands): Ignore "-aligncomm".
==> gas/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* NEWS: Mention new feature.
* config/obj-coff.c (obj_coff_common_parse): New function.
(obj_coff_comm): Likewise.
(coff_pseudo_table): Override default ".comm" definition on PE.
* doc/as.texinfo: Document new feature.
==> gas/testsuite/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* gas/pe/: New directory for PE format-specific tests.
* gas/pe/aligncomm-a.d: New test pattern file.
* gas/pe/aligncomm-a.s: New test source file.
* gas/pe/aligncomm-b.d: New test pattern file.
* gas/pe/aligncomm-b.s: New test source file.
* gas/pe/aligncomm-c.d: New test pattern file.
* gas/pe/aligncomm-c.s: New test source file.
* gas/pe/aligncomm-d.d: New test pattern file.
* gas/pe/aligncomm-d.s: New test source file.
* gas/pe/pe.exp: New test control script.
* lib/gas-defs.exp (is_pecoff_format): New function.
==> ld/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* NEWS: Mention new feature.
* deffile.h (def_file_aligncomm): Add new struct definition.
(def_file): Add new def_file_aligncomm member.
* deffilep.y (%token): Add new ALIGNCOMM token.
(command): Add production rule for ALIGNCOMM.
(def_file_free): Free any chained def_file_aligncomm structs.
(diropts[]): Add entry for '-aligncomm' .drectve command.
(def_aligncomm): New grammar function.
* ld.texinfo: Document new feature.
* pe-dll.c (process_def_file): Rename from this ...
(process_def_file_and_drectve): ... to this, updating all callers,
and process any aligncomms chained to the def file after scanning
all .drectve sections.
(generate_edata): Updated to match.
(pe_dll_build_sections): Likewise.
==> ld/testsuite/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* ld-pe/aligncomm-1.c: New test source file.
* ld-pe/aligncomm-2.c: Likewise.
* ld-pe/aligncomm-3.c: Likewise.
* ld-pe/aligncomm-4.c: Likewise.
* ld-pe/aligncomm.d: New test pattern file.
* ld-pe/direct.exp: Deleted, and content moved into ...
* ld-pe/pe-run.exp: ... New common file for all PE run tests.
* ld-pe/vers-script.exp: Deleted, and content merged into ...
* ld-pe/pe-compile.exp: ... New common file for PE tests needing
a compiler, adding aligned common tests.
* ld-pe/pe.exp: Update header comment.
* config/tc-armeabi.h (FPU_DEFAULT): Likewise.
* config/tc-arm.c (md_begin): If FPU_DEFAULT is set, don't infer
the default FPU from the processor.
testsuite/
* gas/arm/attr-mcpu.d: Add -mfpu=neon.
* gas/arm/mapmisc.d: Correct expected output for .double and
.dcb.d.
2009-04-15 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (process_operands): Print operands in
correct order depending on intel_syntax.
gas/testsuite/
2009-04-15 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.e: Adjust expectations.
* ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
"tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
Reorder entries so the extended mnemonics are listed before tlbilx.
gas/testsuite/
* gas/ppc/e500mc.d: Update to match extended mnemonics.
gas/
* config/tc-arm.c (md_apply_fix): Check BFD_RELOC_ARM_IMMEDIATE and
BFD_RELOC_ARM_ADRL_IMMEDIATE value is in the correct section.
Check BFD_RELOC_ARM_ADRL_IMMEDIATE has a defined symbol.
gas/testsuites/
* gas/arm/adr-invalid.d: New file.
* gas/arm/adr-invalid.l: New file.
* gas/arm/adr-invalid.s: New file.
(do_t_mov_cmp): Permit R13 as the second
argument to "cmp.n".
* gas/arm/thumb2_bad_reg.s: Update to allow R13 as second argument
for CMP.
* gas/arm/thumb2_bad_reg.l: Adjust accordingly.
* gas/ppc/e500mc.d ("lfdepx", "stfdepx"): Fix tests to expect a
floating point register.
opcodes/
* ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
operand to be a float point register (FRT/FRS).
* mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
dmfc2 and dmtc2 before the architecture-level variants.
gas/testsuite/
* gas/mips/octeon.s: Add more tests for dmfc2 and dmtc2.
* gas/mips/octeon.d: Update.
* gas/mips/octeon-ill.l: Update error message.
* gas/ppc/booke.s ("dcbt", "dcbtst"): New tests.
* gas/ppc/booke.d: Likewise.
* gas/ppc/power4_32.s: Likewise.
* gas/ppc/power4_32.d: Likewise.
opcodes/
* ppc-opc.c: Update copyright year.
(powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
ordering for POWER4 and later and use the correct Server ordering.
2009-01-29 Paul Brook <paul@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
* config/tc-arm.c (do_t_mul): In Thumb-2 mode, use 16-bit encoding
of MUL when possible.
gas/testsuite:
2009-01-29 Paul Brook <paul@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
* gas/arm/thumb2_mul.s: New file.
* gas/arm/thumb2_mul.d: Likewise.
* gas/arm/thumb2_mul-bad.s: Likewise.
* gas/arm/thumb2_mul-bad.d: Likewise.
* gas/arm/thumb2_mul-bad.l: Likewise.
* gas/arm/t16-bad.s: Add tests for"mul" with high registers.
* gas/arm/t16-bad.l: Update accordingly.
* gas/all/gas.exp: Expect forward test to fail for MeP.
Expect relax test to fail for MeP.
* gas/mep/relocs.d: Update expected disassembly.
* lib/ld-lib.exp (check_gc_sections_available): Add MeP to list of
targets which do not support garbage collection.
* ld-srec/srec.exp (run_srec_test): Expect tests to fail for MeP.
* ld-elf/group8a.d: Likewise.
* ld-elf/group8b.d: Likewise.
* ld-elf/group9a.d: Likewise.
* ld-elf/group9b.d: Likewise.
* binutils-all/objdump.W: Do not assume that high and low PC
addresses will have been computed.
sequence containing an unsupported reloc type.
(enum options): Replace computed #define's constants for option
numbers with this enum.
(struct md_longopts): Use the enum. Allow OPTION_32 in a non-ELF
environment.
(md_parse_option): Allow -32 in a non-ELF environment.
* gas/lib/gas-defs.exp: Update description of run_dump_test proc.
* gas/mips/dli.d: Pass -64 to gas.
* gas/mips/mips64-mips3d-incl.d: Likewise.
* gas/mips/octeon.d: Likewise.
* gas/mips/sb1-ext-mdmx.d: Likewise.
* gas/mips/sb1-ext-ps.d: Likewise.
* gas/mips/e32el-rel2.s: Pass -march=mips3 to gas.
Update expected relocs.
* gas/mips/ld-ilocks-addr32.d: Do not run for tx39 targets.
* gas/mips/mips.exp: Remove 'ilocks' variable.
Add ecoff targets to 'addr32' variable.
Set 'no_mips16' for ecoff targets.
Do not run div-ilocks or mul-ilocks test variants.
* gas/mips/mips16-intermix.d: Use nm instead of objdump so that
the symbol table output is sorted. Update expecetd output.
gas/
* config/tc-arm.c (attributes_set_explicitly): New array.
(s_arm_eabi_attribute): Check return value from s_vendor_attribute.
(cpu_arch): Add ARM_ARCH_V5T.
(aeabi_set_attribute_int): New function.
(aeabi_set_attribute_string): New function.
(aeabi_set_public_attributes): Set attributes according to the user's
intentions, rather than the actual state of the binary.
Use aeabi_set_attribute_int and aeabi_set_attribute_string instead of
bfd_elf_add_proc_attr_int and bfd_elf_add_proc_attr_string.
Support WMMXv2. Use attribute names instead of numbers.
* read.c (s_vendor_attribute): Change return type to int.
Return the tag number that was set.
* read.h (s_vendor_attribute): Change return type to int.
gas/testsuite/
* gas/arm/attr-cpu-directive.d: New file.
* gas/arm/attr-cpu-directive.s: New file.
* gas/arm/attr-default.d: New file.
* gas/arm/attr-march-all.d: New file.
* gas/arm/attr-march-armv1.d: New file.
* gas/arm/attr-march-armv2.d: New file.
* gas/arm/attr-march-armv2a.d: New file.
* gas/arm/attr-march-armv2s.d: New file.
* gas/arm/attr-march-armv3.d: New file.
* gas/arm/attr-march-armv3m.d: New file.
* gas/arm/attr-march-armv4.d: New file.
* gas/arm/attr-march-armv4t.d: New file.
* gas/arm/attr-march-armv4txm.d: New file.
* gas/arm/attr-march-armv4xm.d: New file.
* gas/arm/attr-march-armv5.d: New file.
* gas/arm/attr-march-armv5t.d: New file.
* gas/arm/attr-march-armv5te.d: New file.
* gas/arm/attr-march-armv5tej.d: New file.
* gas/arm/attr-march-armv5texp.d: New file.
* gas/arm/attr-march-armv5txm.d: New file.
* gas/arm/attr-march-armv6-m.d: New file.
* gas/arm/attr-march-armv6.d: New file.
* gas/arm/attr-march-armv6j.d: New file.
* gas/arm/attr-march-armv6k.d: New file.
* gas/arm/attr-march-armv6kt2.d: New file.
* gas/arm/attr-march-armv6t2.d: New file.
* gas/arm/attr-march-armv6z.d: New file.
* gas/arm/attr-march-armv6zk.d: New file.
* gas/arm/attr-march-armv6zkt2.d: New file.
* gas/arm/attr-march-armv6zt2.d: New file.
* gas/arm/attr-march-armv7-a.d: New file.
* gas/arm/attr-march-armv7-m.d: New file.
* gas/arm/attr-march-armv7-r.d: New file.
* gas/arm/attr-march-armv7.d: New file.
* gas/arm/attr-march-armv7a.d: New file.
* gas/arm/attr-march-armv7m.d: New file.
* gas/arm/attr-march-armv7r.d: New file.
* gas/arm/attr-march-iwmmxt.d: New file.
* gas/arm/attr-march-iwmmxt2.d: New file.
* gas/arm/attr-march-xscale.d: New file.
* gas/arm/attr-mcpu.d: New file.
* gas/arm/attr-mfpu-arm1020e.d: New file.
* gas/arm/attr-mfpu-arm1020t.d: New file.
* gas/arm/attr-mfpu-arm1136jf-s.d: New file.
* gas/arm/attr-mfpu-arm1136jfs.d: New file.
* gas/arm/attr-mfpu-arm7500fe.d: New file.
* gas/arm/attr-mfpu-fpa.d: New file.
* gas/arm/attr-mfpu-fpa10.d: New file.
* gas/arm/attr-mfpu-fpa11.d: New file.
* gas/arm/attr-mfpu-fpe.d: New file.
* gas/arm/attr-mfpu-fpe2.d: New file.
* gas/arm/attr-mfpu-fpe3.d: New file.
* gas/arm/attr-mfpu-maverick.d: New file.
* gas/arm/attr-mfpu-neon-fp16.d: New file.
* gas/arm/attr-mfpu-neon.d: New file.
* gas/arm/attr-mfpu-softfpa.d: New file.
* gas/arm/attr-mfpu-softvfp+vfp.d: New file.
* gas/arm/attr-mfpu-softvfp.d: New file.
* gas/arm/attr-mfpu-vfp.d: New file.
* gas/arm/attr-mfpu-vfp10-r0.d: New file.
* gas/arm/attr-mfpu-vfp10.d: New file.
* gas/arm/attr-mfpu-vfp3.d: New file.
* gas/arm/attr-mfpu-vfp9.d: New file.
* gas/arm/attr-mfpu-vfpv2.d: New file.
* gas/arm/attr-mfpu-vfpv3-d16.d: New file.
* gas/arm/attr-mfpu-vfpv3.d: New file.
* gas/arm/attr-mfpu-vfpxd.d: New file.
* gas/arm/attr-order.d: Update Tag_ARM_ISA_use and Tag_THUMB_ISA_use.
* gas/arm/attr-override-cpu-directive.d: New file.
* gas/arm/attr-override-cpu-directive.s: New file.
* gas/arm/attr-override-mcpu.d: New file.
* gas/arm/attr-override-mcpu.s: New file.
* gas/arm/blank.s: New file.
* gas/arm/eabi_attr_1.d: Update Tag_ARM_ISA_use and Tag_THUMB_ISA_use.
ld/testsuite/
* ld-arm/attr-merge-3.attr: Update following gas change.
* ld-arm/attr-merge-2.attr: Update Tag_ARM_ISA_use and
Tag_THUMB_ISA_use following gas changes.
* ld-arm/attr-merge-4.attr: Likewise.
* ld-arm/attr-merge-5.attr: Likewise.
* ld-arm/attr-merge-arch-1.attr: Likewise.
* ld-arm/attr-merge-arch-2.attr: Likewise.
* ld-arm/attr-merge-unknown-2.d: Likewise.
* ld-arm/attr-merge-unknown-2r.d: Likewise.
* ld-arm/attr-merge-unknown-3.d: Likewise.
* ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-00.d: Likewise.
* ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-02.d: Likewise.
* ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-04.d: Likewise.
* ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-20.d: Likewise.
* ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-22.d: Likewise.
* ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-40.d: Likewise.
* ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-44.d: Likewise.
* ld-arm/attr-merge.attr: Likewise.
Daniel Jacobowitz <dan@codesourcery.com>
gas/
* config/tc-arm.c (arm_copy_symbol_attributes): New function.
* config/tc-arm.h (arm_copy_symbol_attributes): New prototype.
(CONVERT_SYMBOLIC_ATTRIBUTE): New define.
* read.c (s_vendor_attribute): Add support for symbolic tag names.
Improve string parser.
* doc/c-arm.texi (ARM Machine Directives): Document
.eabi_attribute symbolic tag names.
gas/testsuite/
* gas/arm/attr-syntax.d: New file.
* gas/arm/attr-syntax.s: New file.
* ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
* ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
operand form and enable the four operand form for POWER6 and later.
<mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
three operand form for POWER6 and later.
gas/testsuite/
* gas/ppc/power6.s ("mtfsf", "mtfsf.", "mtfsfi", "mtfsfi."): Add tests.
* gas/ppc/power6.d: Likewise.
* common.h (STT_IFUNC): Define.
elfcpp/
* elfcpp.h (enum STT): Add STT_IFUNC.
bfd/
* syms.c (struct bfd_symbol): Add new flag BSF_INDIRECT_FUNCTION.
Remove redundant flag BFD_FORT_COMM_DEFAULT_VALUE. Renumber flags
to remove gaps.
(bfd_print_symbol_vandf): Return 'i' for BSF_INDIRECT_FUNCTION.
(bfd_decode_symclass): Likewise.
* elf.c (swap_out_syms): Translate BSF_INDIRECT_FUNCTION into
STT_IFUNC.
(elf_find_function): Treat STT_IFUNC in the same way as STT_FUNC.
(_bfd_elf_is_function_type): Likewise.
* elf32-arm.c (arm_elf_find_function): Likewise.
(elf32_arm_adjust_dynamic_symbol): Likewise.
(elf32_arm_swap_symbol_in): Likewise.
(elf32_arm_additional_program_headers): Likewise.
* elf32-i386.c (is_indirect_symbol): New function.
(elf_i386_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf_i386_relocate_section): Likewise.
* elf64-x86-64.c (is_indirect_symbol): New function.
(elf64_x86_64_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf64_x86_64_relocate_section): Likewise.
* elfcode.h (elf_slurp_symbol_table): Translate STT_IFUNC into
BSF_INDIRECT_FUNCTION.
* elflink.c (_bfd_elf_adjust_dynamic_reloc_section): Add support
for STT_IFUNC symbols.
(get_ifunc_reloc_section_name): New function.
(_bfd_elf_make_ifunc_reloc_section): New function.
* elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs field.
* bfd-in2.h: Regenerate.
gas/
* config/obj-elf.c (obj_elf_type): Add support for STT_IFUNC type.
* doc/as.texinfo: Document new feature.
* NEWS: Mention new feature.
gas/testsuite/
* gas/elf/type.s: Add test of STT_IFUNC symbol type.
* gas/elf/type.e: Update expected disassembly.
* gas/elf/elf.exp: Update grep of symbol types.
ld/
* NEWS: Mention new feature.
* pe-dll.c (process_def_file): Replace use of redundant
BFD_FORT_COMM_DEFAULT_VALUE with 0.
* scripttempl/elf.sc: Add .rel.ifunc.dyn and .rela.ifunc.dyn
sections.
ld/testsuite/
* ld-mips-elf/reloc-1-n32.d: Updated expected output for reloc
descriptions.
* ld-mips-elf/reloc-1-n64.d: Likewise.
* ld-i386/ifunc.d: New test.
* ld-i386/ifunc.s: Source file for the new test.
* ld-i386/i386.exp: Run the new test.
for FP instructions.
testsuite/
* gas/mips/mips1-fp.s, testsuite/gas/mips/mips1-fp.d,
testsuite/gas/mips/mips1-fp.l: New tests.
* gas/mips/mips.exp: Run them.
* config/tc-xtensa.c (xtensa_j_opcode): New.
(xg_instruction_matches_option_term): Handle "FREEREG" option.
(xg_build_to_insn): Likewise. Update renamed tls_reloc reference.
(md_begin): Initialize xtensa_j_opcode.
(md_assemble): Update renamed tls_reloc reference. Handle "j.l".
(xg_assemble_vliw_tokens): Save free_reg info in the frag.
(tinsn_immed_from_frag): Get free_reg info back out of the frag.
(vinsn_to_insnbuf): Update renamed tls_reloc references.
Distinguish extra argument for "FREEREG" from extra TLS argument.
* config/tc-xtensa.h (struct xtensa_frag_type): Add free_reg field.
* config/xtensa-istack.h (struct tinsn_struct): Rename tls_reloc
field to extra_arg.
* config/xtensa-relax.c (widen_spec_list): Add rules to relax "j.l".
(build_transition): Handle "FREEREG" operand.
* config/xtensa-relax.h (enum op_type): Add OP_FREEREG.
2008-11-04 Bob Wilson <bob.wilson@acm.org>
* gas/xtensa/all.exp: Run jlong test.
* gas/xtensa/jlong.d: New.
* gas/xtensa/jlong.s: New.
* config/tc-mips.h (DWARF2_FDE_RELOC_SIZE): Define.
gas/testsuite/
* gas/mips/cfi-n64-1.s, gas/mips/cfi-n64-1.d: New test.
* gas/mips/mips.exp: Run it.
2008-08-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_assemble): Force number of displacement
operands to zero when processing string instruction.
(i386_index_check): Special-case string instruction operands. Don't
fudge address prefix if there already was a memory operand. Fix
error message to correctly reflect the addressing mode used.
(i386_att_operand): Fix comment.
(i386_intel_operand): Snapshot, clear, and restore base and index
reg for each operand processed. Increment count of memory operands
later.
gas/testsuite/
2008-08-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/string-bad.{l,s}, gas/i386/string-ok.{d,e,s}: New.
* gas/i386/i386.exp: Run new tests.
for DW_CFA_offset_extended_sf results. Allow for differing nops.
* gas/cfi/cfi-hppa-1.d: Invert data alignment sign. Change
offsets to match 64-bit offsets.
* gas/cfi/cfi.exp: Don't run common tests on hppa64.
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
(elf_mips_copy_howto): ...this howto. Clear the size fields.
(mips_vxworks_jump_slot_howto_rela): Replace with...
(elf_mips_jump_slot_howto): ...this howto.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_plt_readonly): Define.
(elf_backend_plt_sym_val): Define for non-VxWorks targets.
(mips_vxworks_bfd_reloc_type_lookup): Delete.
(mips_vxworks_bfd_reloc_name_lookup): Likewise.
(mips_vxworks_rtype_to_howto): Likewise.
(elf_backend_want_dynbss): Don't define for VxWorks.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_got_symbol_offset): Don't define.
* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
* elfxx-mips.c (mips_elf_la25_stub): New structure.
(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
and "has_nonpic_branches" fields. Remove "is_relocation_target" and
"is_branch_target".
(mips_elf_link_hash_table): Add blank lines. Add
"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
"la25_stubs" and "add_stub_section" fields.
(mips_htab_traverse_info): New structure.
(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
(MIPS_RESERVED_GOTNO): Delete.
(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
(mips_elf_link_hash_newfunc): Update after the changes to
mips_elf_link_hash_entry.
(mips_elf_check_mips16_stubs): Replace the DATA parameter with
an INFO parameter. Don't look through warnings symbols here;
do it in mips_elf_check_symbols instead.
(mips_elf_create_stub_symbol): New function.
(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
(mips_elf_gotplt_index): Check for VxWorks.
(mips_elf_output_dynamic_relocation): Take the relocation index
as an extra parameter. Do not increment reloc_count here.
(mips_elf_initialize_tls_slots): Update the calls to
mips_elf_output_dynamic_relocation accordingly.
(mips_elf_multi_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Don't allocate reserved GOT
entries here. Unconditionally create .got.plt, but don't
set its alignment here.
(mips_elf_relocation_needs_la25_stub): New function.
(mips_elf_calculate_relocation): Redirect branches and jumps to
a non-PIC stub if one exists. Check !h->has_static_relocs instead
of !htab->is_vxworks when deciding whether to create dynamic
relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
_bfd_elf_create_dynamic_sections. Unconditionally set up
htab->splt and htab->sdynbss. Set htab->srelplt to ".rel.plt"
if !htab->is_vxworks. Add non-VxWorks values of
htab->plt_header_size and htab->plt_entry_size.
(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
non-branch static relocations. Set has_nonpic_branches when an la25
stub might be required. Set can_make_dynamic_p to TRUE if R_MIPS_32,
R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
rather than duplicating the condition. Do not make them dynamic
for read-only sections in non-PIC executable objects.
Do not protect this code with dynobj == NULL || htab->sgot == NULL;
handle each group of cases separately. Add a default case that
sets has_static_relocs for non-GOT relocations that cannot be
made dynamic. Don't set is_relocation_target and is_branch_target.
Reject non-PIC static relocations in shared objects.
(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
htab->use_plts_and_copy_relocs instead of htab->is_vxworks
to select PLT and copy-reloc handling. Set the alignment of
.plt and .got.plt when allocating the first entry. Generalize
code to handle REL as well as RELA sections and 64-bit as well as
32-bit GOT entries. Complain if we find a static-only reloc
against an externally-defined symbol and if we cannot create
dynamic relocations for it. Allocate copy relocs using
mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
Skip reserved .got.plt entries.
(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
instead of mips_elf_check_mips16_stubs to process each symbol.
Do the traversal for relocatable objects too.
(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
is empty. Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
to non-VxWorks targets. Only add DT_REL{,A}, DT_REL{,A}SZ and
DT_REL{,A}ENT if .rel.dyn is nonempty. Create a symbol for the
PLT. Allocate a nop at the end of the PLT. Allocate DT_MIPS_PLTGOT.
(mips_elf_create_la25_stub_info): New function.
(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
and copy relocs where necessary. Check pointer_equality_needed.
(mips_finish_exec_plt): New function.
(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
to the beginning of htab->sgot. Use htab->reserved_gotno instead
of MIPS_RESERVED_GOTNO. Assert htab->use_plts_and_copy_relocs
instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
Use mips_finish_exec_plt to create non-VxWorks PLT headers. Set
DT_MIPS_PLTGOT.
(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
from the indirect symbol to the direct symbol. Also copy
has_nonpic_branches for indirect symbols.
(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
DT_MIPS_RWPLT.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): Set
use_plts_and_copy_relocs to TRUE. Use TRUE rather than 1
when setting is_vxworks.
(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
each la25_stub.
(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
as PIC. Generalize message about linking PIC and non-PIC.
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
functions.
* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
* bfd-in2.h: Regenerated.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
STO_MIPS_PIC.
(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
(dump_relocations, debug_apply_relocations): Don't handle it here.
(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
(print_mips_pltgot_entry): New function.
(process_mips_specific): Dump the PLT GOT.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
(md_longopts): Add -call_nonpic.
(md_parse_option): Handle OPTION_CALL_NONPIC.
(md_show_usage): Add -call_nonpic.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
* gas/mips/mips.exp: Run it.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
two variables.
* emulparams/elf32bmipn32-defs.sh: Likewise.
* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
(is_mips_elf): New macro.
(stub_file, stub_bfd): New variables.
(hook_stub_info): New structure.
(hook_in_stub): New function.
(mips_add_stub_section): Likewise.
(mips_create_output_section_statements): Likewise.
(mips_before_allocation): Likewise.
(real_func): New variable.
(mips_for_each_input_file_wrapper): New function.
(mips_lang_for_each_input_file): Likewise.
(lang_for_each_input_file): Define.
(LDEMUL_BEFORE_ALLOCATION): Likewise.
(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* ld-mips-elf/mips16-pic-3a.s,
ld-mips-elf/mips16-pic-3b.s,
ld-mips-elf/mips16-pic-3.dd,
ld-mips-elf/mips16-pic-3.gd,
ld-mips-elf/mips16-pic-3.rd,
ld-mips-elf/mips16-pic-3.inc,
ld-mips-elf/pic-and-nonpic-1a.s,
ld-mips-elf/pic-and-nonpic-1b.s,
ld-mips-elf/pic-and-nonpic-1.ld,
ld-mips-elf/pic-and-nonpic-1.dd,
ld-mips-elf/pic-and-nonpic-1.nd,
ld-mips-elf/pic-and-nonpic-1-rel.dd,
ld-mips-elf/pic-and-nonpic-1-rel.nd,
ld-mips-elf/pic-and-nonpic-2a.s,
ld-mips-elf/pic-and-nonpic-2b.s,
ld-mips-elf/pic-and-nonpic-2.d,
ld-mips-elf/pic-and-nonpic-3a.s,
ld-mips-elf/pic-and-nonpic-3a.ld,
ld-mips-elf/pic-and-nonpic-3a.dd,
ld-mips-elf/pic-and-nonpic-3a.gd,
ld-mips-elf/pic-and-nonpic-3a.sd,
ld-mips-elf/pic-and-nonpic-3b.s,
ld-mips-elf/pic-and-nonpic-3b.ld,
ld-mips-elf/pic-and-nonpic-3b.ad,
ld-mips-elf/pic-and-nonpic-3b.dd,
ld-mips-elf/pic-and-nonpic-3b.gd,
ld-mips-elf/pic-and-nonpic-3b.nd,
ld-mips-elf/pic-and-nonpic-3b.pd,
ld-mips-elf/pic-and-nonpic-3b.rd,
ld-mips-elf/pic-and-nonpic-3b.sd,
ld-mips-elf/pic-and-nonpic-3-error.d,
ld-mips-elf/pic-and-nonpic-4a.s,
ld-mips-elf/pic-and-nonpic-4b.s,
ld-mips-elf/pic-and-nonpic-4b.ld,
ld-mips-elf/pic-and-nonpic-4b.ad,
ld-mips-elf/pic-and-nonpic-4b.dd,
ld-mips-elf/pic-and-nonpic-4b.gd,
ld-mips-elf/pic-and-nonpic-4b.nd,
ld-mips-elf/pic-and-nonpic-4b.rd,
ld-mips-elf/pic-and-nonpic-4b.sd,
ld-mips-elf/pic-and-nonpic-4-error.d,
ld-mips-elf/pic-and-nonpic-5a.s,
ld-mips-elf/pic-and-nonpic-5b.s,
ld-mips-elf/pic-and-nonpic-5b.ld,
ld-mips-elf/pic-and-nonpic-5b.ad,
ld-mips-elf/pic-and-nonpic-5b.dd,
ld-mips-elf/pic-and-nonpic-5b.gd,
ld-mips-elf/pic-and-nonpic-5b.nd,
ld-mips-elf/pic-and-nonpic-5b.rd,
ld-mips-elf/pic-and-nonpic-5b.sd,
ld-mips-elf/pic-and-nonpic-5b.pd,
ld-mips-elf/pic-and-nonpic-6.ld,
ld-mips-elf/pic-and-nonpic-6-o32a.s,
ld-mips-elf/pic-and-nonpic-6-o32b.s,
ld-mips-elf/pic-and-nonpic-6-o32c.s,
ld-mips-elf/pic-and-nonpic-6-o32.ad,
ld-mips-elf/pic-and-nonpic-6-o32.dd,
ld-mips-elf/pic-and-nonpic-6-o32.gd,
ld-mips-elf/pic-and-nonpic-6-o32.nd,
ld-mips-elf/pic-and-nonpic-6-o32.pd,
ld-mips-elf/pic-and-nonpic-6-o32.rd,
ld-mips-elf/pic-and-nonpic-6-o32.sd,
ld-mips-elf/pic-and-nonpic-6-n32a.s,
ld-mips-elf/pic-and-nonpic-6-n32b.s,
ld-mips-elf/pic-and-nonpic-6-n32c.s,
ld-mips-elf/pic-and-nonpic-6-n32.ad,
ld-mips-elf/pic-and-nonpic-6-n32.dd,
ld-mips-elf/pic-and-nonpic-6-n32.gd,
ld-mips-elf/pic-and-nonpic-6-n32.nd,
ld-mips-elf/pic-and-nonpic-6-n32.pd,
ld-mips-elf/pic-and-nonpic-6-n32.rd,
ld-mips-elf/pic-and-nonpic-6-n32.sd,
ld-mips-elf/pic-and-nonpic-6-n64a.s,
ld-mips-elf/pic-and-nonpic-6-n64b.s,
ld-mips-elf/pic-and-nonpic-6-n64c.s,
ld-mips-elf/pic-and-nonpic-6-n64.ad,
ld-mips-elf/pic-and-nonpic-6-n64.dd,
ld-mips-elf/pic-and-nonpic-6-n64.gd,
ld-mips-elf/pic-and-nonpic-6-n64.nd,
ld-mips-elf/pic-and-nonpic-6-n64.pd,
ld-mips-elf/pic-and-nonpic-6-n64.rd,
ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
