Since not all ELF targets support -shared, we limit ld-elf/strtab to
linux and gnu targets.
* ld-elf/strtab.d: Only run on *-*-linux* and *-*-gnu* targets.
This patch uses ELF strtab with GC and suffix merging support to create
ELF .strtab section. There is some small memory overhead to use ELF
strtab:
==14928== HEAP SUMMARY:
==14928== in use at exit: 3,276,318 bytes in 679 blocks
==14928== total heap usage: 1,544 allocs, 865 frees, 15,259,146 bytes allocated
vs.
==14936== HEAP SUMMARY:
==14936== in use at exit: 3,276,318 bytes in 679 blocks
==14936== total heap usage: 1,532 allocs, 853 frees, 15,026,402 bytes allocated
when running:
./ld-new -m elf_x86_64 -o tmpdir/ld-partial.o -r ldgram.o ldlex-wrapper.o lexsup.o ldlang.o mri.o ldctor.o ldmain.o plugin.o ldwrite.o ldexp.o ldemul.o ldver.o ldmisc.o ldfile.o ldcref.o eelf_x86_64.o eelf32_x86_64.o eelf_i386.o eelf_iamcu.o ei386linux.o eelf_l1om.o eelf_k1om.o ldbuildid.o
The results are
[32] .strtab STRTAB 0+ 3beff8 00407a 00 0 0 1
vs
[32] .strtab STRTAB 0+ 3beff8 0041d8 00 0 0 1
It reduces the .strtab size by 350 bytes, about 2%
Saving on libc.so from glibc is much more since libc.so has many alias
symbols with the same suffix. For x32 glibc,
[82] .strtab STRTAB 0+ 81b348 0159e7 00 0 0 1
vs
[82] .strtab STRTAB 0+ 81b8bc 019e72 00 0 0 1
It reduces the .strtab size by 17547 bytes, about 16%.
bfd/
PR gas/18451
* elf-bfd.h (elf_sym_strtab): New.
(elf_link_hash_table): Add strtabcount, strtabsize and
strtab.
(_bfd_elf_stringtab_init): Removed.
* elf.c (_bfd_elf_stringtab_init): Removed.
(_bfd_elf_compute_section_file_positions): Replace
bfd_strtab_hash/_bfd_elf_stringtab_init/_bfd_stringtab_free/
_bfd_stringtab_size with
elf_strtab_hash/_bfd_elf_strtab_init/_bfd_elf_strtab_free/
_bfd_elf_strtab_size. Use _bfd_elf_strtab_add,
_bfd_elf_strtab_finalize and _bfd_elf_strtab_offset to get
st_name.
(swap_out_syms): Likewise.
* elflink.c (elf_final_link_info): Replace bfd_strtab_hash
with elf_strtab_hash. Remove symbuf, symbuf_count,
symbuf_size and shndxbuf_size.
(elf_link_flush_output_syms): Removed.
(elf_link_output_sym): Renamed to ...
(elf_link_output_symstrtab): This. Replace _bfd_stringtab_add
with _bfd_elf_strtab_add. Don't flush symbols to the file nor
swap out symbols.
(elf_link_swap_symbols_out): New.
(elf_link_output_extsym): Replace elf_link_output_sym with
elf_link_output_symstrtab.
(elf_link_input_bfd): Likewise.
(elf_final_link_free): Replace _bfd_stringtab_free with
_bfd_elf_strtab_free. Remove symbuf.
(bfd_elf_final_link): Replace _bfd_elf_stringtab_init with
_bfd_elf_strtab_init. Don't set symbuf, symbuf_count,
symbuf_size nor shndxbuf_size. Initialize strtabsize and
strtab. Initialize symshndxbuf to -1 when number of sections
>= 64K. Replace elf_link_output_sym/elf_link_output_sym with
elf_link_output_symstrtab/elf_link_output_symstrtab. Don't
call elf_link_flush_output_syms. Call _bfd_elf_strtab_finalize
and elf_link_swap_symbols_out. Replace _bfd_stringtab_size
and _bfd_stringtab_emit with _bfd_elf_strtab_size and
_bfd_elf_strtab_emit.
gas/testsuite/
PR gas/18451
* gas/elf/elf.exp: Run strtab.
* gas/elf/strtab.d: New file.
* gas/elf/strtab.s: Likewise.
ld/testsuite/
PR gas/18451
* ld-elf/strtab.d: New file.
* ld-elf/strtab.s: Likewise.
Since the .plt section and DT_PLTGOT are used by prelink to undo
prelinking for dynamic relocations, we must keep them even if there is
no PLT relocation. This patch reverted commit a3747075a.
bfd/
* elf32-i386.c (elf_i386_allocate_dynrelocs): Always allocate
space for the first .plt entry.
(elf_i386_size_dynamic_sections): Always add DT_PLTGOT for .plt
section. Add DT_PLTRELSZ, DT_PLTREL and DT_JMPREL only if
there are PLT relocations.
* elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Always
allocate space for the first .plt entry.
(elf_x86_64_size_dynamic_sections): Always add DT_PLTGOT for
.plt section. Add DT_PLTRELSZ, DT_PLTREL and DT_JMPREL only if
there are PLT relocations.
ld/testsuite/
* ld-i386/i386.exp: Run pltgot-2 for Linux targets.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pltgot-1.d: Updated.
* ld-x86-64/pltgot-1.d: Likewise.
* ld-i386/pltgot-2.d: New file.
* ld-x86-64/pltgot-2.d: Likewise.
2015-06-23 Jiong Wang <jiong.wang@arm.com>
bfd/
* elfnn-aarch64.c (aarch64_readonly_dynrelocs): New function.
(elfNN_aarch64_size_dynamic_sections): Traverse hash table to check
relocations against read-only sections.
ld/testsuite/
* ld-aarch64/dt_textrel.s: New testcase.
* ld-aarch64/dt_textrel.d: New expectation file.
* ld-aarch64/aarch64-elf.exp: Run new testcase.
2015-06-17 Jiong Wang <jiong.wang@arm.com>
ld/testsuite/
* ld-aarch64/aarch64-elf.exp (aarch64_choose_ilp32_emul): New function.
* ld-aarch64/emit-relocs-28.d: Use aarch64_choose_ilp32_emul to choose
emulation mode.
PR ld/18466
* emultempl/pe.em (pe_find_data_imports): Generate an error if a
symbol name is too long to handle.
* emultempl/pep.em (pep_find_data_imports): Likewise.
When building a shared lib from non-PIC objects, we'll get dynamic
text relocations. These need to move with any insns we move.
Otherwise the dynamic reloc will modify the branch, resulting in
crashes and other unpleasant behaviour.
Also, ld -r --ppc476-workaround used with sufficiently aligned PIC
objects needs a fix for emitted REL16 relocs.
bfd/
* elf64-ppc.c (ppc_elf_relocate_section): Move dynamic text
relocs with insns moved by --ppc476-workaround. Correct
output of REL16 relocs.
ld/testsuite/
* ld-powerpc/ppc476-shared.s,
* ld-powerpc/ppc476-shared.lnk,
* ld-powerpc/ppc476-shared.d,
* ld-powerpc/ppc476-shared2.d: New tests.
* ld-powerpc/powerpc.exp: Run them.
When commit the following code for Matthew, I wrongly included my local changes. Revert it. Sorry.
commit a5932920ef
Author: Matthew Wahab <matthew.wahab@arm.com>
Date: Wed Jun 3 10:03:50 2015 +0100
BFD_RELOC_AARCH64_TLSLE_ADD_LO12 is used to generate simplest
one-instruction addressing for TLS LE model when tls size is smaller
4K. Linker need to make sure there is no TLS offset overflow.
2015-06-01 Jiong Wang <jiong.wang@arm.com>
bfd/
* elfnn-aarch64.c (elfNN_aarch64_howto_table): Set overflow type to
complain_overflow_unsigned for BFD_RELOC_AARCH64_TLSLE_ADD_LO12.
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Don't use
PGOFF for BFD_RELOC_AARCH64_TLSLE_ADD_LO12, that will mask off all
potential high overflowed bits.
ld/testsuite/
* ld-aarch64/tprel_add_lo12_overflow.s: New testcase.
* ld-aarch64/tprel_add_lo12_overflow.d: Nex expectation file.
* ld-aarch64/aarch64-elf.exp: Run new testcase.
When pointer equality needed, we can't replace PLT relocations with
GOT relocations for -z now. This patch checks if pointer equality is
needed before converting PLT relocations to GOT relocations.
bfd/
PR binutils/18458
* elf32-i386.c (elf_i386_check_relocs): Create .plt.got section
for now binding only if pointer equality isn't needed.
(elf_i386_allocate_dynrelocs): Use .plt.got section for now
binding only if pointer equality isn't needed.
* elf64-x86-64.c (elf_x86_64_check_relocs): Create .plt.got
section for now binding only if pointer equality isn't needed.
(elf_x86_64_allocate_dynrelocs): Use .plt.got section for now
binding only if pointer equality isn't needed.
ld/testsuite/
PR binutils/18458
* ld-elf/shared.exp (build_tests): Build libpr18458a.so and
libpr18458b.so.
(run_tests): Run pr18458 test.
* ld-elf/pr18458a.c: New file.
* ld-elf/pr18458b.c: Likewise.
* ld-elf/pr18458c.c: Likewise.
nios2-linux has an emulation named "nios2linux", and happens to not include
another extra emulation with a name matching *elf*. This makes nios2-linux
left out of the ELF options printing targets, which is unintended.
* configure.ac (AC_PROG_GREP): Check for grep program.
(elf_list_options,elf_shlib_list_options,elf_plt_unwind_list_options):
Enable ELF option printing for emulations containing
'TEMPLATE_NAME=elf32'.
* configure: Regenerate.
There is no need for PLT relocations with -z now. We can use GOT
relocations, which take less space, instead and replace 16-byte .plt
entres with 8-byte .plt.got entries.
bfd/
* elf32-i386.c (elf_i386_check_relocs): Create .plt.got section
for now binding.
(elf_i386_allocate_dynrelocs): Use .plt.got section for now
binding.
* elf64-x86-64.c (elf_x86_64_check_relocs): Create .plt.got
section for now binding.
(elf_x86_64_allocate_dynrelocs): Use .plt.got section for now
binding.
ld/testsuite/
* ld-i386/i386.exp: Run PR ld/17689 tests with -z now.
* ld-x86-64/x86-64.exp: Likewise
* ld-i386/pr17689now.rd: New file.
* ld-x86-64/pr17689now.rd: Likewise
AMD64 spec and Intel64 spec differ in direct unconditional branches in
64-bit mode. AMD64 supports direct unconditional branches with 16-bit
offset via the data size prefix, which truncates RIP to 16 bits, while
the data size prefix is ignored by Intel64.
This patch adds -mamd64/-mintel64 option to x86-64 assembler and
-Mamd64/-Mintel64 option to x86-64 disassembler. The most permissive
ISA, which is AMD64, is the default.
GDB can add an option, similar to
(gdb) help set disassembly-flavor
Set the disassembly flavor.
The valid values are "att" and "intel", and the default value is "att".
to select which ISA to disassemble.
binutils/
PR binutis/18386
* doc/binutils.texi: Document -Mamd64 and -Mintel64.
gas/
PR binutis/18386
* config/tc-i386.c (OPTION_MAMD64): New.
(OPTION_MINTEL64): Likewise.
(md_longopts): Add -mamd64 and -mintel64.
(md_parse_option): Handle OPTION_MAMD64 and OPTION_MINTEL64.
(md_show_usage): Add -mamd64 and -mintel64.
* doc/c-i386.texi: Document -mamd64 and -mintel64.
gas/testsuite/
PR binutis/18386
* gas/i386/i386.exp: Run x86-64-branch-2 and x86-64-branch-3.
* gas/i386/x86-64-branch.d: Also pass -Mintel64 to objdump.
* gas/i386/ilp32/x86-64-branch.d: Likewise.
* gas/i386/x86-64-branch-2.d: New file.
* gas/i386/x86-64-branch-2.s: Likewise.
* gas/i386/x86-64-branch-3.l: Likewise.
* gas/i386/x86-64-branch-3.s: Likewise.
ld/testsuite/
PR binutis/18386
* ld-x86-64/tlsgdesc.dd: Also pass -Mintel64 to objdump.
* ld-x86-64/tlspic.dd: Likewise.
* ld-x86-64/x86-64.exp (x86_64tests): Also pass -Mintel64 to
objdump for tlspic.dd and tlsgdesc.dd.
opcodes/
PR binutis/18386
* i386-dis.c: Add comments for '@'.
(x86_64_table): Use '@' on call/jmp for X86_64_E8/X86_64_E9.
(enum x86_64_isa): New.
(isa64): Likewise.
(print_i386_disassembler_options): Add amd64 and intel64.
(print_insn): Handle amd64 and intel64.
(putop): Handle '@'.
(OP_J): Don't ignore the operand size prefix for AMD64 in 64-bit.
* i386-gen.c (cpu_flags): Add CpuAMD64 and CpuIntel64.
* i386-opc.h (AMD64): New.
(CpuIntel64): Likewise.
(i386_cpu_flags): Add cpuamd64 and cpuintel64.
* i386-opc.tbl: Add direct call/jmp with Disp16|Disp32 for AMD64.
Mark direct call/jmp without Disp16|Disp32 as Intel64.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
Commit dd7e64d45b may optimize out
i386/x86-64 JUMP_SLOT relocation. If there is no JUMP_SLOT relocation
left, we don't need to the first .plt entry. This patch allocates
space for the first .plt entry only if we also reserve space for a PLT
slot for JUMP_SLOT relocation.
bfd/
* elf32-i386.c (elf_i386_allocate_dynrelocs): Allocate space
for the first .plt entry only if needed.
* elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewise.
ld/testsuite/
* ld-i386/i386.exp: Run pltgot-1 for Linux targets.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pltgot-1.d: New file.
* ld-i386/pltgot-1.s: Likewise.
* ld-x86-64/pltgot-1.d: Likewise.
* ld-x86-64/pltgot-1.s: Likewise.
This patch sets the default ELF output format of assembler and linker to
EM_IAMCU when binutils is configured to i?86-*-elfiamcu target.
gas/
* configure.tgt (arch): Set to iamcu for i386-*-elfiamcu target.
* config/tc-i386.c (i386_mach): Support iamcu.
(i386_target_format): Likewise.
ld/
* configure.tgt: Support i[3-7]86-*-elfiamcu target.
ld/testsuite/
* ld-i386/i386.exp (iamcu_tests): Run iamcu-4.
* ld-i386/iamcu-4.d: New file.
gas * config/tc-msp430.c (MAX_OP_LEN): Increase to 4096.
(msp430_make_init_symbols): New function.
(msp430_section): Call it.
(msp430_frob_section): Likewise.
ld * emulparams/msp430elf.sh (TEMPLATE_NAME): Change to msp430.
* scripttempl/msp430.sc (.text): Add .lower.text and .either.text.
(.data): Add .lower.data and .either.data.
(.bss): Add .lower.bss and .either.bss.
(.rodata): Add .lower.rodata and .either.rodata.
* emultempl/msp430.em: New file. Implements a new orphan
placement algorithm that divides sections between lower and upper
memory regions.
* Makefile.am (emsp430elf.c): Depend upon msp430.em.
*emsp430X.c): Likewise.
* Makefine.in: Regenerate.
Link the last zlibnormal gnunormal and gabinormal against libfoozlib.so
so that their only differences are DWARF debug sections.
PR ld/18354
* ld-elf/compress.exp (run_tests): Link the last zlibnormal,
gnunormal and gabinormal against libfoozlib.so.
Since we changed the default arch for objdump to zarch the following
testcase needs to check for the real instruction mnemonics instead of
just bytes.
This fixes the following testsuite fail on s390x:
FAIL: GOT: symbol address load from got to larl
Taking them out showed a bug in the powerpc64 backend with .branch_lt
being removed from output_bfd but not from previously set up segment
section maps. Removing the bfd sections meant their sh_flags (and
practically everything else) remaining zero, ie. not SHF_ALLOC,
triggering complaints about "`.branch_lt' can't be allocated in
segment".
include/elf/
* internal.h (ELF_SECTION_IN_SEGMENT_1): Ensure PT_LOAD and
similar segments only contain alloc sections.
ld/
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_after_allocation):
Call gld${EMULATION_NAME}_map_segments regardless of need_laying_out.
ld/testsuite/
* ld-powerpc/tocnovar.d: Revert last change.
When we set up st_name for output section name in elf_fake_sections, we
don't know if the compressed DWARF debug section will be smaller. We may
end up with compressed DWARF debug sections which are bigger than the
uncompressed ones. This patch delays setting up st_name for output DWARF
debug section to _bfd_elf_assign_file_positions_for_non_load which will
compress the output debug section. We also postpone placement of shstrtab
section after DWARF debug sections have been compressed. The net effect
is .shstrtab section is now placed after .symtab and .strtab sections.
bfd/
PR ld/18277
* compress.c (bfd_compress_section_contents): Remove the
write_compress argument.
(bfd_init_section_compress_status): Updated.
(bfd_compress_section): Likewise.
* elf.c (_bfd_elf_set_reloc_sh_name): New.
(_bfd_elf_init_reloc_shdr): Add delay_st_name_p. Set sh_name
to (unsigned int) -1 if delay_st_name_p is TRUE. Use
_bfd_elf_set_reloc_sh_name.
(elf_fake_sections): Don't rename DWARF debug section for
linker output if it will be compressed. Instead, set
delay_st_name_p to TRUE and pass it to _bfd_elf_init_reloc_shdr.
(assign_section_numbers): Call _bfd_elf_strtab_addref only if
sh_name != (unsigned int) -1. Don't finalize nor assign
shstrtab section here. Delay setting output section names to
_bfd_elf_write_object_contents.
(_bfd_elf_compute_section_file_positions): Update comments on
sh_offset for shstrtab section.
(assign_file_positions_for_non_load_sections): Set sh_offset to
-1 for shstrtab section.
(assign_file_positions_except_relocs): Likewise.
(_bfd_elf_assign_file_positions_for_non_load): Set up sh_name
when compressing DWARF debug sections. Place shstrtab section
after DWARF debug sections have been compressed.
(_bfd_elf_write_object_contents): Setting sh_name for output
sections.
ld/testsuite/
PR ld/18277
* ld-elf/compressed1d.d: New.
* ld-elf/compressed1e.d: Likewise.
Change compressed input debug section name for objdump is very confusing.
But we need to change it for linker so that linker will consider the
input section as a debug section. This patch delays section rename to
elf_fake_sections for objcopy and avoids it for objdump.
bfd/
PR binutils/18209
* bfd.c (bfd): Add is_linker_input.
* elf.c (convert_debug_to_zdebug): New.
(convert_zdebug_to_debug): Likewise.
(_bfd_elf_make_section_from_shdr): Don't convert .debug_* to
.zdebug_* here. Use convert_zdebug_to_debug. Set SEC_ELF_RENAME.
(_bfd_elf_init_reloc_shdr): Pass a pointer to section name
instead of a pointer to section.
(elf_fake_sections): Rename the section name if SEC_ELF_RENAME
is set.
* section.c (SEC_ELF_RENAME): New.
* bfd-in2.h: Regenerated.
binutils/
PR binutils/18209
* objcopy.c (setup_section): Copy compress status.
binutils/testsuite/
PR binutils/18209
* binutils-all/compress.exp: Replace dw2-3.W with dw2-3gabi.W
on zlib-gabi output.
* binutils-all/dw2-1.W: Convert section names to .zdebug_*.
* binutils-all/dw2-3.W: Likewise.
* binutils-all/objdump.W: Likewise.
* binutils-all/dw2-3gabi.W: New file.
ld/
PR binutils/18209
* ldfile.c (ldfile_try_open_bfd): Set is_linker_input to 1.
I didn't commit this with the relro and powerpc .TOC. changes,
thinking that something should be done about the odd result of
.shstrtab appearing in PT_GNU_RELRO. On looking at it further,
I think that changing readelf would be wrong, so let's just
accept the results. Real binaries will always have other sections
past .got, so PT_GNU_RELRO won't finish past the end of loaded
sections.
* ld-powerpc/tocnovar.d: Adjust.
The linker tries to put the end of the last section in the relro
segment exactly on a page boundary, because the relro segment itself
must end on a page boundary. If for any reason this can't be done,
padding is inserted. Since the end of the relro segment is typically
between .got and .got.plt, padding effectively increases the size of
the GOT. This isn't nice for targets and code models with limited GOT
addressing.
The problem with the current code is that it doesn't cope very well
with aligned sections in the relro segment. When making .got aligned
to a 256 byte boundary for PowerPC64, I found that often the initial
alignment attempt failed and the fallback attempt to be less than
adequate. This is a particular problem for PowerPC64 since the
distance between .got and .plt affects the size of plt call stubs,
leading to "stubs don't match calculated size" errors.
So this rewrite takes a direct approach to calculating a new relro
base. Starting from the last section in the segment, we calculate
where it must start to position its end on the boundary, or as near as
possible considering alignment requirements. The new start then
becomes the goal for the previous section to end, and so on for all
sections. This of course ignores the possibility that user scripts
will place . = ALIGN(xxx); in the relro segment, or provide section
address expressions. In those cases we might fail, but the old code
probably did too, and a fallback is provided.
ld/
* ldexp.h (struct ldexp_control): Delete dataseg.min_base. Add
data_seg.relro_offset.
* ldexp.c (fold_binary <DATA_SEGMENT_ALIGN>): Don't set min_base.
(fold_binary <DATA_SEGMENT_RELRO_END>): Do set relro_offset.
* ldlang.c (lang_size_sections): Rewrite code adjusting relro
segment base to line up last section on page boundary.
ld/testsuite/
* ld-x86-64/pr18176.d: Update.
