the lower 32-bit halves of the GPRS to be their own raw registers,
not pseudoregisters.
* ppc-tdep.h (struct gdbarch_tdep): Remove ppc_gprs_pseudo_p flag;
add ppc_ev0_upper_regnum flag.
* rs6000-tdep.c: #include "reggroups.h".
(spe_register_p): Recognize the ev upper half registers as SPE
registers.
(init_sim_regno_table): Build gdb->sim mappings for the upper-half
registers.
(e500_move_ev_register): New function.
(e500_pseudo_register_read, e500_pseudo_register_write): The 'ev'
vector registers are the pseudo-registers now, formed by splicing
together the gprs and the upper-half registers.
(e500_register_reggroup_p): New function.
(P): Macro deleted.
(P8, A4): New macro.
(PPC_EV_REGS, PPC_GPRS_PSEUDO_REGS): Macros deleted.
(PPC_SPE_GP_REGS, PPC_SPE_UPPER_GP_REGS, PPC_EV_PSEUDO_REGS): New
macros.
(registers_e500): Rearrange register set so that the raw register
set contains 32-bit GPRs and upper-half registers, and the SPE
vector registers become pseudo-registers.
(rs6000_gdbarch_init): Don't initialize tdep->ppc_gprs_pseudo_p;
it has been deleted. Initialize ppc_ev0_upper_regnum. Many other
register numbers are now the same for the E500 as they are for
other PowerPC variants. Register e500_register_reggroup_p as the
register group function for the E500.
* Makefile.in (rs6000-tdep.o): Update dependencies.
Adapt PPC E500 native support to the new raw regcache layout.
* ppc-linux-nat.c (struct gdb_evrregset_t): Doc fixes.
(read_spliced_spe_reg, write_spliced_spe_reg): Deleted.
(fetch_spe_register, store_spe_register): Handle fetching/storing
all the SPE registers at once, if regno == -1. These now take
over the job of fetch_spe_registers and store_spe_registers.
(fetch_spe_registers, store_spe_registers): Deleted.
(fetch_ppc_registers, store_ppc_registers): Fetch/store gprs
unconditionally; they're always raw. Fetch/store SPE upper half
registers, if present, instead of ev registers.
(fetch_register, store_register): Remove sanity checks: gprs are
never pseudo-registers now, so we never need to even mention any
registers that are ever pseudoregisters.
2004-07-20 Jim Blandy <jimb@redhat.com>
Use a fixed register numbering when communicating with the PowerPC
simulator.
* ppc-tdep.h (struct gdbarch_tdep): New member: 'sim_regno'.
* rs6000-tdep.c: #include "sim-regno.h" and "gdb/sim-ppc.h".
(set_sim_regno, init_sim_regno_table, rs6000_register_sim_regno):
New functions.
(rs6000_gdbarch_init): Register rs6000_register_sim_regno. Call
init_sim_regno_table.
* Makefile.in (gdb_sim_ppc_h): New variable.
(rs6000-tdep.o): Update dependencies.
include/gdb/ChangeLog:
2004-07-20 Jim Blandy <jimb@redhat.com>
* sim-ppc.h: New file.
sim/ppc/ChangeLog:
2004-07-20 Jim Blandy <jimb@redhat.com>
Use a fixed register numbering when communicating with the PowerPC
simulator.
* sim_calls.c: #include "registers.h" and "gdb/sim-ppc.h"; do not
include GDB's "defs.h".
(gdb_register_name_table): New variable.
(gdb_register_name_table_size): New enum constant.
(gdb_register_name): New function.
(sim_fetch_register, sim_store_register): Use gdb_register_name,
instead of calling gdbarch_register_name.
* Makefile.in (GDB_SIM_PPC_H): New variable.
(DEFS_H): Delete variable.
(sim_calls.o): Update dependencies.
* rs6000-tdep.c (struct reg): Add new member, 'spr_num'.
(R, R4, R8, R16, F, P, R32, R64, R0): Include value for
new member in initializer.
(S, S4, SN4, S64): New macros for defining special-purpose
registers.
(PPC_UISA_SPRS, PPC_UISA_NOFP_SPRS, PPC_OEA_SPRS, registers_power,
registers_403, registers_403GC, registers_505, registers_860,
registers_601, registers_602, registers_603, registers_604,
registers_750, registers_e500): Use them.
* ppc-tdep.h (struct gdbarch_tdep): New member: 'ppc_gprs_pseudo_p'.
* rs6000-tdep.c (rs6000_gdbarch_init): Initialize it to false on
all architectures except the E500.
* ppc-linux-nat.c: (PTRACE_GETEVRREGS, PTRACE_SETEVRREGS): New
#definitions.
(struct gdb_evrregset_t): New type.
(have_ptrace_getsetevrregs): New variable.
(get_spe_registers, read_spliced_spe_reg, fetch_spe_register,
fetch_spe_registers): New functions.
(fetch_register): Call fetch_spe_register as appropriate.
Assert that we're only passed raw register numbers.
(fetch_ppc_registers): Call fetch_spe_registers as appropriate.
Don't fetch gprs if they're pseudoregisters.
(set_spe_registers, write_spliced_spe_reg, store_spe_register,
store_spe_registers): New functions.
(store_register): Call store_spe_register as appropriate.
Assert that we're only passed raw register numbers.
(store_ppc_registers): Call store_spe_registers as appropriate.
Don't store gprs if they're pseudoregisters.
regcache_cooked_write_part instead of
deprecated_write_register_bytes.
(rs6000_gdbarch_init): Register it for gdbarch_store_return_value,
not gdbarch_deprecated_store_return_value.
(rs6000_stab_reg_to_regnum, rs6000_dwarf2_reg_to_regnum): New
functions, updated to match the register numberings used in GCC.
(rs6000_gdbarch_init): Register rs6000_stab_reg_to_regnum and
rs6000_dwarf2_reg_to_regnum as register number conversions
functions for STABS and Dwarf2.
(struct gdbarch_tdep): New members: ppc_acc_regnum and
ppc_spefscr_regnum.
* rs6000-tdep.c (spe_register_p): New function.
(rs6000_dwarf2_stab_reg_to_regnum): Recognize numbers for acc and
spefscr.
(rs6000_gdbarch_init): Initialize the new members of the tdep
structure.
before the mach-specific switch, and then let the individual cases
override the defaults, rather than leaving them uninitialized
until the switch and then setting them in each case.
an improved version of some code extracted from skip_prologue().
(skip_prologue): Use store_param_on_stack_p() to detect
instructions saving a parameter on the stack. Detect when r0
is used to save a parameter.
Do not mark "li rx, SIMM" instructions as part of the prologue,
unless the following instruction is also part of the prologue.
ppc_fp0_regnum and ppc_fpscr_regnum: if they are -1, then this
processor variant lacks those registers.
(ppc_floating_point_unit_p): Change description to make it clear
that this returns info about the ISA, not the ABI.
* rs6000-tdep.c (ppc_floating_point_unit_p): Decide whether to
return true or false by checking tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum. The original code replicated the BFD
arch/mach switching done in rs6000_gdbarch_init; it's better to
keep that logic there, and just check the results here.
(rs6000_gdbarch_init): On the E500, set tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum to -1 to indicate that we have no
floating-point registers.
(ppc_supply_fpregset, ppc_collect_fpregset)
(rs6000_push_dummy_call, rs6000_extract_return_value)
(rs6000_store_return_value): Assert that we have floating-point
registers.
(rs6000_dwarf2_stab_reg_to_regnum): Add FIXME.
(rs6000_frame_cache): Don't note the locations at which
floating-point registers were saved if we have no fprs.
* aix-thread.c (supply_fprs, fill_fprs): Assert that we have FP
registers.
(fetch_regs_user_thread, fetch_regs_kernel_thread)
(store_regs_user_thread, store_regs_kernel_thread): Only call
supply_fprs / fill_fprs if we actually have floating-point
registers.
(special_register_p): Check ppc_fpscr_regnum before matching
against it.
(supply_sprs64, supply_sprs32, fill_sprs64, fill_sprs32): Don't
supply / collect fpscr if we don't have it.
* ppc-bdm.c: #include "gdb_assert.h".
(bdm_ppc_fetch_registers, bdm_ppc_store_registers): Assert that we
have floating-point registers, since I can't test this code on
FP-free systems to adapt it.
* ppc-linux-nat.c (ppc_register_u_addr): Don't match against the
fpscr and floating point register numbers if they don't exist.
(fetch_register): Assert that we have floating-point registers
before we reach the code that handles them.
(store_register): Same. And use tdep instead of calling
gdbarch_tdep again.
(fill_fpregset): Don't try to collect FP registers and fpscr if we
don't have them.
(ppc_linux_sigtramp_cache): Don't record the saved locations of
fprs and fpscr if we don't have them.
(ppc_linux_supply_fpregset): Don't supply fp regs and fpscr if we
don't have them.
* ppcnbsd-nat.c: #include "gdb_assert.h".
(getfpregs_supplies): Assert that we have floating-point registers.
* ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg): Same.
* ppcobsd-tdep.c: #include "gdb_assert.h".
(ppcobsd_supply_gregset, ppcobsd_collect_gregset): Assert that we
have floating-point registers.
* rs6000-nat.c (regmap): Don't match against the fpscr and
floating point register numbers if they don't exist.
(fetch_inferior_registers, store_inferior_registers,
fetch_core_registers): Only fetch / store / supply the
floating-point registers and the fpscr if we have them.
* Makefile.in (ppc-bdm.o, ppc-linux-nat.o, ppcnbsd-nat.o)
(ppcobsd-tdep.o): Update dependencies.
ppc_fp0_regnum and ppc_fpscr_regnum: if they are -1, then this
processor variant lacks those registers.
(ppc_floating_point_unit_p): Change description to make it clear
that this returns info about the ISA, not the ABI.
* rs6000-tdep.c (ppc_floating_point_unit_p): Decide whether to
return true or false by checking tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum. The original code replicated the BFD
arch/mach switching done in rs6000_gdbarch_init; it's better to
keep that logic there, and just check the results here.
(rs6000_gdbarch_init): On the E500, set tdep->ppc_fp0_regnum and
tdep->ppc_fpscr_regnum to -1 to indicate that we have no
floating-point registers.
(ppc_supply_fpregset, ppc_collect_fpregset)
(rs6000_push_dummy_call, rs6000_extract_return_value)
(rs6000_store_return_value): Assert that we have floating-point
registers.
(rs6000_dwarf2_stab_reg_to_regnum): Add FIXME.
(rs6000_frame_cache): Don't note the locations at which
floating-point registers were saved if we have no fprs.
* aix-thread.c (supply_fprs, fill_fprs): Assert that we have FP
registers.
(fetch_regs_user_thread, fetch_regs_kernel_thread)
(store_regs_user_thread, store_regs_kernel_thread): Only call
supply_fprs / fill_fprs if we actually have floating-point
registers.
(special_register_p): Check ppc_fpscr_regnum before matching
against it.
(supply_sprs64, supply_sprs32, fill_sprs64, fill_sprs32): Don't
supply / collect fpscr if we don't have it.
* ppc-bdm.c: #include "gdb_assert.h".
(bdm_ppc_fetch_registers, bdm_ppc_store_registers): Assert that we
have floating-point registers, since I can't test this code on
FP-free systems to adapt it.
* ppc-linux-nat.c (ppc_register_u_addr): Don't match against the
fpscr and floating point register numbers if they don't exist.
(fetch_register): Assert that we have floating-point registers
before we reach the code that handles them.
(store_register): Same. And use tdep instead of calling
gdbarch_tdep again.
(fill_fpregset): Don't try to collect FP registers and fpscr if we
don't have them.
(ppc_linux_sigtramp_cache): Don't record the saved locations of
fprs and fpscr if we don't have them.
(ppc_linux_supply_fpregset): Don't supply fp regs and fpscr if we
don't have them.
* ppcnbsd-nat.c: #include "gdb_assert.h".
(getfpregs_supplies): Assert that we have floating-point registers.
* ppcnbsd-tdep.c (ppcnbsd_supply_fpreg, ppcnbsd_fill_fpreg): Same.
* ppcobsd-tdep.c: #include "gdb_assert.h".
(ppcobsd_supply_gregset, ppcobsd_collect_gregset): Assert that we
have floating-point registers.
* rs6000-nat.c (regmap): Don't match against the fpscr and
floating point register numbers if they don't exist.
(fetch_inferior_registers, store_inferior_registers,
fetch_core_registers): Only fetch / store / supply the
floating-point registers and the fpscr if we have them.
* Makefile.in (ppc-bdm.o, ppc-linux-nat.o, ppcnbsd-nat.o)
(ppcobsd-tdep.o): Update dependencies.
* infcall.c (call_function_by_hand): When no
DEPRECATED_SAVE_DUMMY_FRAME_TOS call generic_save_dummy_frame_tos.
* rs6000-tdep.c (rs6000_gdbarch_init): Do not set
DEPRECATED_SAVE_DUMMY_FRAME_TOS.
* mn10300-tdep.c (mn10300_gdbarch_init): Ditto.
* mcore-tdep.c (mcore_gdbarch_init): Ditto.
function for register numbers on all the rs6000-derived targets.
(rs6000_gdbarch_init): Don't register a separate
gdbarch_dwarf2_reg_to_regnum function for the E500. Use
rs6000_dwarf2_stab_reg_to_regnum for both Dwarf 2 and stabs on all
variants.
