* interp.c: #include bfd.h.
(target_byte_order): Delete.
(sim_kind, myname, big_endian_p): New static locals.
(sim_open): Set sim_kind, myname. Move call to set_endianness to
after argument parsing. Recognize -E arg, set endianness accordingly.
(sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
load file into simulator. Set PC from bfd.
(sim_create_inferior): Return SIM_RC. Delete arg start_address.
(set_endianness): Use big_endian_p instead of target_byte_order.
* Make-common.in (CSEARCH): Do not include the gdb directory in
the search path.
* Make-common.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_INLINE,
SIM_WARNING): Drop, requiring the simulator specific Makefile.in
to explicitly incorporate these.
* aclocal.m4 (--enable-sim-alignment); New option. Strongly
specify the alignment restrictions of the target architecture -
without this option all alignment restrictions are accomodated.
(--enable-sim-assert): New option. Conditionally compile in
assertion statements.
(--enable-sim-float): New option. Strongly specify the target's
floating point support.
(--enable-sim-hardware): New option. Specify the hardware devices
included in the simulation.
(--enable-sim-packages): New option. Specify the hardware
packages included in the simulation.
(--enable-sim-regparm): New option. Specify that parameters be
passed in registers instead of on the stack.
(--enable-sim-reserved-bits): New option. Specify that reserved
bits within an instruction are are correctly set.
(--enable-sim-smp): New option. Specify the level of SMP support
to be included in the simulator.
(--enable-sim-stdcall): New option. Specify an alternative
function call convention.
(--enable-sim-xor-endian): New option. Configure xor-endian
support used by some targets to implement bi-endian support.
(SignalException): Pass floating point cases to mips16_entry.
(ValueFPR): Don't restrict fmt_single and fmt_word to even
registers.
(StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
or fmt_word.
(COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
and then set the state to fmt_uninterpreted.
(COP_SW): Temporarily set the state to fmt_word while calling
ValueFPR.
scheme which is more compatible with WinGDB builds.
* configure.in: Improve comment on how to run autoconf.
* configure: Re-run autoconf to get new ../common/aclocal.m4.
* Makefile.in: Use autoconf substitution to install common
makefile fragment.
(mips16_entry): New static function.
(SignalException): Look for mips16 entry and exit instructions.
(simulate): Use the correct index when setting fpr_state after
doing a pending move.
force a 64 bit multiplication.
(build_instruction) [OR]: In mips16 mode, don't do anything if the
destination register is 0, since that is the default mips16 nop
instruction.
(build_endian_shift): Don't check proc64.
(build_instruction): Always set memval to uword64. Cast op2 to
uword64 when shifting it left in memory instructions. Always use
the same code for stores--don't special case proc64.
relative operands.
(build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
jal instruction.
* interp.c (simJALDELAYSLOT): Define.
(JALDELAYSLOT): Define.
(INDELAYSLOT, INJALDELAYSLOT): Define.
(simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
* gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
* interp.c (CHECKHILO): Define away.
(simSIGINT): New macro.
(membank_size): Increase from 1MB to 2MB.
(control_c): New function.
(sim_resume): Rename parameter signal to signal_number. Add local
variable prev. Call signal before and after simulate.
(sim_stop_reason): Add simSIGINT support.
(sim_warning, sim_error, dotrace, SignalException): Define as stdarg
functions always.
(sim_warning): Delete call to SignalException. Do call printf_filtered
if logfh is NULL.
(AddressTranslation): Add #ifdef DEBUG around debugging message and
a call to sim_warning.
* gencode.c (inst_type): Add mips16 instruction encoding types.
(GETDATASIZEINSN): Define.
(MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
mtlo.
(MIPS16_DECODE): New table, for mips16 instructions.
(bitmap_val): New static function.
(struct mips16_op): Define.
(mips16_op_table): New table, for mips16 operands.
(build_mips16_operands): New static function.
(process_instructions): If PC is odd, decode a mips16
instruction. Break out instruction handling into new
build_instruction function.
(build_instruction): New static function, broken out of
process_instructions. Check modifiers rather than flags for SHIFT
bit count and m[ft]{hi,lo} direction.
(usage): Pass program name to fprintf.
(main): Remove unused variable this_option_optind. Change
``*loptarg++'' to ``loptarg++''.
(my_strtoul): Parenthesize && within ||.
* interp.c (sim_trace): If tracefh is NULL, set it to stderr.
(LoadMemory): Accept a halfword pAddr if vAddr is odd.
(simulate): If PC is odd, fetch a 16 bit instruction, and
increment PC by 2 rather than 4.
* configure.in: Add case for mips16*-*-*.
* configure: Rebuild.
* interp.c (SignalException): Check for explicit terminating
breakpoint value.
* gencode.c: Pass instruction value through SignalException()
calls for Trap, Breakpoint and Syscall.
