Commit graph

51 commits

Author SHA1 Message Date
Jan Beulich
9306ca4a20 gas/
2004-11-04 Jan Beulich <jbeulich@novell.com>

	* config/tc-i386.c (set_intel_syntax): Allow % in symbol names when
	intel syntax and no register prefix, allow $ in symbol names when
	intel syntax.
	(set_16bit_gcc_code_flag): Replace literal 'l' by LONG_MNEM_SUFFIX.
	(intel_float_operand): Add fourth return value indicating math control
	operations. Make classification more precise.
	(md_assemble): Complain if memory operand of mov[sz]x has no size
	specified.
	(parse_insn): Translate word operands to floating point instructions
	operating on integers as well as control instructions to short ones
	as expected by AT&T syntax. Translate 'd' suffix to short one only for
	floating point instructions operating on non-integer operands.
	(match_template): Remove fldcw special case. Adjust q-suffix handling
	to permit it on fild/fistp/fisttp in AT&T mode.
	(process_suffix): Don't guess DefaultSize insns' suffix from
	stackop_size for certain floating point control instructions. Guess
	suffix for branch and [ls][gi]dt based on flag_code. Split error
	messages for Intel and AT&T syntax, and make the condition more strict
	for the former. Adjust suppressing of generation of operand size
	overrides.
	(intel parser): Allow the full set of MASM operators. Add FWORD, TBYTE,
	OWORD, and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add
	more error checking.
	* config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR XWORD_PTR
	SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines.

gas/testsuite/
2004-11-04 Jan Beulich <jbeulich@novell.com>
	* gas/i386/i386.exp: Execute new tests intelbad and intelok.
	* gas/i386/intelbad.[sl]: New test to check for various things not
	permitted in Intel mode.
	* gas/i386/intel.d, gas/i386/opcode.d, gas/i386/x86-64-opcode.d:
	Adjust for change to segment register store.
	* gas/i386/intelok.[sd]: New test to check various Intel mode specific
	things get handled correctly.
	* gas/i386/x86_64.[sd]: Remove unsupported constructs referring to
	'high' and 'low' parts of an operand, which the parser previously
	accepted while neither telling that it's not supported nor that it
	ignored the remainder of the line following these supposed keywords.

include/opcode/
2004-11-04 Jan Beulich <jbeulich@novell.com>

	* i386.h (sldx_Suf): Remove.
	(FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
	(q_FP): Define, implying no REX64.
	(x_FP, sl_FP): Imply FloatMF.
	(i386_optab): Split reg and mem forms of moving from segment registers
	so that the memory forms can ignore the 16-/32-bit operand size
	distinction. Adjust a few others for Intel mode. Remove *FP uses from
	all non-floating-point instructions. Unite 32- and 64-bit forms of
	movsx, movzx, and movd. Adjust floating point operations for the above
	changes to the *FP macros. Add DefaultSize to floating point control
	insns operating on larger memory ranges. Remove left over comments
	hinting at certain insns being Intel-syntax ones where the ones
	actually meant are already gone.

opcodes/
2004-11-04 Jan Beulich <jbeulich@novell.com>

	* i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
	(indirEb): Remove.
	(Mp): Use f_mode rather than none at all.
	(t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
	replaces what previously was x_mode; x_mode now means 128-bit SSE
	operands.
	(dis386): Make far jumps and calls have an 'l' prefix only in AT&T
	mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
	pinsrw's second operand is Edqw.
	(grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
	operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
	fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
	mode when an operand size override is present or always suffixing.
	More instructions will need to be added to this group.
	(putop): Handle new macro chars 'C' (short/long suffix selector),
	'I' (Intel mode override for following macro char), and 'J' (for
	adding the 'l' prefix to far branches in AT&T mode). When an
	alternative was specified in the template, honor macro character when
	specified for Intel mode.
	(OP_E): Handle new *_mode values. Correct pointer specifications for
	memory operands. Consolidate output of index register.
	(OP_G): Handle new *_mode values.
	(OP_I): Handle const_1_mode.
	(OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
	respective opcode prefix bits have been consumed.
	(OP_EM, OP_EX): Provide some default handling for generating pointer
	specifications.
2004-11-04 09:16:09 +00:00
Alan Modra
bb41ade59e * config/tc-i386.c (O_secrel): Delete.
(tc_pe_dwarf2_emit_offset): New function.
	* config/tc-i386.h (O_secrel): Define as O_md1.
	(TC_DWARF2_EMIT_OFFSET): Define.
2004-10-18 12:32:13 +00:00
Daniel Jacobowitz
d2b2c203e1 bfd/
* config.bfd: Include 64-bit support for i[3-7]86-*-solaris2*.
	* elf64-x86-64.c (elf64_x86_64_section_from_shdr): New function.
	(elf_backend_section_from_shdr): Define.
binutils/
	* readelf.c (get_x86_64_section_type_name): New function.
	(get_section_type_name): Use it.
gas/
	* config/tc-i386.c: Include "elf/x86-64.h".
	(i386_elf_section_type): New function.
	* config/tc-i386.h (md_elf_section_type): Define.
	(i386_elf_section_type): New prototype.
gas/testsuite/
	* gas/i386/i386.exp: Don't run divide test for targets where '/'
	is a comment.  Run x86-64-unwind for 64-bit ELF targets.
	* gas/i386/x86-64-unwind.d, gas/i386/x86-64-unwind.s: New.
include/
	* elf/common.h (PT_SUNW_EH_FRAME): Define.
	* elf/x86-64.h (SHT_X86_64_UNWIND): Define.
ld/
	* configure.tgt: Include elf_x86_64 for i[3-7]86-*-solaris2*.
2004-10-08 13:55:11 +00:00
Nick Clifton
b7c92712fa (TARGET_FORMAT): Remove LynxOS COFF definition. 2004-10-01 08:38:35 +00:00
Nick Clifton
6482c264f4 Add support for a .secrel32 x86 reloc to allow DWARF" debug information to used
with COFF based x86 ports.
2004-04-20 12:17:16 +00:00
Michal Ludvig
0f10071e3d 2004-03-12 Michal Ludvig <mludvig@suse.cz>
* gas/config/tc-i386.c (output_insn): Handle PadLock instructions.
	* gas/config/tc-i386.h (CpuPadLock): New define.
	(CpuUnknownFlags): Added CpuPadLock.
	* include/opcode/i386.h (i386_optab): Added xstore/xcrypt insns.
	* opcodes/i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
	(dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
	(padlock_table): New struct with PadLock instructions.
	(print_insn): Handle PADLOCK_SPECIAL.
2004-03-12 10:14:29 +00:00
Kazu Hirata
0234cb7c70 * config/tc-hppa.c: Fix comment typos.
* config/tc-i370.c: Likewise.
	* config/tc-i386.c: Likewise.
	* config/tc-i386.h: Likewise.
	* config/tc-i960.c: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-iq2000.h: Likewise.
2003-11-21 14:38:06 +00:00
Alan Modra
f86103b730 * config/tc-i386.h: Remove BFD_ASSEMBLER tests and all !BFD_ASSEMBLER
code.
	* config/tc-i386.c: Likewise.
	(RELOC_ENUM): Don't define.  Replace throughout with enum.
2003-08-14 08:05:44 +00:00
H.J. Lu
ca164297eb gas/
2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (md_assemble): Support Intel Precott New
	Instructions.

	* gas/config/tc-i386.h (CpuPNI): New.
	(CpuUnknownFlags): Add CpuPNI.

gas/testsuite/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add prescott.

	* gas/i386/prescott.d: New file.
	* gas/i386/prescott.s: Likewise.

include/opcode/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel Precott New Instructions.

opcodes/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
	Intel Precott New Instructions.
	(PREGRP27): New. Added for "addsubpd" and "addsubps".
	(PREGRP28): New. Added for "haddpd" and "haddps".
	(PREGRP29): New. Added for "hsubpd" and "hsubps".
	(PREGRP30): New. Added for "movsldup" and "movddup".
	(PREGRP31): New. Added for "movshdup" and "movhpd".
	(PREGRP32): New. Added for "lddqu".
	(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
	Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
	entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
	entry 0xd0. Use PREGRP32 for entry 0xf0.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(grps): Use PNI_Fixup in the "sidtQ" entry.
	(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
	PREGRP31 and PREGRP32.
	(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
	Use "fisttpll" in entry 1 in opcode 0xdd.
	Use "fisttp" in entry 1 in opcode 0xdf.
2003-06-23 20:15:34 +00:00
H.J. Lu
12b55ccc43 2003-06-09 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Updated for the new -n option for the i386 assembler.

	* config/tc-i386.c (optimize_align_code): New.
	(md_shortopts): Add 'n'.
	(md_parse_option): Handle 'n'.
	(md_show_usage): Add '-n'.

	* config/tc-i386.h (optimize_align_code): Declared.
	(md_do_align): Optimize code alignment only if optimize_align_code
	is not 0.

	* doc/as.texinfo: Add the new -n option.

	* doc/c-i386.texi: Document the new -n option.
2003-06-10 06:46:34 +00:00
Richard Henderson
a4447b9378 * dw2gencfi.c, dw2gencfi.h: Rewrite from scratch.
* as.c (main): Always call cfi_finish.
        * config/tc-i386.c (x86_dwarf2_return_column): New.
        (x86_cie_data_alignment): New.
        (md_begin): Set them.
        (tc_x86_cfi_init): Remove.
        (tc_x86_regname_to_dw2regnum): Fix 32-bit register numbers;
        return int, not unsigned long; don't as_bad here.
        (tc_x86_frame_initial_instructions): Streamline; use
        updated api.
        * config/tc-i386.h (tc_cfi_init): Remove.
        (DWARF2_DEFAULT_RETURN_COLUMN): New.
        (DWARF2_CIE_DATA_ALIGNMENT): New.

        * gas/cfi/cfi-i386.d: Update for dw2gencfi rewrite.
        * gas/cfi/cfi-x86_64.d: Likewise.
        * gas/cfi/cfi-i386-2.d: New.
        * gas/cfi/cfi-i386-2.s: New.
2003-05-27 16:52:49 +00:00
Alan Modra
54cfded08e * dw2gencfi.c, dw2gencfi.h: New files.
* config/tc-i386.c (tc_x86_cfi_init): New function.
	* config/tc-i386.h (TARGET_USE_CFIPOP, tc_cfi_init): New defines.
	* as.c (parse_args): Set verbose flag on --verbose.
	(main): Call tc_cfi_init()/cfi_finish().
	* as.h (verbose): New external variable.
	* read.c (pobegin): Insert CFI pops to the list.
	* symbols.c (local_symbol_make): Make symbol external.
	* symbols.h (local_symbol_make): New prototype.
	* Makefile.am: Add dw2gencfi.[ch] files.  Run "make dep-am".
	* Makefile.in: Regenerate.
	* doc/as.texinfo: Added node "CFI directives" with description of
	all implemented .cfi_* directives.
	* doc/Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
2003-05-20 07:58:07 +00:00
Alan Modra
ae6063d440 * symbols.c (S_FORCE_RELOC): Add "strict" param.
* symbols.h (S_FORCE_RELOC): Likewise.
	* config/obj-aout.h (S_FORCE_RELOC): Likewise.
	* config/obj-bout.h (S_FORCE_RELOC): Likewise.
	* config/obj-coff.h (S_FORCE_RELOC): Likewise.
	* config/obj-ieee.h (S_FORCE_RELOC): Likewise.
	* config/obj-vms.h (S_FORCE_RELOC): Likewise.
	* write.c (generic_force_reloc): New function.
	(TC_FORCE_RELOCATION): Use it here instead of S_FORCE_RELOC.
	(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
	(adjust_reloc_syms): Adjust S_FORCE_RELOC call.
	* as.h (generic_force_reloc): Declare.
	* doc/internals.texi (S_FORCE_RELOC): Update.
	(TC_FORCE_RELOCATION_SUB_SAME): Update.

	* config/tc-alpha.c (alpha_force_relocation): Adjust to use
	generic_force_reloc.
	(alpha_fix_adjustable): Likewise.
	* config/tc-arm.c (arm_force_relocation): Likewise.
	* config/tc-cris.c (md_cris_force_relocation): Likewise.
	* config/tc-frv.c (frv_force_relocation): Likewise.
	* config/tc-i386.c (md_apply_fix3): Likewise.
	* config/tc-ia64.c (ia64_force_relocation): Likewise.
	* config/tc-ip2k.c (ip2k_force_relocation): Likewise.
	* config/tc-m32r.c (m32r_force_relocation): Likewise.
	* config/tc-m68hc11.c (tc_m68hc11_force_relocation): Likewise.
	* config/tc-mcore.c (mcore_force_relocation): Likewise.
	* config/tc-mips.c (mips_force_relocation): Likewise.
	* config/tc-mmix.c (mmix_force_relocation): Likewise.
	* config/tc-ppc.c (ppc_force_relocation): Likewise.
	* config/tc-s390.c (tc_s390_force_relocation): Likewise.
	* config/tc-sh.c (sh_force_relocation): Likewise.
	(md_pcrel_from_section): Likewise.
	* config/tc-sparc.c (tc_gen_reloc): Likewise.
	* config/tc-v850.c (v850_force_relocation): Likewise.
	* config/tc-xstormy16.c (xstormy16_force_relocation): Likewise.
	* config/tc-i386.h (TC_FORCE_RELOCATION): Likewise.
	* config/tc-mcore.h (TC_FORCE_RELOCATION): Likewise.
	* config/tc-sparc.h (tc_fix_adjustable): Likewise.

	* config/tc-d10v.c (d10v_force_relocation): Delete.
	* config/tc-d10v.h (TC_FORCE_RELOCATION): Don't define.
	* config/tc-dlx.c (md_dlx_force_relocation): Delete.
	* config/tc-dlx.h (TC_FORCE_RELOCATION): Don't define.
	* config/tc-fr30.c (fr30_force_relocation): Delete.
	* config/tc-fr30.h (TC_FORCE_RELOCATION): Don't define.
	* config/tc-mn10300.c (mn10300_force_relocation): Delete.
	* config/tc-mn10300.h (TC_FORCE_RELOCATION): Don't define.
	(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
	* config/tc-i960.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
	* config/tc-hppa.c (hppa_force_relocation): Adjust S_FORCE_RELOC call.
	* config/tc-mips.c (RELAX_BRANCH_TOOFAR): Warning fix.
	* config/tc-mips.h (TC_FORCE_RELOCATION_SUB_SAME): Don't define.
	* config/tc-openrisc.c (openrisc_force_relocation): Delete.
	* config/tc-openrisc.h (TC_FORCE_RELOCATION): Don't define.
	* config/tc-sparc.c (elf32_sparc_force_relocation): Delete.
	* config/tc-sparc.h (TC_FORCE_RELOCATION): Don't define for ELF.
	* config/tc-i386.c (i386_force_relocation): Delete.
	* config/tc-i386.h (TC_FORCE_RELOCATION): Don't define for
	BFD_ASSEMBLER.
	(EXTERN_FORCE_RELOC): Fix TE_PE and STRICT_PE_FORMAT nesting.
	* config/tc-m68k.h (TC_FORCE_RELOCATION): Don't define.
	* config/tc-pj.h (TC_FORCE_RELOCATION): Don't define.
	* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Don't call
	S_FORCE_RELOC.
	(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
	* config/tc-sh64.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
2003-01-23 12:51:05 +00:00
Alan Modra
b34976b65a s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify
comparisons of bfd_boolean vars with TRUE/FALSE.  Formatting.
2002-11-30 08:39:46 +00:00
Christopher Faylor
1a89f85f47 * config/tc-i386.h (EXTERN_FORCE_RELOC): Define only if STRICT_PE_FORMAT. 2002-11-11 17:11:53 +00:00
Alan Modra
3ca4bdc352 * config/tc-i386.h (EXTERN_FORCE_RELOC): Define.
(MD_APPLY_SYM_VALUE): Define for PE too.
2002-10-15 02:20:53 +00:00
David O'Brien
4ada7262d0 2002-09-16 Bruno Haible <bruno@clisp.org>
* elf32-i386.c: Don't defined ELF_ARCH etc. if this file is included
	by a target variant implementation.
	* elf64-alpha.c: Likewise.
	* elf32-i386-fbsd.c: New file.
	* elf64-alpha-fbsd.c: New file.
	* targets.c: Support bfd_elf32_i386_freebsd_vec and
	bfd_elf64_alpha_freebsd_vec.
	* configure.in: Accept the vectors bfd_elf32_i386_freebsd_vec,
	bfd_elf64_alpha_freebsd_vec.
	* Makefile.am (BFD32_BACKENDS): Add elf32-i386-fbsd.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-i386-fbsd.c.
	(BFD64_BACKENDS): Add elf64-alpha-fbsd.lo.
	(BFD64_BACKENDS_CFILES): Add elf64-alpha-fbsd.c.
	(elf32-i386-fbsd.lo, elf64-alpha-fbsd.lo): Add dependencies.
	* config.bfd: For FreeBSD targets, set targ_defvec to a FreeBSD
	specific targets. Define OLD_FREEBSD_ABI_LABEL if appropriate.

	* config/tc-i386.h (ELF_TARGET_FORMAT): New macro.
	(TARGET_FORMAT): Use ELF_TARGET_FORMAT instead of "elf32-i386".
	* config/tc-i386.c (i386_target_format): Likewise.
	* config/tc-alpha.h (ELF_TARGET_FORMAT): New macro.
	(TARGET_FORMAT): Use ELF_TARGET_FORMAT instead of "elf64-alpha".

	* emulparams/elf_i386_fbsd.sh: Set OUTPUT_FORMAT to
	elf32-i386-freebsd.
	* emulparams/elf64alpha_fbsd.sh: Set OUTPUT_FORMAT to
	elf64-alpha-freebsd.

Approved by:  Alan Modra <amodra@bigpond.net.au>
              Message-ID: <20020715021113.GJ30362@bubble.sa.bigpond.net.au>
2002-09-17 02:24:40 +00:00
Alan Modra
a161fe5320 gas reloc rewrite. 2002-09-05 00:01:18 +00:00
Alan Modra
6088b00e51 * config/tc-i386.h: Reorganize. 2002-08-09 12:37:41 +00:00
Alan Modra
c66827056d * config/tc-i386.c (md_pseudo_table <file>): Warning fix.
(BFD_RELOC_8, BFD_RELOC_8_PCREL): Define for non-BFD.
	(md_apply_fix3): Formatting.  Remove redundant test.
	(tc_gen_reloc): Remove redundant code.
	(tc_i386_force_relocation): Delete.  Movy body of function to..
	* config/tc-i386.h (TC_FORCE_RELOCATION): .. here.
2002-07-09 09:46:18 +00:00
Alan Modra
18e1d48773 * write.c (size_seg): Check adjustment to last frag.
(SUB_SEGMENT_ALIGN): If HANDLE_ALIGN defined, pad out last frag to
	section alignment.
	* config/obj-coff.c (SUB_SEGMENT_ALIGN): Likewise.
	* config/obj-ieee.c (SUB_SEGMENT_ALIGN): Likewise.
	(write_object_file): Invoke md_do_align if available, and use
	frag_align_code on text sections.
	* config/obj-vms.h (SUB_SEGMENT_ALIGN): Now two args.
	* config/tc-m88k.h (SUB_SEGMENT_ALIGN): Likewise.
	* config/tc-ppc.h (SUB_SEGMENT_ALIGN): Likewise.
	* config/tc-sh.h (SUB_SEGMENT_ALIGN): Likewise.
	* config/tc-i386.h (SUB_SEGMENT_ALIGN): Likewise.  Define for
	BFD_ASSEMBLER too.
2002-05-23 08:08:48 +00:00
Alan Modra
29b0f896b1 * config/tc-i386.h (REX_OPCODE): Define.
(REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): Define.
	(rex_byte): typedef to int.
	* config/tc-i386.c: Group prototypes and vars together.
	Formatting fixes.  Remove occurrences of "register" keyword.
	(true): Delete.
	(false): Delete.
	(mode_from_disp_size): Add INLINE keyword to prototype.
	(fits_in_signed_byte): Likewise.
	(fits_in_unsigned_byte): Likewise.
	(fits_in_unsigned_word): Likewise.
	(fits_in_signed_word): Likewise.
	(fits_in_unsigned_long): Likewise.
	(fits_in_signed_long): Likewise.
	(type_names): Constify.
	(intel_float_operand): Constify param.
	(add_prefix): Use REX_OPCODE.
	(md_assemble): Likewise.  Modify for changed rex_byte.
	(parse_insn): Split out of md_assemble.
	(parse_operands): Likewise.
	(swap_operands): Likewise.
	(optimize_imm): Likewise.
	(optimize_disp): Likewise.
	(match_template): Likewise.
	(check_string): Likewise.
	(process_suffix): Likewise.
	(check_byte_reg): Likewise.
	(check_long_reg): Likewise.
	(check_qword_reg): Likewise.
	(check_word_reg): Likewise.
	(finalize_imm): Likewise.
	(process_operands): Likewise.
	(build_modrm_byte): Likewise.
	(output_insn): Likewise.
	(output_branch): Likewise.
	(output_jump): Likewise.
	(output_interseg_jump): Likewise.
	(output_disp): Likewise.
	(output_imm): Likewise.
2002-03-09 05:36:51 +00:00
Nick Clifton
94f592af1b Update all uses of md_apply_fix to use md_apply_fix3. Make it a void function. 2001-11-15 21:29:00 +00:00
Alan Modra
a847613f74 * config/tc-i386.h (md_end): Define.
(i386_elf_emit_arch_note): Declare.
	(CpuUnknown): Delete.
	* config/tc-i386.c (default_arch): Constify.
	(smallest_imm_type): Remove CpuUnknown test.
	(md_assemble): Don't bother checking cpu_arch_flags non-zero.
	(i386_elf_emit_arch_note): New function.
2001-11-15 13:19:46 +00:00
Kazu Hirata
0772685173 * config/tc-alpha.h: Fix formatting.
* config/tc-arc.c: Likewise.
	* config/tc-d10v.h: Likewise.
	* config/tc-hppa.c: Likewise.
	* config/tc-i370.c: Likewise.
	* config/tc-i386.h: Likewise.
	* config/tc-i960.h: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-ia64.h: Likewise.
	* config/tc-m32r.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-m88k.c: Likewise.
	* config/tc-ns32k.c: Likewise.
	* config/tc-pdp11.c: Likewise.
	* config/tc-pj.h: Likewise.
	* config/tc-s390.c: Likewise.
	* config/tc-sparc.c: Likewise.
	* config/tc-sparc.h: Likewise.
	* config/tc-tic80.c: Likewise.
	* config/tc-w65.h: Likewise.
2001-07-23 14:02:13 +00:00
Alan Modra
f3c180aedc Support for @GOTOFF in .long expressions. 2001-03-13 04:37:13 +00:00
Nick Clifton
f7e42eb4af Fix copyright notices 2001-03-08 23:24:26 +00:00
David O'Brien
cac5b87b93 001-02-18 David O'Brien <obrien@FreeBSD.org>
* configure.in (cpu_type, arch): Add a generic FreeBSD specification as
	all FreeBSD platforms should look the same at this level.
	* configure: Rebuilt.
	* config/tc-i386.c: Add support for old FreeBSD a.out hosts.

Approved by:  Philip Blundell <philb@gnu.org>
              Message-Id: <E14URxF-00023n-00@kings-cross.london.uk.eu.org>
2001-02-19 06:40:29 +00:00
Jan Hubicka
b9d79e0379 * tc-i386.h (TARGET_MACH): New macro.
(i386_mach): Declare.
	* tc-i386.c (i386_mach): New function.
2001-01-13 23:37:57 +00:00
Andreas Jaeger
eea2ad4501 * config/tc-i386.h (TC_RELOC_GLOBAL_OFFSET_TABLE): Removed, it's
not used anywhere.
2001-01-11 11:38:24 +00:00
Jan Hubicka
6f8c0c4ccc * tc-i386.h (CpuK6, CpuAthlon, CpuSledgehammer, CpuMMX, Cpu3dnow,
CpuUnknown): Renumber
	(CpuP4, CpuSSE2): New.
	(CpuUnknownFlags): Add CpuP4 and CpuSSE2

	* i386.h (i386_optab): Fix 64bit pushf template; Add instructions
	introduced by Pentium4
2001-01-03 15:36:26 +00:00
Richard Henderson
0a9ef43907 * as.h (rs_align_test): New.
* frags.c (NOP_OPCODE): Move default from read.c.
	(MAX_MEM_FOR_RS_ALIGN_CODE): New default.
	(frag_align_code): New.
	* frags.h (frag_align_code): Declare.
	* read.c (NOP_OPCODE): Remove.
	(do_align): Use frag_align_code.
	* write.c (NOP_OPCODE): Remove.
	(get_recorded_alignment): New.
	(cvt_frag_to_fill): Handle rs_align_test.
	(relax_segment): Likewise.
	(subsegs_finish): Align last subseg in section to the
	section alignment.  Use frag_align_code.
	* write.h (get_recorded_alignment): Declare.
	* config/obj-coff.c (size_section): Handle rs_align_test.
	(fill_section, fixup_mdeps): Likewise.
	(write_object_file): Use frag_align_code.

	* config/tc-alpha.c (alpha_align): Use frag_align_code.
	(alpha_handle_align): New.
	* config/tc-alpha.h (HANDLE_ALIGN): New.
	(MAX_MEM_FOR_RS_ALIGN_CODE): New.

	* config/tc-i386.h (md_do_align): Use frag_align_code.
	(MAX_MEM_FOR_RS_ALIGN_CODE): New.

	* config/tc-ia64.c (ia64_md_do_align): Don't do code alignment.
	(ia64_handle_align): New.
	* config/tc-ia64.h (HANDLE_ALIGN): New.
	(MAX_MEM_FOR_RS_ALIGN_CODE): New.

	* config/tc-m32r.c (m32r_do_align): Remove.
	(m32r_handle_align): New.
	(fill_insn): Use frag_align_code.
	* config/tc-m32r.h (md_do_align): Remove.
	(HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): New.
	* config/tc-m88k.c, config/tc-m88k.h: Similarly.
	* config/tc-mips.c, config/tc-mips.h: Similarly.

	* config/tc-sh.c (sh_cons_align): Use rs_align_test.
	(sh_handle_align): Likewise.  Handle rs_align_code.
	(sh_do_align): Remove.
	* config/tc-sh.h (md_do_align): Remove.
	(MAX_MEM_FOR_RS_ALIGN_CODE): New.

	* config/tc-sparc.c (sparc_cons_align): Use rs_align_test.
	(sparc_handle_align): Likewise.  Handle rs_align_code.
	* config/tc-sparc.h (md_do_align): Remove.
	(MAX_MEM_FOR_RS_ALIGN_CODE): New.
2000-12-28 10:07:56 +00:00
Jan Hubicka
3e73aa7c95 * tc-i386.h (i386_target_format): Define even for ELFs.
(QWORD_MNEM_SUFFIX): New macro.
	(CpuK6,CpuAthlon,CpuSledgehammer, Cpu64, CpuNo64, CpuUnknownFlags):
	New macros
	(CpuMMX,CpuSSE,Cpu3dnow, CpuUnknown): Renumber.
	(IgnoreSize, DefaultSize, No_?Suf, FWait, IsString, regKludge, IsPrefix,
	ImmExt): Renumber.
	(Size64, No_qSuf, NoRex64, Rex64): New macros.
	(Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros.
	(Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32,
	InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc,
	SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem): Renumber.
	(Reg, WordReg): Add Reg64.
	(Imm): Add Imm32S and Imm64.
	(EncImm): New.
	(Disp): Add Disp64 and Disp32S.
	(AnyMem): Add Disp32S.
	(RegRex, RegRex64): New macros.
	(rex_byte): New type.
	* tc-i386.c (set_16bit_code_flag): Kill.
	(fits_in_unsigned_long, fits_in_signed_long): New functions.
	(reloc): New parameter "signed"; support x86_64.
	(set_code_flag): New.
	(DEFAULT_ARCH): New macro; default to "i386".
	(default_arch): New static variable.
	(struct _i386_insn): New fields Operand_PCrel; rex.
	(flag_16bit_code): Kill; All tests replaced to "flag_code == CODE_64BIT";
	(flag_code): New enum and static variable.
	(use_rela_relocations): New static variable.
	(flag_code_names): New static variable.
	(cpu_arch_flags): Default to CpuUnknownFlags|CpuNo64.
	(cpu_arch): Add "sledgehammer"; Add CPUAthlon to Athlon and CpuK6 to
	K6 and Athlon.
	(i386_align_code): Return plain "nop" for x86_64.
	(mode_from_disp_size): Support Disp32S.
	(smallest_imm_type): Support Imm32S and Imm64.
	(offset_in_range): Support size of 8.
	(set_cpu_arch): Do not clobber to Cpu64/CpuNo64.
	(md_pseudo_table): Add "code64"; use set_code_flat.
	(md_begin): Emit sane error message on hash failure.
	(tc_i386_fix_adjustable): Support x86_64 relocations.
	(md_assemble): Support QWORD_MNEM_SUFFIX, REX registers,
	instructions supported on particular arch just partially,
	output of 64bit immediates, handling of Imm32S and Disp32S type.
	(i386_immedaite): Support x86_64 relocations; support 64bit constants.
	(i386_displacement): Likewise.
	(i386_index_check): Cleanup; support 64bit addresses.
	(md_apply_fix3): Support x86_64 relocation and rela.
	(md_longopts): Add "32" and "64".
	(md_parse_option): Add OPTION_32 and OPTION_64.
	(i386_target_format): Call even for ELFs; choose between
	elf64-x86-64 and elf32-i386.
	(i386_validate_fix): Refuse GOTOFF in 64bit mode.
	(tc_gen_reloc): Support rela relocations and x86_64.
	(intel_e09_1): Support QWORD.

	* i386.h (i386_optab): Replace "Imm" with "EncImm".
	(i386_regtab): Add flags field.
2000-12-20 13:24:13 +00:00
Jan Hubicka
f16b83dfe5 * tc-i386.c (md_assemble): Refuse 's' and 'l' suffixes in the intel
mode; convert 'd' suffix to 's' or 'l'; remove all DWORD_MNEM_SUFFIX
	references.
	(intel_e09_1): Convert QWORD to 'l' suffix for FP operations; refuse
	otherwise.
	* tc-i386.h (DWORD_MNEM_SUFFIX): Kill.
	(No_dSuf): Kill.

	* i386.h (*_Suf): Remove No_dSuf.
	(d_suf, wld_Suf,sld_Suf, sldx_Suf, bwld_Suf, d_FP, sld_FP, sldx_FP)
	Remove.
	(i386_optab): Remove 'd' in the suffixes.
2000-12-11 14:01:46 +00:00
Alan Modra
ce8a8b2f62 Correct handling of non-global syms in linkonce sections.
Tidy a few comments.
2000-10-05 01:49:36 +00:00
Kazu Hirata
4a4f25cfde 2000-09-15 Kazu Hirata <kazu@hxi.com>
* config/tc-h8300.h: Fix formatting.
	* config/tc-h8500.c: Likewise.
	* config/tc-h8500.h: Likewise.
	* config/tc-hppa.h: Likewise.
	* config/tc-i370.h: Likewise.
	* config/tc-i386.h: Likewise.
	* config/tc-i860.c: Likewise.
	* config/tc-i860.h: Likewise.
	* config/tc-i960.h: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-ia64.h: Likewise.
2000-09-16 00:56:47 +00:00
Alexandre Oliva
4b853faa33 * config/tc-i386.h <OBJ_MAYBE_ELF, OBJ_MAYBE_COFF>
(TC_FIX_ADJUSTABLE): Define.
2000-08-23 21:12:48 +00:00
Alexandre Oliva
a3da4de1ac * config/tc-i386.h (TC_FIX_ADJUSTABLE): Do *NOT* define if target
environment is pe.
2000-08-23 11:19:20 +00:00
Alexandre Oliva
8f36cd18af * write.c (TC_FIX_ADJUSTABLE): Define to 1, if not defined.
(fixup_segment) Use it instead of TC_DONT_FIX_NON_ADJUSTABLE.
* config/tc-i386.h (TC_DONT_FIX_NON_ADJUSTABLE): Remove.
<OBJ_ELF, OBJ_COFF, TE_PE> (TC_FIX_ADJUSTABLE): Define.
* config/tc-arm.h (TC_DONT_FIX_NON_ADJUSTABLE): Remove.
<OBJ_ELF> (TC_FIX_ADJUSTABLE): Define.
* config/tc-i960.h, config/tc-m68k.h, config/tc-v850.h:
Likewise.
2000-08-22 04:52:40 +00:00
Alexandre Oliva
021986386e * write.c (fixup_segment) [TC_DONT_FIX_NON_ADJUSTABLE]: Use
obj_fix_adjustable() and tc_fix_adjustable() to tell whether to
add a symbol's address.  Removed all target-specific #ifdefs that
used to accomplished the same.
* config/tc-v850.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-m68k.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-arm.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-i960.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-i386.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
2000-08-18 18:45:05 +00:00
Alan Modra
e413e4e996 `.arch cpu_type' pseudo for x86. 2000-05-13 09:26:23 +00:00
Alan Modra
da5d444c29 go32 bss alignment. 2000-05-03 04:25:33 +00:00
Alan Modra
520dc8e893 config/tc-i386.c (struct _i386_insn): Combine disps, imms, regs into
a union.  Use throughout file.  Delete TC_RELOC macro.
2000-02-24 08:18:20 +00:00
Alan Modra
4c63da97a7 This set of patches add support for aout emulation on the x86
assembler.  ie. You will be able to do "as --em=i386aout" on an x86
linux-elf assembler to generate aout format object files, rather than
using a separate assembler.  The aout emulation is enabled by giving
"--enable-targets=i386-linuxaout" to configure.
Oh yeah, there's a couple of fixes too.  Error messages shouldn't be
passed to printf in the format arg just in case someone puts a `%' in
the message.
2000-01-26 22:48:31 +00:00
Alan Modra
add0c67765 Cosmetic changes to tc-i386.[ch] + extend x86 gas testsuite jmp and
call tests + tweak intel mode far call and jmp.
2000-01-15 12:06:03 +00:00
Ian Lance Taylor
0561a208f8 1999-09-11 Donn Terry <donn@interix.com>
* expr.c (expr): Change first parameter to int.
	* config/obj-coff.c: Add declarations for static functions.
	(coff_frob_symbol): Use SYM_AUXENT.
	* config/tc-i386.h (flag_16bit_code): Don't declare.
1999-09-12 02:27:58 +00:00
Ian Lance Taylor
1a1ae23e52 * config/tc-i386.h (SUB_SEGMENT_ALIGN): If TE_GO32, return 4 for
certain sections, to match BFD changes.
1999-08-09 04:42:15 +00:00
Alan Modra
eecb386cd7 Support for gcc to generate 16-bit i386 code. (.code16gcc) 1999-08-04 10:07:41 +00:00
Ian Lance Taylor
b9e57a387a * subsegs.c (subseg_text_p): New function.
* as.h (subseg_text_p): Declare.
	* read.c (do_align): Use subseg_text_p to set the default fill.
	* write.c (subsegs_finish): Likewise.
	* config/obj-coff.c (write_object_file): Likewise.
	* config/tc-i386.h (md_maybe_text): Don't define.
	(md_do_align): Use subseg_text_p to set the default fill.
	* config/tc-m32r.c (m32r_do_align): Likewise.
	* config/tc-sh.c (sh_do_align): Likewise.
	* config/tc-sparc.h (md_do_align): Likewise.
1999-06-12 16:49:51 +00:00
Alan Modra
3afcee8ec9 X
i386 PIII SIMD support, remove ReverseRegRegmem kludge
tidy a few things in i386 intel mode disassembly
1999-05-13 06:00:14 +00:00