2000-09-15 Kazu Hirata <kazu@hxi.com>
* config/tc-h8300.h: Fix formatting. * config/tc-h8500.c: Likewise. * config/tc-h8500.h: Likewise. * config/tc-hppa.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.h: Likewise. * config/tc-i860.c: Likewise. * config/tc-i860.h: Likewise. * config/tc-i960.h: Likewise. * config/tc-ia64.c: Likewise. * config/tc-ia64.h: Likewise.
This commit is contained in:
parent
586e589c18
commit
4a4f25cfde
12 changed files with 57 additions and 96 deletions
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@ -1,3 +1,17 @@
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2000-09-15 Kazu Hirata <kazu@hxi.com>
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* config/tc-h8300.h: Fix formatting.
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* config/tc-h8500.c: Likewise.
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* config/tc-h8500.h: Likewise.
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* config/tc-hppa.h: Likewise.
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* config/tc-i370.h: Likewise.
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* config/tc-i386.h: Likewise.
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* config/tc-i860.c: Likewise.
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* config/tc-i860.h: Likewise.
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* config/tc-i960.h: Likewise.
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* config/tc-ia64.c: Likewise.
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* config/tc-ia64.h: Likewise.
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2000-09-14 Kazu Hirata <kazu@hxi.com>
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* config/tc-a29k.c: Fix formatting.
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@ -1,5 +1,5 @@
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/* This file is tc-h8300.h
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Copyright (C) 1987-1992, 93, 94, 95, 96, 97, 1998
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Copyright (C) 1987-1992, 93, 94, 95, 96, 97, 98, 2000
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Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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@ -19,7 +19,6 @@
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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#define TC_H8300
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#define TARGET_BYTES_BIG_ENDIAN 1
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@ -54,5 +53,3 @@ extern int Hmode;
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extern int Smode;
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#define md_operand(x)
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/* end of tc-h8300.h */
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@ -18,10 +18,7 @@
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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/*
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Written By Steve Chamberlain
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sac@cygnus.com
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*/
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/* Written By Steve Chamberlain <sac@cygnus.com>. */
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#include <stdio.h>
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#include "as.h"
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@ -305,7 +302,6 @@ typedef enum
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exp_signed, exp_unsigned, exp_sandu
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} sign_type;
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static char *
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skip_colonthing (sign, ptr, exp, def, size8, size16, size24)
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sign_type sign;
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@ -1300,7 +1296,7 @@ wordify_scb (buffer, disp_size, inst_size)
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*buffer++ = 0x04; /* cmp #0xff:8, rn */
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*buffer++ = 0xff;
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*buffer++ = 0x70 | rn;
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*buffer++ = 0x36; /* bne ... */
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*buffer++ = 0x36; /* bne ... */
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*buffer++ = 0;
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*buffer++ = 0;
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}
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@ -1,5 +1,5 @@
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/* This file is tc-h8500.h
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Copyright (C) 1993, 95, 97, 1998 Free Software Foundation, Inc.
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Copyright (C) 1993, 95, 97, 98, 2000 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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@ -18,7 +18,6 @@
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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#define TC_H8500
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#define TARGET_BYTES_BIG_ENDIAN 1
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@ -53,5 +52,3 @@ extern void tc_reloc_mangle
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extern struct relax_type md_relax_table[];
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#define TC_GENERIC_RELAX_TABLE md_relax_table
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/* end of tc-h8500.h */
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@ -19,7 +19,6 @@
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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/* HP PA-RISC support was contributed by the Center for Software Science
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at the University of Utah. */
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@ -28,7 +27,7 @@
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(please PARAMize them!) not exporting structures and data items which
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are used solely within tc-hppa.c, etc.
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Also refrain from adding any more object file dependent code, there is
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Also refrain from adding any more object file dependent code, there is
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already far too much object file format dependent code in this file.
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In theory this file should contain only exported functions, structures
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and data declarations common to all PA assemblers. */
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@ -136,7 +135,7 @@ int hppa_fix_adjustable PARAMS((struct fix *));
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/* We need to be able to make relocations involving the difference of
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two symbols. This includes the difference of two symbols when
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one of them is undefined (this comes up in PIC code generation).
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one of them is undefined (this comes up in PIC code generation).
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We don't define DIFF_EXPR_OK because it does the wrong thing if
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the add symbol is undefined and the sub symbol is a symbol in
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@ -17,7 +17,7 @@
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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02111-1307, USA. */
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#define TC_I370
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@ -48,9 +48,9 @@ extern int tc_i386_fix_adjustable PARAMS ((struct fix *));
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#endif
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/* This is the relocation type for direct references to GLOBAL_OFFSET_TABLE.
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* It comes up in complicated expressions such as
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* It comes up in complicated expressions such as
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* _GLOBAL_OFFSET_TABLE_+[.-.L284], which cannot be expressed normally with
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* the regular expressions. The fixup specified here when used at runtime
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* the regular expressions. The fixup specified here when used at runtime
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* implies that we should add the address of the GOT to the specified location,
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* and as a result we have simplified the expression into something we can use.
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*/
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are willing to perform this relocation while building the .o file.
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This is only used for pcrel relocations, so GOTOFF does not need to be
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checked here. I am not sure if some of the others are ever used with
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pcrel, but it is easier to be safe than sorry. */
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pcrel, but it is easier to be safe than sorry. */
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#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
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((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \
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/* Need this for PIC relocations */
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#define NEED_FX_R_TYPE
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#ifdef TE_386BSD
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/* The BSDI linker apparently rejects objects with a machine type of
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M_386 (100). */
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@ -190,7 +189,7 @@ extern const char extra_symbol_chars[];
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/* Prefixes will be emitted in the order defined below.
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WAIT_PREFIX must be the first prefix since FWAIT is really is an
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instruction, and so must come before any prefixes. */
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instruction, and so must come before any prefixes. */
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#define WAIT_PREFIX 0
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#define LOCKREP_PREFIX 1
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#define ADDR_PREFIX 2
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#define FLAT 7
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#define NONE_FOUND 8
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typedef struct
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{
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/* instruction name sans width suffix ("mov" for movl insns) */
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AMD 3DNow! instructions.
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If this template has no extension opcode (the usual case) use None */
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unsigned int extension_opcode;
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#define None 0xffff /* If no extension_opcode is possible. */
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#define None 0xffff /* If no extension_opcode is possible. */
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/* cpu feature flags */
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unsigned int cpu_flags;
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#define FloatR 0x8 /* src/dest swap for floats: MUST BE 0x8 */
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#define ShortForm 0x10 /* register is in low 3 bits of opcode */
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#define FloatMF 0x20 /* FP insn memory format bit, sized by 0x4 */
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#define Jump 0x40 /* special case for jump insns. */
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#define Jump 0x40 /* special case for jump insns. */
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#define JumpDword 0x80 /* call and jump */
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#define JumpByte 0x100 /* loop and jecxz */
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#define JumpInterSegment 0x200 /* special case for intersegment leaps/calls */
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#define FloatD 0x400 /* direction for float insns: MUST BE 0x400 */
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#define Seg2ShortForm 0x800 /* encoding of load segment reg insns */
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#define Seg3ShortForm 0x1000 /* fs/gs segment register insns. */
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#define Seg3ShortForm 0x1000 /* fs/gs segment register insns. */
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#define Size16 0x2000 /* needs size prefix if in 32-bit mode */
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#define Size32 0x4000 /* needs size prefix if in 16-bit mode */
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#define IgnoreSize 0x8000 /* instruction ignores operand size prefix */
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}
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seg_entry;
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/* 386 operand encoding bytes: see 386 book for details of this. */
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/* 386 operand encoding bytes: see 386 book for details of this. */
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typedef struct
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{
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unsigned int regmem; /* codes register or memory operand */
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}
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modrm_byte;
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/* 386 opcode byte to code indirect addressing. */
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/* 386 opcode byte to code indirect addressing. */
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typedef struct
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{
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unsigned base;
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arch_entry;
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/* The name of the global offset table generated by the compiler. Allow
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this to be overridden if need be. */
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this to be overridden if need be. */
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#ifndef GLOBAL_OFFSET_TABLE_NAME
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#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
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#endif
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#endif
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#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
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/* end of tc-i386.h */
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@ -29,14 +29,12 @@
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#include "opcode/i860.h"
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#include "elf/i860.h"
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/* Defined by default since this is primarily a SVR4/860 assembler.
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However, I'm trying to leave the door open for Intel syntax. Of course,
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if full support for anything other than SVR4 is done, then we should
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select this based on a command-line flag. */
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#define SYNTAX_SVR4
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/* The opcode hash table. */
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static struct hash_control *op_hash = NULL;
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@ -56,7 +54,6 @@ const char EXP_CHARS[] = "eE";
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As in 0f12.456 or 0d1.2345e12. */
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const char FLT_CHARS[] = "rRsSfFdDxXpP";
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/* Register prefix. */
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#ifdef SYNTAX_SVR4
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static const char reg_prefix = '%';
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static const char reg_prefix = 0;
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#endif
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struct i860_it
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{
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char *error;
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@ -84,7 +80,6 @@ static char last_expand;
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/* If true, then warn if any pseudo operations were expanded. */
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static int target_warn_expand = 0;
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/* Prototypes. */
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static void i860_process_insn PARAMS ((char *));
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static void s_dual PARAMS ((int));
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@ -97,7 +92,6 @@ static bfd_reloc_code_real_type obtain_reloc_for_imm16
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static void print_insn PARAMS ((struct i860_it *));
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#endif
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const pseudo_typeS md_pseudo_table[] =
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{
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#ifdef OBJ_ELF
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@ -109,7 +103,6 @@ const pseudo_typeS md_pseudo_table[] =
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{NULL, 0, 0},
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};
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/* Dual-instruction mode handling. */
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enum dual
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{
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@ -117,7 +110,6 @@ enum dual
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};
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static enum dual dual_mode = DUAL_OFF;
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/* Handle ".dual" directive. */
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static void
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s_dual (ignore)
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@ -126,7 +118,6 @@ s_dual (ignore)
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dual_mode = DUAL_ON;
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}
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/* Handle ".enddual" directive. */
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static void
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s_enddual (ignore)
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@ -135,7 +126,6 @@ s_enddual (ignore)
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dual_mode = DUAL_OFF;
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}
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/* Temporary register used when expanding assembler pseudo operations. */
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static int atmp = 31;
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@ -170,7 +160,6 @@ s_atmp (ignore)
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demand_empty_rest_of_line ();
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}
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/* This function is called once, at assembler startup time. It should
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set up all the tables and data structures that the MD part of the
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assembler will need. */
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@ -212,7 +201,6 @@ md_begin ()
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as_fatal (_("Defective assembler. No assembly attempted."));
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}
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/* This is the core of the machine-dependent assembler. STR points to a
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machine dependent instruction. This function emits the frags/bytes
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it assembles to. */
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@ -390,7 +378,7 @@ md_assemble (str)
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the_insn.reloc);
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/* Despite the odd name, this is a scratch field. We use
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it to encode operand type information. */
|
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it to encode operand type information. */
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fix->fx_addnumber = the_insn.fup;
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}
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the_insn = pseudo[++i];
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@ -399,7 +387,6 @@ md_assemble (str)
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}
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/* Assemble the instruction pointed to by STR. */
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static void
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i860_process_insn (str)
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@ -869,7 +856,6 @@ i860_process_insn (str)
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the_insn.opcode = opcode;
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}
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static int
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i860_get_expression (str)
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char *str;
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|
@ -894,7 +880,6 @@ i860_get_expression (str)
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return 0;
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}
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|
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/* Turn a string in input_line_pointer into a floating point constant of
|
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type TYPE, and store the appropriate bytes in *LITP. The number of
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LITTLENUMS emitted is stored in *SIZEP. An error message is returned,
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|
@ -957,7 +942,6 @@ md_atof (type, litP, sizeP)
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return 0;
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}
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/* Write out in current endian mode. */
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void
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md_number_to_chars (buf, val, n)
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@ -971,7 +955,6 @@ md_number_to_chars (buf, val, n)
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number_to_chars_littleendian (buf, val, n);
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}
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|
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/* This should never be called for i860. */
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void
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md_number_to_disp (buf, val, n)
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|
@ -982,7 +965,6 @@ md_number_to_disp (buf, val, n)
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as_fatal (_("md_number_to_disp\n"));
|
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}
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|
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|
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/* This should never be called for i860. */
|
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void
|
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md_number_to_field (buf, val, fix)
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|
@ -993,7 +975,6 @@ md_number_to_field (buf, val, fix)
|
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as_fatal (_("i860_number_to_field\n"));
|
||||
}
|
||||
|
||||
|
||||
/* This should never be called for i860. */
|
||||
int
|
||||
md_estimate_size_before_relax (fragP, segtype)
|
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|
@ -1003,7 +984,6 @@ md_estimate_size_before_relax (fragP, segtype)
|
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as_fatal (_("i860_estimate_size_before_relax\n"));
|
||||
}
|
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|
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|
||||
#ifdef DEBUG_I860
|
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static void
|
||||
print_insn (insn)
|
||||
|
@ -1031,7 +1011,6 @@ print_insn (insn)
|
|||
}
|
||||
#endif /* DEBUG_I860 */
|
||||
|
||||
|
||||
|
||||
#ifdef OBJ_ELF
|
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CONST char *md_shortopts = "VQ:";
|
||||
|
@ -1039,7 +1018,6 @@ CONST char *md_shortopts = "VQ:";
|
|||
CONST char *md_shortopts = "";
|
||||
#endif
|
||||
|
||||
|
||||
#define OPTION_EB (OPTION_MD_BASE + 0)
|
||||
#define OPTION_EL (OPTION_MD_BASE + 1)
|
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#define OPTION_WARN_EXPAND (OPTION_MD_BASE + 2)
|
||||
|
@ -1052,7 +1030,6 @@ struct option md_longopts[] = {
|
|||
};
|
||||
size_t md_longopts_size = sizeof (md_longopts);
|
||||
|
||||
|
||||
int
|
||||
md_parse_option (c, arg)
|
||||
int c;
|
||||
|
@ -1091,7 +1068,6 @@ md_parse_option (c, arg)
|
|||
return 1;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
md_show_usage (stream)
|
||||
FILE *stream;
|
||||
|
@ -1117,7 +1093,6 @@ md_undefined_symbol (name)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/* The i860 denotes auto-increment with '++'. */
|
||||
void
|
||||
md_operand (exp)
|
||||
|
@ -1136,7 +1111,6 @@ md_operand (exp)
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
/* Round up a section size to the appropriate boundary. */
|
||||
valueT
|
||||
md_section_align (segment, size)
|
||||
|
@ -1147,7 +1121,6 @@ md_section_align (segment, size)
|
|||
return size;
|
||||
}
|
||||
|
||||
|
||||
/* On the i860, a PC-relative offset is relative to the address of the
|
||||
of the offset plus its size. */
|
||||
long
|
||||
|
@ -1157,7 +1130,6 @@ md_pcrel_from (fixP)
|
|||
return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
|
||||
}
|
||||
|
||||
|
||||
/* Determine the relocation needed for non PC-relative 16-bit immediates.
|
||||
Also adjust the given immediate as necessary. Finally, check that
|
||||
all constraints (such as alignment) are satisfied. */
|
||||
|
@ -1167,7 +1139,7 @@ obtain_reloc_for_imm16 (fix, val)
|
|||
long *val;
|
||||
{
|
||||
valueT fup = fix->fx_addnumber;
|
||||
bfd_reloc_code_real_type reloc;
|
||||
bfd_reloc_code_real_type reloc;
|
||||
|
||||
if (fix->fx_pcrel)
|
||||
abort ();
|
||||
|
@ -1253,7 +1225,6 @@ obtain_reloc_for_imm16 (fix, val)
|
|||
return reloc;
|
||||
}
|
||||
|
||||
|
||||
/* Attempt to simplify or eliminate a fixup. To indicate that a fixup
|
||||
has been eliminated, set fix->fx_done. If fix->fx_addsy is non-NULL,
|
||||
we will have to generate a reloc entry. */
|
||||
|
@ -1327,7 +1298,7 @@ md_apply_fix3 (fix, valuep, seg)
|
|||
fix->fx_r_type = BFD_RELOC_NONE;
|
||||
fix->fx_done = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (fup & OP_IMM_BR16)
|
||||
{
|
||||
if (val & 0x3)
|
||||
|
@ -1375,7 +1346,7 @@ md_apply_fix3 (fix, valuep, seg)
|
|||
}
|
||||
else if (fup != OP_NONE)
|
||||
{
|
||||
as_bad_where (fix->fx_file, fix->fx_line,
|
||||
as_bad_where (fix->fx_file, fix->fx_line,
|
||||
_("Unrecognized fix-up (0x%08x)"), fup);
|
||||
abort ();
|
||||
}
|
||||
|
@ -1401,7 +1372,6 @@ md_apply_fix3 (fix, valuep, seg)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/* Generate a machine dependent reloc from a fixup. */
|
||||
arelent*
|
||||
tc_gen_reloc (section, fixp)
|
||||
|
@ -1425,4 +1395,3 @@ tc_gen_reloc (section, fixp)
|
|||
}
|
||||
return reloc;
|
||||
}
|
||||
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
|
||||
Brought back from the dead and completely reworked
|
||||
by Jason Eckhardt <jle@cygnus.com>.
|
||||
|
||||
|
||||
This file is part of GAS, the GNU Assembler.
|
||||
|
||||
GAS is free software; you can redistribute it and/or modify
|
||||
|
@ -24,13 +24,11 @@
|
|||
#ifndef TC_I860
|
||||
#define TC_I860 1
|
||||
|
||||
|
||||
#ifndef BFD_ASSEMBLER
|
||||
#error i860 support requires BFD_ASSEMBLER
|
||||
#endif
|
||||
|
||||
|
||||
enum i860_fix_info
|
||||
enum i860_fix_info
|
||||
{
|
||||
OP_NONE = 0x00000,
|
||||
OP_IMM_U5 = 0x00001,
|
||||
|
@ -54,7 +52,6 @@ enum i860_fix_info
|
|||
OP_ALIGN16 = 0x40000
|
||||
};
|
||||
|
||||
|
||||
/* Set the endianness we are using. Default to little endian. */
|
||||
#ifndef TARGET_BYTES_BIG_ENDIAN
|
||||
#define TARGET_BYTES_BIG_ENDIAN 0
|
||||
|
@ -85,4 +82,3 @@ extern int target_big_endian;
|
|||
#define md_convert_frag(b,s,f) as_fatal (_("i860_convert_frag\n"));
|
||||
|
||||
#endif /* TC_I860 */
|
||||
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/* tc-i960.h - Basic 80960 instruction formats.
|
||||
Copyright (C) 1989, 90, 91, 92, 93, 94, 95, 96, 97, 98, 1999
|
||||
Copyright (C) 1989, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
|
||||
Free Software Foundation, Inc.
|
||||
|
||||
This file is part of GAS, the GNU Assembler.
|
||||
|
@ -17,7 +17,7 @@
|
|||
You should have received a copy of the GNU General Public License
|
||||
along with GAS; see the file COPYING. If not, write to the Free
|
||||
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
|
||||
02111-1307, USA. */
|
||||
02111-1307, USA. */
|
||||
|
||||
#ifndef TC_I960
|
||||
#define TC_I960 1
|
||||
|
@ -101,7 +101,7 @@ extern int tc_coff_sizemachdep ();
|
|||
#define N_CALLNAME ((char)-1)
|
||||
#define N_BALNAME ((char)-2)
|
||||
|
||||
/* i960 uses a custom relocation record. */
|
||||
/* i960 uses a custom relocation record. */
|
||||
|
||||
/* let obj-aout.h know */
|
||||
#define CUSTOM_RELOC_FORMAT 1
|
||||
|
@ -191,5 +191,3 @@ extern const struct relax_type md_relax_table[];
|
|||
#define TC_INIT_FIX_DATA(F) ((F)->tc_fix_data.bsr = 0)
|
||||
|
||||
#endif
|
||||
|
||||
/* end of tc-i960.h */
|
||||
|
|
|
@ -7019,7 +7019,7 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
|
|||
&& p1 != 0 && p1 != 63)
|
||||
{
|
||||
specs[count] = tmpl;
|
||||
specs[count].cmp_type =
|
||||
specs[count].cmp_type =
|
||||
(or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
|
||||
specs[count++].index = p1;
|
||||
}
|
||||
|
@ -7028,7 +7028,7 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
|
|||
&& p2 != 0 && p2 != 63)
|
||||
{
|
||||
specs[count] = tmpl;
|
||||
specs[count].cmp_type =
|
||||
specs[count].cmp_type =
|
||||
(or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
|
||||
specs[count++].index = p2;
|
||||
}
|
||||
|
@ -7477,12 +7477,12 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
|
|||
int or_andcm = strstr(idesc->name, "or.andcm") != NULL;
|
||||
int and_orcm = strstr(idesc->name, "and.orcm") != NULL;
|
||||
|
||||
if (p1 == 63
|
||||
if (p1 == 63
|
||||
&& (idesc->operands[0] == IA64_OPND_P1
|
||||
|| idesc->operands[0] == IA64_OPND_P2))
|
||||
{
|
||||
specs[count] = tmpl;
|
||||
specs[count++].cmp_type =
|
||||
specs[count++].cmp_type =
|
||||
(or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
|
||||
}
|
||||
if (p2 == 63
|
||||
|
@ -7490,7 +7490,7 @@ dep->name, idesc->name, (rsrc_write?"write":"read"), note)
|
|||
|| idesc->operands[1] == IA64_OPND_P2))
|
||||
{
|
||||
specs[count] = tmpl;
|
||||
specs[count++].cmp_type =
|
||||
specs[count++].cmp_type =
|
||||
(or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
|
||||
}
|
||||
}
|
||||
|
@ -7976,7 +7976,7 @@ resources_match (rs, idesc, note, qp_regno, path)
|
|||
}
|
||||
|
||||
/* Skip apparent PR write conflicts where both writes are an AND or both
|
||||
writes are an OR. */
|
||||
writes are an OR. */
|
||||
if (rs->dependency->specifier == IA64_RS_PR
|
||||
|| rs->dependency->specifier == IA64_RS_PR63)
|
||||
{
|
||||
|
@ -7991,14 +7991,14 @@ resources_match (rs, idesc, note, qp_regno, path)
|
|||
continue;
|
||||
}
|
||||
if (md.debug_dv)
|
||||
fprintf (stderr,
|
||||
fprintf (stderr,
|
||||
" %s on parallel compare conflict %s vs %s on PR%d\n",
|
||||
dv_mode[rs->dependency->mode],
|
||||
dv_cmp_type[rs->cmp_type],
|
||||
dv_cmp_type[rs->cmp_type],
|
||||
dv_cmp_type[specs[count].cmp_type],
|
||||
rs->dependency->specifier == IA64_RS_PR ?
|
||||
specs[count].index : 63);
|
||||
|
||||
|
||||
}
|
||||
|
||||
/* If either resource is not specific, conservatively assume a conflict
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
You should have received a copy of the GNU General Public License
|
||||
along with GAS; see the file COPYING. If not, write to
|
||||
the Free Software Foundation, 59 Temple Place - Suite 330,
|
||||
Boston, MA 02111-1307, USA. */
|
||||
Boston, MA 02111-1307, USA. */
|
||||
|
||||
#include <opcode/ia64.h>
|
||||
#include <elf/ia64.h>
|
||||
|
@ -110,12 +110,12 @@ extern int ia64_md_do_align PARAMS ((int, const char *, int, int));
|
|||
#define DWARF2_LINE_MIN_INSN_LENGTH 1 /* so slot-multipliers can be 1 */
|
||||
|
||||
/* This is the information required for unwind records in an ia64
|
||||
object file. This is required by GAS and the compiler runtime. */
|
||||
object file. This is required by GAS and the compiler runtime. */
|
||||
|
||||
/* These are the starting point masks for the various types of
|
||||
unwind records. To create a record of type R3 for instance, one
|
||||
starts by using the value UNW_R3 and or-ing in any other required values.
|
||||
These values are also unique (in context), so they can be used to identify
|
||||
starts by using the value UNW_R3 and or-ing in any other required values.
|
||||
These values are also unique (in context), so they can be used to identify
|
||||
the various record types as well. UNW_Bx and some UNW_Px do have the
|
||||
same value, but Px can only occur in a prologue context, and Bx in
|
||||
a body context. */
|
||||
|
@ -151,8 +151,8 @@ typedef enum
|
|||
pfs_sprel, preds_when, preds_gr, preds_psprel, preds_sprel,
|
||||
fr_mem, frgr_mem, gr_gr, gr_mem, br_mem, br_gr, spill_base, spill_mask,
|
||||
unat_when, unat_gr, unat_psprel, unat_sprel, lc_when, lc_gr, lc_psprel,
|
||||
lc_sprel, fpsr_when, fpsr_gr, fpsr_psprel, fpsr_sprel,
|
||||
priunat_when_gr, priunat_when_mem, priunat_gr, priunat_psprel,
|
||||
lc_sprel, fpsr_when, fpsr_gr, fpsr_psprel, fpsr_sprel,
|
||||
priunat_when_gr, priunat_when_mem, priunat_gr, priunat_psprel,
|
||||
priunat_sprel, bsp_when, bsp_gr, bsp_psprel, bsp_sprel, bspstore_when,
|
||||
bspstore_gr, bspstore_psprel, bspstore_sprel, rnat_when, rnat_gr,
|
||||
rnat_psprel, rnat_sprel, epilogue, label_state, copy_state,
|
||||
|
@ -160,8 +160,7 @@ typedef enum
|
|||
spill_reg_p, unwabi
|
||||
} unw_record_type;
|
||||
|
||||
|
||||
/* These structures declare the fields that can be used in each of the
|
||||
/* These structures declare the fields that can be used in each of the
|
||||
4 record formats, R, P, B and X. */
|
||||
|
||||
typedef struct unw_r_record
|
||||
|
@ -217,7 +216,7 @@ typedef struct unw_x_record
|
|||
unsigned short xy; /* Value of the XY field.. */
|
||||
} unw_x_record;
|
||||
|
||||
/* This structure is used to determine the specific record type and
|
||||
/* This structure is used to determine the specific record type and
|
||||
its fields. */
|
||||
typedef struct unwind_record
|
||||
{
|
||||
|
|
Loading…
Reference in a new issue