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Author SHA1 Message Date
Adam Nemet
39c5c16818 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1 
instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
	cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
	INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 2008-04-28 17:03:58 +00:00
David S. Miller
f04d18b76a gas/ 
* config/tc-sparc.c: Accept 'softint_clear' and 'softint_set'
	%asr aliases.

	* doc/c-sparc.texi: Consistently refer to architecture 'versions',
	rather than occaisionally 'levels'.  Consistently refer to Sun's
	UNIX variant as SunOS, every version of Solaris is also SunOS.
	Document new 'softint_clear' and 'softint_set' aliases.  Clarify
	which architecture versions support '%dcr', '%cq', and '%gl'. Add
	section on 32-bit/64-bit opcode translations.

opcodes/

	* sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
	instead of %sys_tick_cmpr, as suggested in architecture manuals.
 2008-04-25 19:58:03 +00:00
H.J. Lu
6194aaaba7 bfd/ 
2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.

binutils/

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.

gas/

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.

gold/

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.

gprof/

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.

ld/

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.

opcodes/

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

	* aclocal.m4: Regenerate.
	* configure: Regenerate.
 2008-04-23 16:11:47 +00:00
David S. Miller
1a6b486f73 opcodes/ 
* sparc-opc.c (asi_table): Add UltraSPARC and Niagara
	extended values.
	(prefetch_table): Add missing values.

gas/

	* config/tc-sparc.c (v9a_asr_table): Add missing
	'stick' and 'stick_cmpr', and document ordering rules
	of table.
	(tc_gen_reloc): Accept BFD_RELOC_SPARC_PC22 and
	BFD_RELOC_SPARC_PC10.
	* doc/c-sparc.texi: New section on Sparc constants.
	Add documentation for %stick and %stick_cmpr.

gas/testsuite/

	* gas/sparc/pc2210.d: New file.
	* gas/sparc/pc2210.d: Likewise.
	* gas/sparc/sparc.exp: Run new %pc22/%pc10 relocation test.
 2008-04-23 07:49:33 +00:00
H.J. Lu
81f8a9131a gas/ 
2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Don't check SSE instructions
	if noavx is 0.

opcodes/

2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add NoAVX.

	* i386-opc.h (NoAVX): New.
	(OldGcc): Updated.
	(i386_opcode_modifier): Add noavx.

	* i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
	instructions which don't have AVX equivalent.
	* i386-tbl.h: Regenerated.
 2008-04-22 22:27:13 +00:00
H.J. Lu
dae39accc2 gas/ 
2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
	FMA.

gas/testsuite/

2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.d: Updated.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.

opcodes/

2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_VEX_FMA): New.
	(OP_EX_VexImmW): Likewise.
	(VexFMA): Likewise.
	(Vex128FMA): Likewise.
	(EXVexImmW): Likewise.
	(get_vex_imm8): Likewise.
	(OP_EX_VexReg): Likewise.
	(vex_i4_done): Renamed to ...
	(vex_w_done): This.
	(prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
	and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
	FMA instructions.
	(print_insn): Updated.
	(OP_EX_VexW): Rewrite to swap register in VEX with EX.
	(OP_REG_VexI4): Check invalid high registers.
 2008-04-18 13:10:32 +00:00
Dwarakanath Rajagopal
ce886ab1f8 <opcode changes> 
2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
            Michael Meissner  <michael.meissner@amd.com>

        * i386-opc.tbl: Fix protX to allow memory in the middle operand.
        * i386-tbl.h: Regenerate from i386-opc.tbl.

<gas/testsuite changes>
2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
            Michael Meissner  <michael.meissner@amd.com>

        * gas/i386/x86-64-sse5.s: Add protX tests to allow memory in the middle
        operand.
        * gas/i386/x86-64-sse5.d: Likewise.
 2008-04-16 15:31:33 +00:00
Alan Modra
19a6653ce8 ppc e500mc support 2008-04-14 11:01:38 +00:00
Andreas Krebbel
112b7c5071 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-dis.c (init_disasm): Evaluate disassembler_options.
	(print_s390_disassembler_options): New function.
	* disassemble.c (disassembler_usage): Invoke
	print_s390_disassembler_options.

2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>

	* dis-asm.h (print_s390_disassembler_options):
	Prototype added.
 2008-04-10 13:36:43 +00:00
Andreas Krebbel
7ff4264847 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
	of local variables used for mnemonic parsing: prefix, suffix and
	number.
 2008-04-10 13:05:07 +00:00
Andreas Krebbel
45a5551e74 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
	extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
	(s390_crb_extensions): New extensions table.
	(insertExpandedMnemonic): Handle '$' tag.
	* s390-opc.txt: Remove conditional jump variants which can now
	be expanded automatically.
	Replace '*' tag with '$' in the compare and branch instructions.

2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z10.d: Map the compare and branch variants
	with odd condition code mask to version with an even mask.
 2008-04-10 08:59:46 +00:00
H.J. Lu
06c8514ace 2008-04-07 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (PREFIX_VEX_38XX): Add a tab.
	(PREFIX_VEX_3AXX): Likewis.
 2008-04-07 21:29:50 +00:00
H.J. Lu
b122c2853a 2008-04-07 H.J. Lu <hongjiu.lu@intel.com> 
* i386-opc.tbl: Remove 4 extra blank lines.
 2008-04-07 17:35:12 +00:00
H.J. Lu
594ab6a333 gas/ 
2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention XSAVE.  Change CLMUL to PCLMUL.

	* config/tc-i386.c (cpu_arch): Add .pclmul.
	(md_show_usage): Replace clmul with pclmul.
	* doc/c-i386.texi: Likewise.

gas/testsuite/

2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/arch-10.s: Likewise.
	* gas/i386/clmul-intel.d: Likewise.
	* gas/i386/clmul.d: Likewise.
	* gas/i386/clmul.s: Likewise.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/x86-64-clmul-intel.d: Likewise.
	* gas/i386/x86-64-clmul.d: Likewise.
	* gas/i386/x86-64-clmul.s: Likewise.

	* gas/i386/arch-10.d: Replace clmul with pclmul.
	* gas/i386/x86-64-arch-2.d: Likewise.

opcodes/

2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
	with CPU_PCLMUL_FLAGS/CpuPCLMUL.
	(cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
	* i386-opc.tbl: Likewise.

	* i386-opc.h (CpuCLMUL): Renamed to ...
	(CpuPCLMUL): This.
	(CpuFMA): Updated.
	(i386_cpu_flags): Replace cpuclmul with cpupclmul.

	* i386-init.h: Regenerated.
 2008-04-04 16:34:23 +00:00
H.J. Lu
c0f3af977b binutils/ 
2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (dwarf_regnames_i386): Add AVX registers.
	(dwarf_regnames_x86_64): Likewise.

gas/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.

	* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
	Document -msse2avx, .avx, .aes, .clmul and .fma.

	* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
	(vex_prefix): Likewise.
	(sse2avx): Likewise.
	(CPU_FLAGS_ARCH_MATCH): Likewise.
	(CPU_FLAGS_64BIT_MATCH): Likewise.
	(CPU_FLAGS_32BIT_MATCH): Likewise.
	(CPU_FLAGS_PERFECT_MATCH): Likewise.
	(regymm): Likewise.
	(vex_imm4): Likewise.
	(fits_in_imm4): Likewise.
	(build_vex_prefix): Likewise.
	(VEX_check_operands): Likewise.
	(bad_implicit_operand): Likewise.
	(OPTION_MSSE2AVX): Likewise.
	(T_YMMWORD): Likewise.
	(_i386_insn): Add vex.
	(cpu_arch): Add .avx, .aes, .clmul and .fma.
	(cpu_flags_match): Changed to take a pointer to const template.
	Enable encoding SSE instructions with VEX prefix for -msse2avx.
	(match_mem_size): Also check ymmword.
	(operand_type_match): Clear ymmword.
	(md_begin): Allow '_' in mnemonic.
	(type_names): Add OPERAND_TYPE_VEX_IMM4.
	(process_immext): Update assert.
	(md_assemble): Don't call process_immext if sse2avx and immext
	are true.  Call build_vex_prefix if vex is true.
	(parse_insn): Updated for cpu_flags_match.
	(swap_operands): Handle 5 operands.
	(match_template): Handle 5 operands. Updated for cpu_flags_match.
	Check regymm.  Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
	(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
	(check_byte_reg): Check regymm.
	(process_operands): Duplicate the destination register for
	-msse2avx if needed.
	(build_modrm_byte): Updated for instructions with VEX encoding.
	(output_insn): Output VEX prefix if needed.
	(md_longopts): Add msse2avx.
	(md_parse_option): Handle OPTION_MSSE2AVX.
	(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
	(intel_e09): Support YMMWORD.
	(intel_e11): Likewise.
	(intel_get_token): Likewise.

gas/testsuite/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
	x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
	x86-64-avx-intel and x86-64-inval-avx.

	* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
	* gas/cfi/cfi-x86_64.s: Likewise.

	* gas/i386/aes.d: New.
	* gas/i386/aes.s: Likewise.
	* gas/i386/aes-intel.d: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx.s: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/clmul.d: Likewise.
	* gas/i386/clmul-intel.d: Likewise.
	* gas/i386/clmul.s: Likewise.
	* gas/i386/i386.exp: Likewise.
	* gas/i386/inval-avx.l: Likewise.
	* gas/i386/inval-avx.s: Likewise.
	* gas/i386/sse2avx.d: Likewise.
	* gas/i386/sse2avx.s: Likewise.
	* gas/i386/x86-64-aes.d: Likewise.
	* gas/i386/x86-64-aes.s: Likewise.
	* gas/i386/x86-64-aes-intel.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-clmul.d: Likewise.
	* gas/i386/x86-64-clmul-intel.d: Likewise.
	* gas/i386/x86-64-clmul.s: Likewise.
	* gas/i386/x86-64-inval-avx.l: Likewise.
	* gas/i386/x86-64-inval-avx.s: Likewise.
	* gas/i386/x86-64-sse2avx.d: Likewise.
	* gas/i386/x86-64-sse2avx.s: Likewise.

	* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/rexw.s: Add AVX tests.

	* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.

	* gas/cfi/cfi-i386.d: Updated.
	* gas/cfi/cfi-x86_64.d: Likewise.
	* gas/i386/arch-10.d:  Likewise.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/rexw.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval-intel.d: Likewise.

include/opcode/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (MAX_OPERANDS): Set to 5.
	(MAX_MNEM_SIZE): Changed to 20.

opcodes/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_register): New.
	(OP_E_memory): Likewise.
	(OP_VEX): Likewise.
	(OP_EX_Vex): Likewise.
	(OP_EX_VexW): Likewise.
	(OP_XMM_Vex): Likewise.
	(OP_XMM_VexW): Likewise.
	(OP_REG_VexI4): Likewise.
	(PCLMUL_Fixup): Likewise.
	(VEXI4_Fixup): Likewise.
	(VZERO_Fixup): Likewise.
	(VCMP_Fixup): Likewise.
	(VPERMIL2_Fixup): Likewise.
	(rex_original): Likewise.
	(rex_ignored): Likewise.
	(Mxmm): Likewise.
	(XMM): Likewise.
	(EXxmm): Likewise.
	(EXxmmq): Likewise.
	(EXymmq): Likewise.
	(Vex): Likewise.
	(Vex128): Likewise.
	(Vex256): Likewise.
	(VexI4): Likewise.
	(EXdVex): Likewise.
	(EXqVex): Likewise.
	(EXVexW): Likewise.
	(EXdVexW): Likewise.
	(EXqVexW): Likewise.
	(XMVex): Likewise.
	(XMVexW): Likewise.
	(XMVexI4): Likewise.
	(PCLMUL): Likewise.
	(VZERO): Likewise.
	(VCMP): Likewise.
	(VPERMIL2): Likewise.
	(xmm_mode): Likewise.
	(xmmq_mode): Likewise.
	(ymmq_mode): Likewise.
	(vex_mode): Likewise.
	(vex128_mode): Likewise.
	(vex256_mode): Likewise.
	(USE_VEX_C4_TABLE): Likewise.
	(USE_VEX_C5_TABLE): Likewise.
	(USE_VEX_LEN_TABLE): Likewise.
	(VEX_C4_TABLE): Likewise.
	(VEX_C5_TABLE): Likewise.
	(VEX_LEN_TABLE): Likewise.
	(REG_VEX_XX): Likewise.
	(MOD_VEX_XXX): Likewise.
	(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
	(PREFIX_0F3A44): Likewise.
	(PREFIX_0F3ADF): Likewise.
	(PREFIX_VEX_XXX): Likewise.
	(VEX_OF): Likewise.
	(VEX_OF38): Likewise.
	(VEX_OF3A): Likewise.
	(VEX_LEN_XXX): Likewise.
	(vex): Likewise.
	(need_vex): Likewise.
	(need_vex_reg): Likewise.
	(vex_i4_done): Likewise.
	(vex_table): Likewise.
	(vex_len_table): Likewise.
	(OP_REG_VexI4): Likewise.
	(vex_cmp_op): Likewise.
	(pclmul_op): Likewise.
	(vpermil2_op): Likewise.
	(m_mode): Updated.
	(es_reg): Likewise.
	(PREFIX_0F38F0): Likewise.
	(PREFIX_0F3A60): Likewise.
	(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
	(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
	and PREFIX_VEX_XXX entries.
	(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
	(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
	PREFIX_0F3ADF.
	(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
	Add MOD_VEX_XXX entries.
	(ckprefix): Initialize rex_original and rex_ignored.  Store the
	REX byte in rex_original.
	(get_valid_dis386): Handle the implicit prefix in VEX prefix
	bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
	(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
	calling get_valid_dis386.  Use rex_original and rex_ignored when
	printing out REX.
	(putop): Handle "XY".
	(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
	ymmq_mode.
	(OP_E_extended): Updated to use OP_E_register and
	OP_E_memory.
	(OP_XMM): Handle VEX.
	(OP_EX): Likewise.
	(XMM_Fixup): Likewise.
	(CMP_Fixup): Use ARRAY_SIZE.

	* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
	CPU_FMA_FLAGS and CPU_AVX_FLAGS.
	(operand_type_init): Add OPERAND_TYPE_REGYMM and
	OPERAND_TYPE_VEX_IMM4.
	(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
	(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
	VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
	VexImmExt and SSE2AVX.
	(operand_types): Add RegYMM, Ymmword and Vex_Imm4.

	* i386-opc.h (CpuAVX): New.
	(CpuAES): Likewise.
	(CpuCLMUL): Likewise.
	(CpuFMA): Likewise.
	(Vex): Likewise.
	(Vex256): Likewise.
	(VexNDS): Likewise.
	(VexNDD): Likewise.
	(VexW0): Likewise.
	(VexW1): Likewise.
	(Vex0F): Likewise.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(Vex3Sources): Likewise.
	(VexImmExt): Likewise.
	(SSE2AVX): Likewise.
	(RegYMM): Likewise.
	(Ymmword): Likewise.
	(Vex_Imm4): Likewise.
	(Implicit1stXmm0): Likewise.
	(CpuXsave): Updated.
	(CpuLM): Likewise.
	(ByteOkIntel): Likewise.
	(OldGcc): Likewise.
	(Control): Likewise.
	(Unspecified): Likewise.
	(OTMax): Likewise.
	(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
	(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
	vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
	vex3sources, veximmext and sse2avx.
	(i386_operand_type): Add regymm, ymmword and vex_imm4.

	* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.

	* i386-reg.tbl: Add AVX registers, ymm0..ymm15.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-04-03 14:03:21 +00:00
Bernd Schmidt
086134ec0e gas/testsuite/: 
From Robin Getz  <rgetz@blackfin.uclinux.org>
	* gas/bfin/arithmetic.d: Update to reflect spaces/capitalization in
	recent changes in opcodes/bfin-dis.c.
	gas/bfin/arithmetic.s: Likewise.
	gas/bfin/bit.d: Likewise.
	gas/bfin/bit2.d: Likewise.
	gas/bfin/control_code.d: Likewise.
	gas/bfin/control_code2.d: Likewise.
	gas/bfin/event.d: Likewise.
	gas/bfin/event2.d: Likewise.
	gas/bfin/flow.d: Likewise.
	gas/bfin/flow2.d: Likewise.
	gas/bfin/load.d: Likewise.
	gas/bfin/logical.d: Likewise.
	gas/bfin/logical2.d: Likewise.
	gas/bfin/move.d: Likewise.
	gas/bfin/move2.d: Likewise.
	gas/bfin/parallel.d: Likewise.
	gas/bfin/parallel2.d: Likewise.
	gas/bfin/parallel3.d: Likewise.
	gas/bfin/parallel4.d: Likewise.
	gas/bfin/shift.d: Likewise.
	gas/bfin/shift2.d: Likewise.
	gas/bfin/stack.d: Likewise.
	gas/bfin/stack2.d: Likewise.
	gas/bfin/store.d: Likewise.
	gas/bfin/vector.d: Likewise.
	gas/bfin/vector2.d: Likewise.
	gas/bfin/video.d: Likewise.
	gas/bfin/video2.d: Likewise.

opcodes/:
	* bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
	c_imm32, c_huimm32e): Define.
	(constant_formats): Add flags for printing decimal, leading spaces, and
	exact symbols.
	(comment, parallel): Add global flags in all disassembly.
	(fmtconst): Take advantage of new flags, and print default in hex.
	(fmtconst_val): Likewise.
	(decode_macfunc): Be consistant with spaces, tabs, comments,
	capitalization in disassembly, fix minor coding style issues.
	(reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
	(decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
	decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
	decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
	decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
	decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
	decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
	decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
	decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
	decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
	_print_insn_bfin, print_insn_bfin): Likewise.
 2008-03-26 16:48:32 +00:00
Bernd Schmidt
ee171c8f94 gas/ 
* config/bfin-parse.y (check_macfunc_option): Allow (IU)
	option for multiply and multiply-accumulate to data register
	instruction.
	(check_macfuncs): Don't check if accumulator matches the data register
	here.
	(assign_macfunc): Check if accumulator matches the
	data register in each rule that moves to the data
	register.

gas/testsuite/
	* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
	for IU option.
	* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
	Add check for mismatch of accumulator and data register.

opcodes/
	* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
	multiply and multiply-accumulate to data register instruction.
 2008-03-26 16:21:10 +00:00
Bernd Schmidt
b21c9cb440 opcodes: 
From  Robin Getz  <robin.getz@analog.com>
	* bfin-dis.c (bu32): Typedef.
	(enum const_forms_t): Add c_uimm32 and c_huimm32.
	(constant_formats[]): Add uimm32 and huimm16.
	(fmtconst_val): New.
	(uimm32): Define.
	(huimm32): Define.
	(imm16_val): Define.
	(luimm16_val): Define.
	(struct saved_state): Define.
	(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
	A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
	LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
	(get_allreg): New.
	(decode_LDIMMhalf_0): Print out the whole register value.

gas/testsuite:
	From Jie Zhang  <jie.zhang@analog.com>
	* gas/bfin/load.d: Update.
 2008-03-26 14:50:52 +00:00
Andreas Krebbel
5746fb46c8 2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com> 
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
	(s390_cond_extensions): Reduced extensions to the compare related.
	(main): z10 cpu type option added.
	(expandConditionalJump): Renamed to ...
	(insertExpandedMnemonic): ... this.

	* opcodes/s390-opc.c: Re-group the operand format makros.
	(INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI,
	INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU,
	INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0,
	INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU,
	INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU,
	INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI,
	INSTR_SIL_RDU): New instruction formats added.
	(MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI,
	MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0,
	MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI,
	MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR,
	MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD,
	MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format
	masks added.
	(s390_opformats): New formats added "ris", "rrs", "sil".
	* opcodes/s390-opc.txt: Add the conditional jumps with the
	extensions removed from automatic expansion in s390-mkopc.c manually.
	(asi - trtre): Add new System z10 EC instructions.
	* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added.

2008-03-19  Andreas Krebbel  <krebbel1@de.ibm.com>

	* config/tc-s390.c (md_parse_option): z10 option added.

2008-03-19  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z10.d: New file.
	* gas/s390/zarch-z10.s: New file.
	* gas/s390/s390.exp: Run the z10 testcases.
 2008-03-19 10:29:18 +00:00
Ralf Wildenhues
58c85be758 * configure.ac: m4_include config/proginstall.m4. 
* configure: Regenerate.
config/
        * proginstall.m4: New file, with fixed AC_PROG_INSTALL.
bfd/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
bfd/doc/
        * Makefile.in: Regenerate.
intl/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
gas/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
        * doc/Makefile.in: Likewise.
ld/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
opcodes/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
binutils/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
        * doc/Makefile.in: Likewise.
gprof/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
 2008-03-17 22:17:33 +00:00
Alan Modra
50e7d84b42 bfd/ 
* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
bfd/doc/
	* Makefile.in: Regenerate.
binutils/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
	* configure: Regenerate.
gas/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* configure: Regenerate.
gprof/
	* configure: Regenerate.
ld/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* configure: Regenerate.
opcodes/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* configure: Regenerate.
 2008-03-13 02:05:23 +00:00
Alan Modra
de866fccd8 * ppc-opc.c (powerpc_opcodes): Order and format. 2008-03-06 23:00:34 +00:00
Andreas Krebbel
98c3d90597 2008-03-06 Florian Krohm <fkrohm@us.ibm.com> 
* s390-opc.c (INSTR_RSL_R0RD): Fix operands.
	* s390-opc.txt (cmpsc): Duplicate entry removed.
	(dxr, sqdr, sqer, cxfbr, cdfbr, cefbr, lzer, lzdr, lzxr,
	cegbr, cdgbr, cxgbr, cegr, cdgr, cxgr, cxfr, cdfr, cefr, fixr, fidr,
	fier, cu42, cu41): Fix operand format.

2008-03-06  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/esa-g5.d (cdfbr, cdfr, cefbr, cefr, cxfbr, cxfr,
	dxr, fidr, fier, fixr, lzdr, lzer, lzxr, sqdr, sqer, tp): Fix
	operand format.
	* gas/s390/esa-g5.s: Likewise.
	* gas/s390/zarch-z900.d (cdgbr, cdgr, cegbr, cegr, cxgbr,
	cxgr): Likewise.
	* gas/s390/zarch-z900.s: Likewise.
	* gas/s390/zarch-z9-109.d (cu41, cu42): Remove mask operand.
	* gas/s390/zarch-z9-109.s: Likewise.
 2008-03-06 12:01:13 +00:00
H.J. Lu
28dbc07952 gas/testsuite/ 
2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-branch.s: Add tests for 16-bit near indirect
	branches.

	* gas/i386/x86-64-inval.s: Remove tests for 16-bit near indirect
	branches.

	* gas/i386/x86-64-branch.d: Updated.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
	* i386-tbl.h: Regenerated.
 2008-03-01 23:30:51 +00:00
H.J. Lu
849830bdfb gas/testsuite/ 
2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/jump.s: Add tests for far branches.
	* gas/i386/jump16.s: Likewise.

	* gas/i386/jump.d: Updated.
	* gas/i386/jump16.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.

	* gas/i386/x86-64-inval.s: Add tests for 16-bit near indirect
	branches.

opcodes/

2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Disallow 16-bit near indirect branches for
	x86-64.
	* i386-tbl.h: Regenerated.
 2008-02-23 17:29:17 +00:00
Jan Beulich
743ddb6b3d opcodes/ 
2008-02-21  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
	and Fword for far indirect jmp. Allow Reg16 and Word for near
	indirect jmp on x86-64. Disallow Fword for lcall.
	* i386-tbl.h: Re-generate.
 2008-02-21 16:18:04 +00:00
Nick Clifton
796d53134a * cr16.h (cr16_num_optab): Declared. 
* cr16-opc.c  (cr16_num_optab): Defined
 2008-02-18 13:46:45 +00:00
H.J. Lu
65da13b5e0 gas/ 
2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (inoutportreg): New.
	(process_immext): New.
	(md_assemble): Use it.
	(update_imm): Use imm16 and imm32s.
	(i386_att_operand): Use inoutportreg.

opcodes/

2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	* i386-init.h: Regenerated.
 2008-02-16 16:16:48 +00:00
Nick Clifton
0e3361806e PR binutils/5524 
* configure.in (SHARED_LIBADD): Select the correct host specific
   file extension for shared libraries.
   * configure: Regenerate.
 2008-02-14 12:33:17 +00:00
Jan Beulich
b7240065b3 gas/ 
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
	if not in Intel mode.
	(i386_intel_operand): Ignore segment overrides in immediate and
	offset operands.
	(intel_e11): Range-check i.mem_operands before use as array
	index. Filter out FLAT for uses other than as segment override.
	(intel_get_token): Remove broken promotion of "FLAT:" to mean
	"offset FLAT:".

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelok.s: Replace invalid offset expression with
	valid ones.
	* gas/i386/x86_64.s: Likewise.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegFlat): New.
	* i386-reg.tbl (flat): Add.
	* i386-tbl.h: Re-generate.
 2008-02-13 13:41:26 +00:00
Jan Beulich
34b772a651 gas/ 
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (intel_e09): Also special-case 'bound'.

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
	* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
	gas/i386/opcode-intel.d: Adjust.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.
 2008-02-13 13:29:31 +00:00
Jan Beulich
a60de03c61 gas/ 
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (allow_pseudo_reg): New.
	(parse_real_register): Check for NULL just once. Allow all
	register table entries when allow_pseudo_reg is non-zero.
	Don't allow any registers without type when allow_pseudo_reg
	is zero.
	(tc_x86_regname_to_dw2regnum): Replace with ...
	(tc_x86_parse_to_dw2regnum): ... this.
	(tc_x86_frame_initial_instructions): Adjust for above change.
	* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
	(tc_parse_to_dw2regnum): New.
	(tc_x86_regname_to_dw2regnum): Replace with ...
	(tc_x86_parse_to_dw2regnum): ... this.
	* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
	(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
	error handling.

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/cfi/cfi-i386.s: Add code testing use of all registers.
	Fix a few comments.
	* gas/cfi/cfi-x86_64.s: Likewise.
	* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.
 2008-02-13 10:14:40 +00:00
H.J. Lu
4b6bc8ebeb Correct last 2 ChangeLog entries. 2008-02-12 17:22:02 +00:00
H.J. Lu
f03fe4c110 gas/ 
2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .xsave.
	(md_show_usage): Add .xsave.

	* doc/c-i386.texi: Add xsave to -march=.

gas/testsuite/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.s: Add xgetbv.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-10.d: Likewise.

opcodes/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.
 2008-02-12 05:35:36 +00:00
H.J. Lu
475a2301db gas/testsuite/ 
2002-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave
	and x86-64-xsave-intel.

	* gas/i386/x86-64-xsave-intel.d: New file.
	* gas/i386/x86-64-xsave.d: Likewise.
	* gas/i386/x86-64-xsave.s: Likewise.
	* gas/i386/xsave-intel.d: Likewise.
	* gas/i386/xsave.d: Likewise.
	* gas/i386/xsave.s: Likewise.

opcodes/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(Cpu64): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-02-12 00:04:45 +00:00
Ben Elliston
041179fc63 Fix formatting of most recent entry. 2008-02-11 22:56:13 +00:00
Jan Beulich
595785c698 opcodes/ 
2008-02-11  Jan Beulich  <jbeulich@novell.com>
	* i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
	Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
	* i386-tbl.h: Re-generate.
 2008-02-11 15:11:06 +00:00
H.J. Lu
bb8541b9c4 bfd/ 
2008-02-04  Kai Tietz  <kai.tietz@onevision.com>
	    H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* warning.m4: Enable -Wno-format by default when using gcc on
	mingw.
	* configure: Regenerated.

binutils/

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

gas/

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

ld/

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.

opcodes/

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR 5715
	* configure: Regenerated.
 2008-02-04 19:43:51 +00:00
Adam Nemet
57b592a36d * mips-dis.c: Update copyright. 
(mips_arch_choices): Add Octeon.
	* mips-opc.c: Update copyright.
	(IOCT): New macro.
	(mips_builtin_opcodes): Add Octeon instruction synciobdma.
 2008-02-04 19:26:11 +00:00
Alan Modra
930bb4cfae * ppc-opc.c: Support optional L form mtmsr. 2008-01-29 08:24:43 +00:00
H.J. Lu
82c18208b8 gas/testsuite/ 
2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-sib.s: Add tests for r12.

	* gas/i386/x86-64-sib-intel.d: Updated.
	* gas/i386/x86-64-sib.d: Likewise.

opcodes/

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
 2008-01-24 15:11:35 +00:00
H.J. Lu
599121aa77 gas/ 
2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_show_usage): Replace tabs with spaces.

gas/testsuite/

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.

	* gas/i386/x86-64-arch-1.d: New.
	* gas/i386/x86-64-arch-1.s: Likewise.
	* gas/i386/x86-64-arch-10.d: Likewise.

opcodes/

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.
 2008-01-23 19:05:12 +00:00
Tristan Gingold
80098f5188 2008-01-23 Tristan Gingold <gingold@adacore.com> 
* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
        ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 2008-01-23 08:53:44 +00:00
H.J. Lu
115c7c25fe gas/ 
2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (i386_target_format): Remove cpummx2.

gas/testsuite/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.d: New.
	* gas/i386/arch-11.s: Likewise.
	* gas/i386/arch-12.d: Likewise.
	* gas/i386/arch-12.s: Likewise.

	* gas/i386/i386.exp: Run arch-11 and arch-12.

opcodes/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-22 19:57:30 +00:00
H.J. Lu
6305a20382 gas/ 
2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
	(XXX_MNEM_SUFFIX): Likewise.
	(END_OF_INSN): Likewise.
	(templates): Likewise.
	(modrm_byte): Likewise.
	(rex_byte): Likewise.
	(DREX_XXX): Likewise.
	(drex_byte): Likewise.
	(sib_byte): Likewise.
	(processor_type): Likewise.
	(arch_entry): Likewise.
	(cpu_sub_arch_name): Remove const.
	(cpu_arch): Add .vmx and .smx.
	(set_cpu_arch): Append cpu_sub_arch_name.
	(md_parse_option): Support -march=CPU[,+EXTENSION...].
	(md_show_usage): Updated.

	* config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
	(XXX_MNEM_SUFFIX): Likewise.
	(END_OF_INSN): Likewise.
	(templates): Likewise.
	(modrm_byte): Likewise.
	(rex_byte): Likewise.
	(DREX_XXX): Likewise.
	(drex_byte): Likewise.
	(sib_byte): Likewise.
	(processor_type): Likewise.
	(arch_entry): Likewise.

	* doc/as.texinfo: Update i386 -march option.

	* doc/c-i386.texi: Update -march= for ISA.

gas/testsuite/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10-1.l: New.
	* gas/i386/arch-10-1.s: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-2.s: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-3.s: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/arch-10-4.s: Likewise.
	* gas/i386/arch-10.d: Likewise.
	* gas/i386/arch-10.s: Likewise.

	* gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2,
	arch-10-3 and arch-10-4.

	* gas/i386/nops-2.s: Use movsbl instead of cmove.
	* gas/i386/nops-2-i386.d: Updated.
	* gas/i386/nops-2-merom.d: Likewise.
	* gas/i386/nops-2.d: Likewise.
	* gas/i386/x86-64-nops-2.d: Likewise.

opcodes/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.
 2008-01-22 19:16:45 +00:00
H.J. Lu
fd07a1c880 gas/testsuite/ 
2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/prescott.s: Add tests for movddup in Intel syntax.
	* gas/i386/x86-64-prescott.s: Likewise.

	* gas/i386/prescott.d: Updated.
	* gas/i386/x86-64-prescott.d: Likewise.

opcodes/

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.
 2008-01-16 00:05:56 +00:00
H.J. Lu
321fd21e2f gas/ 
2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Also zap movzx and movsx
	suffix for AT&T syntax.

gas/testsuite/

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add more tests for movsx and movzx.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/inval.s: Remove tests for movsxw and movzxw.

	* gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw,
	movsxl, movzxb and movzxw.

	* gas/i386/i386.d: Updated.
	* gas/i386/inval.l: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.
 2008-01-15 18:50:44 +00:00
H.J. Lu
4ee521786f 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (Mx): New.
	(PREFIX_0FC3): Likewise.
	(PREFIX_0FC7_REG_6): Updated.
	(dis386_twobyte): Use PREFIX_0FC3.
	(prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
	Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
	movntss.
 2008-01-15 17:20:50 +00:00
H.J. Lu
5c07affcae gas/ 
2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_reg_size): New.
	(match_mem_size): Likewise.
	(operand_size_match): Likewise.
	(operand_type_match): Also clear all size fields.
	(match_template): Skip Intel syntax when in AT&T syntax.
	Call operand_size_match to check operand size.
	(i386_att_operand): Set the mem field to 1 for memory
	operand.
	(i386_intel_operand): Likewise.

gas/testsuite/

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add tests for movsx, movzx and movnti.
	* gas/i386/inval.s: Likewise.
	* gas/i386/x86_64.s: Likewise.
	* gas/i386/x86-64-inval.s: Likewise.

	* gas/i386/i386.d: Updated.
	* gas/i386/inval.l: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-15 01:37:56 +00:00
H.J. Lu
0d6a2f58b8 2008-01-13 H.J. Lu <hongjiu.lu@intel.com> 
* i386-opc.h (Byte): Fix a typo.
 2008-01-14 05:15:06 +00:00
H.J. Lu
7d5e4556a3 gas/testsuite/ 
2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* gas/i386/i386.s: Add tests for fnstsw and fstsw.
	* gas/i386/inval.s: Likewise.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/intel.s: Use word instead of dword on ss.

	* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
	and out.

	* gas/i386/prefix.s: Remove invalid fstsw.

	* gas/i386/inval.l: Updated.
	* gas/i386/intelbad.l: Likewise.
	* gas/i386/i386.d: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.
	* gas/i386/prefix.d: Updated.

gas/

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* config/tc-i386.c (_i386_insn): Update comment.
	(operand_type_match): Also clear unspecified.
	(operand_type_register_match): Likewise.
	(parse_operands): Initialize unspecified.
	(i386_intel_operand): Likewise.
	(match_template): Check memory and accumulator operand size.
	(i386_att_operand): Clear unspecified on register operand.
	(intel_e11): Likewise.
	(intel_e09): Set operand size and clean unspecified for
	"XXX PTR".

opcodes/

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-12 16:05:42 +00:00
H.J. Lu
b5b1fc4fc8 gas/testsuite/ 
2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/nops.s: Add more tests with opcodes from 0x0f19
	to 0x0f1f.
	* gas/i386/x86-64-nops.s: Likewise.

	* gas/i386/nops.d: Updated.
	* gas/i386/x86-64-nops.d: Likewise.

opcodes/

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 2008-01-10 14:52:35 +00:00
H.J. Lu
50e8458f68 2008-01-08 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c (set_bitfield): Use fail () on error.
 2008-01-09 01:24:07 +00:00
H.J. Lu
3d4d5afaf0 2008-01-08 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c (lineno): New.
	(filename): Likewise.
	(set_bitfield): Report filename and line numer on error.
	(process_i386_opcodes): Set filename and update lineno.
	(process_i386_registers): Likewise.
 2008-01-08 21:24:16 +00:00
H.J. Lu
e1d4d8936f gas/ 
2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.

	* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
	only.
	(md_assemble): Remove Intel mode workaround.
	(match_template): Check support for old gcc, AT&T mnemonic
	and Intel Syntax.
	(md_parse_option): Don't set intel_mnemonic to 0 for
	OPTION_MOLD_GCC.

gas/testsuite/

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
	fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.

	* gas/i386/intel.d: Updated.
	* gas/i386/intel.e: Likewise.

opcodes/

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.
 2008-01-05 17:07:25 +00:00
H.J. Lu
6f143e4d77 2008-01-04 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c: Update copyright to 2008.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-04 18:10:08 +00:00
H.J. Lu
c6add5371c gas/testsuite/ 
2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/rexw.d: New.
	* gas/i386/rexw.s: Likewise.

	* gas/i386/x86-64-sse4_1-intel.d: Updated.
	* gas/i386/x86-64-sse4_1.d: Likewise.

opcodes/

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
	pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
	* i386-tbl.h: Regenerated.
 2008-01-04 18:03:02 +00:00
H.J. Lu
3629bb00a8 gas/ 
2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
	(cpu_flags_not): Likewise.
	(cpu_flags_match): Updated to check 64bit and arch.
	(set_code_flag): Remove cpu_arch_flags_not.
	(set_16bit_gcc_code_flag): Likewise.
	(set_cpu_arch): Likewise.
	(md_begin): Likewise.
	(parse_insn): Call cpu_flags_match to check 64bit and arch.
	(match_template): Likewise.

gas/testsuite/

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-9.d: New file.
	* gas/i386/arch-9.s: Likewise.

	* gas/i386/i386.exp: Run arch-9.

opcodes/

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-04 01:05:45 +00:00
H.J. Lu
24995bd6e3 gas/ 
2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Use the xmmword field
	instead of no_xsuf.

opcodes/

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove No_xSuf.

	* i386-opc.h (No_xSuf): Removed.
	(CheckSize): Updated.

	* i386-tbl.h: Regenerated.
 2008-01-03 20:09:38 +00:00
H.J. Lu
e0329a2266 gas/testsuite/ 
2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-5.d: New file.
	* gas/i386/arch-5.s: Likewise.
	* gas/i386/arch-6.d: Likewise.
	* gas/i386/arch-6.s: Likewise.
	* gas/i386/arch-7.d: Likewise.
	* gas/i386/arch-7.s: Likewise.
	* gas/i386/arch-8.d: Likewise.
	* gas/i386/arch-8.s: Likewise.

	* gas/i386/i386.exp: Run arch-5, arch-6, arch-7 and arch-8.

opcodes/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
	CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
	CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_2_Or_ABM.

	* i386-opc.h (CpuSSE4_2_Or_ABM): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_2_or_abm.

	* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
	CpuABM|CpuSSE4_2 on popcnt.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-01-03 05:29:53 +00:00
H.J. Lu
18a2244ddd Add a missing ','. 2008-01-03 05:27:55 +00:00
H.J. Lu
f2a9c676b7 gas/testsuite/ 
2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add tests for movq.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/i386.d Updated.
	* gas/i386/x86_64.d: Likewise.

opcodes/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h: Update comments.
 2008-01-03 03:28:35 +00:00
H.J. Lu
615888ae9f Fix a typo. 2008-01-03 00:02:26 +00:00
H.J. Lu
d978b5be20 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> 
* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.
 2008-01-02 23:54:47 +00:00
H.J. Lu
582d5eddfe gas/ 
2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
	Check memory size in Intel mode.
	(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
	(intel_e09): Likewise.

	* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.

gas/testsuite/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* gas/i386/intel.s: Use QWORD on movq instead of DWORD.

	* gas/i386/inval.s: Add tests for movq.
	* gas/i386/x86-64-inval.s: Likewise.

	* gas/i386/inval.l: Updated.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.
 2008-01-02 21:43:34 +00:00
H.J. Lu
6c7ac64e17 Move 2007 ChangeLog entries to ChangeLog-2007. 2008-01-02 21:41:02 +00:00
Mark Kettenis
3fe15143a8 * m88k-dis.c (instructions): Fix fcvt.* instructions. 
From Miod Vallat.
 2008-01-02 00:37:44 +00:00
H.J. Lu
4ae6d70300 Fix a typo in ChangeLog. 2007-12-31 16:17:43 +00:00
H.J. Lu
98b528ac84 gas/testsuite/ 
2007-12-31  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/inval.s: Add test for cvtsi2ss/cvtsi2sd.
	* gas/i386/simd.s: Likewise.
	* gas/i386/x86-64-simd.s: Likewise.

	* gas/i386/inval.l: Updated.
	* gas/i386/simd-intel.d: Likewise.
	* gas/i386/simd-suffix.d: Likewise.
	* gas/i386/simd.d: Likewise.
	* gas/i386/sse2.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd-suffix.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-12-31  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Use "%LQ" on cvtpi2ps/cvtsi2sd.
	(putop): Handle '%' and "LQ".

	* i386-opc.tbl: Remove IgnoreSize from cvtpi2ps/cvtsi2sd.
	* i386-tbl.h: Regenerated.
 2007-12-31 15:42:22 +00:00
H.J. Lu
70ad4a561e Add ',' at the end of cpu_flag_init. 2007-12-28 19:42:53 +00:00
H.J. Lu
8d79a8c8d5 gas/testsuite/ 
2007-12-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-1.d: New file.
	* gas/i386/arch-1.s: Likewise.
	* gas/i386/arch-2.d: Likewise.
	* gas/i386/arch-2.s: Likewise.
	* gas/i386/arch-3.d: Likewise.
	* gas/i386/arch-3.s: Likewise.
	* gas/i386/arch-4.d: Likewise.
	* gas/i386/arch-4.s: Likewise.

	* gas/i386/i386.exp: Run arch-1, arch-2, arch-3 and arch-4.

opcodes/

2007-12-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuSSE4_1_Or_5 to
	CPU_SSE4_1_FLAGS, CPU_SSE4_2_FLAGS and CPU_SSE5_FLAGS.
	(cpu_flags): Add CpuSSE4_1_Or_5.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): New.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpusse4_1_or_5.

	* i386-opc.tbl: Use CpuSSE4_1_Or_5 instead of CpuSSE4_1|CpuSSE5
	on ptest roundpd, roundps, roundsd and roundss.
 2007-12-28 16:04:41 +00:00
H.J. Lu
1efbbeb461 gas/ 
2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (set_intel_mnemonic): New.
	(intel_mnemonic): Likewise.
	(old_gcc): Likewise.
	(OPTION_MMNEMONIC): Likewise.
	(OPTION_MSYNTAX): Likewise.
	(OPTION_MINDEX_REG): Likewise.
	(OPTION_MNAKED_REG): Likewise.
	(OPTION_MOLD_GCC): Likewise.
	(md_pseudo_table): Add .intel_mnemonic and .att_mnemonic.
	(match_template): Don't allow AT&T/Intel mnemonic if Intel/AT&T
	mnemonic is specified.  Don't allow old gcc support if old_gcc
	is 0.
	(md_longopts): Add -mmnemonic, -msyntax, -mindex-reg,
	-mmnaked-reg and -mold-gcc.
	(md_parse_option): Handle OPTION_MMNEMONIC, OPTION_MSYNTAX,
	OPTION_MINDEX_REG, OPTION_MNAKED_REG and OPTION_MOLD_GCC.

	* doc/c-i386.texi: Docoument -mmnemonic, -msyntax, --mnaked-reg
	and AT&T mnemonic vs. Intel mnemonic.

gas/testsuite/

2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/compat-intel.d: Pass -mmnemonic=att to assembler.
	* gas/i386/compat.d: Likewise.

	* gas/i386/i386.exp: Pass -mmnemonic=att to assembler for
	"float".  Pass -mold-gcc to assembler for  "general".

opcodes/

2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and
	IntelMnemonic.

	* i386-opc.h (OldGcc): New.
	(ATTMnemonic): Likewise.
	(IntelMnemonic): Likewise.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add oldgcc, attmnemonic and
	intelmnemonic.

	* i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul,
	fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and
	IntelMnemonic.
	* i386-tbl.h: Regeneratd.
 2007-12-24 05:27:39 +00:00
H.J. Lu
9d14166966 binutils/ 
2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/binutils.texi: Document the new intel-mnemonic and
	intel-mnemonic options for i386 disassembler.

gas/testsuite/

2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/compat-intel.d: New file.
	* gas/i386/compat.d: Likewise.
	* gas/i386/compat.s: Likewise.

	* gas/i386/i386.exp: Run compat.

opcodes/

2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (intel_mnemonic): New.
	(print_i386_disassembler_options): Display att-mnemonic and
	intel-mnemonic options.
	(print_insn): Handle att-mnemonic and intel-mnemonic.
	(float_reg): Replace SYSV386_COMPAT with "!M" and "M".
	(putop): Handle "!M" and "M".
 2007-12-22 14:06:31 +00:00
H.J. Lu
df1764b8ab 2007-12-21 H.J. Lu <hongjiu.lu@intel.com> 
* Makefile.am (i386-gen.o): Also depend on
	$(srcdir)/../include/opcode/i386.h.
	* Makefile.in: Regenerated.
 2007-12-21 17:04:04 +00:00
Mark Shinwell
350cc38db2 bfd/ 
* archures.c (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* bfd-in2.h (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
	anonymous enum.
	(arch_info_struct): Add Loongson-2E and Loongson-2F entries.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
	and Loongson-2F flags.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Add Loongson-2E and Loongson-2F
	entries.

	binutils/
	* readelf.c (get_machine_flags): Handle Loongson-2E and -2F
	flags.

	gas/
	* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
	and loongson2f entries.
	* doc/c-mips.texi: Document -march=loongson{2e,2f} options.

	gas/testsuite/
	* gas/mips/mips.exp: Add loongson-2e and -2f tests.
	* gas/mips/loongson-2e.d: New.
	* gas/mips/loongson-2e.s: New.
	* gas/mips/loongson-2f.d: New.
	* gas/mips/loongson-2f.s: New.

	include/elf/
	* mips.h (E_MIPS_MACH_LS2E): New.
	(E_MIPS_MACH_LS2F): New.

	include/opcode/
	* mips.h (INSN_LOONGSON_2E): New.
	(INSN_LOONGSON_2F): New.
	(CPU_LOONGSON_2E): New.
	(CPU_LOONGSON_2F): New.
	(OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.

	opcodes/
	* mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
	entries.
	* mips-opc.c (IL2E): New.
	(IL2F): New.
	(mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
	Allow movz and movn for Loongson-2E and -2F.  Add movnz entry.
	Move coprocessor encodings to the end of the table.  Allow
	certain MIPS V .ps instructions on the Loongson-2E and -2F.
 2007-11-29 12:23:44 +00:00
Mark Shinwell
569502941a include/opcode/ 
* mips.h (INSN_ISA*): Redefine certain values as an
	enumeration.  Update comments.
	(mips_isa_table): New.
	(ISA_MIPS*): Redefine to match enumeration.
	(OPCODE_IS_MEMBER): Modify to correctly test new INSN_ISA*
	values.

	opcodes/
	* mips-opc.c (I3_32, I3_33, I4_32, I4_33, I5_33): New.
	(mips_builtin_opcodes): Use these new I* values.
 2007-11-29 11:55:19 +00:00
Andreas Krebbel
5f1c91d91e 2007-11-27 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-opc.txt ("tcet", "tcdt", "tcxt", "tget", "tgdt",
	"tgxt"): Removed.
	("tdcet", "tdcdt", "tdcxt", "tdget", "tdgdt", "tdgxt"): Added.
 2007-11-27 15:33:28 +00:00
Andreas Krebbel
967877645e 2007-11-27 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-opc.txt ("tcet", "tcdt", "tcxt", "tget", "tgdt",
	"tgxt"): Removed.
	("tdcet", "tdcdt", "tdcxt", "tdget", "tdgdt", "tdgxt"): Added.

2007-11-27  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z9-ec.d: ("tcet", "tcdt", "tcxt", "tget",
	"tgdt", "tgxt"): Removed.
        ("tdcet", "tdcdt", "tdcxt", "tdget", "tdgdt", "tdgxt"): Added.
	* gas/s390/zarch-z9-ec.s: Likewise.
 2007-11-27 15:31:59 +00:00
H.J. Lu
4f8631b1d4 gas/ 
2007-11-14  Tristan Gingold  <gingold@adacore.com>

	* config/tc-ia64.c (AR_RUC): Defined.
	(ar): Add "ar.ruc".
	(specify_resource): Handle AR_RUC like AR_ITC.

gas/testsuite/

2007-11-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/dv-raw-err.s: Add tests for ar.ruc.
	* gas/ia64/dv-waw-err.s: Likewise.
	* gas/ia64/invalid-ar.s: Likewise.

	* gas/ia64/regs.s: Add tests for ar.ruc and ar44.

	* gas/ia64/dv-raw-err.l: Updated.
	* gas/ia64/dv-waw-err.l: Likewise.
	* gas/ia64/invalid-ar.l: Likewise.
	* gas/ia64/regs.d: Likewise.

opcodes/

2007-11-14  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-ic.tbl: Updated for Itanium 9100 series.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

2007-11-14  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Handle ar.ruc.
	* ia64-gen.c (lookup_regindex): Likewise.
 2007-11-14 22:31:54 +00:00
Nick Clifton
57d85092b1 PR gas/5228 
* m68k-opc.c (m68k_opcodes): Fix coldfire msac.w instructions with parallel loads.
 2007-11-07 16:37:44 +00:00
Tristan Gingold
679936aac4 * ia64-dis.c (print_insn_ia64): Generate symbolic names for cr 
registers instead of register number.

* gas/ia64/regs.d: Expect symbolic names for cr registers due to
 improved disassembler.
 2007-11-07 15:57:14 +00:00
Nick Clifton
92c8bd791d * arm-dis.c (arm_opcodes): Remove superflous escapes of percent operators. 2007-11-07 14:40:40 +00:00
Peter Bergner
548b1dcfcb * ppc-opc.c (powerpc_opcodes): Remove the dcffix and dcffix. opcodes 
which are not included in the "Preliminary Decimal Floating-Point
	Architecture" document.
 2007-11-06 23:14:07 +00:00
H.J. Lu
7ce189b305 gas/ 
2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Replace no_xsuf with
	no_ldsuf.
	(match_template): Likewise.

opcodes/

2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Replace No_xSuf with
	No_ldSuf.
	* i386-opc.tbl: Likewise.

	* i386-opc.h (No_xSuf): Renamed to ...
	(No_ldSuf): This.
	(FWait): Updated.
 2007-11-01 19:06:54 +00:00
H.J. Lu
ca61edf2ff gas/ 
2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Check addrprefixop0 to
	see if the address size override prefix changes the size of the
	first operand.
	(check_byte_reg): Don't warn if byteokintel is set.
	(check_long_reg): Set i.suffix to QWORD_MNEM_SUFFIX if toqword
	is set.
	(check_qword_reg): Set i.suffix to LONG_MNEM_SUFFIX if todword
	is set.

gas/testsuite/

2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.d: New.
	* gas/i386/i386.s: Likewise.

	* gas/i386/i386.exp: Run i386.

	* gas/i386/x86_64.s: Add tests for movsx, movsbl, movsbq,
	movsbw, movswl, movswq, movzx, movzb, movzbl, movzbq,
	movzbw, movzwl and movzwq.
	* gas/i386/x86_64.d: Updated.

opcodes/

2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword,
	ToQword and AddrPrefixOp0.

	* i386-opc.h (ByteOkIntel): New.
	(ToDword): Likewise.
	(ToQword): Likewise.
	(AddrPrefixOp0): Likewise.
	(IsPrefix): Updated.
	(i386_opcode_modifier): Add byteokintel, todword, toqword
	and addrprefixop0.

	* i386-opc.tbl (cvtss2si): Add ToQword.
	(cvttss2si): Likewise.
	(cvtsd2si): Add ToDword.
	(cvttsd2si): Likewise.
	(monitor): Add AddrPrefixOp0.
	(invlpga): Likewise.
	(vmload): Likewise.
	(vmrun): Likewise.
	(vmsave): Likewise.
	(pextrb): Add ByteOkIntel.
	(pinsrb): Likewise.
	* i386-tbl.h: Regenerated.
 2007-11-01 16:27:08 +00:00
H.J. Lu
1b0d430b05 2007-10-31 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (USE_REG_TABLE): Defined as the previous one + 1.
	(USE_REG_TABLE): Likewise.
	(USE_MOD_TABLE): Likewise.
	(USE_RM_TABLE): Likewise.
	(USE_PREFIX_TABLE): Likewise.
	(USE_X86_64_TABLE): Likewise.
	(USE_3BYTE_TABLE): Likewise.
 2007-10-31 23:41:12 +00:00
H.J. Lu
75c135a8a4 2007-10-26 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3): New.
	(MOD_0F51): Likewise.
	(MOD_0FD7): Likewise.
	(MOD_0FE7_PREFIX_2): Likewise.
	(MOD_0F382A_PREFIX_2): Likewise.
	(MOD_0F71_REG_2): Updated.
	(MOD_0FF0_PREFIX_3): Likewise.
	(MOD_62_32BIT): Likewise.
	(dis386_twobyte): Use MOD_0F51 and  MOD_0FD7.
	(prefix_table): Use MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3,
	MOD_0FE7_PREFIX_2 and MOD_0F382A_PREFIX_2.
	(mod_table): Add MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3,
	MOD_0F51, MOD_0FD7 and MOD_0F382A_PREFIX_2.
 2007-10-26 20:48:09 +00:00
Nick Clifton
2cc7bb5dcf * arm-dis.c (print_insn): Check for a symtab that exists but is empty. 2007-10-26 11:27:12 +00:00
Alan Modra
79f7344f10 * po/POTFILES.in: Regenerate. 2007-10-24 04:57:04 +00:00
H.J. Lu
ad19981d72 gas/testsuite/ 
2007-10-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/katmai.s: Remove cmpps opcode test.

	* gas/i386/simd.s: Add tests for cmpss and cmpsd.
	* gas/i386/x86-64-simd.s: Likewise.

	* gas/i386/katmai.d: Updated.
	* gas/i386/simd-intel.d: Likewise.
	* gas/i386/simd-suffix.d: Likewise.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd-suffix.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-10-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_SIMD_Suffix): Renamed to ...
	(CMP_Fixup): This.  Rewrite.
	(OPSIMD): Renamed to ...
	(CMP): This. Updated.
	(prefix_table): Update PREFIX_0FC2 entry.
 2007-10-23 22:52:09 +00:00
H.J. Lu
92fddf8e3d 2007-10-22 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (prefix_table): Reordered by opcode.
	(mod_table): Likewise.
 2007-10-22 19:22:01 +00:00
H.J. Lu
6a718ea22c 2007-10-19 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (prefix_table): Use XS on psrldq and pslldq.
 2007-10-19 23:24:00 +00:00
Nathan Sidwell
25b07cd9c4 opcodes/ 
* m68k-opc.c (m68k_opcodes): Correct move sr and ccr masks for
	coldfire.

	gas/testsuite/
	* gas/m68k/mcf-movsr.s: New.
	* gas/m68k/mcf-movsr.d: New.
	* gas/m68k/all.exp: Add mcf-movsr test.
 2007-10-17 13:44:09 +00:00
Peter Bergner
91eb7075e3 * ppc-opc.c (powerpc_opcodes): Fix the first two operands of 
dquaiq. to use the TE and FRT macros.
 2007-10-16 02:55:30 +00:00
Peter Bergner
8dbcd839b1 gas/ 
* config/tc-ppc.c (ppc_setup_opcodes): Verify instructions are sorted
	according to major opcode number.

opcodes/

	* ppc-opc.c (TE): Correct signedness.
	(powerpc_opcodes): Sort psq_st and psq_stu according to major
	opcode number.
 2007-10-16 02:26:30 +00:00
H.J. Lu
d5d7db8e2f 2007-10-15 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (dis386_twobyte): Reformat.
	(prefix_table):  Likewise.
	(three_byte_table): Likewise.
 2007-10-15 19:13:55 +00:00
Alan Modra
65be13330d * mcore-dis.c (print_insn_mcore): Protect "fprintf" var against 
macro expansion.
 2007-10-15 02:01:40 +00:00
H.J. Lu
e2ec9d29b7 gas/ 
2007-10-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Check the firstxmm0
	field in opcode_modifier for instruction with a implicit
	xmm0 as the first operand.

opcodes/

2007-10-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add FirstXmm0.

	* i386-opc.h (FirstXmm0): New.
	(IsPrefix): Updated.
	(i386_opcode_modifier): Add firstxmm0.

	* i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0.
	(blendvps): Likewise.
	(pblendvb): Likewise.
	* i386-tbl.h: Regenerated.
 2007-10-12 21:40:38 +00:00
H.J. Lu
88a94849aa 2007-10-12 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (prefix_table): Reformat pblendvb and blendvps.
 2007-10-12 20:37:58 +00:00
H.J. Lu
630c2cc56d Remove extra white space. 2007-10-10 22:00:24 +00:00