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Author SHA1 Message Date
H.J. Lu
dae39accc2 gas/ 
2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
	FMA.

gas/testsuite/

2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.d: Updated.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.

opcodes/

2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_VEX_FMA): New.
	(OP_EX_VexImmW): Likewise.
	(VexFMA): Likewise.
	(Vex128FMA): Likewise.
	(EXVexImmW): Likewise.
	(get_vex_imm8): Likewise.
	(OP_EX_VexReg): Likewise.
	(vex_i4_done): Renamed to ...
	(vex_w_done): This.
	(prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
	and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
	FMA instructions.
	(print_insn): Updated.
	(OP_EX_VexW): Rewrite to swap register in VEX with EX.
	(OP_REG_VexI4): Check invalid high registers.
 2008-04-18 13:10:32 +00:00
H.J. Lu
06c8514ace 2008-04-07 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (PREFIX_VEX_38XX): Add a tab.
	(PREFIX_VEX_3AXX): Likewis.
 2008-04-07 21:29:50 +00:00
H.J. Lu
c0f3af977b binutils/ 
2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (dwarf_regnames_i386): Add AVX registers.
	(dwarf_regnames_x86_64): Likewise.

gas/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.

	* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
	Document -msse2avx, .avx, .aes, .clmul and .fma.

	* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
	(vex_prefix): Likewise.
	(sse2avx): Likewise.
	(CPU_FLAGS_ARCH_MATCH): Likewise.
	(CPU_FLAGS_64BIT_MATCH): Likewise.
	(CPU_FLAGS_32BIT_MATCH): Likewise.
	(CPU_FLAGS_PERFECT_MATCH): Likewise.
	(regymm): Likewise.
	(vex_imm4): Likewise.
	(fits_in_imm4): Likewise.
	(build_vex_prefix): Likewise.
	(VEX_check_operands): Likewise.
	(bad_implicit_operand): Likewise.
	(OPTION_MSSE2AVX): Likewise.
	(T_YMMWORD): Likewise.
	(_i386_insn): Add vex.
	(cpu_arch): Add .avx, .aes, .clmul and .fma.
	(cpu_flags_match): Changed to take a pointer to const template.
	Enable encoding SSE instructions with VEX prefix for -msse2avx.
	(match_mem_size): Also check ymmword.
	(operand_type_match): Clear ymmword.
	(md_begin): Allow '_' in mnemonic.
	(type_names): Add OPERAND_TYPE_VEX_IMM4.
	(process_immext): Update assert.
	(md_assemble): Don't call process_immext if sse2avx and immext
	are true.  Call build_vex_prefix if vex is true.
	(parse_insn): Updated for cpu_flags_match.
	(swap_operands): Handle 5 operands.
	(match_template): Handle 5 operands. Updated for cpu_flags_match.
	Check regymm.  Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
	(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
	(check_byte_reg): Check regymm.
	(process_operands): Duplicate the destination register for
	-msse2avx if needed.
	(build_modrm_byte): Updated for instructions with VEX encoding.
	(output_insn): Output VEX prefix if needed.
	(md_longopts): Add msse2avx.
	(md_parse_option): Handle OPTION_MSSE2AVX.
	(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
	(intel_e09): Support YMMWORD.
	(intel_e11): Likewise.
	(intel_get_token): Likewise.

gas/testsuite/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
	x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
	x86-64-avx-intel and x86-64-inval-avx.

	* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
	* gas/cfi/cfi-x86_64.s: Likewise.

	* gas/i386/aes.d: New.
	* gas/i386/aes.s: Likewise.
	* gas/i386/aes-intel.d: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx.s: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/clmul.d: Likewise.
	* gas/i386/clmul-intel.d: Likewise.
	* gas/i386/clmul.s: Likewise.
	* gas/i386/i386.exp: Likewise.
	* gas/i386/inval-avx.l: Likewise.
	* gas/i386/inval-avx.s: Likewise.
	* gas/i386/sse2avx.d: Likewise.
	* gas/i386/sse2avx.s: Likewise.
	* gas/i386/x86-64-aes.d: Likewise.
	* gas/i386/x86-64-aes.s: Likewise.
	* gas/i386/x86-64-aes-intel.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-clmul.d: Likewise.
	* gas/i386/x86-64-clmul-intel.d: Likewise.
	* gas/i386/x86-64-clmul.s: Likewise.
	* gas/i386/x86-64-inval-avx.l: Likewise.
	* gas/i386/x86-64-inval-avx.s: Likewise.
	* gas/i386/x86-64-sse2avx.d: Likewise.
	* gas/i386/x86-64-sse2avx.s: Likewise.

	* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/rexw.s: Add AVX tests.

	* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.

	* gas/cfi/cfi-i386.d: Updated.
	* gas/cfi/cfi-x86_64.d: Likewise.
	* gas/i386/arch-10.d:  Likewise.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/rexw.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval-intel.d: Likewise.

include/opcode/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (MAX_OPERANDS): Set to 5.
	(MAX_MNEM_SIZE): Changed to 20.

opcodes/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_register): New.
	(OP_E_memory): Likewise.
	(OP_VEX): Likewise.
	(OP_EX_Vex): Likewise.
	(OP_EX_VexW): Likewise.
	(OP_XMM_Vex): Likewise.
	(OP_XMM_VexW): Likewise.
	(OP_REG_VexI4): Likewise.
	(PCLMUL_Fixup): Likewise.
	(VEXI4_Fixup): Likewise.
	(VZERO_Fixup): Likewise.
	(VCMP_Fixup): Likewise.
	(VPERMIL2_Fixup): Likewise.
	(rex_original): Likewise.
	(rex_ignored): Likewise.
	(Mxmm): Likewise.
	(XMM): Likewise.
	(EXxmm): Likewise.
	(EXxmmq): Likewise.
	(EXymmq): Likewise.
	(Vex): Likewise.
	(Vex128): Likewise.
	(Vex256): Likewise.
	(VexI4): Likewise.
	(EXdVex): Likewise.
	(EXqVex): Likewise.
	(EXVexW): Likewise.
	(EXdVexW): Likewise.
	(EXqVexW): Likewise.
	(XMVex): Likewise.
	(XMVexW): Likewise.
	(XMVexI4): Likewise.
	(PCLMUL): Likewise.
	(VZERO): Likewise.
	(VCMP): Likewise.
	(VPERMIL2): Likewise.
	(xmm_mode): Likewise.
	(xmmq_mode): Likewise.
	(ymmq_mode): Likewise.
	(vex_mode): Likewise.
	(vex128_mode): Likewise.
	(vex256_mode): Likewise.
	(USE_VEX_C4_TABLE): Likewise.
	(USE_VEX_C5_TABLE): Likewise.
	(USE_VEX_LEN_TABLE): Likewise.
	(VEX_C4_TABLE): Likewise.
	(VEX_C5_TABLE): Likewise.
	(VEX_LEN_TABLE): Likewise.
	(REG_VEX_XX): Likewise.
	(MOD_VEX_XXX): Likewise.
	(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
	(PREFIX_0F3A44): Likewise.
	(PREFIX_0F3ADF): Likewise.
	(PREFIX_VEX_XXX): Likewise.
	(VEX_OF): Likewise.
	(VEX_OF38): Likewise.
	(VEX_OF3A): Likewise.
	(VEX_LEN_XXX): Likewise.
	(vex): Likewise.
	(need_vex): Likewise.
	(need_vex_reg): Likewise.
	(vex_i4_done): Likewise.
	(vex_table): Likewise.
	(vex_len_table): Likewise.
	(OP_REG_VexI4): Likewise.
	(vex_cmp_op): Likewise.
	(pclmul_op): Likewise.
	(vpermil2_op): Likewise.
	(m_mode): Updated.
	(es_reg): Likewise.
	(PREFIX_0F38F0): Likewise.
	(PREFIX_0F3A60): Likewise.
	(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
	(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
	and PREFIX_VEX_XXX entries.
	(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
	(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
	PREFIX_0F3ADF.
	(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
	Add MOD_VEX_XXX entries.
	(ckprefix): Initialize rex_original and rex_ignored.  Store the
	REX byte in rex_original.
	(get_valid_dis386): Handle the implicit prefix in VEX prefix
	bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
	(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
	calling get_valid_dis386.  Use rex_original and rex_ignored when
	printing out REX.
	(putop): Handle "XY".
	(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
	ymmq_mode.
	(OP_E_extended): Updated to use OP_E_register and
	OP_E_memory.
	(OP_XMM): Handle VEX.
	(OP_EX): Likewise.
	(XMM_Fixup): Likewise.
	(CMP_Fixup): Use ARRAY_SIZE.

	* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
	CPU_FMA_FLAGS and CPU_AVX_FLAGS.
	(operand_type_init): Add OPERAND_TYPE_REGYMM and
	OPERAND_TYPE_VEX_IMM4.
	(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
	(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
	VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
	VexImmExt and SSE2AVX.
	(operand_types): Add RegYMM, Ymmword and Vex_Imm4.

	* i386-opc.h (CpuAVX): New.
	(CpuAES): Likewise.
	(CpuCLMUL): Likewise.
	(CpuFMA): Likewise.
	(Vex): Likewise.
	(Vex256): Likewise.
	(VexNDS): Likewise.
	(VexNDD): Likewise.
	(VexW0): Likewise.
	(VexW1): Likewise.
	(Vex0F): Likewise.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(Vex3Sources): Likewise.
	(VexImmExt): Likewise.
	(SSE2AVX): Likewise.
	(RegYMM): Likewise.
	(Ymmword): Likewise.
	(Vex_Imm4): Likewise.
	(Implicit1stXmm0): Likewise.
	(CpuXsave): Updated.
	(CpuLM): Likewise.
	(ByteOkIntel): Likewise.
	(OldGcc): Likewise.
	(Control): Likewise.
	(Unspecified): Likewise.
	(OTMax): Likewise.
	(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
	(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
	vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
	vex3sources, veximmext and sse2avx.
	(i386_operand_type): Add regymm, ymmword and vex_imm4.

	* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.

	* i386-reg.tbl: Add AVX registers, ymm0..ymm15.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-04-03 14:03:21 +00:00
Jan Beulich
34b772a651 gas/ 
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (intel_e09): Also special-case 'bound'.

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
	* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
	gas/i386/opcode-intel.d: Adjust.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.
 2008-02-13 13:29:31 +00:00
H.J. Lu
475a2301db gas/testsuite/ 
2002-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave
	and x86-64-xsave-intel.

	* gas/i386/x86-64-xsave-intel.d: New file.
	* gas/i386/x86-64-xsave.d: Likewise.
	* gas/i386/x86-64-xsave.s: Likewise.
	* gas/i386/xsave-intel.d: Likewise.
	* gas/i386/xsave.d: Likewise.
	* gas/i386/xsave.s: Likewise.

opcodes/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flags): Add CpuXsave.

	* i386-opc.h (CpuXsave): New.
	(Cpu64): Updated.
	(i386_cpu_flags): Add cpuxsave.

	* i386-dis.c (MOD_0FAE_REG_4): New.
	(RM_0F01_REG_2): Likewise.
	(MOD_0FAE_REG_5): Updated.
	(RM_0F01_REG_3): Likewise.
	(reg_table): Use MOD_0FAE_REG_4.
	(mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
	for xrstor.
	(rm_table): Add RM_0F01_REG_2.

	* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-02-12 00:04:45 +00:00
H.J. Lu
82c18208b8 gas/testsuite/ 
2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-sib.s: Add tests for r12.

	* gas/i386/x86-64-sib-intel.d: Updated.
	* gas/i386/x86-64-sib.d: Likewise.

opcodes/

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Handle r12 like rsp.
 2008-01-24 15:11:35 +00:00
H.J. Lu
4ee521786f 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (Mx): New.
	(PREFIX_0FC3): Likewise.
	(PREFIX_0FC7_REG_6): Updated.
	(dis386_twobyte): Use PREFIX_0FC3.
	(prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
	Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
	movntss.
 2008-01-15 17:20:50 +00:00
H.J. Lu
b5b1fc4fc8 gas/testsuite/ 
2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/nops.s: Add more tests with opcodes from 0x0f19
	to 0x0f1f.
	* gas/i386/x86-64-nops.s: Likewise.

	* gas/i386/nops.d: Updated.
	* gas/i386/x86-64-nops.d: Likewise.

opcodes/

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
	(REG_0F18): Updated.
	(reg_table): Updated.
	(dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
	(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 2008-01-10 14:52:35 +00:00
H.J. Lu
98b528ac84 gas/testsuite/ 
2007-12-31  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/inval.s: Add test for cvtsi2ss/cvtsi2sd.
	* gas/i386/simd.s: Likewise.
	* gas/i386/x86-64-simd.s: Likewise.

	* gas/i386/inval.l: Updated.
	* gas/i386/simd-intel.d: Likewise.
	* gas/i386/simd-suffix.d: Likewise.
	* gas/i386/simd.d: Likewise.
	* gas/i386/sse2.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd-suffix.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-12-31  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Use "%LQ" on cvtpi2ps/cvtsi2sd.
	(putop): Handle '%' and "LQ".

	* i386-opc.tbl: Remove IgnoreSize from cvtpi2ps/cvtsi2sd.
	* i386-tbl.h: Regenerated.
 2007-12-31 15:42:22 +00:00
H.J. Lu
9d14166966 binutils/ 
2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/binutils.texi: Document the new intel-mnemonic and
	intel-mnemonic options for i386 disassembler.

gas/testsuite/

2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/compat-intel.d: New file.
	* gas/i386/compat.d: Likewise.
	* gas/i386/compat.s: Likewise.

	* gas/i386/i386.exp: Run compat.

opcodes/

2007-12-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (intel_mnemonic): New.
	(print_i386_disassembler_options): Display att-mnemonic and
	intel-mnemonic options.
	(print_insn): Handle att-mnemonic and intel-mnemonic.
	(float_reg): Replace SYSV386_COMPAT with "!M" and "M".
	(putop): Handle "!M" and "M".
 2007-12-22 14:06:31 +00:00
H.J. Lu
1b0d430b05 2007-10-31 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (USE_REG_TABLE): Defined as the previous one + 1.
	(USE_REG_TABLE): Likewise.
	(USE_MOD_TABLE): Likewise.
	(USE_RM_TABLE): Likewise.
	(USE_PREFIX_TABLE): Likewise.
	(USE_X86_64_TABLE): Likewise.
	(USE_3BYTE_TABLE): Likewise.
 2007-10-31 23:41:12 +00:00
H.J. Lu
75c135a8a4 2007-10-26 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3): New.
	(MOD_0F51): Likewise.
	(MOD_0FD7): Likewise.
	(MOD_0FE7_PREFIX_2): Likewise.
	(MOD_0F382A_PREFIX_2): Likewise.
	(MOD_0F71_REG_2): Updated.
	(MOD_0FF0_PREFIX_3): Likewise.
	(MOD_62_32BIT): Likewise.
	(dis386_twobyte): Use MOD_0F51 and  MOD_0FD7.
	(prefix_table): Use MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3,
	MOD_0FE7_PREFIX_2 and MOD_0F382A_PREFIX_2.
	(mod_table): Add MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3,
	MOD_0F51, MOD_0FD7 and MOD_0F382A_PREFIX_2.
 2007-10-26 20:48:09 +00:00
H.J. Lu
ad19981d72 gas/testsuite/ 
2007-10-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/katmai.s: Remove cmpps opcode test.

	* gas/i386/simd.s: Add tests for cmpss and cmpsd.
	* gas/i386/x86-64-simd.s: Likewise.

	* gas/i386/katmai.d: Updated.
	* gas/i386/simd-intel.d: Likewise.
	* gas/i386/simd-suffix.d: Likewise.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd-suffix.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-10-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_SIMD_Suffix): Renamed to ...
	(CMP_Fixup): This.  Rewrite.
	(OPSIMD): Renamed to ...
	(CMP): This. Updated.
	(prefix_table): Update PREFIX_0FC2 entry.
 2007-10-23 22:52:09 +00:00
H.J. Lu
92fddf8e3d 2007-10-22 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (prefix_table): Reordered by opcode.
	(mod_table): Likewise.
 2007-10-22 19:22:01 +00:00
H.J. Lu
6a718ea22c 2007-10-19 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (prefix_table): Use XS on psrldq and pslldq.
 2007-10-19 23:24:00 +00:00
H.J. Lu
d5d7db8e2f 2007-10-15 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (dis386_twobyte): Reformat.
	(prefix_table):  Likewise.
	(three_byte_table): Likewise.
 2007-10-15 19:13:55 +00:00
H.J. Lu
88a94849aa 2007-10-12 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (prefix_table): Reformat pblendvb and blendvps.
 2007-10-12 20:37:58 +00:00
H.J. Lu
630c2cc56d Remove extra white space. 2007-10-10 22:00:24 +00:00
H.J. Lu
d55ee72f29 2007-10-10 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (v_mode): Defined as previous one + 1.
	(w_mode): Likewise.
	(d_mode): Likewise.
	(q_mode): Likewise.
	(t_mode): Likewise.
	(x_mode): Likewise.
	(m_mode): Likewise.
	(cond_jump_mode): Likewise.
	(loop_jcxz_mode): Likewise.
	(dq_mode): Likewise.
	(dqw_mode): Likewise.
	(f_mode): Likewise.
	(const_1_mode): Likewise.
	(stack_v_mode): Likewise.
	(z_mode): Likewise.
	(o_mode): Likewise.
	(dqb_mode): Likewise.
	(dqd_mode): Likewise.
	(es_reg): Likewise.
	(cs_reg): Likewise.
	(ss_reg): Likewise.
	(ds_reg): Likewise.
	(fs_reg): Likewise.
	(gs_reg): Likewise.
	(eAX_reg): Likewise.
	(eCX_reg): Likewise.
	(eDX_reg): Likewise.
	(eBX_reg): Likewise.
	(eSP_reg): Likewise.
	(eBP_reg): Likewise.
	(eSI_reg): Likewise.
	(eDI_reg): Likewise.
	(al_reg): Likewise.
	(cl_reg): Likewise.
	(dl_reg): Likewise.
	(bl_reg): Likewise.
	(ah_reg): Likewise.
	(ch_reg): Likewise.
	(dh_reg): Likewise.
	(bh_reg): Likewise.
	(ax_reg): Likewise.
	(cx_reg): Likewise.
	(dx_reg): Likewise.
	(bx_reg): Likewise.
	(sp_reg): Likewise.
	(bp_reg): Likewise.
	(si_reg): Likewise.
	(di_reg): Likewise.
	(rAX_reg): Likewise.
	(rCX_reg): Likewise.
	(rDX_reg): Likewise.
	(rBX_reg): Likewise.
	(rSP_reg): Likewise.
	(rBP_reg): Likewise.
	(rSI_reg): Likewise.
	(rDI_reg): Likewise.
	(z_mode_ax_reg): Likewise.
	(indir_dx_reg): Likewise.
	(DREX_OC1): Updated.
	(DREX_NO_OC0): Likewise.
	(DREX_MASK): Likewise.
	(MAX_BYTEMODE): New.  Issue an error if MAX_BYTEMODE is not
	less than DREX_OC1.
 2007-10-10 16:25:02 +00:00
H.J. Lu
8a72226ad5 gas/testsuite/ 
2007-10-08  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run simd-suffix and x86-64-simd-suffix.

	* gas/i386/simd-suffix.d: New.
	* gas/i386/x86-64-simd-suffix.d: Likewise.

	* gas/i386/x86-64-opcode.d: Updated.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-10-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c: Updated comments for 'Y'.
	(putop): Don't add 'q' for 'Y' if suffix_always isn't true.
 2007-10-08 19:22:01 +00:00
H.J. Lu
47dd174cba gas/testsuite/ 
2007-10-05  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run smx.

	* gas/i386/smx.d: New.
	* gas/i386/smx.s: Likewise.

opcodes/

2007-10-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Add getsec.

	* i386-gen.c (cpu_flags): Add CpuSMX.

	* i386-opc.h (CpuSMX): New.
	(CpuSSSE3): Updated.
	(i386_cpu_flags): Add cpusmx.

	* i386-opc.tbl: Add getsec.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2007-10-05 19:04:06 +00:00
H.J. Lu
058f233b7a 2007-10-05 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (reg_table): Use "{ XX }" on "(bad)".
	(prefix_table): Likewise.
 2007-10-05 16:28:16 +00:00
H.J. Lu
f2a421c445 gas/testsuite/ 
2007-10-04  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/simd.s: Add tests for unpckhpd and unpckhps.
	* gas/i386/x86-64-simd.s: Likewise.

	* gas/i386/simd-intel.d: Updated.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-10-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use EXx instead of EXq on
	unpckhpX and unpckhpX.
 2007-10-04 22:02:10 +00:00
H.J. Lu
df26e7af07 2007-10-04 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (MOD_0F12_PREFIX_0): Use "movlps" and "movhlps"
	instead of "movlpX" and "movhlpX", respectively.
	(MOD_0F16_PREFIX_0): Use "movhps" and "movlhps" instead of
	"movhpX" and "movlhpX", respectively.
 2007-10-04 21:02:38 +00:00
H.J. Lu
9b60702d0c 2007-10-03 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (OP_REG): Set add to 0 only when needed.
	(OP_C): Likewise.
	(OP_D): Likewise.
	(OP_MMX): Likewise.
	(OP_XMM): Likewise.
	(OP_EM): Likewise.
	(OP_MXC): Likewise.
	(OP_EX): Likewise.
 2007-10-03 19:30:44 +00:00
H.J. Lu
89b66d557a 2007-10-01 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (THREE_BYTE_0FBA): Renamed to ...
	(THREE_BYTE_0F7B): This.
	(dis386_twobyte): Updated.
	(three_byte_table): Updated comments.
 2007-10-01 22:23:20 +00:00
H.J. Lu
4584a60d9f 2007-09-30 H.J. Lu <hongjiu.lu@intel.com> 
* 386-dis.c (prefix_table): Reformat comment.
 2007-09-30 19:14:47 +00:00
H.J. Lu
1ceb70f8ad 2007-09-29 H.J. Lu <hongjiu.lu@intel.com> 
* 386-dis.c (USE_GROUPS): Renamed to ...
	(USE_REG_TABLE): This.
	(USE_OPC_EXT_TABLE): Renamed to ...
	(USE_MOD_TABLE): This.
	(USE_OPC_EXT_RM_TABLE): Renamed to ...
	(USE_RM_TABLE): This.
	(USE_XXX_TABLE): Reordered.
	(GRP): Renamed to ...
	(REG_TABLE): This.
	(OPC_EXT_TABLE): Renamed to ...
	(MOD_TABLE): This.
	(OPC_EXT_RM_TABLE): Renamed to ...
	(RM_TABLE): This.
	(GRP_XXX): Renamed to ...
	(REG_XXX): This.
	(PREGRP_XXX): Renamed to ...
	(PREFIX_XXX): This.
	(OPC_EXT_XXX): Renamed to ...
	(MOD_XXX): This.
	(OPC_EXT_RM_XXX): Renamed to ...
	(RM_XXX): This.
	(grps): Renamed to ...
	(reg_table): This
	(prefix_user_table): Renamed to ...
	(prefix_table): This
	(opc_ext_table): Renamed to ...
	(mod_table): This
	(opc_ext_rm_table): Renamed to ...
	(rm_table): This
	(OPC_EXT_RM_XXX): Likewise.
	(dis386): Updated.
	(dis386_twobyte): Likewise.
	(reg_table): Likewise.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(three_byte_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(get_valid_dis386): Likewise.
 2007-09-29 14:43:44 +00:00
H.J. Lu
4e7d34a6c2 2007-09-28 H.J. Lu <hongjiu.lu@intel.com> 
* 386-dis.c (USE_PREFIX_USER_TABLE): Renamed to ...
	(USE_PREFIX_TABLE): This.
	(X86_64_SPECIAL): Renamed to ...
	(USE_X86_64_TABLE): This.
	(IS_3BYTE_OPCODE): Renamed to ...
	(USE_3BYTE_TABLE): This.
	(GRPXXX): Removed.
	(PREGRPXXX): Likewise.
	(X86_64_XXX): Likewise.
	(THREE_BYTE_XXX): Likewise.
	(OPC_EXT_XXX): Likewise.
	(OPC_EXT_RM_XXX): Likewise.
	(DIS386): New.
	(GRP): Likewise.
	(PREGRP): Likewise.
	(X86_64_TABLE): Likewise.
	(THREE_BYTE_TABLE): Likewise.
	(OPC_EXT_TABLE): Likewise.
	(OPC_EXT_RM_TABLE): Likewise.
	(GRP_XXX): Likewise.
	(PREGRP_XXX): Likewise.
	(X86_64_XXX): Likewise.
	(THREE_BYTE_XXX): Likewise.
	(OPC_EXT_XXX): Likewise.
	(OPC_EXT_RM_XXX): Likewise.
	(dis386): Updated.
	(dis386_twobyte): Likewise.
	(grps): Likewise.
	(prefix_user_table): Likewise.
	(x86_64_table): Likewise.
	(three_byte_table): Likewise.
	(opc_ext_table): Likewise.
	(opc_ext_rm_table): Likewise.
	(get_valid_dis386): Likewise.
 2007-09-28 20:50:59 +00:00
H.J. Lu
6807063ec6 2007-09-27 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (dis386): Swap X86_64_27 with OPC_EXT_2.
	(x86_64_table): Likewise.
	(opc_ext_table): Likewise.
 2007-09-27 21:53:28 +00:00
H.J. Lu
7c52e0e865 gas/testsuite/gas/ 
2007-09-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/5072
	* gas/i386/i386.exp: Run x86-64-opcode-inval and
	x86-64-opcode-inval-intel.

	* gas/i386/x86-64-opcode-inval-intel.d: New.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval.s: Likewise.

opcodes/

2007-09-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/5072
	* i386-dis.c: Update comments on '{', '}' and '|' to support
	only AT&T and Intel modes.
	(X86_64_4...X86_64_27): New.
	(dis386): Updated.  Use X86_64_4...X86_64_21.
	(dis386_twobyte): Updated.
	(float_mem): Likewise.
	(x86_64_table): Add X86_64_4...X86_64_27.
	(opc_ext_table): Updated.  Use X86_64_22 and X86_64_27.
	(putop): Updated handling of '{', '}' and '|' to support only
	AT&T and Intel modes.
 2007-09-27 18:31:51 +00:00
Jan Beulich
8776771175 gas/testsuite/ 
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/x86-64-addr32.d: Adjust expectations.

opcodes/
2007-09-26  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (OP_E_extended): Distinguish rip- and eip-
	relative addressing. Update used_prefixes based on whether any
	base or index register was printed.
 2007-09-26 13:42:14 +00:00
H.J. Lu
20afcfb756 gas/testsuite/ 
2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/sib.s: Add more eiz tests.
	* gas/i386/x86-64-sib.s: Add more riz tests.

	* gas/i386/sib-intel.d: Updated.
	* gas/i386/sib.d: Likewise.
	* gas/i386/x86-64-sib-intel.d: Likewise.
	* gas/i386/x86-64-sib.d: Likewise.

opcodes/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Display eiz for [eiz*1 + offset].
 2007-09-20 20:13:26 +00:00
H.J. Lu
db51cc60e2 gas/ 
2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed.
	(set_allow_index_reg): New.
	(allow_index_reg): Likewise.
	(md_pseudo_table): Add "allow_index_reg" and
	"disallow_index_reg".
	(build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for
	fake index registers.
	(i386_scale): Updated.
	(i386_index_check): Support fake index registers.
	(parse_real_register): Return NULL on eiz/riz if fake index
	registers aren't allowed.

gas/testsuite/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* gas/i386/i386.exp: Run sib-intel, x86-64-sib and
	x86-64-sib-intel.

	* gas/i386/nops-1-i386-i686.d: Updated.
	* gas/i386/nops-1-i386.d: Likewise.
	* gas/i386/nops-1.d: Likewise.
	* gas/i386/nops-2-i386.d: Likewise.
	* gas/i386/nops-2-merom.d: Likewise.
	* gas/i386/nops-2.d: Likewise.
	* gas/i386/nops-3-i386.d: Likewise.
	* gas/i386/nops-3.d : Likewise.
	* gas/i386/sib.d: Likewise.

	* gas/i386/sib.s: Use %eiz in testcases.

	* gas/i386/sib-intel.d: New.
	* gas/i386/x86-64-sib-intel.d: Likewise.
	* gas/i386/x86-64-sib.d: Likewise.
	* gas/i386/x86-64-sib.s: Likewise.

ld/testsuite/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* ld-i386/tlsbin.dd: Updated.
	* ld-i386/tlsld1.dd: Likewise.

opcodes/

2007-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 658
	* 386-dis.c (index64): New.
	(index32): Likewise.
	(intel_index64): Likewise.
	(intel_index32): Likewise.
	(att_index64): Likewise.
	(att_index32): Likewise.
	(print_insn): Set index64 and index32.
	(OP_E_extended): Use index64/index32 for index register for
	SIB with INDEX == 4.

	* i386-opc.h (RegEiz): New.
	(RegRiz): Likewise.

	* i386-reg.tbl: Add eiz and riz.
	* i386-tbl.h: Regenerated.
 2007-09-20 17:38:38 +00:00
H.J. Lu
0f7da3979d gas/testsuite/gas/ 
2007-09-19  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/intelok.s: Add tests for memory without base.
	* gas/i386/intelok.d: Updated.
	* gas/i386/intelok.e: Likewise.

opcodes/

2007-09-19  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_extended): Always display scale for memory.
 2007-09-19 17:52:21 +00:00
Michael Meissner
85f10a010c Add AMD SSE5 support 2007-09-14 18:21:09 +00:00
H.J. Lu
8bb1533941 2007-09-13 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (get_valid_dis386): Take a pointer to
	disassemble_info.  Handle IS_3BYTE_OPCODE.
	(print_insn): Updated.  Don't handle IS_3BYTE_OPCODE here.
 2007-09-14 00:20:03 +00:00
H.J. Lu
1afd85e30f 2007-08-31 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (OPC_EXT_40...OPC_EXT_45): New.
	(dis386_twobyte): Use OPC_EXT_40...OPC_EXT_45.
	(opc_ext_table): Add OPC_EXT_40...OPC_EXT_45.
 2007-08-31 20:55:13 +00:00
H.J. Lu
144c41d992 gas/testsuite/ 
2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/svme.s: Updated to accept eax in 32bit and rax in
	64bit.
	* gas/i386/svme.d: Updated.
	* gas/i386/svme64.d: Likewise.

opcodes/

2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (SVME_Fixup): Removed.
	(OPC_EXT_39): New.
	(OPC_EXT_RM_6): Likewise.
	(grps): Use OPC_EXT_39.
	(opc_ext_table): Add OPC_EXT_39.
	(opc_ext_rm_table): Add OPC_EXT_RM_6.

	* i386-opc.tbl: Correct SVME instructions to take register
	operand only.
	* i386-tbl.h: Regenerated.
 2007-08-31 18:48:29 +00:00
H.J. Lu
dabbade67e 2007-08-31 H.J. Lu <hongjiu.lu@intel.com> 
* Makefile.am (INCLUDES): Remove -D_GNU_SOURCE.
	* Makefile.in: Regenerated.

	* configure.in (AC_GNU_SOURCE): Added.
	(AC_PROG_CC): Moved before AC_GNU_SOURCE.
	(AC_CHECK_DECLS): Add stpcpy.
	* configure: Regenerated.
	* config.in: Likewise.

	* i386-dis.c: Include "sysdep.h" before "dis-asm.h".

	* sysdep.h (stpcpy): New.
 2007-08-31 14:55:10 +00:00
H.J. Lu
bbedc8321e gas/testsuite/ 
2007-08-30  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/amd.s: Add rdtscp.
	* gas/i386/amd.d: Updated.

	* gas/i386/mem-intel.d: Update invlpg for BYTE PTR.
	* gas/i386/x86-64-mem-intel.d: Likewise.

	* gas/i386/x86-64-opcode.s: Add swapgs.
	* gas/i386/x86-64-opcode.d: Updated.

opcodes/

2007-08-30  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (INVLPG_Fixup): Removed.
	(OPC_EXT_38): New.
	(OPC_EXT_RM_5): Likewise.
	(grps): Use OPC_EXT_38.
	(opc_ext_table): Add OPC_EXT_38.
	(opc_ext_rm_table): Add OPC_EXT_RM_5.
 2007-08-30 15:13:46 +00:00
H.J. Lu
876d4bfa30 2007-08-29 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (SIMD_Fixup): Removed.
	(OPC_EXT_34...OPC_EXT_37): New.
	(dis386_twobyte): Use OPC_EXT_34 and OPC_EXT_35.
	(prefix_user_table): Use OPC_EXT_36 and OPC_EXT_37.
	(opc_ext_table): Add OPC_EXT_34...OPC_EXT_37.
 2007-08-30 05:01:32 +00:00
H.J. Lu
d8faab4eaa 2007-08-29 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (OPC_EXT_25...OPC_EXT_33): New.
	(dis386): Use OPC_EXT_0...OPC_EXT_2.
	(dis386_twobyte): Use OPC_EXT_3...OPC_EXT_5.
	(grps): Updated to use OPC_EXT_6...OPC_EXT_31.
	(prefix_user_table): Use OPC_EXT_32.
	(x86_64_table): Use OPC_EXT_33.
	(opc_ext_table): Reorder and add OPC_EXT_25...OPC_EXT_33.
 2007-08-29 21:25:02 +00:00
H.J. Lu
c25c34f8fb 2007-08-29 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (prefix_user_table): Fix comment.
 2007-08-29 17:12:47 +00:00
H.J. Lu
b844680a9c gas/testsuite/ 
2007-08-29  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run reg and reg-intel.

	* gas/i386/katmai.d: Update bad instructions.

	* gas/i386/reg.s: New. Add tests for instructions with one
	register operand.
	* gas/i386/reg-intel.d: Likewise.
	* gas/i386/reg.d: Likewise.

opcodes/

2007-08-29  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_Skip_MODRM): New.
	(OP_Monitor): Likewise.
	(OP_Mwait): Likewise.
	(Mb): Likewise.
	(Skip_MODRM): Likewise.
	(USE_OPC_EXT_TABLE): Likewise.
	(USE_OPC_EXT_RM_TABLE): Likewise.
	(PREGRP98...PREGRP100): Likewise.
	(OPC_EXT_0...OPC_EXT_24): Likewise.
	(OPC_EXT_RM_0...OPC_EXT_RM_4): Likewise.
	(lock_prefix): Likewise.
	(data_prefix): Likewise.
	(addr_prefix): Likewise.
	(repz_prefix): Likewise.
	(repnz_prefix): Likewise.
	(opc_ext_table): Likewise.
	(opc_ext_rm_table): Likewise.
	(get_valid_dis386): Likewise.
	(OP_VMX): Removed.
	(OP_0fae): Likewise.
	(PNI_Fixup): Likewise.
	(VMX_Fixup): Likewise.
	(VM): Likewise.
	(twobyte_uses_DATA_prefix): Likewise.
	(twobyte_uses_REPNZ_prefix): Likewise.
	(twobyte_uses_REPZ_prefix): Likewise.
	(threebyte_0x38_uses_DATA_prefix): Likewise.
	(threebyte_0x38_uses_REPNZ_prefix): Likewise.
	(threebyte_0x38_uses_REPZ_prefix): Likewise.
	(threebyte_0x3a_uses_DATA_prefix): Likewise.
	(threebyte_0x3a_uses_REPNZ_prefix): Likewise.
	(threebyte_0x3a_uses_REPZ_prefix): Likewise.
	(grps): Use OPC_EXT_0...OPC_EXT_24.
	(prefix_user_table): Use PREGRP98.
	(print_insn): Remove uses_DATA_prefix, uses_LOCK_prefix,
	uses_REPNZ_prefix and uses_REPZ_prefix.  Initialize
	repz_prefix, repnz_prefix, lock_prefix, addr_prefix and
	data_prefix based on prefixes.  Call get_valid_dis386 to
	get a pointer to the valid dis386.  Print out prefixes if
	they aren't NULL.
	(OP_C): Clear lock_prefix if PREFIX_LOCK is used.
	(REP_Fixup): Set repz_prefix to "rep " when seeing
	PREFIX_REPZ.
 2007-08-29 15:34:42 +00:00
H.J. Lu
d9a5e5e5c9 gas/ 
2007-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Handle cmpxchg8b in
	Intel mode.

gas/testsuite/

2007-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/mem.s: New. Add tests for instructions with one
	memory operand.
	* gas/i386/x86-64-mem.s: Likewise.

	* gas/i386/mem-intel.d: Updated.
	* gas/i386/mem.d: Likewise.
	* gas/i386/x86-64-mem-intel.d: Likewise.
	* gas/i386/x86-64-mem.d: Likewise.

opcodes/

2007-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Md): New.
	(grps): Use 0 on invlpg.  Use M on fxsave and fxrstor.  Use
	Md on ldmxcsr and stmxcsr.  Use b_mode on clflush.
	(OP_0fae): Clear bytemode for sfence.
 2007-08-28 17:36:34 +00:00
Michael Snyder
7a3c21c92f 2007-08-01 Michael Snyder <msnyder@access-company.com> 
* i386-dis.c (print_insn): Guard against NULL.
 2007-08-02 00:40:02 +00:00
H.J. Lu
8976381e69 gas/testsuite/ 
2007-07-29  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4834
	* gas/i386/simd-intel.d: Updated.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

	* gas/i386/simd.s: Add tests for SSE4 instructions.
	* gas/i386/x86-64-simd.s: Likewise.

opcodes/

2007-07-29  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4834
	* i386-dis.c (EXw): New.
	(prefix_user_table): Updated to use EXw, EXd and EXq for SSE4
	instructions when appropriated.
 2007-07-29 19:43:36 +00:00
H.J. Lu
09335d057c gas/testsuite/ 
2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4835
	* gas/i386/simd-intel.d: Updated.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

	* gas/i386/simd.s: Add new tests.
	* gas/i386/x86-64-simd.s: Likewise.

opcodes/

2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4835
	* i386-dis.c (Eq): New.
	(EMC): Renamed to ...
	(EMCq): This.  Use q_mode instead of v_mode.
	(prefix_user_table): Updated to use EXd, EXq, EMCq, Ed and Eq
	when appropriated.
 2007-07-28 23:34:14 +00:00
H.J. Lu
231af07047 gas/testsuite/ 
2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-opcode.d: Updated.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

	* gas/i386/x86-64-simd.s: Add movq.

opcodes/

2007-07-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Change "movd" to "movK".
	(prefix_user_table): Likewise.  Use EXq instead of EXx on
	"movq".
 2007-07-28 16:32:01 +00:00
H.J. Lu
1405105681 gas/testsuite/ 
2007-07-16  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/simd.s: Add tests for punpcklbw, punpckldq,
	punpcklwd and punpcklqdq.
	* gas/i386/x86-64-simd.s: Likewise.

	* gas/i386/simd-intel.d: Updated.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-07-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EMq): Removed.
	(EMx): New.
	(prefix_user_table): Replace EMq with EMx.
 2007-07-16 19:16:44 +00:00
Nick Clifton
9b201bb5e5 Change source files over to GPLv3. 2007-07-05 09:49:03 +00:00
H.J. Lu
09a2c6cf5c gas/testsuite/ 
2007-06-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4667
	* gas/i386/i386.exp: Run simd, simd-intel, x86-64-simd
	and x86-64-simd-intel.

	* gas/i386/opcode-intel.d: Updated.

	* gas/i386/simd-intel.d: New.
	* gas/i386/simd.d: Likewise.
	* gas/i386/simd.s: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.
	* gas/i386/x86-64-simd.s: Likewise.

opcodes/

2007-06-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4667
	* i386-dis.c (EX): Removed.
	(EMd): New.
	(EMq): Likewise.
	(EXd): Likewise.
	(EXq): Likewise.
	(EXx): Likewise.
	(PREGRP93...PREGRP97): Likewise.
	(dis386_twobyte): Updated.
	(prefix_user_table): Updated. Add PREGRP93...PREGRP97.
	(OP_EX): Remove Intel syntax handling.
 2007-06-23 14:55:18 +00:00
H.J. Lu
9beff6903b gas/testsuite/ 
2007-05-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4502
	* gas/i386/amd.d: Replace "pfmulhrw" with "pmulhrw".

opcodes/

2007-05-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4502
	* i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
 2007-05-15 01:05:59 +00:00
H.J. Lu
8de28984c3 2007-05-07 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries
	for some SSE4 instructions.
	(threebyte_0x3a_uses_DATA_prefix): Likewise.
 2007-05-07 19:01:00 +00:00
H.J. Lu
20592a94ff gas/ 
2007-05-03  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Don't explicitly check
	suffix for crc32 in Intel mode.
	(process_suffix): Issue an error for crc32 if the operand size
	is ambiguous.

gas/testsuite/

2007-05-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/crc32-intel.d: Updated.
	* gas/i386/crc32.d: Likewise.
	* gas/i386/sse4_2.d: Likewise.
	* gas/i386/x86-64-crc32-intel.d: Likewise.
	* gas/i386/x86-64-crc32.d: Likewise.
	* gas/i386/x86-64-sse4_2.d: Likewise.

	* gas/i386/crc32.s: Remove crc32 instructions with ambiguous
	operand size and suffix in crc32 instructions in Intel mode.
	* gas/i386/x86-64-crc32.s: Likewise.

	* gas/i386/sse4_2.s: Remove crc32 instructions with ambiguous
	operand size.
	* gas/i386/x86-64-sse4_2.s: Likewise.

	* gas/i386/i386.exp: Run inval-crc32 and x86-64-inval-crc32.

	* gas/i386/inval-crc32.l: New.
	* gas/i386/inval-crc32.s: Likewise.
	* gas/i386/x86-64-inval-crc32.l: Likewise.
	* gas/i386/x86-64-inval-crc32.s: Likewise.

opcodes/

2007-05-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.

	* i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
	type for crc32.
 2007-05-03 21:07:16 +00:00
H.J. Lu
9344ff2951 gas/config/ 
2007-05-01  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Check suffix for crc32 in
	Intel mdoe.
	(process_suffix): Default the suffix of 8bit crc32 to
	BYTE_MNEM_SUFFIX.
	(check_byte_reg): Skip check for 8bit crc32.

gas/testsuite/

2007-05-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/crc32-intel.d: New file.
	* gas/i386/crc32.d:Likewise.
	* gas/i386/crc32.s:Likewise.
	* gas/i386/x86-64-crc32-intel.d:Likewise.
	* gas/i386/x86-64-crc32.d:Likewise.
	* gas/i386/x86-64-crc32.s:Likewise.

	* gas/i386/i386.exp: Run crc32, crc32-intel, x86-64-crc32
	and x86-64-crc32-intel.

opcodes/

2007-05-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
	check data size prefix in 16bit mode.

	* i386-opc.c (i386_optab): Default crc32 to non-8bit and
	support Intel mode.
 2007-05-01 12:59:24 +00:00
H.J. Lu
484c222e44 2007-04-27 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (modrm): Put reg before rm.
 2007-04-27 19:47:30 +00:00
H.J. Lu
5d6696482a gas/testsuite/ 
2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4430
	* gas/i386/amd.d: Updated.
	* gas/i386/immed32.d: Likewise.
	* gas/i386/intel.d: Likewise.
	* gas/i386/intel16.d: Likewise.
	* gas/i386/intelok.d: Likewise.
	* gas/i386/jump16.d: Likewise.
	* gas/i386/naked.d: Likewise.
	* gas/i386/opcode-suffix.d: Likewise.
	* gas/i386/opcode.d: Likewise.
	* gas/i386/prescott.d: Likewise.
	* gas/i386/ssemmx2.d: Likewise.
	* gas/i386/tlsd.d: Likewise.
	* gas/i386/tlspic.d: Likewise.
	* gas/i386/x86-64-addr32.d: Likewise.
	* gas/i386/x86-64-prescott.d: Likewise.
	* gas/i386/x86-64-rip.d: Likewise.
	* gas/i386/x86_64.d: Likewise.

ld/testsuite/

2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4430
	* ld-i386/tlsbin.dd: Updated.
	* ld-i386/tlsbindesc.dd: Likewise
	* ld-i386/tlsdesc.dd: Likewise
	* ld-i386/tlsgdesc.dd: Likewise
	* ld-i386/tlsnopic.dd: Likewise
	* ld-i386/tlspic.dd: Likewise
	* ld-x86-64/tlsbin.dd: Likewise
	* ld-x86-64/tlsbindesc.dd: Likewise
	* ld-x86-64/tlsdesc.dd: Likewise
	* ld-x86-64/tlsgdesc.dd: Likewise
	* ld-x86-64/tlspic.dd: Likewise

opcodes/

2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4430
	* i386-dis.c (print_displacement): New.
	(OP_E): Call print_displacement instead of print_operand_value
	to output displacement when either base or index exist.  Print
	the explicit zero displacement in 16bit mode.
 2007-04-27 04:22:02 +00:00
H.J. Lu
185b11630d gas/testsuite/ 
2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4429
	* gas/i386/i386.exp: Run "x86-64-addr32-intel" and
	"x86-64-rip-intel".

	* gas/i386/intelok.d: Updated.

	* gas/i386/x86-64-addr32-intel.d: New file.
	* gas/i386/x86-64-rip-intel.d: Likewise.

opcodes/

2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4429
	* i386-dis.c (print_insn): Also swap the order of op_riprel
	when swapping op_index.  Break when the RIP relative address
	is printed.
	(OP_E): Properly handle RIP relative addressing and print the
	explicit zero displacement for Intel mode.
 2007-04-26 18:15:47 +00:00
H.J. Lu
381d071fc5 gas/ 
2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .sse4.2 and .sse4.
	(match_template): Handle operand size for crc32 in SSE4.2.
	(process_suffix): Handle operand type for crc32 in SSE4.2.
	(output_insn): Support SSE4.2.

gas/testsuite/

2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add sse4.2 and x86-64-sse4.2.

	* gas/i386/sse4_2.d: New file.
	* gas/i386/sse4_2.s: Likewise.
	* gas/i386/x86-64-sse4_2.d: Likewise.
	* gas/i386/x86-64-sse4_2.s: Likewise.

opcodes/

2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (CRC32_Fixup): New.
	(PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
	 PREGRP91): New.
	(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
	(threebyte_0x3a_uses_DATA_prefix): Likewise.
	(prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
	PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
	(three_byte_table): Likewise.

	* i386-opc.c (i386_optab): Add SSE4.2 opcodes.

	* gas/config/tc-i386.h (CpuSSE4_2): New.
	(CpuSSE4): Likewise.
	(CpuUnknownFlags): Add CpuSSE4_2.
 2007-04-18 16:15:55 +00:00
H.J. Lu
42903f7f59 gas/ 
2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .sse4.1.
	(process_operands): Adjust implicit operand for blendvpd,
	blendvps and pblendvb in SSE4.1.
	(output_insn): Support SSE4.1.

gas/testsuite/

2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add sse4.1 and x86-64-sse4.1.

	* gas/i386/sse4_1.d: New file.
	* gas/i386/sse4_1.s: Likewise.
	* gas/i386/x86-64-sse4_1.d: Likewise.
	* gas/i386/x86-64-sse4_1.s: Likewise.

opcodes/

2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (XMM_Fixup): New.
	(Edqb): New.
	(Edqd): New.
	(XMM0): New.
	(dqb_mode): New.
	(dqd_mode): New.
	(PREGRP39 ... PREGRP85): New.
	(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
	(threebyte_0x3a_uses_DATA_prefix): Likewise.
	(prefix_user_table): Add PREGRP39 ... PREGRP85.
	(three_byte_table): Likewise.
	(putop): Handle 'K'.
	(intel_operand_size): Handle dqb_mode, dqd_mode):
	(OP_E): Likewise.
	(OP_G): Likewise.

	* i386-opc.c (i386_optab): Add SSE4.1 opcodes.

	* i386-opc.h (CpuSSE4_1): New.
	(CpuUnknownFlags): Add CpuSSE4_1.
	(regKludge): Update comment.
 2007-04-18 16:13:15 +00:00
H.J. Lu
246c51aaae 2007-04-13 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c: Remove trailing white spaces.
 2007-04-13 21:57:21 +00:00
H.J. Lu
7967e09e27 2007-04-11 H.J. Lu <hongjiu.lu@intel.com> 
PR binutils/4333
	* i386-dis.c (GRP1a): New.
	(GRP1b ... GRPPADLCK2): Update index.
	(dis386): Use GRP1a for entry 0x8f.
	(mod, rm, reg): Removed. Replaced by ...
	(modrm): This.
	(grps): Add GRP1a.
 2007-04-11 21:56:25 +00:00
H.J. Lu
0003779b5d gas/ 
2003-03-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_begin): Allow '.' in mnemonic.

gas/testsuite/

2003-03-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/rex.s: Add tests for rex.WRXB.
	* gas/i386/rex.d: Updated.

	* gas/i386/rex.d: Replace rex64XYZ with rex.WRXB.
	* gas/i386/x86-64-io-intel.d : Likewise.
	* gas/i386/x86-64-io-suffix.d: Likewise.
	* gas/i386/x86-64-io.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.

opcodes/

2003-03-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.

	* i386-opc.c (i386_optab): Add rex.wrxb.
 2007-03-23 16:17:21 +00:00
H.J. Lu
161a04f630 gas/ 
2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c: Replace REX_MODE64, REX_EXTX, REX_EXTY
	and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively.

include/opcode/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (REX_MODE64): Renamed to ...
	(REX_W): This.
	(REX_EXTX): Renamed to ...
	(REX_R): This.
	(REX_EXTY): Renamed to ...
	(REX_X): This.
	(REX_EXTZ): Renamed to ...
	(REX_B): This.

opcodes/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REX_MODE64): Remove definition.
	(REX_EXTX): Likewise.
	(REX_EXTY): Likewise.
	(REX_EXTZ): Likewise.
	(USED_REX): Use REX_OPCODE instead of 0x40.
	Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
	REX_R, REX_X and REX_B respectively.
 2007-03-21 21:23:44 +00:00
H.J. Lu
8b38ad713b gas/ 
2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4218
	* config/tc-i386.c (match_template): Properly handle 64bit mode
	"xchg %eax, %eax".

gas/testsuite/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4218
	* gas/i386/nops.s: Add testcases for nop r/m.
	* gas/i386/x86-64-nops.s: Likewise.

	* gas/i386/x86-64-opcode.s: Add testcases for xchg with %ax,
	%eax and %rax.

	* gas/i386/nops.d: Updated.
	* gas/i386/x86-64-nops.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.

opcodes/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4218
	* i386-dis.c (PREGRP38): New.
	(dis386): Use PREGRP38 for 0x90.
	(prefix_user_table): Add PREGRP38.
	(print_insn): Set uses_REPZ_prefix to 1 for pause.
	(NOP_Fixup1): Properly handle REX bits.
	(NOP_Fixup2): Likewise.

	* i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
	Allow register with nop.
 2007-03-21 20:45:14 +00:00
H.J. Lu
0b1cf022c8 gas/ 
2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerated.

	* config/tc-i386.c: Include "opcodes/i386-opc.h" instead of
	"opcode/i386.h".
	(md_begin): Check reg_name != NULL for the last entry in
	i386_regtab.

	* config/tc-i386.h: Move many entries to opcode/i386.h and
	opcodes/i386-opc.h.

	* configure.in (need_opcodes): Set true for i386.
	* configure: Regenerated.

include/opcode/

2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h: Add entries from config/tc-i386.h and move tables
	to opcodes/i386-opc.h.

opcodes/

2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (CFILES): Add i386-opc.c.
	(ALL_MACHINES): Add i386-opc.lo.
	Run "make dep-am".
	* Makefile.in: Regenerated.

	* configure.in: Add i386-opc.lo for bfd_i386_arch.
	* configure: Regenerated.

	* i386-dis.c: Include "opcode/i386.h".
	(MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
	(FWAIT_OPCODE): Remove definition.
	(UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
	(MAX_OPERANDS): Remove definition.

	* i386-opc.c: New file.
	* i386-opc.h: Likewise.
 2007-03-15 14:31:24 +00:00
H.J. Lu
6f74c397de 2007-03-09 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (OP_Rd): Renamed to ...
	(OP_R): This.
	(Rd): Updated.
	(Rm): Likewise.
 2007-03-09 23:22:31 +00:00
H.J. Lu
d25a0fc5da Remove extra space. 2007-02-13 21:45:27 +00:00
H.J. Lu
4efba78cb4 Remove trailing zeros in array initializers. 2007-02-13 21:29:31 +00:00
H.J. Lu
6ab3cda41f Add a space before `}' in struct initializer. 2007-02-13 21:18:39 +00:00
H.J. Lu
ce518a5f27 2007-02-13 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c: Updated to use an array of MAX_OPERANDS operands
	 in struct dis386.
 2007-02-13 20:58:17 +00:00
H.J. Lu
65ca155d27 ld/testsuite/ 
2076-02-05  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-i386/pcrel16.d: Undo the last change.
	* ld-x86-64/pcrel16.d: Likewise.

opcodes/

2076-02-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_J): Undo the last change. Properly handle 64K
	wrap around within the same segment in 16bit mode.
 2007-02-05 18:22:49 +00:00
H.J. Lu
6f38fab3aa Cosmetic change. 2007-02-03 00:55:42 +00:00
H.J. Lu
206717e8e5 ld/testsuite/ 
2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-i386/pcrel16.d: Updated.
	* ld-x86-64/pcrel16.d: Likewise.

opcodes/

2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_J): Mask to 16bit only if there is a data16
	prefix.
 2007-02-03 00:46:22 +00:00
H.J. Lu
f59a29b99f binutils/ 
2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/binutils.texi (objdump): Document the new addr64 option
	for i386 disassembler.

include/

2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* dis-asm.h (print_i386_disassembler_options): New.

opcodes/

2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* disassemble.c (disassembler_usage): Call
	print_i386_disassembler_options for i386 disassembler.

	* i386-dis.c (print_i386_disassembler_options): New.
	(print_insn): Support the new addr64 option.
 2007-02-02 15:27:04 +00:00
H.J. Lu
fb9c77c70e gas/testsuite/ 
2006-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-inval.s: cmpxchg16b needs oword ptr, instead
	of xmmword ptr.
	* gas/i386/x86_64.s: Likewise.
	* gas/i386/x86-64-inval.l: Updated.

opcodes/

2006-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (o_mode): New for 16-byte operand.
	(intel_operand_size): Generate "OWORD PTR " for o_mode.
	(CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
 2006-12-15 13:11:56 +00:00
H.J. Lu
f5804c90c7 gas/testsuite/ 
2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-inval.s: Add cmpxchg16b.
	* gas/i386/x86_64.s: Likewise.
	* gas/i386/x86-64-inval.l: Updated.
	* gas/i386/x86_64.d: Likewise.

opcodes/

2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (CMPXCHG8B_Fixup): New.
	(grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
 2006-12-14 20:13:28 +00:00
H.J. Lu
75413a22c6 2006-12-11 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (Eq): Replaced by ...
	(Mq): New. This.
	(Ma): Defined with OP_M instead of OP_E.
	(grps): Updated cmpxchg8b and vmptrst for Eq -> Mq.
	(OP_M): Added bound, cmpxchg8b and vmptrst to bad modrm list.
 2006-12-11 18:11:13 +00:00
H.J. Lu
5f754f58d9 2006-12-09 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (X86_64_1): New.
	(X86_64_2): Likewise.
	(X86_64_3): Likewise.
	(dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64
	tables.
	(x86_64_table): Add entries for 0x60, 0x61 and 0x62.
 2006-12-10 02:50:53 +00:00
H.J. Lu
7f4c972fa6 2006-12-09 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c: Adjust white spaces.
 2006-12-09 21:06:13 +00:00
Jan Beulich
d807a492c6 opcodes/ 
2006-12-04  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (OP_J): Update used_prefixes in v_mode.

gas/testsuite/
2006-12-04  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/opcode-intel.d: Fix wrong expectation. Make white space
	expectations more consistent.
 2006-12-04 08:53:29 +00:00
Jan Beulich
ed7841b3f0 opcodes/ 
2006-11-30  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (SEG_Fixup): Delete.
	(Sv): Use OP_SEG.
	(putop): New suffix character 'D'.
	(dis386): Use it.
	(grps): Likewise.
	(OP_SEG): Handle bytemode other than w_mode.

gas/testsuite/
2006-11-30  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intel.d: Adjust.
	* gas/i386/naked.d: Adjust.
	* gas/i386/opcode.d: Adjust.
 2006-12-01 15:17:32 +00:00
Jan Beulich
52fd6d9416 opcodes/ 
2006-11-30  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (zAX): New.
	(Xz): New.
	(Yzr): New.
	(z_mode): New.
	(z_mode_ax_reg): New.
	(putop): New suffix character 'G'.
	(dis386): Use it for in, out, ins, and outs.
	(intel_operand_size): Handle z_mode.
	(OP_REG): Delete unreachable case indir_dx_reg.
	(OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle
	z_mode_ax_reg.
	(OP_ESreg): Fix Intel syntax operand size handling.
	(OP_DSreg): Likewise.

gas/testsuite/
2006-11-30  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/x86-64-io.[sd]: New.
	* gas/i386/x86-64-io-intel.d: New.
	* gas/i386/x86-64-io-suffix.d: New.
	* gas/i386/i386.exp: Run new tests.
 2006-12-01 15:00:12 +00:00
Jan Beulich
a35ca55aee opcodes/ 
2006-11-30  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
	(putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
	used. For 'R' and 'W' suffix, simplify and fix Intel mode.

gas/testsuite/
2006-11-30  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intel.s: Use Intel syntax in Intel syntax test.
	* gas/i386/x86-64-cbw.[sd]: New.
	* gas/i386/x86-64-cbw-intel.d: New.
	* gas/i386/i386.exp: Run new tests.
 2006-12-01 14:56:11 +00:00
H.J. Lu
d81afd0c00 2006-11-09 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (print_insn): Check PREFIX_REPNZ before
	PREFIX_DATA when prefix user table is used.
 2006-11-10 03:54:11 +00:00
H.J. Lu
eec0f4ca4c 2006-11-09 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
	(twobyte_uses_DATA_prefix): This.
	(twobyte_uses_REPNZ_prefix): New.
	(twobyte_uses_REPZ_prefix): Likewise.
	(threebyte_0x38_uses_DATA_prefix): Likewise.
	(threebyte_0x38_uses_REPNZ_prefix): Likewise.
	(threebyte_0x38_uses_REPZ_prefix): Likewise.
	(threebyte_0x3a_uses_DATA_prefix): Likewise.
	(threebyte_0x3a_uses_REPNZ_prefix): Likewise.
	(threebyte_0x3a_uses_REPZ_prefix): Likewise.
	(print_insn): Updated checking usages of DATA/REPNZ/REPZ
	prefixes.
 2006-11-10 02:13:40 +00:00
Michael Meissner
7918206c55 Fix AMDFAM10 POPCNT instruction 2006-10-23 22:53:29 +00:00
H.J. Lu
c4b5fff932 2006-09-24 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> 
PR binutils/3100
	* i386-dis.c (prefix_user_table): Fix the second operand of
	maskmovdqu instruction to allow only %xmm register instead of
	both %xmm register and memory.
 2006-09-24 17:25:47 +00:00
H.J. Lu
539e75adb5 gas/ 
2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/3235
	* config/tc-i386.c (match_template): Check address size prefix
	to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
	operand.

gas/testsuite/

2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/3235
	* gas/i386/addr16.d: New file.
	* gas/i386/addr16.s: Likewise.
	* gas/i386/addr32.d: Likewise.
	* gas/i386/addr32.s: Likewise.

	* gas/i386/i386.exp: Add "addr16" and "addr32".

	* gas/i386/x86-64-addr32.s: Add tests for "add32 mov".
	* gas/i386/x86-64-addr32.d: Updated.

opcodes/

2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/3235
	* i386-dis.c (OP_OFF64): Get 32bit offset if there is an
	address size prefix.
 2006-09-23 23:10:14 +00:00
Nick Clifton
0112cd268b * bfd-in.h (STRING_AND_COMMA): New macro. Takes one constant string as its 
argument and emits the string followed by a comma and then the length of
  the string.
  (CONST_STRNEQ): New macro.  Checks to see if a variable string has a constant
  string as its initial characters.
  (CONST_STRNCPY): New macro.  Copies a constant string to the start of a
  variable string.
* bfd-in2.h: Regenerate.
* <remainign files>: Make use of the new macros.
 2006-09-16 18:12:17 +00:00
H.J. Lu
96fbad7318 2006-08-23 H.J. Lu <hongjiu.lu@intel.com> 
* i386-dis.c (three_byte_table): Expand to 256 elements.
 2006-08-23 14:48:49 +00:00
Michael Meissner
4d9567e059 Fix bug 3000 2006-08-14 23:45:59 +00:00
H.J. Lu
2b516b7297 gas/testsuite/ 
2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/opcode.s: Add sldt, smsw and str.
	* gas/i386/x86-64-opcode.s: Likewise.

	* gas/i386/opcode.d: Updated.
	* gas/i386/x86-64-opcode.d: Likewise.

opcodes/

2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
	"sldt", "str" and "smsw".
 2006-07-18 20:25:41 +00:00
H.J. Lu
a6bd098c72 2006-07-15 H.J. Lu <hongjiu.lu@intel.com> 
PR binutils/2829
	* i386-dis.c (GRP11_C6): NEW.
	(GRP11_C7): Likewise.
	(GRP12): Updated.
	(GRP13): Likewise.
	(GRP14): Likewise.
	(GRP15): Likewise.
	(GRP16): Likewise.
	(GRPAMD): Likewise.
	(GRPPADLCK1): Likewise.
	(GRPPADLCK2): Likewise.
	(dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
	respectively.
	(grps): Add entries for GRP11_C6 and GRP11_C7.
 2006-07-15 16:33:24 +00:00
Michael Meissner
050dfa73de Add amdfam10 instructions 2006-07-13 22:25:48 +00:00
H.J. Lu
1596541188 gas/testsuite/ 
2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run nops and x86-64-nops.

	* gas/i386/nops.d: New file.
	* gas/i386/nops.s: Likewise.
	* gas/i386/x86-64-nops.d: Likewise.
	* gas/i386/x86-64-nops.s: Likewise.

include/opcode/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Add "nop" with memory reference.

opcodes/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
	(twobyte_has_modrm): Set 1 for 0x1f.
 2006-06-12 18:59:37 +00:00
H.J. Lu
46e883c5a9 gas/ 
2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Don't add rex64 for
	"xchg %rax,%rax".

gas/testsuite/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/opcode.s: Add "xchg %ax,%ax".
	* gas/i386/opcode.d: Updated.

	* gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax,
	xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8.
	* gas/i386/x86-64-opcode.d: Updated.

include/opcode/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Update comment for 64bit NOP.

opcodes/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (NOP_Fixup): Removed.
	(NOP_Fixup1): New.
	(NOP_Fixup2): Likewise.
	(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
 2006-06-12 18:55:44 +00:00
H.J. Lu
b3882df925 2006-06-10 H.J. Lu <hongjiu.lu@intel.com> 
* i386.c (GRP10): Renamed to ...
	(GRP12): This.
	(GRP11): Renamed to ...
	(GRP13): This.
	(GRP12): Renamed to ...
	(GRP14): This.
	(GRP13): Renamed to ...
	(GRP15): This.
	(GRP14): Renamed to ...
	(GRP16): This.
	(dis386_twobyte): Updated.
	(grps): Likewise.
 2006-06-10 18:20:39 +00:00