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Author SHA1 Message Date
Nick Clifton
7bdf96efee Make register name tables in visium.h static in order to prevent multiple definitions. 
* visium.h (gen_reg_table): Make static.
	(fp_reg_table): Likewise.
	(cc_table): Likewise.
 2015-09-09 14:50:08 +01:00
Alan Modra
5f329d5b14 Reorder enum output_type for better code generation 
Works around a gcc bug #67328 for the most commonly used of bfd_link_pic
and bfd_link_executable.

	* bfdlink.h (enum output_type): Reorder enum.
 2015-08-23 23:21:48 +09:30
Jiong Wang
49df5539f9 [AArch64][3/6] GAS support TLSLD move/add relocation types 
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers,
  "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
  "dtprel_g1_nc", "dtprel_g2".
  (md_apply_fix): Support new relocation types.
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_g0.s: New testcase.
  * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g2.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0.d: New expectation file.
  * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g2.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
 2015-08-19 16:36:22 +01:00
Jiong Wang
13289c10e2 [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
 2015-08-19 16:28:08 +01:00
Alan Modra
64d94ba01a Remove link_info.pic 
Adding type_pie to output_type allows us to remove link_info.pic and
with some reordering of the enum, produces better code.

include/
	* bfdlink.h (enum output_type): Delete type_executable, add type_pde
	and type_pie.  Reorder.
	(struct bfd_link_info): Delete pic field.
	(bfd_link_executable, bfd_link_pde, bfd_link_pie, bfd_link_pic): Adjust.
ld/
	* emultempl/aix.em: Don't set link_info.pic.
	* emultempl/pe.em: Likewise.
	* emultempl/pep.em: Likewise.
	* emultempl/sunos.em: Likewise.
	* lexsup.c (parse_args): Likewise.  Set type_pie for -pie.
	* plugin.c (set_tv_header <LDPT_LINKER_OUTPUT>): Simplify.
 2015-08-19 12:53:54 +09:30
Alan Modra
3cbc1e5e68 Add bfd_link_pde, and simplify some tests of link_info.type 
include/
	* bfdlink.h (bfd_link_pde): Define.
bfd/
	* elf-s390-common.c: Simplify expressions using
	bfd_linke_executable, bfd_link_pie and bfd_link_pic.
	* elf32-arm.c: Likewise.
	* elf32-bfin.c: Likewise.
	* elf32-frv.c: Likewise.
	* elf32-m68k.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-s390.c: Likewise.
	* elf32-sh.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-s390.c: Likewise.
	* elflink.c: Likewise.
 2015-08-19 12:51:06 +09:30
H.J. Lu
0e1862bb40 Add output_type to bfd_link_info 
The "shared" field in bfd_link_info is set for both DSO and and PIE.
There are separate fields for executable and relocatable outputs.  This
patch adds an "output_type" field:

enum output_type
{
  type_unknown = 0,
  type_executable,
  type_dll,
  type_relocatable
};

and a "pic" field to bfd_link_info to replace shared, executable and
relocatable fields so that we can use the "output_type" field to check
for output type and the "pic" field check if output is PIC.  Macros,
bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic
and bfd_link_pie, are provided to check for output features.

bfd/

	* bfd/aoutx.h: Replace shared, executable, relocatable and pie
	fields with bfd_link_executable, bfd_link_dll,
	bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
	* bfd/bout.c: Likewise.
	* bfd/coff-alpha.c: Likewise.
	* bfd/coff-arm.c: Likewise.
	* bfd/coff-i386.c: Likewise.
	* bfd/coff-i960.c: Likewise.
	* bfd/coff-m68k.c: Likewise.
	* bfd/coff-mcore.c: Likewise.
	* bfd/coff-mips.c: Likewise.
	* bfd/coff-ppc.c: Likewise.
	* bfd/coff-rs6000.c: Likewise.
	* bfd/coff-sh.c: Likewise.
	* bfd/coff-tic80.c: Likewise.
	* bfd/coff-x86_64.c: Likewise.
	* bfd/coff64-rs6000.c: Likewise.
	* bfd/coffgen.c: Likewise.
	* bfd/cofflink.c: Likewise.
	* bfd/ecoff.c: Likewise.
	* bfd/ecofflink.c: Likewise.
	* bfd/elf-bfd.h: Likewise.
	* bfd/elf-eh-frame.c: Likewise.
	* bfd/elf-ifunc.c: Likewise.
	* bfd/elf-m10200.c: Likewise.
	* bfd/elf-m10300.c: Likewise.
	* bfd/elf-s390-common.c: Likewise.
	* bfd/elf-vxworks.c: Likewise.
	* bfd/elf.c: Likewise.
	* bfd/elf32-arm.c: Likewise.
	* bfd/elf32-avr.c: Likewise.
	* bfd/elf32-bfin.c: Likewise.
	* bfd/elf32-cr16.c: Likewise.
	* bfd/elf32-cr16c.c: Likewise.
	* bfd/elf32-cris.c: Likewise.
	* bfd/elf32-crx.c: Likewise.
	* bfd/elf32-d10v.c: Likewise.
	* bfd/elf32-dlx.c: Likewise.
	* bfd/elf32-epiphany.c: Likewise.
	* bfd/elf32-fr30.c: Likewise.
	* bfd/elf32-frv.c: Likewise.
	* bfd/elf32-ft32.c: Likewise.
	* bfd/elf32-h8300.c: Likewise.
	* bfd/elf32-hppa.c: Likewise.
	* bfd/elf32-i370.c: Likewise.
	* bfd/elf32-i386.c: Likewise.
	* bfd/elf32-i860.c: Likewise.
	* bfd/elf32-ip2k.c: Likewise.
	* bfd/elf32-iq2000.c: Likewise.
	* bfd/elf32-lm32.c: Likewise.
	* bfd/elf32-m32c.c: Likewise.
	* bfd/elf32-m32r.c: Likewise.
	* bfd/elf32-m68hc11.c: Likewise.
	* bfd/elf32-m68hc1x.c: Likewise.
	* bfd/elf32-m68k.c: Likewise.
	* bfd/elf32-mcore.c: Likewise.
	* bfd/elf32-mep.c: Likewise.
	* bfd/elf32-metag.c: Likewise.
	* bfd/elf32-microblaze.c: Likewise.
	* bfd/elf32-moxie.c: Likewise.
	* bfd/elf32-msp430.c: Likewise.
	* bfd/elf32-mt.c: Likewise.
	* bfd/elf32-nds32.c: Likewise.
	* bfd/elf32-nios2.c: Likewise.
	* bfd/elf32-or1k.c: Likewise.
	* bfd/elf32-ppc.c: Likewise.
	* bfd/elf32-rl78.c: Likewise.
	* bfd/elf32-rx.c: Likewise.
	* bfd/elf32-s390.c: Likewise.
	* bfd/elf32-score.c: Likewise.
	* bfd/elf32-score7.c: Likewise.
	* bfd/elf32-sh-symbian.c: Likewise.
	* bfd/elf32-sh.c: Likewise.
	* bfd/elf32-sh64.c: Likewise.
	* bfd/elf32-spu.c: Likewise.
	* bfd/elf32-tic6x.c: Likewise.
	* bfd/elf32-tilepro.c: Likewise.
	* bfd/elf32-v850.c: Likewise.
	* bfd/elf32-vax.c: Likewise.
	* bfd/elf32-visium.c: Likewise.
	* bfd/elf32-xc16x.c: Likewise.
	* bfd/elf32-xstormy16.c: Likewise.
	* bfd/elf32-xtensa.c: Likewise.
	* bfd/elf64-alpha.c: Likewise.
	* bfd/elf64-hppa.c: Likewise.
	* bfd/elf64-ia64-vms.c: Likewise.
	* bfd/elf64-mmix.c: Likewise.
	* bfd/elf64-ppc.c: Likewise.
	* bfd/elf64-s390.c: Likewise.
	* bfd/elf64-sh64.c: Likewise.
	* bfd/elf64-x86-64.c: Likewise.
	* bfd/elflink.c: Likewise.
	* bfd/elfnn-aarch64.c: Likewise.
	* bfd/elfnn-ia64.c: Likewise.
	* bfd/elfxx-mips.c: Likewise.
	* bfd/elfxx-sparc.c: Likewise.
	* bfd/elfxx-tilegx.c: Likewise.
	* bfd/i386linux.c: Likewise.
	* bfd/linker.c: Likewise.
	* bfd/m68klinux.c: Likewise.
	* bfd/pdp11.c: Likewise.
	* bfd/pe-mips.c: Likewise.
	* bfd/peXXigen.c: Likewise.
	* bfd/reloc.c: Likewise.
	* bfd/reloc16.c: Likewise.
	* bfd/sparclinux.c: Likewise.
	* bfd/sunos.c: Likewise.
	* bfd/vms-alpha.c: Likewise.
	* bfd/xcofflink.c: Likewise.

include/

	* include/bfdlink.h (output_type): New enum.
	(bfd_link_executable): New macro.
	(bfd_link_dll): Likewise.
	(bfd_link_relocatable): Likewise.
	(bfd_link_pic): Likewise.
	(bfd_link_pie): Likewise.
	(bfd_link_info): Remove shared, executable, pie and relocatable.
	Add output_type and pic.

ld/

	* ld/ldctor.c: Replace shared, executable, relocatable and pie
	fields with bfd_link_executable, bfd_link_dll,
	bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
	* ld/ldemul.c: Likewise.
	* ld/ldfile.c: Likewise.
	* ld/ldlang.c: Likewise.
	* ld/ldmain.c: Likewise.
	* ld/ldwrite.c: Likewise.
	* ld/lexsup.c: Likewise.
	* ld/pe-dll.c: Likewise.
	* ld/plugin.c: Likewise.
	* ld/emultempl/aarch64elf.em: Likewise.
	* ld/emultempl/aix.em: Likewise.
	* ld/emultempl/alphaelf.em: Likewise.
	* ld/emultempl/armcoff.em: Likewise.
	* ld/emultempl/armelf.em: Likewise.
	* ld/emultempl/avrelf.em: Likewise.
	* ld/emultempl/beos.em: Likewise.
	* ld/emultempl/cr16elf.em: Likewise.
	* ld/emultempl/elf-generic.em: Likewise.
	* ld/emultempl/elf32.em: Likewise.
	* ld/emultempl/genelf.em: Likewise.
	* ld/emultempl/generic.em: Likewise.
	* ld/emultempl/gld960.em: Likewise.
	* ld/emultempl/gld960c.em: Likewise.
	* ld/emultempl/hppaelf.em: Likewise.
	* ld/emultempl/irix.em: Likewise.
	* ld/emultempl/linux.em: Likewise.
	* ld/emultempl/lnk960.em: Likewise.
	* ld/emultempl/m68hc1xelf.em: Likewise.
	* ld/emultempl/m68kcoff.em: Likewise.
	* ld/emultempl/m68kelf.em: Likewise.
	* ld/emultempl/metagelf.em: Likewise.
	* ld/emultempl/mipself.em: Likewise.
	* ld/emultempl/mmo.em: Likewise.
	* ld/emultempl/msp430.em: Likewise.
	* ld/emultempl/nds32elf.em: Likewise.
	* ld/emultempl/needrelax.em: Likewise.
	* ld/emultempl/nios2elf.em: Likewise.
	* ld/emultempl/pe.em: Likewise.
	* ld/emultempl/pep.em: Likewise.
	* ld/emultempl/ppc32elf.em: Likewise.
	* ld/emultempl/ppc64elf.em: Likewise.
	* ld/emultempl/sh64elf.em: Likewise.
	* ld/emultempl/solaris2.em: Likewise.
	* ld/emultempl/spuelf.em: Likewise.
	* ld/emultempl/sunos.em: Likewise.
	* ld/emultempl/tic6xdsbt.em: Likewise.
	* ld/emultempl/ticoff.em: Likewise.
	* ld/emultempl/v850elf.em: Likewise.
	* ld/emultempl/vms.em: Likewise.
	* ld/emultempl/vxworks.em: Likewise.
 2015-08-18 05:51:19 -07:00
H.J. Lu
dd419f3aac Sync ansidecl.h with GCC 
Sync with GCC
	2015-08-11  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* ansidecl.h (GCC_FINAL): New macro.
 2015-08-12 05:02:21 -07:00
Jiong Wang
70151fb54a [AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers
  "dtprel_lo12".
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
 2015-08-11 21:26:31 +01:00
Jiong Wang
56a2e4507a [AArch64][4/8] Add R_AARCH64_P32_TLSLD_ADD_LO12_NC in elf header 
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_LO12_NC): Define.
 2015-08-11 21:25:32 +01:00
Jiong Wang
2c0a466a7f [AArch64][1/8] Add R_AARCH64_P32_TLSLD_ADR_PAGE21 in elf header 
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADR_PAGE21): Define.
 2015-08-11 21:15:52 +01:00
H.J. Lu
72f4393d8c Remove leading/trailing white spaces in ChangeLog 2015-07-24 04:16:47 -07:00
Matthew Wahab
f33026a965 [ARM] Support correctly spelled ARMv6KZ architecture names 
2015-07-20  Matthew Wahab  <matthew.wahab@arm.com>

gas/
    * NEWS: Mention corrected spelling of armv6kz.
    * config/tc-arm.c (arm_cpus): Replace ARM_ARCH_V6ZK with
    ARM_ARCH_V6KZ.
    (arm_archs): Likewise. Also add "armv6kz" and "armv6kzt2".
    * doc/c-arm.texi: Replace "armv6zk" with "armv6kz".

gas/testsuite

    * gas/arm/attr-march-armv6kz.d: New.
    * gas/arm/attr-march-armv6kzt2.d: New.

include/opcode

    * arm.h (ARM_AEXT_V6ZK): Rename to ARM_AEXT_V6KZ.
    (ARM_AEXT_V6ZKT2): Rename to ARM_AEXT_V6KZT2.
    (ARM_ARCH_V6ZK): Rename to ARM_ARCH_V6KZ.
    (ARM_ARCH_V6ZKT2): Rename to ARM_ARCH_V6KZT2.
 2015-07-21 09:43:35 +01:00
Jiong Wang
53e8fd0f07 [AArch64][1/3] Add R_AARCH64_P32_TLSLD_ADR_PREL21 in elf header 2015-07-16 15:38:32 +01:00
H.J. Lu
dc2edb520a Sync longlong.h with GCC 
Sync with GCC
	2014-10-28  Richard Henderson  <rth@redhat.com>

	* longlong.h [__alpha] (umul_ppmm): Disable for c++.
 2015-07-14 09:18:16 -07:00
H.J. Lu
d0270d8cb9 Sync hashtab.h, splay-tree.h with GCC 
Sync with GCC
	2014-12-09  Trevor Saunders  <tsaunders@mozilla.com>

	* hashtab.h, splay-tree.h: Remove GTY markers.
 2015-07-14 09:18:16 -07:00
H.J. Lu
1d83d382de Remove trailing spaces in demangle.h 2015-07-14 09:18:16 -07:00
H.J. Lu
4d6404f01d Sync ansidecl.h with GCC 
Sync with GCC
	2015-03-02  Markus Trippelsdorf  <markus@trippelsdorf.de>

	PR target/65261
	* ansidecl.h (ATTRIBUTE_NO_SANITIZE_UNDEFINED): New macro.
 2015-07-14 09:18:16 -07:00
Catherine Moore
3350cc01de 2015-07-09 Catherine Moore <clm@codesourcery.com> 
include/
        * elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New.

        gas/
        * config/tc-mips.c (check_fpabi):  Handle
        VAL_GNU_MIPS_ABI_FP_NAN2008.

        binutils/
        * readelf.c (print_mips_fp_abi_value): Handle
        Val_GNU_MIPS_ABI_FP_NAN2008.

        ld/testsuite/
        * ld-mips-elf/attr-gnu-4-08.d: Update expected output.
        * ld-mips-elf/attr-gnu-4-09.d: New.
        * ld-mips-elf/attr-gnu-4-19.d: New.
        * ld-mips-elf/attr-gnu-4-29.d: New.
        * ld-mips-elf/attr-gnu-4-39.d: New.
        * ld-mips-elf/attr-gnu-4-49.d: New.
        * ld-mips-elf/attr-gnu-4-59.d: New.
        * ld-mips-elf/attr-gnu-4-69.d: New.
        * ld-mips-elf/attr-gnu-4-79.d: New.
        * ld-mips-elf/attr-gnu-4-89.d: New.
        * ld-mips-elf/attr-gnu-4-9.s: New.
        * ld-mips-elf/mips-elf.exp: Run new tests.
 2015-07-09 08:26:10 -07:00
Denis Chertykov
328e7bfdde Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation. 
When generating relocation (tc_gen_reloc) 32 bit relocation fixup
is changed to new 32 bit PC relative relocation if the fixup has pc-relative
flag set.

bfd/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * elf32-avr.c: Add 32 bit PC relative relocation for AVR target.

gas/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * config/tc-avr.c (tc_gen_reloc): Change 32 bit relocation to
    32 bit PC relative and update offset if the fixup is pc-relative.
    * config/tc-avr.h (DIFF_EXPR_OK): Define to enable PC relative diff
    relocs.

gas/testsuite/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * gas/avr/pc-relative-reloc.d: New test for 32 bit pc relative reloc.
    * gas/avr/per-function-debugline.s: New test source.

include/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * elf/avr.h: Add new 32 bit PC relative relocation.

ld/testsuite/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * ld-avr/gc-section-debugline.d: New test.
    * ld-avr/per-function-debugline.s: Source for new test.
 2015-07-08 21:41:52 +03:00
Alan Modra
ef5a96d564 Remove ppc860, ppc750cl, ppc7450 insns from common ppc. 
Back in the day support for these processors was added, we probably
didn't want to waste PPC_OPCODE bits on minor variations.  I've had a
complaint that disassembly of mfspr/mtspr was wrong for power8.  This
patch fixes that problem.

Note that since -m860/-m850/-m821 are new gas options enabling the
mpc8xx specific mfspr/mtspr variants it is possible that this change
will break some mpc8xx assembly code.  ie. you might need to modify
makefiles to pass -m860 to gas.

include/opcode/
	* ppc.h (PPC_OPCODE_750, PPC_OPCODE_7450, PPC_OPCODE_860): Define.
opcodes/
	* ppc-opc.c (PPC750, PPC7450, PPC860): Define using PPC_OPCODE_*.
	* ppc-dis.c (ppc_opts): Add 821, 850 and 860 entries.  Add
	PPC_OPCODE_7450 to 7450 entry.  Add PPC_OPCODE_750 to 750cl entry.
gas/
	* config/tc-ppc.c (md_show_usage): Add -m821, -m850, -m860.
	* doc/c-ppc.texi (PowerPC-Opts): Likewise.
gas/testsuite/
	* gas/ppc/titan.d: Correct mfmcsrr0 disassembly.
 2015-07-03 10:57:14 +09:30
Sandra Loosemore
c8c8175b62 Opcodes and assembler support for Nios II R2 
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	gas/
	* config/tc-nios2.c (nios2_min_align): New.
	(nop): Replace with....
	(nop_r1, nop_r2, nop_r2_cdx, nop32, nop16): New.
	(nios2_align): Handle alignment on 2-byte boundaries when CDX
	instructions may be present.
	(s_nios2_align): Adjust reference to nop.
	(CDXBRANCH, IS_CDXBRANCH): New.
	(CDX_UBRANCH_SUBTYPE, CDX_CBRANCH_SUBTYPE): New.
	(nios2_relax_subtype_size): Handle 2-byte CDX branches.
	(nios2_relax_frag): Likewise.
	(md_convert_frag): Handle R2 encodings.
	(nios2_check_overflow): Check that low-order bits are zero
	before applying rightshift from howto.
	(nios2_check_overflow): Correct negative overflow calculation.
	(nios2_diagnose_overflow): Handle signed_immed12_overflow.  Issue
	generic overflow messages for miscellaneous instruction formats.
	(md_apply_fix): Recognize new R2 relocations.  For pc_relative
	relocations, store fixup in *valP.
	(nios2_reglist_mask, nios2_reglist_dir): New.
	(nios2_parse_reglist): New.
	(nios2_parse_base_register): New.
	(nios2_assemble_expression): Handle constant expressions designated
	by BFD_RELOC_NONE.
	(nios2_assemble_reg3): New.
	(nios2_assemble_arg_c): Handle R2 instruction formats.
	(nios2_assemble_arg_d): Likewise.
	(nios2_assemble_arg_s): Likewise.
	(nios2_assemble_arg_t): Likewise.
	(nios2_assemble_arg_D): New.
	(nios2_assemble_arg_S): New.
	(nios2_assemble_arg_T): New.
	(nios2_assemble_arg_i): Handle R2 instruction formats.
	(nios2_assemble_arg_I): New.
	(nios2_assemble_arg_u): Handle R2 instruction formats.
	(nios2_assemble_arg_U): New.
	(nios2_assemble_arg_V): New.
	(nios2_assemble_arg_W): New.
	(nios2_assemble_arg_X): New.
	(nios2_assemble_arg_Y): New.
	(nios2_assemble_arg_o): Handle R2 instruction formats.
	(nios2_assemble_arg_O): New.
	(nios2_assemble_arg_P): New.
	(nios2_assemble_arg_j): Handle R2 instruction formats.
	(nios2_assemble_arg_k): New.
	(nios2_assemble_arg_l): Handle R2 instruction formats.
	(nios2_assemble_arg_m): Likewise.
	(nios2_assemble_arg_M): New.
	(nios2_assemble_arg_N): New.
	(nios2_assemble_arg_e): New.
	(nios2_assemble_arg_f): New.
	(nios2_assemble_arg_g): New.
	(nios2_assemble_arg_h): New.
	(nios2_assemble_arg_R): New.
	(nios2_assemble_arg_B): New.
	(nios2_assemble_args): Handle new argument letters.
	(nios2_consume_arg): Likewise.
	(nios2_translate_pseudo_insn): Avoid dereferencing null pointer
	in error message.
	(nios2_ps_insn_info_structs): Add nop.n.
	(output_ubranch): Handle CDX branches.
	(output_cbranch): Likewise.
	(output_call): Handle R2 encodings.
	(output_movia): Likewise.
	(md_begin): Initialize nios2_min_align.
	(md_assemble): Align to nios2_min_align.  Adjust nios2_min_align
	if a 16-bit instruction is seen.
	(nios2_cons_align): Use appropriate nop pattern.

	include/opcode/
	* nios2.h (enum iw_format_type): Add R2 formats.
	(enum overflow_type): Add signed_immed12_overflow and
	enumeration_overflow for R2.
	(struct nios2_opcode): Document new argument letters for R2.
	(REG_3BIT, REG_LDWM, REG_POP): Define.
	(includes): Include nios2r2.h.
	(nios2_r2_opcodes, nios2_num_r2_opcodes): Declare.
	(nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): Declare.
	(nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): Declare.
	(nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): Declare.
	(nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): Declare.
	(nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings):
	Declare.
	* nios2r2.h: New file.

	opcodes/
	* nios2-dis.c (nios2_extract_opcode): New.
	(nios2_disassembler_state): New.
	(nios2_find_opcode_hash): Use mach parameter to select correct
	disassembler state.
	(nios2_print_insn_arg): Extend to support new R2 argument letters
	and formats.
	(print_insn_nios2): Check for 16-bit instruction at end of memory.
	* nios2-opc.c (nios2_builtin_regs): Add R2 register attributes.
	(NIOS2_NUM_OPCODES): Rename to...
	(NIOS2_NUM_R1_OPCODES): This.
	(nios2_r2_opcodes): New.
	(NIOS2_NUM_R2_OPCODES): New.
	(nios2_num_r2_opcodes): New.
	(nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): New.
	(nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): New.
	(nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): New.
	(nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): New.
	(nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings):	New.
 2015-07-01 16:08:03 -07:00
Sandra Loosemore
8c163c5a87 Relocations for Nios II R2 
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	bfd/
	* bfd-in2.h: Regenerated.
	* elf32-nios2.c (elf_nios2_howto_table_rel): Rename to...
	(elf_nios2_r1_howto_table_rel): This.
	(elf_nios2_r2_howto_table_rel): New.
	(BFD_IS_R2): New.
	(lookup_howto): Add ABFD parameter.  Adjust to look up in either
	the R1 or R2 relocation table, as determined by ABFD.
	(nios2_reloc_map): Add R2 relocations.
	(nios2_elf32_bfd_reloc_type_lookup): Do lookup using lookup_howto.
	Pass it the ABFD parameter.
	(nios2_elf32_bfd_reloc_name_lookup): Use ABFD to decide whether to
	return an R1 or R2 relocation.
	(nios2_elf32_info_to_howto): Do lookup using lookup_howto.
	Pass it the ABFD parameter.
	(nios2_elf32_do_call26_relocate): Check for alignment on a 4-byte
	boundary.
	(nios2_elf32_relocate_section): Adjust call to lookup_howto.
	* libbfd.h: Regenerated.
	* reloc.c (BFD_RELOC_NIOS2_R2_S12): New.
	(BFD_RELOC_NIOS2_R2_I10_1_PCREL): New.
	(BFD_RELOC_NIOS2_R2_T1I7_1_PCREL): New.
	(BFD_RELOC_NIOS2_R2_T1I7_2): New.
	(BFD_RELOC_NIOS2_R2_T2I4): New.
	(BFD_RELOC_NIOS2_R2_T2I4_1): New.
	(BFD_RELOC_NIOS2_R2_T2I4_2): New.
	(BFD_RELOC_NIOS2_R2_X1I7_2): New.
	(BFD_RELOC_NIOS2_R2_X2L5): New.
	(BFD_RELOC_NIOS2_R2_F1I5_2): New.
	(BFD_RELOC_NIOS2_R2_L5I4X1): New.
	(BFD_RELOC_NIOS2_R2_T1X1I6): New.
	(BFD_RELOC_NIOS2_R2_T1X1I6_2): New.

	include/elf/
	* nios2.h (R_NIOS2_R2_S12): New.
	(R_NIOS2_R2_I10_1_PCREL): New.
	(R_NIOS2_R2_T1I7_1_PCREL): New.
	(R_NIOS2_R2_T1I7_2): New.
	(R_NIOS2_R2_T2I4): New.
	(R_NIOS2_R2_T2I4_1): New.
	(R_NIOS2_R2_T2I4_2): New.
	(R_NIOS2_R2_X1I7_2): New.
	(R_NIOS2_R2_X2L5): New.
	(R_NIOS2_R2_F1I5_2): New.
	(R_NIOS2_R2_L5I4X1): New.
	(R_NIOS2_R2_T1X1I6): New.
	(R_NIOS2_R2_T1X1I6_2): New.
	(R_NIOS2_ILLEGAL): Renumber.
 2015-07-01 16:02:09 -07:00
Sandra Loosemore
965b1d8083 Add Nios II arch flags and compatibility tests 
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	bfd/
	* archures.c (bfd_mach_nios2r1, bfd_mach_nios2r2): New.
	* bfd-in2.h: Regenerated.
	* cpu-nios2.c (nios2_compatible): New.
	(N): Use nios2_compatible instead of bfd_default_compatible.
	(NIOS2R1_NEXT, NIOS2R2_NEXT): Define.
	(arch_info_struct): New.
	(bfd_nios2_arch): Chain to NIOS2R1_NEXT.
	* elf32-nios2.c (is_nios2_elf): New.
	(nios2_elf32_merge_private_bfd_data): New.
	(nios2_elf32_object_p): New.
	(bfd_elf32_bfd_merge_private_bfd_data): Define.
	(elf_backend_object_p): Define.

	gas/
	* config/tc-nios2.c: Adjust includes.
	(OPTION_MARCH): Define.
	(md_longopts): Add -march option.
	(nios2_architecture): New.
	(nios2_use_arch): New.
	(md_parse_option): Handle OPTION_MARCH.
	(md_show_usage): Document -march.
	(md_begin): Set arch in BFD.
	(nios2_elf_final_processing): New.
	* config/tc-nios2.h (elf_tc_final_processing): Define.
	(nios2_elf_final_processing): New.
	* doc/c-nios2.texi (-march): Add documentation.

	include/elf/
	* nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define.

	ld/testsuite/
	* ld-nios2/mixed1a.d: New.
	* ld-nios2/mixed1a.s: New.
	* ld-nios2/mixed1b.d: New.
	* ld-nios2/mixed1b.s: New.
	* ld-nios2/nios2.exp: Build the new compatibility tests.
 2015-07-01 15:55:28 -07:00
Matthew Fortune
a5499fa464 Add support for DT_MIPS_RLD_MAP_REL. 
This tag makes it possible to access the debug map when debugging position
independent executables.

bfd/

	* elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Use executable
	instead of !shared to indicate an application vs shared library.
	(_bfd_mips_elf_size_dynamic_sections): Likewise.
	(_bfd_mips_elf_finish_dynamic_sections): Handle DT_MIPS_RLD_MAP_REL.
	(_bfd_mips_elf_get_target_dtag): Likewise.

binutils/

	* readelf.c (get_mips_dynamic_type): Handle DT_MIPS_RLD_MAP_REL.

include/

	* elf/mips.h (DT_MIPS_RLD_MAP_REL): New macro.

ld/testsuite/

	* ld-mips-elf/pic-and-nonpic-3b.ad: Adjust for extra dynamic tag.
	* ld-mips-elf/pic-and-nonpic-4b.ad: Likewise.
	* ld-mips-elf/pic-and-nonpic-5b.ad: Likewise.
	* ld-mips-elf/pic-and-nonpic-6-n32.ad: Likewise.
	* ld-mips-elf/pic-and-nonpic-6-n64.ad: Likewise.
	* ld-mips-elf/pic-and-nonpic-6-o32.ad: Likewise.
	* ld-mips-elf/tlsdyn-o32-1.d: Likewise.
	* ld-mips-elf/tlsdyn-o32-1.got: Likewise.
	* ld-mips-elf/tlsdyn-o32-2.d: Likewise.
	* ld-mips-elf/tlsdyn-o32-2.got: Likewise.
	* ld-mips-elf/tlsdyn-o32-3.d: Likewise.
	* ld-mips-elf/tlsdyn-o32-3.got: Likewise.
	* ld-mips-elf/tlsdyn-o32.d: Likewise.
	* ld-mips-elf/tlsdyn-o32.got: Likewise.
	* ld-mips-elf/pie-n32.d: New file.
	* ld-mips-elf/pie-n64.d: Likewise.
	* ld-mips-elf/pie-o32.d: Likewise.
	* ld-mips-elf/pie.s: Likewise.
	* ld-mips-elf/mips-elf.exp: Add new tests.
 2015-06-26 11:53:33 +01:00
Iain Buclaw
f91ca6bc00 Sync libiberty from GCC, replaying updates to configure scripts 2015-06-24 21:43:02 +02:00
Nick Clifton
bdc4de1b24 Stop "objdump -d" from disassembling past a symbolic address. 
include	* dis-asm.h (struct disassemble_info): Add stop_vma field.

binuti  * objdump.c (disassemble_bytes): Set the stop_vma field in the
	disassemble_info structure when disassembling code sections with
	-d.
	* doc/binutils.texi (objdump): Document the discrepancy between -d
	and -D.

opcodes	* dis-buf.c (buffer_read_memory): Fail is stop_vma is set and the
	requested region lies beyond it.
	* bfin-dis.c (print_insn_bfin): Ignore sysop instructions when
	looking for 32-bit insns.
	* mcore-dis.c (print_insn_mcore): Disable stop_vma when reading
	data.
	* sh-dis.c (print_insn_sh): Likewise.
	* tic6x-dis.c (print_insn_tic6x): Disable stop_vma when reading
	blocks of instructions.
	* vax-dis.c (print_insn_vax): Check that the requested address
	does not clash with the stop_vma.

tests	* gas/arm/backslash-at.s: Add extra .byte directives so that the
	foo symbol does not appear to point half way through an
	instruction.
	* gas/arm/backslash-at.d: Update expected disassembly.
	* gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
 2015-06-22 16:53:27 +01:00
Peter Bergner
11a0cf2ec0 Allow for optional operands with non-zero default values. 
ISA 2.07 (ie, POWER8) added the rfebb instruction which takes one operand
with the value of either a 0 or 1.  It also defines an extended mnemonic
with no operands (ie, "rfebb") that is supposed to be equivalent to "rfebb 1".
I implemented rfebb's lone operand with PPC_OPERAND_OPTIONAL, but the
problem is, optional operands that are ommitted always default to the
value 0, which is wrong in this case.  I have added support for allowing
non-zero default values by adding an additional flag PPC_OPERAND_OPTIONAL_VALUE
that specifies that the default operand value to be used is stored in the
SHIFT field of the operand field immediately following this one.

This fixes the rfebb issue.  I also fixed the mftb and mfcr instructions
so they use the same mechanism.  This allows us to flag invalid uses of
mfcr where we explicitly pass in a zero FXM value, like the use in a2.[sd].

include/opcode/

	* ppc.h (PPC_OPERAND_OPTIONAL_VALUE): New.
	(ppc_optional_operand_value): New inline function.

opcodes/
	* ppc-dis.h (skip_optional_operands): Use ppc_optional_operand_value.
	* ppc-opc.c (FXM4): Add non-zero optional value.
	(TBR): Likewise.
	(SXL): Likewise.
	(insert_fxm): Handle new default operand value.
	(extract_fxm): Likewise.
	(insert_tbr): Likewise.
	(extract_tbr): Likewise.

gas/
	* config/tc-ppc.c (md_assemble): Use ppc_optional_operand_value.
	Allow for optional operands without insert functions.

gas/testsuite/
	* gas/ppc/power8.d: Fixup rfebb test results.
	* gas/ppc/a2.s: Fix invalid mfcr test.
	* gas/ppc/a2.d: Likewise.
 2015-06-19 17:17:07 -05:00
Mike Frysinger
6362a3f875 sim: callback: add human readable strings for debugging to maps 
When tracing, we often want to display the human readable name for the
various syscall/errno values.  Rather than make each target duplicate
the lookup, extend the existing maps to include the string directly,
and add helper functions to look up the constants.

While most targets are autogenerated (from libgloss), the bfin/cris
targets have custom maps for the Linux ABI which need to be updated
by hand.
 2015-06-17 13:19:51 -04:00
Matthew Wahab
88f0ea342d [AArch64] Add support for ARMv8.1 command line option 2015-06-04 11:14:07 +01:00
Matthew Wahab
a5932920ef [ARM] Support for ARMv8.1 command line option 
2015-06-03  Matthew Wahab  <matthew.wahab@arm.com>

gas/
	* config/tc-arm.c (arm_archs): Add "armv8.1-a".
	* doc/c-arm.texi (ARM Options, -march): Add "armv8.1-a".
	* NEWS: Mention ARMv8.1 support.

include/opcode/
	* arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): New.
	(ARM_ARCH_V8_1A): New.
	(ARM_ARCH_V8_1A_FP): New.
	(ARM_ARCH_V8_1A_SIMD): New.
	(ARM_ARCH_V8_1A_CRYPTOV1): New.
	(ARM_FEATURE_CORE): New.
 2015-06-03 10:03:50 +01:00
Matthew Wahab
d6b4b13ed2 [ARM] Support for ARMv8.1 Adv.SIMD extension 2015-06-02 12:37:33 +01:00
Matthew Wahab
ddfded2f7b [ARM] Add support for ARMv8.1 PAN extension 2015-06-02 12:30:38 +01:00
Matthew Wahab
1af1dd51db [ARM] Rework CPU feature selection in the disassembler 
include/opcode/
	* arm.h (ARM_FEATURE_ALL): New.

opcodes/
	* arm-dis.c (select_arm_features): Rework to avoid used of
	redefined macros.
 2015-06-02 12:24:24 +01:00
Matthew Wahab
9e1f0fa7f3 [AArch64] Support for ARMv8.1a Adv.SIMD instructions 
2015-06-02  Matthew Wahab  <matthew.wahab@arm.com>

gas/
  * config/tc-aarch64.c (aarch64_features): Add "rdma".
  * doc/c-aarch64.texi (AArch64 Extensions): Add "rdma".

gas/testsuite/
  * rdma-directive.d: New.
  * rdma.d: New.
  * rdma.s: New.

include/opcode/
  * aarch64.h (AARCH64_FEATURE_RDMA): New.

opcode/
  * aarch64-tbl.h (aarch64_feature_rdma): New.
  (RDMA): New.
  (aarch64_opcode_table): Add "sqrmlah" and "sqrdmlsh" instructions.
  * aarch64-asm-2.c: Regenerate.
  * aarch64-dis-2.c: Regenerate.
  * aarch64-opc-2.c: Regenerate.
 2015-06-02 12:20:00 +01:00
Matthew Wahab
290806fd94 [AArch64] Support for ARMv8.1a Limited Ordering Regions extension 
2015-06-02  Matthew Wahab  <matthew.wahab@arm.com>
include/
  * aarch64.h (AARCH64_FEATURE_LOR): New.

opcodes/
  * aarch64-tbl.h (aarch64_feature_lor): New.
  (LOR): New.
  (aarch64_opdocde_table): Add "ldlar", "ldlarb", "ldlarh", "stllr",
  "stllrb", "stllrh".
  * aarch64-asm-2.c: Regenerate.
  * aarch64-dis-2.c: Regenerate.
  * aarch64-opc-2.c: Regenerate.

gas/
  * config/tc-aarch64.c (aarch64_features): Add "lor".
  * doc/c-aarch64.c (Aarch64 Extensions): Add "lor" to list of
  architecture extensions.

gas/testsuite/
  * lor-directive.d: New.
  * lor.d: New.
  * lor.s: New.
 2015-06-02 11:30:12 +01:00
Matthew Wahab
f21cce2cac [AArch64][libopcode] Add support for PAN architecture extension 
The ARMv8.1 architecture introduced the Privileged Access Never extension. This
adds a processor state field PSTATE.PAN which can be accessed using the MRS/MSR
instructions.

This patch adds support for the PAN architecture feature and processor state
field to libopcode.

include/opcode
2015-06-01  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64.h (AARCH64_FEATURE_PAN): New.
	(aarch64_sys_reg_supported_p): Declare.
	(aarch64_pstatefield_supported_p): Declare.

opcodes/
2015-06-01  Matthew Wahab  <matthew.wahab@arm.com>
	* aarch64-opc.c (F_ARCHEXT): New.
	(aarch64_sys_regs): Add "pan".
	(aarch64_sys_reg_supported_p): New.
	(aarch64_pstatefields): Add "pan".
	(aarch64_pstatefield_supported_p): New.
 2015-06-01 16:00:28 +01:00
Roland McGrath
14ae95f220 Recognize GNU_ABI_TAG_SYLLABLE and GNU_ABI_TAG_NACL. 
binutils/
	* readelf.c (print_gnu_note: NT_GNU_ABI_TAG): Recognize
	GNU_ABI_TAG_SYLLABLE and GNU_ABI_TAG_NACL.

include/elf/
	* common.h (GNU_ABI_TAG_SYLLABLE): New macro.
	(GNU_ABI_TAG_NACL): New macro.
 2015-05-29 09:13:53 -07:00
Catherine Moore
2f0c68f23b Compact EH Support 
The specification for the Compact EH format is available at:
https://github.com/MentorEmbedded/cxx-abi/blob/master/MIPSCompactEH.pdf

2015-05-28  Catherine Moore  <clm@codesourcery.com>
	    Bernd Schmidt <bernds@codesourcery.com>
	    Paul Brook <paul@codesourcery.com>

	bfd/
	* bfd-in2.h: Regenerated.
	* elf-bfd.h (DWARF2_EH_HDR, COMPACT_EH_HDR): Define.
	(COMPACT_EH_CANT_UNWIND_OPCODE): Define.
	(dwarf_eh_frame_hdr_info): Move dwarf-specific fields from
	eh_frame_hdr_info.
	(compact_eh_frame_hdr_info): Declare.
	(eh_frame_hdr_info):  Redeclare with union for dwarf-specific
	fields and compact-eh fields.
	(elf_backend_data): Add cant_unwind_opcode and compact_eh_encoding.
	(bfd_elf_section_data): Add eh_frame_entry_field.
	(elf_section_eh_frame_entry): Define.
	(bfd_elf_parse_eh_frame_entries): Declare.
	(_bfd_elf_parse_eh_frame_entry): Declare.
	(_bfd_elf_end_eh_frame_parsing): Declare.
	(_bfd_elf_write_section_eh_frame_entry): Declare.
	(_bfd_elf_eh_frame_entry_present): Declare.
	(_bfd_elf_section_for_symbol): Declare.
	* elf-eh-frame.c (bfd_elf_discard_eh_frame_entry): New function.
	(bfd_elf_record_eh_frame_entry): New function.
	(_bfd_elf_parse_eh_frame_entry): New function.
	(_bfd_elf_parse_eh_frame): Update hdr_info field references.
	(cmp_eh_frame_hdr): New function.
	(add_eh_frame_hdr_terminator): New function.
	(_bfd_elf_end_eh_frame_parsing): New function.
	(find_merged_cie): Update hdr_info field references.
	(_bfd_elf_discard_section_eh_frame): Likewise.
	(_bfd_elf_discard_section_eh_frame_hdr): Add Compact EH support.
	(_bfd_elf_eh_frame_entry_present): New function.
	(_bfd_elf_maybe_strip_eh_frame_hdr): Add Compact EH support.
	(_bfd_elf_write_section_eh_frame_entry): New function.
	(_bfd_elf_write_section_eh_frame): Update hdr_info field references.
	(_bfd_elf_fixup_eh_frame_hdr): New function.
	(write_compact_eh_frame_hdr): New function.
	(write_dwarf_eh_frame_hdr): New function.
	(_bfd_elf_write_section_eh_frame_hdr): Add Compact EH support.
	* elflink.c (_bfd_elf_section_for_symbol): New function.
	(elf_section_ignore_discarded_relocs): Add Compact EH support.
	(elf_link_input_bfd): Likewise.
	(bfd_elf_final_link): Likewise.
	(_bfd_elf_gc_mark): Likewise.
	(bfd_elf_parse_eh_frame_entries): New function.
	(bfd_elf_gc_sections): Add Compact EH support.
	(bfd_elf_discard_info): Likewise.
	* elfxx-mips.c: Include dwarf2.h.
	(_bfd_mips_elf_compact_eh_encoding): New function.
	(_bfd_mips_elf_cant_unwind_opcode): New function.
	* elfxx-mips.h (_bfd_mips_elf_compact_eh_encoding): Declare.
	(_bfd_mips_elf_cant_unwind_opcode): Declare.
	(elf_backend_compact_eh_encoding): Define.
	(elf_backend_cant_unwind_opcode): Define.
	* elfxx-target.h (elf_backend_compact_eh_encoding): Provide default.
	(elf_backend_cant_unwind_opcode): Provide default.
	(elf_backend_data elfNN_bed): Add elf_backend_compact_eh_encoding and
	elf_backend_cant_unwind_opcode.
	* section.c (SEC_INFO_TYPE_EH_FRAME_ENTRY): Add definition.

	gas/
	* config/tc-alpha.c (all_cfi_sections): Declare.
	(s_alpha_ent): Initialize all_cfi_sections.
	(alpha_elf_md_end): Invoke cfi_set_sections.
	* config/tc-mips.c (md_apply_fix):  Handle BFD_RELOC_NONE.
	(s_ehword): Use BFD_RELOC_32_PCREL.
	(mips_fix_adjustable): Handle BFD_RELOC_32_PCREL.
	(mips_cfi_reloc_for_encoding): New function.
	* tc-mips.h (DWARF2_FDE_RELOC_SIZE): Redefine.
	(DWARF2_FDE_RELOC_ENCODING): Define.
	(tc_cfi_reloc_for_encoding): Define.
	(mips_cfi_reloc_for_encoding): Define.
	(tc_compact_eh_opcode_stop): Define.
	(tc_compact_eh_opcode_pad): Define.
	* doc/as.texinfo: Document Compact EH extensions.
	* doc/internals.texi: Likewise.
	* dw2gencfi.c (EH_FRAME_LINKONCE): Redefine.
	(tc_cfi_reloc_for_encoding): Provide default.
	(compact_eh): Declare.
	(emit_expr_encoded): New function.
	(get_debugseg_name): Add Compact EH support.
	(alloc_debugseg_item): Likewise.
	(cfi_set_sections): New function.
	(dot_cfi_fde_data): New function.
	(dot_cfi_personality_id): New function.
	(dot_cfi_inline_lsda): New function.
	(cfi_pseudo_table): Add cfi_fde_data, cfi_personality_id,
	and cfi_inline_lsda.
	(dot_cfi_personality): Add Compact EH support.
	(dot_cfi_lsda): Likewise.
	(dot_cfi_sections): Likewise.
	(dot_cfi_startproc): Likewise.
	(get_cfi_seg): Likewise.
	(output_compact_unwind_data): New function.
	(output_cfi_insn): Add Compact EH support.
	(output_cie): Likewise.
	(output_fde): Likewise.
	(cfi_finish): Likewise.
	(cfi_emit_eh_header): New function.
	(output_eh_header): New function.
	* dw2gencfi.h (cfi_set_sections): Declare.
	(SUPPORT_COMPACT_EH): Define.
	(MULTIPLE_FRAME_SECTIONS): Define.
	New enumeration to describe the Compact EH header format.
	(fde_entry): Add new fields personality_id, eh_header_type, eh_data_size,
	eh_data, eh_loc and sections.
	(CFI_EMIT_eh_frame, CFI_EMIT_debug_frame, CFI_EMIT_target,
	CFI_EMIT_eh_frame_compact): Define.

2015-05-22  Catherine Moore  <clm@codesourcery.com>
	    Bernd Schmidt <bernds@codesourcery.com>

	gas/testsuite/
	* gas/mips/mips.exp: Run new tests.

	* gas/mips/compact-eh-1.s: New file.
	* gas/mips/compact-eh-2.s: New file.
	* gas/mips/compact-eh-3.s: New file.
	* gas/mips/compact-eh-4.s: New file.
	* gas/mips/compact-eh-5.s: New file.
	* gas/mips/compact-eh-6.s: New file.
	* gas/mips/compact-eh-7.s: New file.
	* gas/mips/compact-eh-eb-1.d: New file.
	* gas/mips/compact-eh-eb-2.d: New file.
	* gas/mips/compact-eh-eb-3.d: New file.
	* gas/mips/compact-eh-eb-4.d: New file.
	* gas/mips/compact-eh-eb-5.d: New file.
	* gas/mips/compact-eh-eb-6.d: New file.
	* gas/mips/compact-eh-eb-7.d: New file.
	* gas/mips/compact-eh-el-1.d: New file.
	* gas/mips/compact-eh-el-2.d: New file.
	* gas/mips/compact-eh-el-3.d: New file.
	* gas/mips/compact-eh-el-4.d: New file.
	* gas/mips/compact-eh-el-5.d: New file.
	* gas/mips/compact-eh-el-6.d: New file.
	* gas/mips/compact-eh-el-7.d: New file.
	* gas/mips/compact-eh-err1.l: New file.
	* gas/mips/compact-eh-err1.s: New file.
	* gas/mips/compact-eh-err2.l: New file.
	* gas/mips/compact-eh-err2.s: New file.

2015-05-22  Catherine Moore  <clm@codesourcery.com>

	include/
	* bfdlink.h: Rename eh_frame_hdr to eh_frame_hdr_type.

2015-05-22  Catherine Moore  <clm@codesourcery.com>
	    Paul Brook <paul@codesourcery.com>

	ld/
	* emultempl/elf32.em (gld${EMULATION_NAME}_after_open):
	Add Compact EH support.
	* scripttempl/elf.sc: Handle .eh_frame_entry and .gnu_extab
	sections.

2015-05-22  Catherine Moore  <clm@codesourcery.com>

	ld/testsuite/
	* ld-mips-elf/compact-eh.ld: New linker script.
	* ld-mips-elf/compact-eh1.d: New.
	* ld-mips-elf/compact-eh1.s: New.
	* ld-mips-elf/compact-eh1a.s: New.
	* ld-mips-elf/compact-eh1b.s: New.
	* ld-mips-elf/compact-eh2.d: New.
	* ld-mips-elf/compact-eh2.s: New.
	* ld-mips-elf/compact-eh3.d: New.
	* ld-mips-elf/compact-eh3.s: New.
	* ld-mips-elf/compact-eh3a.s: New.
	* ld-mips-elf/compact-eh4.d: New.
	* ld-mips-elf/compact-eh5.d: New.
	* ld-mips-elf/compact-eh6.d: New.
	* ld-mips-elf/mips-elf.exp: Run new tests.
 2015-05-28 15:21:17 -07:00
Jiong Wang
15eddee17f [AArch64] Add R_AARCH64_P32_LD32_GOTPAGE_LO14 to elf header 
2015-05-12  Jiong. Wang  <jiong.wang@arm.com>

include/
  * elf/aarch64.h (R_AARCH64_P32_LD32_GOTPAGE_LO14): New enumeration.
 2015-05-12 13:47:15 +01:00
H.J. Lu
22abe5566a Rename EM_486 to EM_IAMCU 
bfd/

	* elfcode.h (elf_object_p): Replace EM_486 with EM_IAMCU.

binutils/

	* dwarf.c (init_dwarf_regnames): Replace EM_486 with EM_IAMCU.
	* readelf.c (guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(get_elf_section_flags): Likewise.
	(process_section_headers): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_32bit_pcrel_reloc): Likewise.

include/elf/

	* common.h (EM_486): Renamed to ...
	(EM_IAMCU): This.
 2015-05-11 08:53:05 -07:00
H.J. Lu
f7d1355102 Sync filenames.h with gcc 
Merge with gcc:
	2014-11-11  Anthony Brandon  <anthony.brandon@gmail.com>
		    Manuel López-Ibáñez  <manu@gcc.gnu.org>

	PR driver/36312
	* filenames.h: Add prototype for canonical_filename_eq.
 2015-05-01 09:11:15 -07:00
DJ Delorie
0952813b0b Make RL78 disassembler and simulator respect ISA for mul/div 
[gas]
	* config/rl78-defs.h (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.
	* config/rl78-parse.y (ISA_G10): New.
	(ISA_G13): New.
	(ISA_G14): New.
	(MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
	* config/tc-rl78.c (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.

[gdb]
	* rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to
	rl78_decode_opcode

[include]
	* dis-asm.h (print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.
	* opcode/rl78.h (RL78_Dis_Isa): New.
	(rl78_decode_opcode): Add ISA parameter.

[opcodes]
	* disassemble.c (disassembler): Choose suitable disassembler based
	on E_ABI.
	* rl78-decode.opc (rl78_decode_opcode): Take ISA parameter.  Use
	it to decode mul/div insns.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c (print_insn_rl78): Rename to...
	(print_insn_rl78_common): ...this, take ISA parameter.
	(print_insn_rl78): New.
	(print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.

[sim]
	* rl78/cpu.c (g14_multiply): New.
	* rl78/cpu.h (g14_multiply): New.
	* rl78/load.c (rl78_load): Decode ISA completely.
	* rl78/main.c (main): Expand -M to include other ISAs.
	* rl78/rl78.c (decode_opcode): Decode based on ISA.
	* rl78/trace.c (rl78_disasm_fn): New.
	(sim_disasm_init): Reset it.
	(sim_disasm_one): Get correct disassembler for ISA.
 2015-04-30 15:25:49 -04:00
Andreas Krebbel
643f7afb0d S/390: z13 use GNU attribute to indicate vector ABI 
bfd/
	* elf-s390-common.c (elf_s390_merge_obj_attributes): New function.
	* elf32-s390.c (elf32_s390_merge_private_bfd_data): Call
	elf_s390_merge_obj_attributes.
	* elf64-s390.c (elf64_s390_merge_private_bfd_data): New function.

binutils/
	* readelf.c (display_s390_gnu_attribute): New function.
	(process_s390_specific): New function.
	(process_arch_specific): Call process_s390_specific.

gas/
	* doc/as.texinfo: Document Tag_GNU_S390_ABI_Vector.

include/elf/
	* s390.h: Define Tag_GNU_S390_ABI_Vector.
 2015-04-27 10:32:23 +02:00
Alan Modra
44bd1acd55 Non-alloc sections don't belong in PT_LOAD segments 
Taking them out showed a bug in the powerpc64 backend with .branch_lt
being removed from output_bfd but not from previously set up segment
section maps.  Removing the bfd sections meant their sh_flags (and
practically everything else) remaining zero, ie. not SHF_ALLOC,
triggering complaints about "`.branch_lt' can't be allocated in
segment".

include/elf/
	* internal.h (ELF_SECTION_IN_SEGMENT_1): Ensure PT_LOAD and
	similar segments only contain alloc sections.
ld/
	* emultempl/ppc64elf.em (gld${EMULATION_NAME}_after_allocation):
	Call gld${EMULATION_NAME}_map_segments regardless of need_laying_out.
ld/testsuite/
	* ld-powerpc/tocnovar.d: Revert last change.
 2015-04-25 09:15:49 +09:30
H.J. Lu
9361e6307b Define SEC_MEP_VLIW in bfd/section.c 
Bits in section flags should only be defined in bfd/section.c.  This
patch moves SEC_MEP_VLIW to bfd/section.c.

bfd/

	PR binutils/18316
	* section.c (SEC_MEP_VLIW): New.
	* bfd-in2.h: Regenerated.

include/elf/

	PR binutils/18316
	* mep.h (SEC_MEP_VLIW): Removed.
 2015-04-24 05:40:23 -07:00
Richard Earnshaw
a4ea36c6cb Merge include/partition.h from GCC. 
2015-03-19  Richard Biener  <rguenther@suse.de>

		* partition.h (struct partition_elem): Re-order elements to
		avoid padding.
 2015-04-17 16:13:43 +01:00
H.J. Lu
0ce398f106 Add --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] 
This patch adds --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]
to ld for ELF targets to support generating compressed DWARF debug
sections.  We always generate .zdebug_* section since section names have
been finalized and they can't be changed easily when compression is
being performed.

bfd/

	* bfd-in.h (compressed_debug_section_type): New.
	* compress.c (bfd_compress_section_contents): Add an argument
	for linker write compression and always generate .zdebug_*
	section when linking.
	(bfd_init_section_compress_status): Pass FALSE to
	bfd_compress_section_contents.
	(bfd_compress_section): New function.
	* elf.c (elf_fake_sections): For linking, set SEC_ELF_COMPRESS
	on DWARF debug sections if COMPRESS_DEBUG is set and rename
	section if COMPRESS_DEBUG_GABI_ZLIB isn't set.
	(assign_file_positions_for_non_load_sections): Set sh_offset
	to -1 if SEC_ELF_COMPRESS is set.
	(assign_file_positions_except_relocs): Likwise.
	(_bfd_elf_assign_file_positions_for_relocs): Renamed to ...
	(_bfd_elf_assign_file_positions_for_non_load): This.  Change
	return time to bfd_boolean.  Compress the section if
	SEC_ELF_COMPRESS is set.
	(_bfd_elf_write_object_contents): Updated.
	(_bfd_elf_set_section_contents): Write section contents to
	the buffer if SEC_ELF_COMPRESS is set.
	* merge.c: Include "elf-bfd.h".
	(sec_merge_emit): Add arguments for contents and offset.  Write
	to contents with offset if contents isn't NULL.
	(_bfd_write_merged_section): Write section contents to the
	buffer if SEC_ELF_COMPRESS is set.  Pass contents and
	output_offset to sec_merge_emit.
	* elflink.c (bfd_elf_final_link): Allocate the buffer for
	output section contents if SEC_ELF_COMPRESS is set.
	* section.c (SEC_ELF_COMPRESS): New.
	* bfd-in2.h: Regenerated.

gas/

	* as.h (compressed_debug_section_type): Removed.

include/

	* bfdlink.h (bfd_link_info): Add compress_debug.

ld/

	* ld.texinfo: Document --compress-debug-sections=.
	* ldmain.c (main): Set BFD_COMPRESS on output_bfd if
	COMPRESS_DEBUG is set.  Set BFD_COMPRESS_GABI on output_bfd
	for COMPRESS_DEBUG_GABI_ZLIB.
	* lexsup.c (elf_static_list_options): Add
	--compress-debug-sections=.
	* emultempl/elf32.em (OPTION_COMPRESS_DEBUG): New.
	(xtra_long): Add "compress-debug-sections".
	(gld${EMULATION_NAME}_handle_option): Handle
	OPTION_COMPRESS_DEBUG.

ld/testsuite/

	* ld-elf/compress.exp (build_tests): Add tests for
	--compress-debug-sections=.
	(run_tests): Likewise.
	Add additonal tests for --compress-debug-sections=.
	* ld-elf/gabiend.rt: New file.
	* ld-elf/gabinormal.rt: Likewise.
	* ld-elf/gnubegin.rS: Likewise.
	* ld-elf/gnunormal.rS: Likewise.
	* ld-elf/zlibbegin.rS: Likewise.
	* ld-elf/zlibnormal.rS: Likewise.
 2015-04-14 22:01:38 -07:00
H.J. Lu
889c2a6796 Add -z noextern-protected-data to ld for ELF/x86 
Address of protected data defined in the shared library may be external,
i.e., due to copy relocation.  By default, linker backend checks if
relocations against protected data symbols are valid for building shared
library and issues an error if relocation isn't allowed.  The new option
override linker backend default.  When -z noextern-protected-data is used,
updates on protected data symbols by another module won't be visibile
to the resulting shared library.  This option is specific to ELF/i386
and ELF/x86-64.

bfd/

	PR ld/pr17709
	* elflink.c (_bfd_elf_adjust_dynamic_copy): Check
	info->extern_protected_data when warning copy relocs against
	protected symbols.
	(_bfd_elf_symbol_refs_local_p): Check info->extern_protected_data
	when checking protected non-function symbols.

include/

	PR ld/pr17709
	* bfdlink.h (bfd_link_info): Add extern_protected_data.

ld/

	PR ld/pr17709
	* ld.texinfo: Document "-z noextern-protected-data".
	* ldmain.c (main): Initialize link_info.extern_protected_data
	to -1.
	* lexsup.c (elf_shlib_list_options): Add
	"-z [no]extern-protected-data".
	* emulparams/elf32_x86_64.sh: Source extern_protected_data.sh.
	* emulparams/elf_i386.sh: Likewise.
	* emulparams/elf_i386_be.sh: Likewise.
	* emulparams/elf_i386_chaos.sh: Likewise.
	* emulparams/elf_i386_ldso.sh: Likewise.
	* emulparams/elf_i386_vxworks.sh: Likewise.
	* emulparams/elf_k1om.sh: Likewise.
	* emulparams/elf_l1om.sh: Likewise.
	* emulparams/elf_x86_64.sh: Source extern_protected_data.sh.
	(PARSE_AND_LIST_OPTIONS): Renamed to ...
	(PARSE_AND_LIST_OPTIONS_BNDPLT): This.
	(PARSE_AND_LIST_ARGS_CASE_Z): Renamed to ...
	(PARSE_AND_LIST_ARGS_CASE_Z_BNDPLT): This.
	(PARSE_AND_LIST_OPTIONS): Append $PARSE_AND_LIST_OPTIONS_BNDPLT.
	(PARSE_AND_LIST_ARGS_CASE_Z): Append
	$PARSE_AND_LIST_ARGS_CASE_Z_BNDPLT.
	* emulparams/extern_protected_data.sh: New file.

ld/testsuite/

	PR ld/pr17709
	* ld-i386/i386.exp: Run protected6b.
	* ld-i386/protected6b.d: New file.
	* ld-x86-64/protected6b.d: Likewise.
	* ld-x86-64/x86-64.exp:  Run protected6b.
 2015-04-14 04:13:11 -07:00
Nick Clifton
3525236c57 Add support to the RX toolchain to restrict the use of string instructions. 
bfd	* elf32-rx.c (describe_flags): Report the settings of the string
	insn using bits.
	(rx_elf_merge_private_bfd_data): Handle merging of the string insn
	using bits.

bin	* readelf.c (get_machine_flags): Report the setting of the string
	insn using bits.

gas	* config/tc-rx.c (enum options): Add OPTION_DISALLOW_STRING_INSNS.
	(md_longopts): Add -mno-allow-string-insns.
	(md_parse_option): Handle -mno-allow-string-insns.
	(md_show_usage): Mention -mno-allow-string-insns.
	(rx_note_string_insn_use): New function.  Produces an error
	message if a string insn is used when it is not allowed.
	* config/rx-parse.y (SCMPU): Call rx_note_string_insn_use.
	(SMOVU, SMOVB, SMOVF, SUNTIL, SWHILE, RMPA): Likewise.
	* config/rx-defs.h (rx_note_string_insn_use): Prototype.
	* doc/c-rx.texi: Document -mno-allow-string-insns.

elf	* rx.h (E_FLAG_RX_SINSNS_SET): New bit in e_flags field.
	(E_FLAG_RX_SINSNS_YES): Likewise.
	(E_FLAG_RX_SINSNS_MASK): New define.
 2015-04-09 12:48:37 +01:00