H.J. Lu
8acd537727
2009-01-13 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (cpu_flag_init): Remove a white space.
(operand_type_init): Likewise.
2009-01-14 00:42:07 +00:00
H.J. Lu
bd5295b282
gas/
...
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (cpu_arch): Add corei7, .clflush and
.syscall.
(i386_align_code): Handle PROCESSOR_COREI7.
(md_show_usage): Add corei7, clflush and syscall.
(i386_target_format): Replace cpup4 with cpuclflush.
* gas/config/tc-i386.h (processor_type): Add PROCESSOR_COREI7.
* doc/c-i386.texi: Document corei7, clflush and syscall.
gas/testsuite/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add clflush and syscall.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2009-01-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
(cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
and CpuSYSCALL.
(lineno): Removed.
(set_bitfield): Take an argument, lineno. Don't report lineno
on error if it is -1.
(process_i386_cpu_flag): Take an argument, lineno.
(process_i386_opcode_modifier): Likewise.
(process_i386_operand_type): Likewise.
(output_i386_opcode): Likewise.
(opcode_hash_entry): Add lineno.
(process_i386_opcodes): Updated.
(process_i386_registers): Likewise.
(process_i386_initializers): Likewise.
* i386-opc.h (CpuP4): Removed.
(CpuK6): Likewise.
(CpuK8): Likewise.
(CpuClflush): New.
(CpuSYSCALL): Likewise.
(CpuMMX): Updated.
(i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
cpuclflush and cpusyscall.
* i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
syscall and sysret.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-10 17:25:52 +00:00
H.J. Lu
1b7f3fb0dd
gas/
...
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .rdtscp.
(md_show_usage): Display rdtscp.
* doc/c-i386.texi: Document rdtscp.
gas/testsuite/
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add rdtscp.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2009-01-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
(cpu_flags): Add CpuRdtscp.
(set_bitfield): Remove CpuSledgehammer check.
* i386-opc.h (CpuRdtscp): New.
(CpuLM): Updated.
(i386_cpu_flags): Add cpurdtscp.
* i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-09 20:32:32 +00:00
H.J. Lu
22da050bbf
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (process_copyright): Update for 2009.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-01-06 01:14:45 +00:00
H.J. Lu
b6169b206a
gas/
...
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (_i386_insn): Add swap_operand.
(parse_insn): Handle ".s".
(match_template): Handle swap_operand.
* doc/c-i386.texi: Document .s suffix.
gas/testsuite/
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run opts, opts-intel, sse2avx-opts,
sse2avx-opts-intel, x86-64-opts, x86-64-opts-intel,
x86-64-sse2avx-opts and x86-64-sse2avx-opts-intel.
* gas/i386/opts.d: New.
* gas/i386/opts-intel.d: Likewise.
* gas/i386/opts.s: Likewise.
* gas/i386/sse2avx-opts.d: Likewise.
* gas/i386/sse2avx-opts-intel.d: Likewise.
* gas/i386/x86-64-opts.d: Likewise.
* gas/i386/x86-64-opts-intel.d: Likewise.
* gas/i386/x86-64-opts.s: Likewise.
* gas/i386/x86-64-sse2avx-opts.d: Likewise.
* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.
opcodes/
2008-12-20 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (EbS): New.
(EvS): Likewise.
(EMS): Likewise.
(EXqS): Likewise.
(EXxS): Likewise.
(b_swap_mode): Likewise.
(v_swap_mode): Likewise.
(q_swap_mode): Likewise.
(x_swap_mode): Likewise.
(v_mode): Updated.
(w_mode): Likewise.
(t_mode): Likewise.
(xmm_mode): Likewise.
(swap_operand): Likewise.
(dis386): Use EbS on movB. Use EvS on moveS.
(dis386_twobyte): Use EXxS on movapX.
(prefix_table): Use EXxS on movups, movupd, movdqu, movdqa,
vmovups, vmovdqu, vmovdqa. Use EMS and EXqS on movq.
(vex_table): Use EXxS on vmovapX.
(vex_len_table): Use EXqS on vmovq.
(intel_operand_size): Handle b_swap_mode, v_swap_mode,
q_swap_mode and x_swap_mode.
(OP_E_register): Handle b_swap_mode and v_swap_mode.
(OP_EM): Handle v_swap_mode.
(OP_EX): x_swap_mode and q_swap_mode.
* i386-gen.c (opcode_modifiers): Add S.
* i386-opc.h (S): New.
(Modrm): Updated.
(i386_opcode_modifier): Add s.
* i386-opc.tbl: Add S to movapd, movaps, movdqa, movdqu, movq,
movupd, movups, vmovapd, vmovaps, vmovdqa, vmovdqu and vmovq.
* i386-tbl.h: Regenerated.
2008-12-20 17:40:51 +00:00
H.J. Lu
035475035d
2008-12-08 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (opcode_modifiers): Move VexNDS before VexNDD.
2008-12-08 18:07:26 +00:00
H.J. Lu
c587b3f982
2008-09-30 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c: Include "hashtab.h".
(next_field): Take a new argument, last. Check last.
(process_i386_cpu_flag): Updated.
(process_i386_opcode_modifier): Likewise.
(process_i386_operand_type): Likewise.
(process_i386_registers): Likewise.
(output_i386_opcode): New.
(opcode_hash_entry): Likewise.
(opcode_hash_table): Likewise.
(opcode_hash_hash): Likewise.
(opcode_hash_eq): Likewise.
(process_i386_opcodes): Use opcode hash table and opcode array.
2008-09-30 19:47:14 +00:00
H.J. Lu
f1f8f695c0
gas/
...
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE, EPT and MOVBE.
* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
(md_show_usage): Add .movbe and .ept.
* doc/c-i386.texi: Add movbe and ept to -march=. Document
.movbe and .ept.
gas/testsuite/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and
x86-64-inval-ept.
* gas/i386/arch-10.s: Add movbe and invept.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/ept.d: New file
* gas/i386/ept-intel.d: Likewise.
* gas/i386/ept.s: Likewise.
* gas/i386/inval-ept.l: Likewise.
* gas/i386/inval-ept.s: Likewise.
* gas/i386/inval-movbe.l: Likewise.
* gas/i386/inval-movbe.s: Likewise.
* gas/i386/movbe.d: Likewise.
* gas/i386/movbe-intel.d: Likewise.
* gas/i386/movbe.s: Likewise.
* gas/i386/x86-64-inval-ept.l: Likewise.
* gas/i386/x86-64-inval-ept.s: Likewise.
* gas/i386/x86-64-inval-movbe.l: Likewise.
* gas/i386/x86-64-inval-movbe.s: Likewise.
* gas/i386/x86-64-ept.d: Likewise.
* gas/i386/x86-64-ept-intel.d: Likewise.
* gas/i386/x86-64-ept.s: Likewise.
* gas/i386/x86-64-movbe.d: Likewise.
* gas/i386/x86-64-movbe-intel.d: Likewise.
* gas/i386/x86-64-movbe.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (MOVBE_Fixup): New.
(Mo): Likewise.
(PREFIX_0F3880): Likewise.
(PREFIX_0F3881): Likewise.
(PREFIX_0F38F0): Updated.
(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
CPU_EPT_FLAGS.
(cpu_flags): Add CpuMovbe and CpuEPT.
* i386-opc.h (CpuMovbe): New.
(CpuEPT): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Add cpumovbe and cpuept.
* i386-opc.tbl: Add entries for movbe and EPT instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-05-02 16:53:40 +00:00
H.J. Lu
81f8a9131a
gas/
...
2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Don't check SSE instructions
if noavx is 0.
opcodes/
2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add NoAVX.
* i386-opc.h (NoAVX): New.
(OldGcc): Updated.
(i386_opcode_modifier): Add noavx.
* i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
instructions which don't have AVX equivalent.
* i386-tbl.h: Regenerated.
2008-04-22 22:27:13 +00:00
H.J. Lu
594ab6a333
gas/
...
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE. Change CLMUL to PCLMUL.
* config/tc-i386.c (cpu_arch): Add .pclmul.
(md_show_usage): Replace clmul with pclmul.
* doc/c-i386.texi: Likewise.
gas/testsuite/
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/arch-10.d: Replace clmul with pclmul.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
with CPU_PCLMUL_FLAGS/CpuPCLMUL.
(cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
* i386-opc.tbl: Likewise.
* i386-opc.h (CpuCLMUL): Renamed to ...
(CpuPCLMUL): This.
(CpuFMA): Updated.
(i386_cpu_flags): Replace cpuclmul with cpupclmul.
* i386-init.h: Regenerated.
2008-04-04 16:34:23 +00:00
H.J. Lu
c0f3af977b
binutils/
...
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 14:03:21 +00:00
H.J. Lu
65da13b5e0
gas/
...
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (inoutportreg): New.
(process_immext): New.
(md_assemble): Use it.
(update_imm): Use imm16 and imm32s.
(i386_att_operand): Use inoutportreg.
opcodes/
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
* i386-init.h: Regenerated.
2008-02-16 16:16:48 +00:00
Jan Beulich
a60de03c61
gas/
...
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (allow_pseudo_reg): New.
(parse_real_register): Check for NULL just once. Allow all
register table entries when allow_pseudo_reg is non-zero.
Don't allow any registers without type when allow_pseudo_reg
is zero.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
(tc_x86_frame_initial_instructions): Adjust for above change.
* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
(tc_parse_to_dw2regnum): New.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
error handling.
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/cfi/cfi-i386.s: Add code testing use of all registers.
Fix a few comments.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-gen.c (process_i386_registers): Process new fields.
* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
unsigned char. Add dw2_regnum and Dw2Inval.
* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
register names.
* i386-tbl.h: Re-generate.
2008-02-13 10:14:40 +00:00
H.J. Lu
f03fe4c110
gas/
...
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .xsave.
(md_show_usage): Add .xsave.
* doc/c-i386.texi: Add xsave to -march=.
gas/testsuite/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.s: Add xgetbv.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-10.d: Likewise.
opcodes/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
* i386-init.h: Updated.
2008-02-12 05:35:36 +00:00
H.J. Lu
475a2301db
gas/testsuite/
...
2002-02-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave
and x86-64-xsave-intel.
* gas/i386/x86-64-xsave-intel.d: New file.
* gas/i386/x86-64-xsave.d: Likewise.
* gas/i386/x86-64-xsave.s: Likewise.
* gas/i386/xsave-intel.d: Likewise.
* gas/i386/xsave.d: Likewise.
* gas/i386/xsave.s: Likewise.
opcodes/
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flags): Add CpuXsave.
* i386-opc.h (CpuXsave): New.
(Cpu64): Updated.
(i386_cpu_flags): Add cpuxsave.
* i386-dis.c (MOD_0FAE_REG_4): New.
(RM_0F01_REG_2): Likewise.
(MOD_0FAE_REG_5): Updated.
(RM_0F01_REG_3): Likewise.
(reg_table): Use MOD_0FAE_REG_4.
(mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
for xrstor.
(rm_table): Add RM_0F01_REG_2.
* i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-02-12 00:04:45 +00:00
H.J. Lu
599121aa77
gas/
...
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_show_usage): Replace tabs with spaces.
gas/testsuite/
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.
* gas/i386/x86-64-arch-1.d: New.
* gas/i386/x86-64-arch-1.s: Likewise.
* gas/i386/x86-64-arch-10.d: Likewise.
opcodes/
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
* i386-init.h: Regenerated.
2008-01-23 19:05:12 +00:00
H.J. Lu
115c7c25fe
gas/
...
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_target_format): Remove cpummx2.
gas/testsuite/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10.d: New.
* gas/i386/arch-11.s: Likewise.
* gas/i386/arch-12.d: Likewise.
* gas/i386/arch-12.s: Likewise.
* gas/i386/i386.exp: Run arch-11 and arch-12.
opcodes/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
(cpu_flags): Likewise.
* i386-opc.h (CpuMMX2): Removed.
(CpuSSE): Updated.
* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-22 19:57:30 +00:00
H.J. Lu
6305a20382
gas/
...
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
(XXX_MNEM_SUFFIX): Likewise.
(END_OF_INSN): Likewise.
(templates): Likewise.
(modrm_byte): Likewise.
(rex_byte): Likewise.
(DREX_XXX): Likewise.
(drex_byte): Likewise.
(sib_byte): Likewise.
(processor_type): Likewise.
(arch_entry): Likewise.
(cpu_sub_arch_name): Remove const.
(cpu_arch): Add .vmx and .smx.
(set_cpu_arch): Append cpu_sub_arch_name.
(md_parse_option): Support -march=CPU[,+EXTENSION...].
(md_show_usage): Updated.
* config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
(XXX_MNEM_SUFFIX): Likewise.
(END_OF_INSN): Likewise.
(templates): Likewise.
(modrm_byte): Likewise.
(rex_byte): Likewise.
(DREX_XXX): Likewise.
(drex_byte): Likewise.
(sib_byte): Likewise.
(processor_type): Likewise.
(arch_entry): Likewise.
* doc/as.texinfo: Update i386 -march option.
* doc/c-i386.texi: Update -march= for ISA.
gas/testsuite/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-10-1.l: New.
* gas/i386/arch-10-1.s: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-2.s: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-3.s: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10-4.s: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10.s: Likewise.
* gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2,
arch-10-3 and arch-10-4.
* gas/i386/nops-2.s: Use movsbl instead of cmove.
* gas/i386/nops-2-i386.d: Updated.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/x86-64-nops-2.d: Likewise.
opcodes/
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
CPU_SMX_FLAGS.
* i386-init.h: Regenerated.
2008-01-22 19:16:45 +00:00
H.J. Lu
5c07affcae
gas/
...
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_reg_size): New.
(match_mem_size): Likewise.
(operand_size_match): Likewise.
(operand_type_match): Also clear all size fields.
(match_template): Skip Intel syntax when in AT&T syntax.
Call operand_size_match to check operand size.
(i386_att_operand): Set the mem field to 1 for memory
operand.
(i386_intel_operand): Likewise.
gas/testsuite/
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.s: Add tests for movsx, movzx and movnti.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/i386.d: Updated.
* gas/i386/inval.l: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add IntelSyntax.
(operand_types): Add Mem.
* i386-opc.h (IntelSyntax): New.
* i386-opc.h (Mem): New.
(Byte): Updated.
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Add intelsyntax.
(i386_operand_type): Add mem.
* i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
instructions.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-15 01:37:56 +00:00
H.J. Lu
7d5e4556a3
gas/testsuite/
...
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/i386.s: Add tests for fnstsw and fstsw.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/intel.s: Use word instead of dword on ss.
* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
and out.
* gas/i386/prefix.s: Remove invalid fstsw.
* gas/i386/inval.l: Updated.
* gas/i386/intelbad.l: Likewise.
* gas/i386/i386.d: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/prefix.d: Updated.
gas/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (_i386_insn): Update comment.
(operand_type_match): Also clear unspecified.
(operand_type_register_match): Likewise.
(parse_operands): Initialize unspecified.
(i386_intel_operand): Likewise.
(match_template): Check memory and accumulator operand size.
(i386_att_operand): Clear unspecified on register operand.
(intel_e11): Likewise.
(intel_e09): Set operand size and clean unspecified for
"XXX PTR".
opcodes/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (operand_type_init): Add Dword to
OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
Qword and Xmmword.
(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
Xmmword, Unspecified and Anysize.
(set_bitfield): Make Mmword an alias of Qword. Make Oword
an alias of Xmmword.
* i386-opc.h (CheckSize): Removed.
(Byte): Updated.
(Word): Likewise.
(Dword): Likewise.
(Qword): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(OTMax): Likewise.
(i386_opcode_modifier): Remove checksize, byte, word, dword,
qword and xmmword.
(Fword): New.
(TBYTE): Likewise.
(Unspecified): Likewise.
(Anysize): Likewise.
(i386_operand_type): Add byte, word, dword, fword, qword,
tbyte xmmword, unspecified and anysize.
* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
Tbyte, Xmmword, Unspecified and Anysize.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-12 16:05:42 +00:00
H.J. Lu
50e8458f68
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (set_bitfield): Use fail () on error.
2008-01-09 01:24:07 +00:00
H.J. Lu
3d4d5afaf0
2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (lineno): New.
(filename): Likewise.
(set_bitfield): Report filename and line numer on error.
(process_i386_opcodes): Set filename and update lineno.
(process_i386_registers): Likewise.
2008-01-08 21:24:16 +00:00
H.J. Lu
e1d4d8936f
gas/
...
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
only.
(md_assemble): Remove Intel mode workaround.
(match_template): Check support for old gcc, AT&T mnemonic
and Intel Syntax.
(md_parse_option): Don't set intel_mnemonic to 0 for
OPTION_MOLD_GCC.
gas/testsuite/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
* gas/i386/intel.d: Updated.
* gas/i386/intel.e: Likewise.
opcodes/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
ATTSyntax.
* i386-opc.h (IntelMnemonic): Renamed to ..
(ATTSyntax): This
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
and intelsyntax.
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
* i386-tbl.h: Regenerated.
2008-01-05 17:07:25 +00:00
H.J. Lu
6f143e4d77
2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c: Update copyright to 2008.
* i386-opc.h: Likewise.
* i386-opc.tbl: Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-04 18:10:08 +00:00
H.J. Lu
3629bb00a8
gas/
...
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
(cpu_flags_not): Likewise.
(cpu_flags_match): Updated to check 64bit and arch.
(set_code_flag): Remove cpu_arch_flags_not.
(set_16bit_gcc_code_flag): Likewise.
(set_cpu_arch): Likewise.
(md_begin): Likewise.
(parse_insn): Call cpu_flags_match to check 64bit and arch.
(match_template): Likewise.
gas/testsuite/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-9.d: New file.
* gas/i386/arch-9.s: Likewise.
* gas/i386/i386.exp: Run arch-9.
opcodes/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
CpuSSE4_2_Or_ABM.
(cpu_flags): Likewise.
* i386-opc.h (CpuSSE4_1_Or_5): Removed.
(CpuSSE4_2_Or_ABM): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
and CpuPadLock, respectively.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-04 01:05:45 +00:00
H.J. Lu
24995bd6e3
gas/
...
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Use the xmmword field
instead of no_xsuf.
opcodes/
2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove No_xSuf.
* i386-opc.h (No_xSuf): Removed.
(CheckSize): Updated.
* i386-tbl.h: Regenerated.
2008-01-03 20:09:38 +00:00
H.J. Lu
e0329a2266
gas/testsuite/
...
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-5.d: New file.
* gas/i386/arch-5.s: Likewise.
* gas/i386/arch-6.d: Likewise.
* gas/i386/arch-6.s: Likewise.
* gas/i386/arch-7.d: Likewise.
* gas/i386/arch-7.s: Likewise.
* gas/i386/arch-8.d: Likewise.
* gas/i386/arch-8.s: Likewise.
* gas/i386/i386.exp: Run arch-5, arch-6, arch-7 and arch-8.
opcodes/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
CPU_SSE5_FLAGS.
(cpu_flags): Add CpuSSE4_2_Or_ABM.
* i386-opc.h (CpuSSE4_2_Or_ABM): New.
(CpuLM): Updated.
(i386_cpu_flags): Add cpusse4_2_or_abm.
* i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
CpuABM|CpuSSE4_2 on popcnt.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-03 05:29:53 +00:00
H.J. Lu
d978b5be20
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
* i386-opc.h: Likewise.
* i386-opc.tbl: Likewise.
2008-01-02 23:54:47 +00:00
H.J. Lu
582d5eddfe
gas/
...
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
Check memory size in Intel mode.
(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
(intel_e09): Likewise.
* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
gas/testsuite/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/intel.s: Use QWORD on movq instead of DWORD.
* gas/i386/inval.s: Add tests for movq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
Byte, Word, Dword, QWord and Xmmword.
* i386-opc.h (No_xSuf): New.
(CheckSize): Likewise.
(Byte): Likewise.
(Word): Likewise.
(Dword): Likewise.
(QWord): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
Dword, QWord and Xmmword.
* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
used.
* i386-tbl.h: Regenerated.
2008-01-02 21:43:34 +00:00
H.J. Lu
70ad4a561e
Add ',' at the end of cpu_flag_init.
2007-12-28 19:42:53 +00:00
H.J. Lu
8d79a8c8d5
gas/testsuite/
...
2007-12-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/arch-1.d: New file.
* gas/i386/arch-1.s: Likewise.
* gas/i386/arch-2.d: Likewise.
* gas/i386/arch-2.s: Likewise.
* gas/i386/arch-3.d: Likewise.
* gas/i386/arch-3.s: Likewise.
* gas/i386/arch-4.d: Likewise.
* gas/i386/arch-4.s: Likewise.
* gas/i386/i386.exp: Run arch-1, arch-2, arch-3 and arch-4.
opcodes/
2007-12-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuSSE4_1_Or_5 to
CPU_SSE4_1_FLAGS, CPU_SSE4_2_FLAGS and CPU_SSE5_FLAGS.
(cpu_flags): Add CpuSSE4_1_Or_5.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
* i386-opc.h (CpuSSE4_1_Or_5): New.
(CpuLM): Updated.
(i386_cpu_flags): Add cpusse4_1_or_5.
* i386-opc.tbl: Use CpuSSE4_1_Or_5 instead of CpuSSE4_1|CpuSSE5
on ptest roundpd, roundps, roundsd and roundss.
2007-12-28 16:04:41 +00:00
H.J. Lu
1efbbeb461
gas/
...
2007-12-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (set_intel_mnemonic): New.
(intel_mnemonic): Likewise.
(old_gcc): Likewise.
(OPTION_MMNEMONIC): Likewise.
(OPTION_MSYNTAX): Likewise.
(OPTION_MINDEX_REG): Likewise.
(OPTION_MNAKED_REG): Likewise.
(OPTION_MOLD_GCC): Likewise.
(md_pseudo_table): Add .intel_mnemonic and .att_mnemonic.
(match_template): Don't allow AT&T/Intel mnemonic if Intel/AT&T
mnemonic is specified. Don't allow old gcc support if old_gcc
is 0.
(md_longopts): Add -mmnemonic, -msyntax, -mindex-reg,
-mmnaked-reg and -mold-gcc.
(md_parse_option): Handle OPTION_MMNEMONIC, OPTION_MSYNTAX,
OPTION_MINDEX_REG, OPTION_MNAKED_REG and OPTION_MOLD_GCC.
* doc/c-i386.texi: Docoument -mmnemonic, -msyntax, --mnaked-reg
and AT&T mnemonic vs. Intel mnemonic.
gas/testsuite/
2007-12-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/compat-intel.d: Pass -mmnemonic=att to assembler.
* gas/i386/compat.d: Likewise.
* gas/i386/i386.exp: Pass -mmnemonic=att to assembler for
"float". Pass -mold-gcc to assembler for "general".
opcodes/
2007-12-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and
IntelMnemonic.
* i386-opc.h (OldGcc): New.
(ATTMnemonic): Likewise.
(IntelMnemonic): Likewise.
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Add oldgcc, attmnemonic and
intelmnemonic.
* i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul,
fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and
IntelMnemonic.
* i386-tbl.h: Regeneratd.
2007-12-24 05:27:39 +00:00
H.J. Lu
7ce189b305
gas/
...
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Replace no_xsuf with
no_ldsuf.
(match_template): Likewise.
opcodes/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Replace No_xSuf with
No_ldSuf.
* i386-opc.tbl: Likewise.
* i386-opc.h (No_xSuf): Renamed to ...
(No_ldSuf): This.
(FWait): Updated.
2007-11-01 19:06:54 +00:00
H.J. Lu
ca61edf2ff
gas/
...
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Check addrprefixop0 to
see if the address size override prefix changes the size of the
first operand.
(check_byte_reg): Don't warn if byteokintel is set.
(check_long_reg): Set i.suffix to QWORD_MNEM_SUFFIX if toqword
is set.
(check_qword_reg): Set i.suffix to LONG_MNEM_SUFFIX if todword
is set.
gas/testsuite/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.d: New.
* gas/i386/i386.s: Likewise.
* gas/i386/i386.exp: Run i386.
* gas/i386/x86_64.s: Add tests for movsx, movsbl, movsbq,
movsbw, movswl, movswq, movzx, movzb, movzbl, movzbq,
movzbw, movzwl and movzwq.
* gas/i386/x86_64.d: Updated.
opcodes/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword,
ToQword and AddrPrefixOp0.
* i386-opc.h (ByteOkIntel): New.
(ToDword): Likewise.
(ToQword): Likewise.
(AddrPrefixOp0): Likewise.
(IsPrefix): Updated.
(i386_opcode_modifier): Add byteokintel, todword, toqword
and addrprefixop0.
* i386-opc.tbl (cvtss2si): Add ToQword.
(cvttss2si): Likewise.
(cvtsd2si): Add ToDword.
(cvttsd2si): Likewise.
(monitor): Add AddrPrefixOp0.
(invlpga): Likewise.
(vmload): Likewise.
(vmrun): Likewise.
(vmsave): Likewise.
(pextrb): Add ByteOkIntel.
(pinsrb): Likewise.
* i386-tbl.h: Regenerated.
2007-11-01 16:27:08 +00:00
H.J. Lu
e2ec9d29b7
gas/
...
2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Check the firstxmm0
field in opcode_modifier for instruction with a implicit
xmm0 as the first operand.
opcodes/
2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add FirstXmm0.
* i386-opc.h (FirstXmm0): New.
(IsPrefix): Updated.
(i386_opcode_modifier): Add firstxmm0.
* i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0.
(blendvps): Likewise.
(pblendvb): Likewise.
* i386-tbl.h: Regenerated.
2007-10-12 21:40:38 +00:00
H.J. Lu
47dd174cba
gas/testsuite/
...
2007-10-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run smx.
* gas/i386/smx.d: New.
* gas/i386/smx.s: Likewise.
opcodes/
2007-10-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Add getsec.
* i386-gen.c (cpu_flags): Add CpuSMX.
* i386-opc.h (CpuSMX): New.
(CpuSSSE3): Updated.
(i386_cpu_flags): Add cpusmx.
* i386-opc.tbl: Add getsec.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2007-10-05 19:04:06 +00:00
H.J. Lu
4dffcebc10
gas/
...
2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (output_insn): Use i.tm.opcode_length to
check opcode length.
opcodes/
2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (process_i386_opcodes): Process opcode_length.
* i386-opc.h (template): Add opcode_length.
* 386-opc.tbl: Likewise.
* i386-tbl.h: Regenerated.
2007-09-26 04:42:47 +00:00
Michael Meissner
85f10a010c
Add AMD SSE5 support
2007-09-14 18:21:09 +00:00
H.J. Lu
8b40d5948e
2007-09-09 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (main): Remove the local variable, unused.
2007-09-09 16:02:17 +00:00
H.J. Lu
40fb982012
gas/
...
2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
* configure.in (AC_CHECK_HEADERS): Add limits.h.
* configure: Regenerated.
* config.in: Likewise.
* config/tc-i386.c: Include "opcodes/i386-init.h".
(_i386_insn): Use i386_operand_type for types.
(cpu_arch_flags): Updated to new types with bitfield.
(cpu_arch_tune_flags): Likewise.
(cpu_arch_isa_flags): Likewise.
(cpu_arch): Likewise.
(i386_align_code): Likewise.
(set_code_flag): Likewise.
(set_16bit_gcc_code_flag): Likewise.
(set_cpu_arch): Likewise.
(md_assemble): Likewise.
(parse_insn): Likewise.
(process_operands): Likewise.
(output_branch): Likewise.
(output_jump): Likewise.
(parse_real_register): Likewise.
(mode_from_disp_size): Likewise.
(smallest_imm_type): Likewise.
(pi): Likewise.
(type_names): Likewise.
(pt): Likewise.
(pte): Likewise.
(swap_2_operands): Likewise.
(optimize_imm): Likewise.
(optimize_disp): Likewise.
(match_template): Likewise.
(check_string): Likewise.
(process_suffix): Likewise.
(check_byte_reg): Likewise.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
(finalize_imm): Likewise.
(build_modrm_byte): Likewise.
(output_insn): Likewise.
(disp_size): Likewise.
(imm_size): Likewise.
(output_disp): Likewise.
(output_imm): Likewise.
(gotrel): Likewise.
(i386_immediate): Likewise.
(i386_displacement): Likewise.
(i386_index_check): Likewise.
(i386_operand): Likewise.
(parse_real_register): Likewise.
(i386_intel_operand): Likewise.
(intel_e09): Likewise.
(intel_bracket_expr): Likewise.
(intel_e11): Likewise.
(cpu_arch_flags_not): New.
(cpu_flags_check_x64): Likewise.
(cpu_flags_all_zero): Likewise.
(cpu_flags_not): Likewise.
(i386_cpu_flags_biop): Likewise.
(cpu_flags_biop): Likewise.
(cpu_flags_match); Likewise.
(acc32): New.
(acc64): Likewise.
(control): Likewise.
(reg16_inoutportreg): Likewise.
(disp16): Likewise.
(disp32): Likewise.
(disp32s): Likewise.
(disp16_32): Likewise.
(anydisp): Likewise.
(baseindex): Likewise.
(regxmm): Likewise.
(imm8): Likewise.
(imm8s): Likewise.
(imm16): Likewise.
(imm32): Likewise.
(imm32s): Likewise.
(imm64): Likewise.
(imm16_32): Likewise.
(imm16_32s): Likewise.
(imm16_32_32s): Likewise.
(operand_type): Likewise.
(operand_type_check): Likewise.
(operand_type_match): Likewise.
(operand_type_register_match): Likewise.
(update_imm): Likewise.
(set_code_flag): Also update cpu_arch_flags_not.
(set_16bit_gcc_code_flag): Likewise.
(md_begin): Likewise.
(parse_insn): Use cpu_flags_check_x64 to check 64bit support.
Use cpu_flags_match to match instructions.
(i386_target_format): Update cpu_arch_isa_flags and
cpu_arch_tune_flags to i386_cpu_flags type with bitfield.
(smallest_imm_type): Check cpu_arch_tune to tune for i486.
(match_template): Don't initialize overlap0, overlap1,
overlap2, overlap3 and operand_types.
(process_suffix): Handle crc32 with 64bit register.
(MATCH): Removed.
(CONSISTENT_REGISTER_MATCH): Likewise.
* config/tc-i386.h (arch_entry): Updated to i386_cpu_flags
type.
opcodes/
2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
* configure.in (AC_CHECK_HEADERS): Add limits.h.
* configure: Regenerated.
* config.in: Likewise.
* i386-gen.c: Include "sysdep.h" instead of <stdlib.h> and
<string.h>. Use xstrerror instead of strerror.
(initializer): New.
(cpu_flag_init): Likewise.
(bitfield): Likewise.
(BITFIELD): New.
(cpu_flags): Likewise.
(opcode_modifiers): Likewise.
(operand_types): Likewise.
(compare): Likewise.
(set_cpu_flags): Likewise.
(output_cpu_flags): Likewise.
(process_i386_cpu_flags): Likewise.
(output_opcode_modifier): Likewise.
(process_i386_opcode_modifier): Likewise.
(output_operand_type): Likewise.
(process_i386_operand_type): Likewise.
(set_bitfield): Likewise.
(operand_type_init): Likewise.
(process_i386_initializers): Likewise.
(process_i386_opcodes): Call process_i386_opcode_modifier to
process opcode_modifier. Call process_i386_operand_type to
process operand_types.
(process_i386_registers): Call process_i386_operand_type to
process reg_type.
(main): Check unused bits in i386_cpu_flags and i386_operand_type.
Sort cpu_flags, opcode_modifiers and operand_types. Call
process_i386_initializers.
* i386-init.h: New.
* i386-tbl.h: Regenerated.
* i386-opc.h: Include <limits.h>.
(CHAR_BIT): Define as 8 if not defined.
(Cpu186): Changed to position of bitfiled.
(Cpu286): Likewise.
(Cpu386): Likewise.
(Cpu486): Likewise.
(Cpu586): Likewise.
(Cpu686): Likewise.
(CpuP4): Likewise.
(CpuK6): Likewise.
(CpuK8): Likewise.
(CpuMMX): Likewise.
(CpuMMX2): Likewise.
(CpuSSE): Likewise.
(CpuSSE2): Likewise.
(Cpu3dnow): Likewise.
(Cpu3dnowA): Likewise.
(CpuSSE3): Likewise.
(CpuPadLock): Likewise.
(CpuSVME): Likewise.
(CpuVMX): Likewise.
(CpuSSSE3): Likewise.
(CpuSSE4a): Likewise.
(CpuABM): Likewise.
(CpuSSE4_1): Likewise.
(CpuSSE4_2): Likewise.
(Cpu64): Likewise.
(CpuNo64): Likewise.
(D): Likewise.
(W): Likewise.
(Modrm): Likewise.
(ShortForm): Likewise.
(Jump): Likewise.
(JumpDword): Likewise.
(JumpByte): Likewise.
(JumpInterSegment): Likewise.
(FloatMF): Likewise.
(FloatR): Likewise.
(FloatD): Likewise.
(Size16): Likewise.
(Size32): Likewise.
(Size64): Likewise.
(IgnoreSize): Likewise.
(DefaultSize): Likewise.
(No_bSuf): Likewise.
(No_wSuf): Likewise.
(No_lSuf): Likewise.
(No_sSuf): Likewise.
(No_qSuf): Likewise.
(No_xSuf): Likewise.
(FWait): Likewise.
(IsString): Likewise.
(RegKludge): Likewise.
(IsPrefix): Likewise.
(ImmExt): Likewise.
(NoRex64): Likewise.
(Rex64): Likewise.
(Ugh): Likewise.
(Reg8): Likewise.
(Reg16): Likewise.
(Reg32): Likewise.
(Reg64): Likewise.
(FloatReg): Likewise.
(RegMMX): Likewise.
(RegXMM): Likewise.
(Imm8): Likewise.
(Imm8S): Likewise.
(Imm16): Likewise.
(Imm32): Likewise.
(Imm32S): Likewise.
(Imm64): Likewise.
(Imm1): Likewise.
(BaseIndex): Likewise.
(Disp8): Likewise.
(Disp16): Likewise.
(Disp32): Likewise.
(Disp32S): Likewise.
(Disp64): Likewise.
(InOutPortReg): Likewise.
(ShiftCount): Likewise.
(Control): Likewise.
(Debug): Likewise.
(Test): Likewise.
(SReg2): Likewise.
(SReg3): Likewise.
(Acc): Likewise.
(FloatAcc): Likewise.
(JumpAbsolute): Likewise.
(EsSeg): Likewise.
(RegMem): Likewise.
(OTMax): Likewise.
(Reg): Commented out.
(WordReg): Likewise.
(ImplicitRegister): Likewise.
(Imm): Likewise.
(EncImm): Likewise.
(Disp): Likewise.
(AnyMem): Likewise.
(LLongMem): Likewise.
(LongMem): Likewise.
(ShortMem): Likewise.
(WordMem): Likewise.
(ByteMem): Likewise.
(CpuMax): New
(CpuLM): Likewise.
(CpuNumOfUints): Likewise.
(CpuNumOfBits): Likewise.
(CpuUnused): Likewise.
(OTNumOfUints): Likewise.
(OTNumOfBits): Likewise.
(OTUnused): Likewise.
(i386_cpu_flags): New type.
(i386_operand_type): Likewise.
(i386_opcode_modifier): Likewise.
(CpuSledgehammer): Removed.
(CpuSSE4): Likewise.
(CpuUnknownFlags): Likewise.
(Reg): Likewise.
(WordReg): Likewise.
(ImplicitRegister): Likewise.
(Imm): Likewise.
(EncImm): Likewise.
(Disp): Likewise.
(AnyMem): Likewise.
(LLongMem): Likewise.
(LongMem): Likewise.
(ShortMem): Likewise.
(WordMem): Likewise.
(ByteMem): Likewise.
(template): Use i386_cpu_flags for cpu_flags, use
i386_opcode_modifier for opcode_modifier, use
i386_operand_type for operand_types.
(reg_entry): Use i386_operand_type for reg_type.
* Makefile.am (HFILES): Add i386-init.h.
($(srcdir)/i386-init.h): New rule.
($(srcdir)/i386-tbl.h): Depend on $(srcdir)/i386-init.h
instead.
* Makefile.in: Regenerated.
2007-09-09 01:22:57 +00:00
H.J. Lu
93b1ec2cbf
2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (next_field): Updated to take a separator.
(process_i386_opcodes): Updated.
(process_i386_registers): Likewise.
2007-09-06 22:55:04 +00:00
H.J. Lu
72ffa0fba1
2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (table): Moved ...
(main): Here. Call process_copyright to output copyright.
(process_copyright): New.
(process_i386_opcodes): Take FILE *table.
(process_i386_registers): Likewise.
2007-09-06 22:08:08 +00:00
H.J. Lu
34edb9ad07
2007-09-06 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (table): New.
(process_i386_opcodes): Report errno when faied to open
i386-opc.tbl. Output opcodes to table. Close i386-opc.tbl
before return.
(process_i386_registers): Report errno when faied to open
i386-reg.tbl. Output opcodes to table. Close i386-reg.tbl
before return.
(main): Open i386-tbl.h for output.
* Makefile.am ($(srcdir)/i386-tbl.h): Remove " > $@".
* Makefile.in: Regenerated.
2007-09-06 21:31:55 +00:00
H.J. Lu
6baf377280
2007-07-24 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-gen.c (main): Print a newline after copyright notice.
2007-07-24 20:17:18 +00:00
Nick Clifton
9b201bb5e5
Change source files over to GPLv3.
2007-07-05 09:49:03 +00:00
H.J. Lu
40b8e679e8
2007-06-28 H.J. Lu <hongjiu.lu@intel.com>
...
* Makefile.am (HFILES): Add i386-opc.h and i386-tbl.h.
(CFILES): Add i386-gen.c.
(i386-gen): New rule.
(i386-gen.o): Likewise.
(i386-tbl.h): Likewise.
Run "make dep-am".
* Makefile.in: Regenerated.
* i386-gen.c: New file.
* i386-opc.tbl: Likewise.
* i386-reg.tbl: Likewise.
* i386-tbl.h: Likewise.
* i386-opc.c: Include "i386-tbl.h".
(i386_optab): Removed.
(i386_regtab): Likewise.
(i386_regtab_size): Likewise.
2007-06-28 14:29:56 +00:00