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Author SHA1 Message Date
Thiemo Seufer
3aa3176b2d * aoutx.h (NAME): Add case statements for bfd_mach_mips14000, 
bfd_mach_mips16000.
	* archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000,
	bfd_mach_mips16000.
	* bfd-in2.h: Regenerate.
	* cpu-mips.c: Add enums I_mips14000, I_mips16000.
	(arch_info_struct): Add refs to R14000, R16000.
	* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000,
	bfd_mach_mips16000.
	(mips_mach_extensions): Map R14000, R16000 to R10000.

	* config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
	(mips_cpu_info_table): Add r14000, r16000.
	* doc/c-mips.texi: Add entries for 14000, 16000.

	* mips-dis.c (mips_arch_choices): Add r14000, r16000.

	* mips.h: Define CPU_R14000, CPU_R16000.
        (OPCODE_IS_MEMBER): Include R14000, R16000 in test.
 2008-11-28 18:02:17 +00:00
M R Swami Reddy
95beeee886 *c-cr16.texi (cr16-operand specifiers): Add got/GOT and cgot/cGOT. 2008-11-27 12:01:26 +00:00
Nick Clifton
793c580792 Change documentation license to FDL v1.3 2008-11-19 16:22:48 +00:00
Bob Wilson
ccf8a69b9c * doc/as.texinfo (Pseudo Ops): Swap order of Comm and CFI menu entries. 
(Altmacro, Comm, Loc, Loc_mark_labels, List, MRI, PopSection, Sleb128):
	Moved into alphabetical order.
 2008-10-09 18:12:29 +00:00
Bob Wilson
884f0d36b4 * doc/as.texinfo (Dot): Expand no-space-dir conditional to include 
a complete sentence.
	(Pseudo Ops): Put conditionals around Skip and Space menu entries.
	(Line): Remove conditional declaration of Ln node and section here.
	Put aout-bout description inside the no-line-dir conditional.
	(Skip, Space): Use a separate conditional for each node.
 2008-10-09 18:10:44 +00:00
Bob Wilson
14082c7624 * doc/as.texinfo (Pseudo Ops): Remove no-file-dir conditional around 
menu entry for File; remove version-specific .file operands from menu
	description.  Replace "LNS directives" menu entry with new entries
	for "Loc" and "Loc_mark_labels".
	(LNS directives): Split into separate nodes for each directive.
	(Loc): New node for .loc directive.  Mention that this directive
	is for DWARF2 and add a missing article.
	(Loc_mark_labels): Likewise for .loc_mark_labels.
	(File): Change this node to describe both the default version and
	the DWARF2 version of .file.  Move the no-file-dir conditional to
	include only the default version.
 2008-10-09 18:08:10 +00:00
Nick Clifton
77cca80fe3 PR 6944 
* doc/as.texinfo (Dollar Local Labels): Correct description of
        dollar local labels to show that the colon suffix is still
        needed.
 2008-10-09 15:12:56 +00:00
H.J. Lu
97c4f2d9c9 2008-10-07 H.J. Lu <hongjiu.lu@intel.com> 
* read.c (pseudo_set): Don't allow global register symbol only
	if TC_GLOBAL_REGISTER_SYMBOL_OK is undefined.
	* symbols.c (S_SET_EXTERNAL): Likewise.

	* config/tc-mmix.h (TC_GLOBAL_REGISTER_SYMBOL_OK): Defined.

	* doc/internals.texi: Document TC_GLOBAL_REGISTER_SYMBOL_OK.
 2008-10-07 14:21:59 +00:00
Bob Wilson
4d4175aff7 * doc/as.texinfo (Local): New description of ELF .local directive. 2008-10-06 17:31:39 +00:00
Steve Ellcey
718a6fd816 * configure: Regenerate for new libtool. 
* aclocal.m4: Ditto.
	* Makefile.in: Ditto.
	* doc/Makefile.in: Ditto.
 2008-09-29 15:34:33 +00:00
Richard Henderson
f1c4cc7516 include/ 
* elf/dwarf2.h (DW_OP_GNU_encoded_addr): New.
binutils/
	* dwarf.c (size_of_encoded_value, get_encoded_value): Move up.
	(decode_location_expression): Add section parameter.  Handle
	DW_OP_GNU_encoded_addr.
	(read_and_display_attr_value): Update decode_location_expression call.
	(display_debug_loc, display_debug_frames): Likewise.
gas/
        * dw2gencfi.c (DWARF2_ADDR_SIZE): Provide default.
        (struct cfi_insn_data): Add ea member.
        (CFI_val_encoded_addr, dot_cfi_val_encoded_addr): New.
        (output_cfi_insn): Handle CFI_val_encoded_addr.
        (select_cie_for_fde): Don't match CFI_val_encoded_addr.
        * doc/as.texinfo (.cfi_val_encoded_addr): Document.
 2008-09-24 23:21:04 +00:00
Alan Modra
5db484ff3d * write.c (TC_FORCE_RELOCATION_SUB_LOCAL): Heed md_register_arithmetic. 
(TC_VALIDATE_FIX_SUB): Likewise.
	* config/tc-frv.h (TC_FORCE_RELOCATION_SUB_LOCAL): Likewise.
	* config/tc-hppa.h (TC_FORCE_RELOCATION_SUB_LOCAL): Likewise.
	* config/tc-mn10300.h (TC_VALIDATE_FIX_SUB): Likewise.
	* config/tc-sh.h (TC_VALIDATE_FIX_SUB): Likewise.
	(TC_FORCE_RELOCATION_SUB_LOCAL): Likewise.
	* config/tc-sh64.h (TC_VALIDATE_FIX_SUB): Likewise.
	* config/tc-xtensa.h (TC_VALIDATE_FIX_SUB): Likewise.
	* doc/internals.texi (TC_FORCE_RELOCATION_SUB_ABS,
	TC_FORCE_RELOCATION_SUB_LOCAL, TC_VALIDATE_FIX_SUB): Show new param.
 2008-09-19 10:00:40 +00:00
Nick Clifton
704209c00f Make new functions static. 
Rearrange wording of documentation.
 2008-09-03 15:44:33 +00:00
Nick Clifton
a6c24e68b9 * config/tc-i386.c (pe_lcomm_internal): New function. Allows the 
alignment field of the .lcomm directive to be optional.
  (pe_lcomm): New function.  Pass pe_lcomm_internal to
  s_comm_internal.
  (md_pseudo_table): Implement .lcomm directive for COFF based
  targets.
  * doc/c-i386.texi (i386-Directives): New node.  Used to document
  the .lcomm directive.
 2008-09-03 14:02:30 +00:00
Nick Clifton
c879dfc576 * config/tc-avr.c (mcu_types): Add atmega16u4. 
* doc/c-avr.texi: Likewise.
 2008-08-29 16:58:02 +00:00
Mark Mitchell
7da4f750f8 * c-arm.texi: Add tutorial on ARM unwinding pseudo ops. 2008-08-26 16:02:59 +00:00
Alan Modra
7357c5b6a6 PR 6526 
* configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
 2008-08-15 08:31:52 +00:00
Ben Elliston
9e9a97982d * doc/as.texinfo (Align): Document the PowerPC behaviour. 2008-08-13 02:50:41 +00:00
Alan Modra
5a49b8acf4 Banish PARAMS and PTR. Convert to ISO C. 
Delete unnecessary forward declarations.
 2008-08-12 23:39:31 +00:00
Alan Modra
818236e51d PR 6575 
* hash.c: Expand PTR to void *.
	(hash_delete): Add "freeme" parameter.  Call obstack_free.
	* hash.h: Expand PTR to void *.
	(hash_delete): Update prototype.
	* macro.c (macro_expand_body): hash_delete LOCALs from formal_hash.
	* config/tc-tic54x.c (tic54x_remove_local_label): Update hash_delete
	call.
	(subsym_substitute): Likewise.
	* doc/internals.texi (hash_delete): Update.
 2008-08-11 07:40:22 +00:00
Eric B. Weddington
7b21ac3f45 Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC. 
bfd/
	* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
	bfd_mach_avr51): New.
	* bfd-in2.h: Regenerate.
	* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
	architectures. Change comments to match architecture comments in GCC.
	(compatible): Add test for new AVR architectures.
	* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
	bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
	(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.

gas/
	* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
	architectures. Reorganize list to put mcu types in correct architectures
	and to order list same as in GCC. Use new ISA definitions in
	include/opcode/avr.h.
	* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
	descriptions. Reorganize descriptions to put mcu types in correct
	architectures and to order lists same as in GCC.

include/
	* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
	(EF_AVR_MACH): Redefine to 0x7F.
	* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
	(AVR_ISA_AVR3): Redefine.
	(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
	AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
	AVR_ISA_AVR6): Define.

ld/
	* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
	and eavr51.o.
	Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
	* Makefile.in: Regenerate.
	* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
	and avr51.
	* emulparams/avr25.sh: New file.
	* emulparams/avr31.sh: New file.
	* emulparams/avr35.sh: New file.
	* emulparams/avr51.sh: New file.
 2008-08-09 05:35:13 +00:00
Alan Modra
c3c3645668 * doc/internals.texi (DWARF2_FORMAT): Update for 2008-08-04 change. 2008-08-08 07:38:49 +00:00
DJ Delorie
6fd4f6ccfe * NEWS: Mention these changes. 
* config/tc-h8300.h (H_TICK_HEX): Define.
* config/tc-h8300.c (OPTION_H_TICK_HEX): New.
(md_longopts): Add "-h-tick-hex".
(md_parse_option): Support it.
* doc/c-h8300.texi (H8/300 Options): Document it.
* doc/as.texinfo (Overview): Likewise.

* config/tc-sh.h (H_TICK_HEX): Define.
* config/tc-sh.c (OPTION_H_TICK_HEX): New.
(md_longopts): Add "-h-tick-hex".
(md_parse_option): Support it.
* doc/c-sh.texi (SH Options): Document it.
* doc/c-sh64.texi (SH64 Options): Document it.
* doc/as.texinfo (Overview): Likewise.
 2008-08-06 15:42:15 +00:00
Peter Bergner
9b4e57660d gas/ 
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
	Handle -mvsx and -mpower7.
	(md_show_usage): Document -mpower7 and -mvsx.
	* doc/as.texinfo (Target PowerPC): Document -mvsx.
	* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.

gas/testsuite/
	* gas/ppc/power7.d: New.
	* gas/ppc/power7.s: Likewise.
	* gas/ppc/ppc.exp: Run power7 test.

include/opcode/
	* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.

opcodes/
	* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
	(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
	(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
	* ppc-opc.c (insert_xt6): New static function.
	(extract_xt6): Likewise.
	(insert_xa6): Likewise.
	(extract_xa6: Likewise.
	(insert_xb6): Likewise.
	(extract_xb6): Likewise.
	(insert_xb6s): Likewise.
	(extract_xb6s): Likewise.
	(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
	XX3DM_MASK, PPCVSX): New.
	(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
	"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 2008-08-02 04:38:51 +00:00
Alan Modra
3c7b98977c Support PowerPC single-precision float. 2008-07-26 13:10:48 +00:00
DJ Delorie
c54b5932c5 * config/tc-m32c.h (H_TICK_HEX): Define. 
* config/tc-m32c.c (OPTION_H_TICK_HEX): Define.
(md_longopts): Add support for it.
(md_parse_option): Likewise.
* doc/as.texinfo (Overview): Add new m32c options.
* doc/c-m32c.texi (M32C-Modifiers): Likewise

* as.h: (enable_h_tick_hex): New.
* app.c (enable_h_tick_hex): New.
(LEX_IS_H): New.
(do_scrub_begin): Mark 'H' and 'h' as special if enable_h_tick_hex.
(do_scrub_chars): If enable_h_tick_hex and 'h', check for H'00
style hex constants and convert the input stream to 0x00 style.
(do_scrub_chars): If a 'X style character constant is found after
a symbol character (like you're or X'00), warn the user.
 2008-07-18 22:25:07 +00:00
Eric B. Weddington
3bb06f783c /gas: 
2008-06-24  Eric B. Weddington  <eric.weddington@atmel.com>

	Add support for ATtiny13A.
	* config/tc-avr.c (mcu_types): Add attiny13a.
	* doc/c-avr.texi: Likewise.
 2008-06-25 16:19:11 +00:00
Eric B. Weddington
e8568f6c63 /gas: 
2008-06-09  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (mcu_types): Remove support for ATmega32HVB device.
	* doc/c-avr.texi: Likewise.
 2008-06-09 16:07:02 +00:00
Nick Clifton
7fac05361c * config/tc-arm.c (arm_cpus): Add Faraday ARMv4 and ARMv5TE 
compatible cores: fa526, fa626, fa626te, fa726te.
        * doc/c-arm.texi (ARM Opts): Add -mcpu={fa526, fa626, fa626te,
        fa726te} options.
 2008-05-21 08:20:17 +00:00
Alan Modra
8944f3c277 update dependencies 2008-05-14 06:45:42 +00:00
H.J. Lu
f1f8f695c0 gas/ 
2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention XSAVE, EPT and MOVBE.

	* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
	(md_show_usage): Add .movbe and .ept.

	* doc/c-i386.texi: Add movbe and ept to -march=.  Document
	.movbe and .ept.

gas/testsuite/

2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
	ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
	x86-64-inval-movbe.  x86-64-ept, x86-64-ept-intel and
	x86-64-inval-ept.

	* gas/i386/arch-10.s: Add movbe and invept.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/ept.d: New file
	* gas/i386/ept-intel.d: Likewise.
	* gas/i386/ept.s: Likewise.
	* gas/i386/inval-ept.l: Likewise.
	* gas/i386/inval-ept.s: Likewise.
	* gas/i386/inval-movbe.l: Likewise.
	* gas/i386/inval-movbe.s: Likewise.
	* gas/i386/movbe.d: Likewise.
	* gas/i386/movbe-intel.d: Likewise.
	* gas/i386/movbe.s: Likewise.
	* gas/i386/x86-64-inval-ept.l: Likewise.
	* gas/i386/x86-64-inval-ept.s: Likewise.
	* gas/i386/x86-64-inval-movbe.l: Likewise.
	* gas/i386/x86-64-inval-movbe.s: Likewise.
	* gas/i386/x86-64-ept.d: Likewise.
	* gas/i386/x86-64-ept-intel.d: Likewise.
	* gas/i386/x86-64-ept.s: Likewise.
	* gas/i386/x86-64-movbe.d: Likewise.
	* gas/i386/x86-64-movbe-intel.d: Likewise.
	* gas/i386/x86-64-movbe.s: Likewise.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.

opcodes/

2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (MOVBE_Fixup): New.
	(Mo): Likewise.
	(PREFIX_0F3880): Likewise.
	(PREFIX_0F3881): Likewise.
	(PREFIX_0F38F0): Updated.
	(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
	PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
	(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.

	* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
	CPU_EPT_FLAGS.
	(cpu_flags): Add CpuMovbe and CpuEPT.

	* i386-opc.h (CpuMovbe): New.
	(CpuEPT): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Add cpumovbe and cpuept.

	* i386-opc.tbl: Add entries for movbe and EPT instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-05-02 16:53:40 +00:00
Adam Nemet
037b32b9ff * config/tc-mips.c (file_mips_soft_float, file_mips_single_float): 
New statics.
	(OPTION_ELF_BASE): Make room for new option macros.
	(OPTION_SOFT_FLOAT, OPTION_HARD_FLOAT, OPTION_SINGLE_FLOAT,
	OPTION_DOUBLE_FLOAT): New option macros.
	(md_longopts): Add msoft-float, mhard-float, msingle-float and
	mdouble-float.
	(md_parse_option): Handle OPTION_SINGLE_FLOAT,
	OPTION_DOUBLE_FLOAT, OPTION_SOFT_FLOAT and OPTION_HARD_FLOAT.
	(md_show_usage): Add -msoft-float, -mhard-float, -msingle-float
	and -mdouble-float.
	(struct mips_set_options): New fields soft_float and single_float.
	(mips_opts): Initialized them.  Add comment for each field
	initializer.
	(mips_after_parse_args): Set them based on file_mips_soft_float
	and file_mips_single_float.
	(s_mipsset): Add support for `.set softfloat', `.set hardfloat',
	`.set singlefloat' and `.set doublefloat'.
	(is_opcode_valid): New function to invoke OPCODE_IS_MEMBER.
	Handle single-float and soft-float instructions here.
	(macro_build, mips_ip): Use it instead of OPCODE_IS_MEMBER.
	(is_opcode_valid_16): New function.
	(mips16_ip): Use it instead of OPCODE_IS_MEMBER.
	(macro) <M_LDC1_AB, M_SDC1_AB, M_L_DOB, M_L_DAB, M_S_DAB,
	M_S_DOB>: Remove special-casing of r4650.
	* doc/c-mips.texi (-march=): Add Octeon.
	(MIPS Opts): Document -msoft-float and -mhard-float.  Document
	-msingle-float and -mdouble-float.
	(MIPS floating-point): New section.  Document `.set softfloat' and
	`.set hardfloat'.  Document `.set singlefloat' and `.set
	doublefloat'.
 2008-04-28 17:06:28 +00:00
David S. Miller
f04d18b76a gas/ 
* config/tc-sparc.c: Accept 'softint_clear' and 'softint_set'
	%asr aliases.

	* doc/c-sparc.texi: Consistently refer to architecture 'versions',
	rather than occaisionally 'levels'.  Consistently refer to Sun's
	UNIX variant as SunOS, every version of Solaris is also SunOS.
	Document new 'softint_clear' and 'softint_set' aliases.  Clarify
	which architecture versions support '%dcr', '%cq', and '%gl'. Add
	section on 32-bit/64-bit opcode translations.

opcodes/

	* sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
	instead of %sys_tick_cmpr, as suggested in architecture manuals.
 2008-04-25 19:58:03 +00:00
David S. Miller
1a6b486f73 opcodes/ 
* sparc-opc.c (asi_table): Add UltraSPARC and Niagara
	extended values.
	(prefetch_table): Add missing values.

gas/

	* config/tc-sparc.c (v9a_asr_table): Add missing
	'stick' and 'stick_cmpr', and document ordering rules
	of table.
	(tc_gen_reloc): Accept BFD_RELOC_SPARC_PC22 and
	BFD_RELOC_SPARC_PC10.
	* doc/c-sparc.texi: New section on Sparc constants.
	Add documentation for %stick and %stick_cmpr.

gas/testsuite/

	* gas/sparc/pc2210.d: New file.
	* gas/sparc/pc2210.d: Likewise.
	* gas/sparc/sparc.exp: Run new %pc22/%pc10 relocation test.
 2008-04-23 07:49:33 +00:00
David S. Miller
c15295d545 * doc/c-sparc.texi: Add syntax section. 2008-04-18 21:19:48 +00:00
Nick Clifton
a5f245b565 * doc/tc-arm.texi: Fix fnstart and fnend directive names. 2008-04-15 14:25:30 +00:00
H.J. Lu
daf50ae75d gas/ 
2008-04-10  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention -msse-check=[none|error|warning].

	* config/tc-i386.c (sse_check): New.
	(OPTION_MSSE_CHECK): Likewise.
	(md_assemble): Check SSE instructions if needed.
	(md_longopts): Add -msse-check.
	(md_parse_option): Handle OPTION_MSSE_CHECK.
	(md_show_usage): Show -msse-check=[none|error|warning].

	* doc/c-i386.texi: Document -msse-check=[none|error|warning].

gas/testsuite/

2008-04-10  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run sse-check, sse-check-warn,
	sse-check-error, x86-64-sse-check, x86-64-sse-check-warn and
	x86-64-sse-check-error.

	* gas/i386/sse-check.d: New.
	* gas/i386/sse-check.s: Likewise.
	* gas/i386/sse-check-error.l: Likewise.
	* gas/i386/sse-check-error.s: Likewise.
	* gas/i386/sse-check-warn.d: Likewise.
	* gas/i386/sse-check-warn.e: Likewise.
	* gas/i386/x86-64-sse-check.d: Likewise.
	* gas/i386/x86-64-sse-check-error.l: Likewise.
	* gas/i386/x86-64-sse-check-error.s: Likewise.
	* gas/i386/x86-64-sse-check-warn.d: Likewise.
 2008-04-10 17:53:40 +00:00
Nick Clifton
83f10cb26a * listing.c: Add -ag listing flag to show general information in 
listings such as gas version, passed options, and time stamp.
        (listing_general_info): New function.
        (print_options): New function.
        (print_single_option): New function.
        (print_timestamp): New function.
        (MAX_DATELEN): Define.
        (listing_print): Add call to listing_general_info.
        * listing.h (LISTING_GENERAL): Define.
        (listing_print): Add new parameter.
        * as.c (show_usage): Print new switch.
        (parse_args): Parse new switch.
        (main): Pass command line on to listing_print.
        * NEWS: Mention this new feature.
        * doc/as.texinfo: Document the new sub-option.

        * gas/all/gas.exp: Check the performance of the -ag command line
        switch.
 2008-04-10 12:45:18 +00:00
H.J. Lu
594ab6a333 gas/ 
2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention XSAVE.  Change CLMUL to PCLMUL.

	* config/tc-i386.c (cpu_arch): Add .pclmul.
	(md_show_usage): Replace clmul with pclmul.
	* doc/c-i386.texi: Likewise.

gas/testsuite/

2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/arch-10.s: Likewise.
	* gas/i386/clmul-intel.d: Likewise.
	* gas/i386/clmul.d: Likewise.
	* gas/i386/clmul.s: Likewise.
	* gas/i386/x86-64-arch-2.s: Likewise.
	* gas/i386/x86-64-clmul-intel.d: Likewise.
	* gas/i386/x86-64-clmul.d: Likewise.
	* gas/i386/x86-64-clmul.s: Likewise.

	* gas/i386/arch-10.d: Replace clmul with pclmul.
	* gas/i386/x86-64-arch-2.d: Likewise.

opcodes/

2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
	with CPU_PCLMUL_FLAGS/CpuPCLMUL.
	(cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
	* i386-opc.tbl: Likewise.

	* i386-opc.h (CpuCLMUL): Renamed to ...
	(CpuPCLMUL): This.
	(CpuFMA): Updated.
	(i386_cpu_flags): Replace cpuclmul with cpupclmul.

	* i386-init.h: Regenerated.
 2008-04-04 16:34:23 +00:00
H.J. Lu
c0f3af977b binutils/ 
2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (dwarf_regnames_i386): Add AVX registers.
	(dwarf_regnames_x86_64): Likewise.

gas/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.

	* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
	Document -msse2avx, .avx, .aes, .clmul and .fma.

	* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
	(vex_prefix): Likewise.
	(sse2avx): Likewise.
	(CPU_FLAGS_ARCH_MATCH): Likewise.
	(CPU_FLAGS_64BIT_MATCH): Likewise.
	(CPU_FLAGS_32BIT_MATCH): Likewise.
	(CPU_FLAGS_PERFECT_MATCH): Likewise.
	(regymm): Likewise.
	(vex_imm4): Likewise.
	(fits_in_imm4): Likewise.
	(build_vex_prefix): Likewise.
	(VEX_check_operands): Likewise.
	(bad_implicit_operand): Likewise.
	(OPTION_MSSE2AVX): Likewise.
	(T_YMMWORD): Likewise.
	(_i386_insn): Add vex.
	(cpu_arch): Add .avx, .aes, .clmul and .fma.
	(cpu_flags_match): Changed to take a pointer to const template.
	Enable encoding SSE instructions with VEX prefix for -msse2avx.
	(match_mem_size): Also check ymmword.
	(operand_type_match): Clear ymmword.
	(md_begin): Allow '_' in mnemonic.
	(type_names): Add OPERAND_TYPE_VEX_IMM4.
	(process_immext): Update assert.
	(md_assemble): Don't call process_immext if sse2avx and immext
	are true.  Call build_vex_prefix if vex is true.
	(parse_insn): Updated for cpu_flags_match.
	(swap_operands): Handle 5 operands.
	(match_template): Handle 5 operands. Updated for cpu_flags_match.
	Check regymm.  Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
	(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
	(check_byte_reg): Check regymm.
	(process_operands): Duplicate the destination register for
	-msse2avx if needed.
	(build_modrm_byte): Updated for instructions with VEX encoding.
	(output_insn): Output VEX prefix if needed.
	(md_longopts): Add msse2avx.
	(md_parse_option): Handle OPTION_MSSE2AVX.
	(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
	(intel_e09): Support YMMWORD.
	(intel_e11): Likewise.
	(intel_get_token): Likewise.

gas/testsuite/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
	x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
	x86-64-avx-intel and x86-64-inval-avx.

	* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
	* gas/cfi/cfi-x86_64.s: Likewise.

	* gas/i386/aes.d: New.
	* gas/i386/aes.s: Likewise.
	* gas/i386/aes-intel.d: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx.s: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/clmul.d: Likewise.
	* gas/i386/clmul-intel.d: Likewise.
	* gas/i386/clmul.s: Likewise.
	* gas/i386/i386.exp: Likewise.
	* gas/i386/inval-avx.l: Likewise.
	* gas/i386/inval-avx.s: Likewise.
	* gas/i386/sse2avx.d: Likewise.
	* gas/i386/sse2avx.s: Likewise.
	* gas/i386/x86-64-aes.d: Likewise.
	* gas/i386/x86-64-aes.s: Likewise.
	* gas/i386/x86-64-aes-intel.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-clmul.d: Likewise.
	* gas/i386/x86-64-clmul-intel.d: Likewise.
	* gas/i386/x86-64-clmul.s: Likewise.
	* gas/i386/x86-64-inval-avx.l: Likewise.
	* gas/i386/x86-64-inval-avx.s: Likewise.
	* gas/i386/x86-64-sse2avx.d: Likewise.
	* gas/i386/x86-64-sse2avx.s: Likewise.

	* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/rexw.s: Add AVX tests.

	* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.

	* gas/cfi/cfi-i386.d: Updated.
	* gas/cfi/cfi-x86_64.d: Likewise.
	* gas/i386/arch-10.d:  Likewise.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/rexw.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval-intel.d: Likewise.

include/opcode/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (MAX_OPERANDS): Set to 5.
	(MAX_MNEM_SIZE): Changed to 20.

opcodes/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_register): New.
	(OP_E_memory): Likewise.
	(OP_VEX): Likewise.
	(OP_EX_Vex): Likewise.
	(OP_EX_VexW): Likewise.
	(OP_XMM_Vex): Likewise.
	(OP_XMM_VexW): Likewise.
	(OP_REG_VexI4): Likewise.
	(PCLMUL_Fixup): Likewise.
	(VEXI4_Fixup): Likewise.
	(VZERO_Fixup): Likewise.
	(VCMP_Fixup): Likewise.
	(VPERMIL2_Fixup): Likewise.
	(rex_original): Likewise.
	(rex_ignored): Likewise.
	(Mxmm): Likewise.
	(XMM): Likewise.
	(EXxmm): Likewise.
	(EXxmmq): Likewise.
	(EXymmq): Likewise.
	(Vex): Likewise.
	(Vex128): Likewise.
	(Vex256): Likewise.
	(VexI4): Likewise.
	(EXdVex): Likewise.
	(EXqVex): Likewise.
	(EXVexW): Likewise.
	(EXdVexW): Likewise.
	(EXqVexW): Likewise.
	(XMVex): Likewise.
	(XMVexW): Likewise.
	(XMVexI4): Likewise.
	(PCLMUL): Likewise.
	(VZERO): Likewise.
	(VCMP): Likewise.
	(VPERMIL2): Likewise.
	(xmm_mode): Likewise.
	(xmmq_mode): Likewise.
	(ymmq_mode): Likewise.
	(vex_mode): Likewise.
	(vex128_mode): Likewise.
	(vex256_mode): Likewise.
	(USE_VEX_C4_TABLE): Likewise.
	(USE_VEX_C5_TABLE): Likewise.
	(USE_VEX_LEN_TABLE): Likewise.
	(VEX_C4_TABLE): Likewise.
	(VEX_C5_TABLE): Likewise.
	(VEX_LEN_TABLE): Likewise.
	(REG_VEX_XX): Likewise.
	(MOD_VEX_XXX): Likewise.
	(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
	(PREFIX_0F3A44): Likewise.
	(PREFIX_0F3ADF): Likewise.
	(PREFIX_VEX_XXX): Likewise.
	(VEX_OF): Likewise.
	(VEX_OF38): Likewise.
	(VEX_OF3A): Likewise.
	(VEX_LEN_XXX): Likewise.
	(vex): Likewise.
	(need_vex): Likewise.
	(need_vex_reg): Likewise.
	(vex_i4_done): Likewise.
	(vex_table): Likewise.
	(vex_len_table): Likewise.
	(OP_REG_VexI4): Likewise.
	(vex_cmp_op): Likewise.
	(pclmul_op): Likewise.
	(vpermil2_op): Likewise.
	(m_mode): Updated.
	(es_reg): Likewise.
	(PREFIX_0F38F0): Likewise.
	(PREFIX_0F3A60): Likewise.
	(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
	(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
	and PREFIX_VEX_XXX entries.
	(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
	(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
	PREFIX_0F3ADF.
	(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
	Add MOD_VEX_XXX entries.
	(ckprefix): Initialize rex_original and rex_ignored.  Store the
	REX byte in rex_original.
	(get_valid_dis386): Handle the implicit prefix in VEX prefix
	bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
	(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
	calling get_valid_dis386.  Use rex_original and rex_ignored when
	printing out REX.
	(putop): Handle "XY".
	(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
	ymmq_mode.
	(OP_E_extended): Updated to use OP_E_register and
	OP_E_memory.
	(OP_XMM): Handle VEX.
	(OP_EX): Likewise.
	(XMM_Fixup): Likewise.
	(CMP_Fixup): Use ARRAY_SIZE.

	* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
	CPU_FMA_FLAGS and CPU_AVX_FLAGS.
	(operand_type_init): Add OPERAND_TYPE_REGYMM and
	OPERAND_TYPE_VEX_IMM4.
	(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
	(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
	VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
	VexImmExt and SSE2AVX.
	(operand_types): Add RegYMM, Ymmword and Vex_Imm4.

	* i386-opc.h (CpuAVX): New.
	(CpuAES): Likewise.
	(CpuCLMUL): Likewise.
	(CpuFMA): Likewise.
	(Vex): Likewise.
	(Vex256): Likewise.
	(VexNDS): Likewise.
	(VexNDD): Likewise.
	(VexW0): Likewise.
	(VexW1): Likewise.
	(Vex0F): Likewise.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(Vex3Sources): Likewise.
	(VexImmExt): Likewise.
	(SSE2AVX): Likewise.
	(RegYMM): Likewise.
	(Ymmword): Likewise.
	(Vex_Imm4): Likewise.
	(Implicit1stXmm0): Likewise.
	(CpuXsave): Updated.
	(CpuLM): Likewise.
	(ByteOkIntel): Likewise.
	(OldGcc): Likewise.
	(Control): Likewise.
	(Unspecified): Likewise.
	(OTMax): Likewise.
	(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
	(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
	vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
	vex3sources, veximmext and sse2avx.
	(i386_operand_type): Add regymm, ymmword and vex_imm4.

	* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.

	* i386-reg.tbl: Add AVX registers, ymm0..ymm15.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2008-04-03 14:03:21 +00:00
Eric B. Weddington
2460c166ae /gas: 
2008-03-28  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (mcu_types): Add attiny167.
	* doc/c-avr.texi: Likewise.

/include:
2008-03-28  Eric B. Weddington  <eric.weddington@atmel.com>

	* opcode/avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.
 2008-03-28 21:51:38 +00:00
Eric B. Weddington
70881657a2 /gas: 
2008-03-28  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (mcu_types): Add atmega32u4.
	* doc/c-avr.texi: Likewise.
 2008-03-28 21:04:22 +00:00
Eric B. Weddington
25755480bf /gas: 
2008-03-28  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (mcu_types): Add atmega32c1.
	* doc/c-avr.texi: Likewise.
 2008-03-28 19:24:52 +00:00
Nick Clifton
38de72b9a0 * config/tc-avr.c (mcu_types): Add atmega32m1. 
* doc/c-avr.texi: Likewise.
 2008-03-27 14:52:35 +00:00
Ralf Wildenhues
58c85be758 * configure.ac: m4_include config/proginstall.m4. 
* configure: Regenerate.
config/
        * proginstall.m4: New file, with fixed AC_PROG_INSTALL.
bfd/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
bfd/doc/
        * Makefile.in: Regenerate.
intl/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
gas/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
        * doc/Makefile.in: Likewise.
ld/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
opcodes/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
binutils/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
        * doc/Makefile.in: Likewise.
gprof/
        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.
 2008-03-17 22:17:33 +00:00
Paul Brook
15290f0adc 2008-03-09 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (arm_cpu_option_table): Add cortex-a9.
	* doc/c-arm.texi: Add cortex-a9.
 2008-03-09 15:20:31 +00:00
Paul Brook
b1cc4aeb65 2008-03-09 Paul Brook <paul@codesourcery.com> 
bfd/
	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
	Tag_VFP_arch values.

	binutils/
	* readelf.c (arm_attr_tag_VFP_arch): Add "VFPv3-D16".

	gas/
	* config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
	(parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
	(arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
	(aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
	* doc/c-arm.texi: Document new ARM FPU variants.

	gas/testsuite/
	* gas/arm/vfpv3-d16-bad.d: New test.
	* gas/arm/vfpv3-d16-bad.l: New test.

	include/opcode/
	* arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
 2008-03-09 13:23:29 +00:00
Paul Brook
845b51d665 2008-02-20 Paul Brook <paul@codesourcery.com> 
ld/
	* emultempl/armelf.em (OPTION_FIX_V4BX_INTERWORKING): Define.
	(PARSE_AND_LIST_LONGOPTS): Add fix-v4bx-interworking.
	(PARSE_AND_LIST_OPTIONS): Ditto.
	(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FIX_V4BX_INTERWORKING.
	* emulparams/armelf.sh (OTHER_TEXT_SECTIONS): Add .v4_bx.
	* emulparams/armelf_linux.sh (OTHER_TEXT_SECTIONS): Ditto.
	* emulparams/armnto.sh (OTHER_TEXT_SECTIONS): Ditto.
	* ld.texinfo: Document --fix-v4bx-interworking.

	ld/testsuite/
	* ld-arm/armv4-bx.d: New test.
	* ld-arm/armv4-bx.s: New test.
	* ld-arm/arm.ld: Add .v4bx.
	* ld-arm/arm-elf.exp: Add armv4-bx.

	gas/testsuite/
	* gas/arm/thumb.d: Exclude EABI targets.
	* gas/arm/arch4t.d: Exclude EABI targts.
	* gas/arm/v4bx.d: New test.
	* gas/arm/v4bx.s: New test.
	* gas/arm/thumb-eabi.d: New test.
	* gas/arm/arch4t-eabi.d: New test.

	gas/
	* config/tc-arm.c (fix_v4bx): New variable.
	(do_bx): Generate V4BX relocations.
	(md_assemble): Allow bx on v4 codes when fix_v4bx.
	(md_apply_fix): Handle BFD_RELOC_ARM_V4BX.
	(tc_gen_reloc): Ditto.
	(OPTION_FIX_V4BX): Define.
	(md_longopts): Add fix-v4bx.
	(md_parse_option): Handle OPTION_FIX_V4BX.
	(md_show_usage): Document --fix-v4bx.
	* doc/c-arm.texi: Document --fix-v4bx.

	bfd/
	* reloc.c: Add BFD_RELOC_ARM_V4BX.
	* elf32-arm.c (elf32_arm_reloc_map): Add BFD_RELOC_ARM_V4BX.
	(ARM_BX_GLUE_SECTION_NAME, ARM_BX_GLUE_SECTION_NAME): Define.
	(elf32_arm_link_hash_table): Add bx_glue_size and bx_glue_offset.
	Update comment for fix_v4bx.
	(elf32_arm_link_hash_table_create): Zero bx_glue_size and
	bx_glue_offset.
	(ARM_BX_VENEER_SIZE, armbx1_tst_insn, armbx2_moveq_insn,
	armbx3_bx_insn): New.
	(bfd_elf32_arm_allocate_interworking_sections): Allocate BX veneer
	section.
	(bfd_elf32_arm_add_glue_sections_to_bfd): Ditto.
	(bfd_elf32_arm_process_before_allocation): Record BX veneers.
	(record_arm_bx_glue, elf32_arm_bx_glue): New functions.
	(elf32_arm_final_link_relocate): Handle BX veneers.
	(elf32_arm_output_arch_local_syms): Output mapping symbol for .v4_bx.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
 2008-02-20 15:17:56 +00:00
H.J. Lu
1ceab3445d 2008-02-18 H.J. Lu <hongjiu.lu@intel.com> 
* doc/c-i386.texi: Update -march= and .arch.
 2008-02-18 18:52:46 +00:00
H.J. Lu
f03fe4c110 gas/ 
2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .xsave.
	(md_show_usage): Add .xsave.

	* doc/c-i386.texi: Add xsave to -march=.

gas/testsuite/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.s: Add xgetbv.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-10.d: Likewise.

opcodes/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.
 2008-02-12 05:35:36 +00:00