Andreas Schwab
baee4c9eb0
gas/testsuite/:
...
* gas/m68k/cpu32.[sd]: New test.
* gas/m68k/all.exp: Run it.
opcodes/:
* m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
2007-01-04 17:14:50 +00:00
Julian Brown
62ac925e42
* arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
...
vqrshl instructions.
2007-01-04 15:33:12 +00:00
Kazu Hirata
f7ec513bed
gas/
...
* config/m68k-parse.h (m68k_register): Add CAC and MBB.
* config/tc-m68k.c (fido_ctrl): New.
(m68k_archs): Use fido_ctrl for -mfidoa.
(m68k_cpus): Use fido_ctrl on fido-*-*.
(m68k_ip): Add support for CAC and MBB.
(init_table): Add CAC and MBB.
opcodes/
* m68k-dis.c (print_insn_arg): Add support for cac and mbb.
2006-12-27 07:15:02 +00:00
Kazu Hirata
6bd025df59
* m68k-opc.c (m68k_opcodes): Add sleep and trapx.
2006-12-27 07:10:10 +00:00
H.J. Lu
fb9c77c70e
gas/testsuite/
...
2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-inval.s: cmpxchg16b needs oword ptr, instead
of xmmword ptr.
* gas/i386/x86_64.s: Likewise.
* gas/i386/x86-64-inval.l: Updated.
opcodes/
2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (o_mode): New for 16-byte operand.
(intel_operand_size): Generate "OWORD PTR " for o_mode.
(CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
2006-12-15 13:11:56 +00:00
H.J. Lu
f5804c90c7
gas/testsuite/
...
2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-inval.s: Add cmpxchg16b.
* gas/i386/x86_64.s: Likewise.
* gas/i386/x86-64-inval.l: Updated.
* gas/i386/x86_64.d: Likewise.
opcodes/
2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CMPXCHG8B_Fixup): New.
(grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
2006-12-14 20:13:28 +00:00
H.J. Lu
75413a22c6
2006-12-11 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (Eq): Replaced by ...
(Mq): New. This.
(Ma): Defined with OP_M instead of OP_E.
(grps): Updated cmpxchg8b and vmptrst for Eq -> Mq.
(OP_M): Added bound, cmpxchg8b and vmptrst to bad modrm list.
2006-12-11 18:11:13 +00:00
Daniel Jacobowitz
d5fbea21a5
bfd/
...
* configure.in: Define GENINSRC_NEVER.
* doc/Makefile.am (bfd.info): Remove srcdir prefix.
(MAINTAINERCLEANFILES): Add info file.
(DISTCLEANFILES): Pretend to add info file.
* po/Make-in (.po.gmo): Put gmo files in objdir.
* configure, Makefile.in, doc/Makefile.in: Regenerated.
binutils/
* configure.in: Define GENINSRC_NEVER.
* doc/Makefile.am (MAINTAINERCLEANFILES): Add info file.
(DISTCLEANFILES): Pretend to add info file.
* po/Make-in (.po.gmo): Put gmo files in objdir.
* configure, Makefile.in, doc/Makefile.in: Regenerated.
gas/
* configure.in: Define GENINSRC_NEVER.
* doc/Makefile.am (as.info): Remove srcdir prefix.
(MAINTAINERCLEANFILES): Add info file.
(DISTCLEANFILES): Pretend to add info file.
* po/Make-in (.po.gmo): Put gmo files in objdir.
* configure, Makefile.in, doc/Makefile.in: Regenerated.
gprof/
* configure.in: Define GENINSRC_NEVER.
* doc/Makefile.am (gprof.info): Remove srcdir prefix.
(MAINTAINERCLEANFILES): Add info file.
(DISTCLEANFILES): Pretend to add info file.
* po/Make-in (.po.gmo): Put gmo files in objdir.
* configure, Makefile.in: Regenerated.
ld/
* configure.in: Define GENINSRC_NEVER.
* doc/Makefile.am (ld.info): Remove srcdir prefix.
(MAINTAINERCLEANFILES): Add info file.
(DISTCLEANFILES): Pretend to add info file.
* po/Make-in (.po.gmo): Put gmo files in objdir.
* configure, Makefile.in: Regenerated.
opcodes/
* po/Make-in (.po.gmo): Put gmo files in objdir.
2006-12-11 15:09:46 +00:00
H.J. Lu
5f754f58d9
2006-12-09 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (X86_64_1): New.
(X86_64_2): Likewise.
(X86_64_3): Likewise.
(dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64
tables.
(x86_64_table): Add entries for 0x60, 0x61 and 0x62.
2006-12-10 02:50:53 +00:00
H.J. Lu
7f4c972fa6
2006-12-09 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c: Adjust white spaces.
2006-12-09 21:06:13 +00:00
Jan Beulich
d807a492c6
opcodes/
...
2006-12-04 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (OP_J): Update used_prefixes in v_mode.
gas/testsuite/
2006-12-04 Jan Beulich <jbeulich@novell.com>
* gas/i386/opcode-intel.d: Fix wrong expectation. Make white space
expectations more consistent.
2006-12-04 08:53:29 +00:00
Jan Beulich
ed7841b3f0
opcodes/
...
2006-11-30 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (SEG_Fixup): Delete.
(Sv): Use OP_SEG.
(putop): New suffix character 'D'.
(dis386): Use it.
(grps): Likewise.
(OP_SEG): Handle bytemode other than w_mode.
gas/testsuite/
2006-11-30 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.d: Adjust.
* gas/i386/naked.d: Adjust.
* gas/i386/opcode.d: Adjust.
2006-12-01 15:17:32 +00:00
Jan Beulich
52fd6d9416
opcodes/
...
2006-11-30 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (zAX): New.
(Xz): New.
(Yzr): New.
(z_mode): New.
(z_mode_ax_reg): New.
(putop): New suffix character 'G'.
(dis386): Use it for in, out, ins, and outs.
(intel_operand_size): Handle z_mode.
(OP_REG): Delete unreachable case indir_dx_reg.
(OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle
z_mode_ax_reg.
(OP_ESreg): Fix Intel syntax operand size handling.
(OP_DSreg): Likewise.
gas/testsuite/
2006-11-30 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-io.[sd]: New.
* gas/i386/x86-64-io-intel.d: New.
* gas/i386/x86-64-io-suffix.d: New.
* gas/i386/i386.exp: Run new tests.
2006-12-01 15:00:12 +00:00
Jan Beulich
a35ca55aee
opcodes/
...
2006-11-30 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
(putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
used. For 'R' and 'W' suffix, simplify and fix Intel mode.
gas/testsuite/
2006-11-30 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.s: Use Intel syntax in Intel syntax test.
* gas/i386/x86-64-cbw.[sd]: New.
* gas/i386/x86-64-cbw-intel.d: New.
* gas/i386/i386.exp: Run new tests.
2006-12-01 14:56:11 +00:00
Paul Brook
00249aaae7
2006-11-29 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
encoding.
gas/testsuite/
* gas/arm/vfpv3-const-conv.s: Improve test coverage.
* gas/arm/vfpv3-const-conv.d: Adjust expected output.
* gas/arm/vfp-neon-syntax_t2.d: Ditto.
* gas/arm/vfp-neon-syntax.d: Ditto.
opcodes/
* arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
2006-11-29 16:26:56 +00:00
Daniel Jacobowitz
e821645dee
opcodes/
...
* arm-dis.c (last_is_thumb): Delete.
(enum map_type, last_type): New.
(print_insn_data): New.
(get_sym_code_type): Take MAP_TYPE argument. Check the type of
the right symbol. Handle $d.
(print_insn): Check for mapping symbols even without a normal
symbol. Adjust searching. If $d is found see how much data
to print. Handle data.
gas/
* config/tc-arm.h (md_cons_align): Define.
(mapping_state): New prototype.
* config/tc-arm.c (mapping_state): Make global.
gas/testsuite/
* gas/arm/arm7t.d, gas/arm/neon-ldst-rm.d, gas/arm/thumb2_pool.d,
gas/arm/tls.d: Update for $d support.
* gas/arm/mapshort.d, gas/arm/mapshort.s: New test.
* gas/elf/section2.e-armeabi: Update.
* gas/elf/section2.e-armelf: New file.
* gas/elf/elf.exp: Use it.
ld/testsuite/
* ld-arm/mixed-app.d, ld-arm/tls-app.d, ld-arm/tls-lib.d: Update
for $d support.
2006-11-22 17:45:57 +00:00
Nathan Sidwell
869ddf2a18
gas/
...
* config/tc-m68k.c (m68k_ip): Correct output of cpu aliases.
gas/testsuite/
* gas/m68k/all.exp: Add mcf-trap.
* gas/m68k/mcf-trap.[sd]: New.
opcodes/
* m68k-opc.c (m68k_opcodes): Place trap instructions before set
conditionals. Add tpf coldfire instruction as alias for trapf.
2006-11-16 07:22:25 +00:00
H.J. Lu
d81afd0c00
2006-11-09 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (print_insn): Check PREFIX_REPNZ before
PREFIX_DATA when prefix user table is used.
2006-11-10 03:54:11 +00:00
H.J. Lu
eec0f4ca4c
2006-11-09 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
(twobyte_uses_DATA_prefix): This.
(twobyte_uses_REPNZ_prefix): New.
(twobyte_uses_REPZ_prefix): Likewise.
(threebyte_0x38_uses_DATA_prefix): Likewise.
(threebyte_0x38_uses_REPNZ_prefix): Likewise.
(threebyte_0x38_uses_REPZ_prefix): Likewise.
(threebyte_0x3a_uses_DATA_prefix): Likewise.
(threebyte_0x3a_uses_REPNZ_prefix): Likewise.
(threebyte_0x3a_uses_REPZ_prefix): Likewise.
(print_insn): Updated checking usages of DATA/REPNZ/REPZ
prefixes.
2006-11-10 02:13:40 +00:00
Alan Modra
a9353e608e
* ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.
2006-11-06 00:46:07 +00:00
Nick Clifton
06d2da930d
* tc-score.c (do16_rdrs): Handle not! instruction especially.
...
* score-opc.h (score_opcodes): Delete modifier '0x'.
* gas/score/rD_rA.d: Correct not! and not.c instruction disassembly.
* gas/score/b.d: Correct b! and b instruction disassembly.
2006-11-01 10:29:49 +00:00
Paul Brook
2087ad8497
2006-10-30 Paul Brook <paul@codesourcery.com>
...
binutils/
* objdump.c (disassemble_section): Set info->symtab_pos.
(disassemble_data): Set info->symtab and info->symtab_size.
include/
* dis-asm.h (disassemble_info): Add symtab, symtab_pos and
symtab_size.
opcodes/
* arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
(get_sym_code_type): New function.
(print_insn): Search for mapping symbols.
2006-10-31 20:21:57 +00:00
Nick Clifton
b138abaa40
* tc-score.c (data_op2): Check invalid operands.
...
(my_get_expression): Const operand of some instructions can not be symbol in assembly.
(get_insn_class_from_type): Handle instruction type Insn_internal.
(do_macro_ldst_label): Modify inst.type.
(Insn_PIC): Delete.
* score-inst.h (enum score_insn_type): Add Insn_internal.
* tc-score.c (data_op2): The immediate value in lw is 15 bit signed.
* score-dis.c (print_insn): Correct the error code to print correct PCE instruction disassembly.
2006-10-31 09:54:41 +00:00
Peter Bergner
702f0fb48f
2006-10-26 Ben Elliston <bje@au.ibm.com>
...
Anton Blanchard <anton@samba.org>
Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
(POWER6): Define.
(powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
"frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
"mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
"lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
"stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
"dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
"dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
"dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
"dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
"ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
"denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
"dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
"drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
"dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
"dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
"dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
"dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
"drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
"diexq" and "diexq." opcodes.
2006-10-26 17:37:26 +00:00
Daniel Jacobowitz
a3202ebb06
* h8300-dis.c (bfd_h8_disassemble): Add missing consts.
2006-10-26 15:37:21 +00:00
Alan Modra
e9f5312993
New Cell SPU port.
2006-10-25 06:49:21 +00:00
Alan Modra
ede602d7c8
Add powerpc cell support.
2006-10-24 01:27:29 +00:00
Michael Meissner
7918206c55
Fix AMDFAM10 POPCNT instruction
2006-10-23 22:53:29 +00:00
Andrew Stubbs
f3b8f6287b
2006-10-20 Andrew Stubbs <andrew.stubbs@st.com>
...
opcodes/
* sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
duplicating it.
gas/testsuite/
* gas/sh/pcrel-coff.d: Update patterns (remove 0x on addresses).
* gas/sh/pcrel-hms.d: Likewise.
* gas/sh/pcrel.d: Likewise.
* gas/sh/pcrel2.d: Likewise.
* gas/sh/pic.d: Likewise.
* gas/sh/tlsd.d: Likewise.
* gas/sh/tlsdnopic.d: Likewise.
* gas/sh/tlsdpic.d: Likewise.
2006-10-20 14:47:05 +00:00
Dave Brolley
d3f1a42773
2006-10-18 Dave Brolley <brolley@redhat.com>
...
* configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
* configure: Regenerated.
2006-10-18 18:18:26 +00:00
Alan Modra
3bb0c887b3
Regenerate.
2006-09-29 08:05:35 +00:00
Joseph Myers
2d447fcaa9
bfd/
...
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
(arch_info_struct, bfd_arm_update_notes): Likewise.
(architectures): Likewise.
(bfd_arm_merge_machines): Check for iWMMXt2.
* bfd-in2.h: Rebuild.
gas/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* config/tc-arm.c (arm_cext_iwmmxt2): New.
(enum operand_parse_code): New code OP_RIWR_I32z.
(parse_operands): Handle OP_RIWR_I32z.
(do_iwmmxt_wmerge): New function.
(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
a register.
(do_iwmmxt_wrwrwr_or_imm5): New function.
(insns): Mark instructions as RIWR_I32z as appropriate.
Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
(md_begin): Handle IWMMXT2.
(arm_cpus): Add iwmmxt2.
(arm_extensions): Likewise.
(arm_archs): Likewise.
gas/testsuite/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* gas/arm/iwmmxt2.s: New file.
* gas/arm/iwmmxt2.d: New file.
include/opcode/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
opcodes/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
only be used with the default multiply-add operation, so if N is
set, don't bother printing X. Add new iwmmxt instructions.
(IWMMXT_INSN_COUNT): Update.
(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
with a 'c' suffix.
(print_insn_coprocessor): Check for iWMMXt2. Handle format
specifiers 'r', 'i'.
2006-09-26 12:04:45 +00:00
H.J. Lu
c4b5fff932
2006-09-24 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
...
PR binutils/3100
* i386-dis.c (prefix_user_table): Fix the second operand of
maskmovdqu instruction to allow only %xmm register instead of
both %xmm register and memory.
2006-09-24 17:25:47 +00:00
H.J. Lu
a7a8d8e58e
Add PR binutils/3000 to its entry.
2006-09-24 17:13:59 +00:00
H.J. Lu
539e75adb5
gas/
...
2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3235
* config/tc-i386.c (match_template): Check address size prefix
to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
operand.
gas/testsuite/
2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3235
* gas/i386/addr16.d: New file.
* gas/i386/addr16.s: Likewise.
* gas/i386/addr32.d: Likewise.
* gas/i386/addr32.s: Likewise.
* gas/i386/i386.exp: Add "addr16" and "addr32".
* gas/i386/x86-64-addr32.s: Add tests for "add32 mov".
* gas/i386/x86-64-addr32.d: Updated.
opcodes/
2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3235
* i386-dis.c (OP_OFF64): Get 32bit offset if there is an
address size prefix.
2006-09-23 23:10:14 +00:00
Nick Clifton
1c0d3aa6ae
Add support for Score target.
2006-09-16 23:51:50 +00:00
Nick Clifton
0112cd268b
* bfd-in.h (STRING_AND_COMMA): New macro. Takes one constant string as its
...
argument and emits the string followed by a comma and then the length of
the string.
(CONST_STRNEQ): New macro. Checks to see if a variable string has a constant
string as its initial characters.
(CONST_STRNCPY): New macro. Copies a constant string to the start of a
variable string.
* bfd-in2.h: Regenerate.
* <remainign files>: Make use of the new macros.
2006-09-16 18:12:17 +00:00
Paul Brook
428e3f1f4e
2006-09-04 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_neon_dyadic_if_i): Remove.
(do_neon_dyadic_if_i_d): Avoid setting U bit.
(do_neon_mac_maybe_scalar): Ditto.
(do_neon_dyadic_narrow): Force operand type to NT_integer.
(insns): Remove out of date comments.
gas/testsuite/
* gas/arm/neon-cov.s: Test .u and .s aliases for .i suffixes.
* gas/arm/neon-cov.d: Adjust expected output.
opcodes/
* arm-dis.c (neon_opcode): Fix suffix on VMOVN.
2006-09-05 14:07:22 +00:00
H.J. Lu
96fbad7318
2006-08-23 H.J. Lu <hongjiu.lu@intel.com>
...
* i386-dis.c (three_byte_table): Expand to 256 elements.
2006-08-23 14:48:49 +00:00
Michael Meissner
4d9567e059
Fix bug 3000
2006-08-14 23:45:59 +00:00
Richard Sandiford
777b13b958
opcodes/
...
* m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
"fdaddl" entry.
gas/testsuite/
* gas/m68k/mcf-fpu.s: Add tests for all addressing modes.
* gas/m68k/mcf-fpu.d: Update accordingly.
2006-07-29 08:55:38 +00:00
Paul Brook
401a54cf6e
2006-07-19 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (insns): Fix rbit Arm opcode.
gas/testsuite/
* gas/arm/archv6t2.d: Adjust expected output for rbit.
opcodes/
* armd-dis.c (arm_opcodes): Fix rbit opcode.
2006-07-19 12:53:33 +00:00
H.J. Lu
2b516b7297
gas/testsuite/
...
2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/opcode.s: Add sldt, smsw and str.
* gas/i386/x86-64-opcode.s: Likewise.
* gas/i386/opcode.d: Updated.
* gas/i386/x86-64-opcode.d: Likewise.
opcodes/
2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
"sldt", "str" and "smsw".
2006-07-18 20:25:41 +00:00
H.J. Lu
10505f38ce
Add missing ChangeLog entry.
2006-07-15 16:58:36 +00:00
H.J. Lu
a6bd098c72
2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
...
PR binutils/2829
* i386-dis.c (GRP11_C6): NEW.
(GRP11_C7): Likewise.
(GRP12): Updated.
(GRP13): Likewise.
(GRP14): Likewise.
(GRP15): Likewise.
(GRP16): Likewise.
(GRPAMD): Likewise.
(GRPPADLCK1): Likewise.
(GRPPADLCK2): Likewise.
(dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
respectively.
(grps): Add entries for GRP11_C6 and GRP11_C7.
2006-07-15 16:33:24 +00:00
Michael Meissner
050dfa73de
Add amdfam10 instructions
2006-07-13 22:25:48 +00:00
Julian Brown
e8b42ce4f8
* arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
2006-07-05 17:08:47 +00:00
H.J. Lu
1596541188
gas/testsuite/
...
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops and x86-64-nops.
* gas/i386/nops.d: New file.
* gas/i386/nops.s: Likewise.
* gas/i386/x86-64-nops.d: Likewise.
* gas/i386/x86-64-nops.s: Likewise.
include/opcode/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Add "nop" with memory reference.
opcodes/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
(twobyte_has_modrm): Set 1 for 0x1f.
2006-06-12 18:59:37 +00:00
H.J. Lu
46e883c5a9
gas/
...
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Don't add rex64 for
"xchg %rax,%rax".
gas/testsuite/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/opcode.s: Add "xchg %ax,%ax".
* gas/i386/opcode.d: Updated.
* gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax,
xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8.
* gas/i386/x86-64-opcode.d: Updated.
include/opcode/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Update comment for 64bit NOP.
opcodes/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (NOP_Fixup): Removed.
(NOP_Fixup1): New.
(NOP_Fixup2): Likewise.
(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
2006-06-12 18:55:44 +00:00
Julian Brown
4e9d3b813b
* arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
...
on 64-bit hosts.
2006-06-12 15:31:28 +00:00
H.J. Lu
b3882df925
2006-06-10 H.J. Lu <hongjiu.lu@intel.com>
...
* i386.c (GRP10): Renamed to ...
(GRP12): This.
(GRP11): Renamed to ...
(GRP13): This.
(GRP12): Renamed to ...
(GRP14): This.
(GRP13): Renamed to ...
(GRP15): This.
(GRP14): Renamed to ...
(GRP16): This.
(dis386_twobyte): Updated.
(grps): Likewise.
2006-06-10 18:20:39 +00:00
Nick Clifton
5f4df3dd7b
Updated Finnish translation
2006-06-09 13:40:51 +00:00
Joseph Myers
6648b7cff9
bfd/doc:
...
* bfd.texinfo: Remove local @tex code.
bfd:
* po/Make-in (pdf, ps): New dummy targets.
binutils:
* po/Make-in (pdf, ps): New dummy targets.
gas:
* po/Make-in (pdf, ps): New dummy targets.
gprof:
* po/Make-in (pdf, ps): New dummy targets.
ld:
* po/Make-in (pdf, ps): New dummy targets.
opcodes:
* po/Make-in (pdf, ps): New dummy targets.
2006-06-07 15:38:01 +00:00
Paul Brook
c22aaad1c7
2006-06-06 Paul Brook <paul@codesourcery.com>
...
opcodes/
* arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
instructions.
(neon_opcodes): Add conditional execution specifiers.
(thumb_opcodes): Ditto.
(thumb32_opcodes): Ditto.
(arm_conditional): Change 0xe to "al" and add "" to end.
(ifthen_state, ifthen_next_state, ifthen_address): New.
(IFTHEN_COND): Define.
(print_insn_coprocessor, print_insn_neon): Print thumb conditions.
(print_insn_arm): Change %c to use new values of arm_conditional.
(print_insn_thumb16): Print thumb conditions. Add %I.
(print_insn_thumb32): Print thumb conditions.
(find_ifthen_state): New function.
(print_insn): Track IT block state.
gas/testsuite/
* gas/arm/thumb2_bcond.d: Update expected output.
* gas/arm/thumb32.d: Ditto.
* gas/arm/vfp1_t2.d: Ditto.
* gas/arm/vfp1xD_t2.d: Ditto.
binutils/testsuite/
* binutils-all/arm/objdump.exp: New file.
* binutils-all/arm/thumb2-cond.s: New test.
2006-06-07 14:08:19 +00:00
Alan Modra
9622b051cf
include/opcode/
...
* ppc.h (PPC_OPCODE_POWER6): Define.
Adjust whitespace.
gas/
* config/tc-ppc.c (parse_cpu): Handle "-mpower6".
(md_show_usage): Document it.
(ppc_setup_opcodes): Test power6 opcode flag bits.
* doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
opcodes/
* ppc-dis.c (powerpc_dialect): Handle power6 option.
(print_ppc_disassembler_options): Mention power6.
2006-06-07 05:23:59 +00:00
Thiemo Seufer
65263ce323
[ gas/ChangeLog ]
...
* config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
(CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
(macro_build): Update comment.
(mips_ip): Allow DSP64 instructions for MIPS64R2.
(mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
CPU_HAS_MDMX.
(mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
MIPS_CPU_ASE_MDMX flags for sb1.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips64-dsp.s, gas/mips/mips64-dsp.d: New DSP64 tests.
* gas/mips/mips.exp: Run DSP64 tests.
[ opcodes/ChangeLog ]
* mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
* mips-opc.c: Add DSP64 instructions.
2006-06-06 10:49:48 +00:00
Alan Modra
92ce91bb61
* m68hc11-dis.c (print_insn): Warning fix.
2006-06-06 02:48:34 +00:00
Daniel Jacobowitz
4cfe2c59ff
bfd/, binutils/, gas/, gprof/, ld/, opcodes/
...
* po/Make-in (top_builddir): Define.
2006-06-05 14:04:05 +00:00
Alan Modra
7ff1a5b533
* Makefile.am: Run "make dep-am".
...
* Makefile.in: Regenerate.
* config.in: Regenerate.
2006-06-05 12:28:18 +00:00
Daniel Jacobowitz
20e95c23ab
Configury changes: update src repository (binutils, gdb, and rda) to use
...
config/gettext-sister.m4 instead of the old gettext.m4. Regenerate all
affected autotools files. Include intl in gdb releases again.
2006-05-31 15:14:46 +00:00
Nick Clifton
eebf07fbf5
Update Spanish translation
2006-05-30 11:01:59 +00:00
Richard Sandiford
a596001ece
include/opcodes/
...
* m68k.h (mcf_mask): Define.
opcodes/
* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
and fmovem entries. Put register list entries before immediate
mask entries. Use "l" rather than "L" in the fmovem entries.
* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
out from INFO.
(m68k_scan_mask): New function, split out from...
(print_insn_m68k): ...here. If no architecture has been set,
first try printing an m680x0 instruction, then try a Coldfire one.
gas/testsuite/
* gas/m68k/mcf-fpu.s: Add fmovemd and fmovem instructions.
* gas/m68k/mcf-fpu.d: Adjust accordingly.
2006-05-25 08:09:03 +00:00
Nick Clifton
4a4d496a37
Updated Vietnamese and Irish translations
2006-05-24 07:54:45 +00:00
Nick Clifton
a854efa328
* crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
2006-05-22 08:40:09 +00:00
Nick Clifton
0bd7906139
Updated Dutch translation
2006-05-22 08:33:35 +00:00
Nick Clifton
7ff7c29e1f
Remove ChangeLog entries, since the template files were already up to date.
2006-05-22 08:30:57 +00:00
Nick Clifton
5002adadc5
Update translation templates
2006-05-22 08:25:15 +00:00
Alan Modra
00988f494c
* avr-dis.c: Formatting fix.
2006-05-17 23:44:58 +00:00
Thiemo Seufer
9b3f89ee00
[ gas/ChangeLog ]
...
* config/tc-mips.c (macro_build): Test for currently active
mips16 option.
(mips16_ip): Reject invalid opcodes.
[ opcodes/ChangeLog ]
* mips16-opc.c (I1, I32, I64): New shortcut defines.
(mips16_opcodes): Change membership of instructions to their
lowest baseline ISA.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips.exp: Run new tests.
* gas/mips/mips16e.s, gas/mips/mips16e.d, gas/mips/mips16e-64.s,
gas/mips/mips16e-64.d, gas/mips/mips16e-64.l: New tests.
2006-05-14 15:35:22 +00:00
H.J. Lu
cb6d34334f
gas/testsuite/
...
2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run x86-64-gidt.
* gas/i386/x86-64-gidt.d: New file.
* gas/i386/x86-64-gidt.s: Likewise.
opcodes/
2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (grps): Update sgdt/sidt for 64bit.
2006-05-09 16:05:40 +00:00
Julian Brown
1f3c39b9e6
* arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
...
vldm/vstm.
2006-05-05 18:56:01 +00:00
Thiemo Seufer
d43b4baf07
[ gas/ChangeLog ]
...
* config/tc-mips.c (macro_build): Add case 'k' to handle cache
instruction.
(macro): Add new case M_CACHE_AB.
[ opcodes/ChangeLog ]
* mips-opc.c: Add macro for cache instruction.
[ include/opcode/ChangeLog ]
* mips.h (enum): Add macro M_CACHE_AB.
2006-05-05 15:41:23 +00:00
Thiemo Seufer
39a7806dae
[ gas/testsuite/ChangeLog ]
...
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
* gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2.
* gas/mips/set-arch.d: Adjust according to opcode table changes.
[ include/opcode/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips.h: Add INSN_SMARTMIPS define.
[ opcodes/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips-dis.c (mips_arch_choices): Add smartmips instruction
decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
MIPS64R2.
* mips-opc.c: fix random typos in comments.
(INSN_SMARTMIPS): New defines.
(mips_builtin_opcodes): Add paired single support for MIPS32R2.
Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
FP_S and FP_D flags to denote single and double register
accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
for MIPS32R2. Add SmartMIPS instructions. Add two-argument
variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
release 2 ISAs.
* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
2006-05-04 10:47:05 +00:00
Thiemo Seufer
104b4fab38
2006-05-03 Thiemo Seufer <ths@mips.com>
...
[ opcodes/ChangeLog ]
* mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips32-mt.d: Fix mftr argument order.
2006-05-03 20:59:20 +00:00
Thiemo Seufer
022fac6d2a
* mips-dis.c (print_insn_args): Force mips16 to odd addresses.
...
(print_mips16_insn_arg): Force mips16 to odd addresses.
2006-05-02 11:12:41 +00:00
Thiemo Seufer
9bcd4f993c
[ gas/ChangeLog ]
...
2006-04-30 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
* config/tc-mips.c (validate_mips_insn): Handling of udi cases.
(mips_immed): New table that records various handling of udi
instruction patterns.
(mips_ip): Adds udi handling.
[ include/opcode/ChangeLog ]
2006-04-30 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
* mips.h: Defines udi bits and masks. Add description of
characters which may appear in the args field of udi
instructions.
[ opcodes/ChangeLog ]
2006-04-30 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
* mips-opc.c (mips_builtin_opcodes): Add udi instructions
"udi0" to "udi15".
* mips-dis.c (print_insn_args): Adds udi argument handling.
2006-04-30 18:34:39 +00:00
Jim Wilson
f095b97b59
Fix buglet noticed while looking at PR 1298.
...
* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
error message.
2006-04-29 03:11:31 +00:00
Thiemo Seufer
bdb09db1cf
Don't mis-spell your boss' name...
2006-04-28 13:38:49 +00:00
Thiemo Seufer
59c455b37c
[ opcodes/ChangeLog ]
...
2006-04-28 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
Nigel Stevens <nigel@mips.com>
* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
names.
[ gas/testsuite/ChangeLog ]
2006-04-28 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
Nigel Stevens <nigel@mips.com>
* gas/mips/cp0sel-names-mips32r2.d,
gas/mips/cp0sel-names-mips64r2.d: Update for MT register names.
2006-04-28 13:17:00 +00:00
Thiemo Seufer
cc0ca239ed
* mips-dis.c (print_insn_args): Add mips_opcode argument.
...
(print_insn_mips): Adjust print_insn_args call.
2006-04-28 12:59:30 +00:00
Thiemo Seufer
0d09bfe6d3
* mips-dis.c (print_insn_args): Print $fcc only for FP
...
instructions, use $cc elsewise.
2006-04-28 12:19:31 +00:00
Thiemo Seufer
654c225a6d
* opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
...
Map MIPS16 registers to O32 names.
(print_mips16_insn_arg): Use mips16_reg_names.
2006-04-28 11:42:28 +00:00
Julian Brown
0dbde4cf38
* arm-dis.c (print_insn_neon): Disassemble floating-point constant
...
VMOV.
2006-04-26 16:02:07 +00:00
Julian Brown
16980d0b05
* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
...
%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
Add unified load/store instruction names.
(neon_opcode_table): New.
(arm_opcodes): Expand meaning of %<bitfield>['`?].
(arm_decode_bitfield): New.
(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
(print_insn_neon): New.
(print_insn_arm): Adjust print_insn_coprocessor call. Call
print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
(print_insn_thumb32): Likewise.
2006-04-26 15:40:55 +00:00
Alan Modra
ec3fcc5688
* Makefile.am: Run "make dep-am".
...
* Makefile.in: Regenerate.
2006-04-19 12:10:21 +00:00
Alan Modra
7c6646cd4b
* avr-dis.c (avr_operand): Warning fix.
2006-04-19 02:15:05 +00:00
Alan Modra
241a6c40c8
bfd/
...
* warning.m4 (--enable-werror, -build-warnings): Format help messages.
* configure: Regenerate.
binutils/
* configure: Regenerate.
gas/
* configure.in (--enable-targets): Indent help message.
* configure: Regenerate.
gprof/
* configure: Regenerate.
ld/
* configure: Regenerate.
opcodes/
* configure: Regenerate.
2006-04-19 02:06:15 +00:00
Daniel Jacobowitz
e740356690
Update POTFILES.in.
2006-04-16 18:25:11 +00:00
Nick Clifton
52f16a0ef4
PR binutils/2454
...
* avr-dis.c (avr_operand): Arrange for a comment to appear before the symolic
form of an address, so that the output of objdump -d can be reassembled.
2006-04-12 13:09:10 +00:00
DJ Delorie
e78efa90d6
* m32c.opc (parse_unsigned_bitbase): Take a new parameter which
...
decides if this function accepts symbolic constants or not.
(parse_signed_bitbase): Likewise.
(parse_unsigned_bitbase8): Pass the new parameter.
(parse_unsigned_bitbase11): Likewise.
(parse_unsigned_bitbase16): Likewise.
(parse_unsigned_bitbase19): Likewise.
(parse_unsigned_bitbase27): Likewise.
(parse_signed_bitbase8): Likewise.
(parse_signed_bitbase11): Likewise.
(parse_signed_bitbase19): Likewise.
* m32c-asm.c: Regenerate.
2006-04-10 21:19:14 +00:00
Carlos O'Donell
108a6f8eb4
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
...
* Makefile.tpl: Add install-html target.
* Makefile.def: Add install-html target.
* Makefile.in: Regenerate.
* configure.in: Add --with-datarootdir, --with-docdir,
and --with-htmldir options.
* configure: Regenerate.
bfd/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* po/Make-in: Add install-html target.
* Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
htmldir. Add install-html and install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST for datarootdir, docdir and htmldir.
* configure: Regenerate.
bfd/doc/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.am: Add install-html and install-html-am targets.
Define datarootdir, docdir and htmldir.
* Makefile.in: Regenerate.
binutils/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* po/Make-in: Add install-html target.
* Makefile.am: Add install-html and install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST datarootdir, docdir and htmldir.
* configure: Regenerate.
* doc/Makefile.am: Add install-html and install-html-am targets.
* doc/Makefile.in: Regenerate.
etc/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.in: Add install-html target. Add htmldir,
docdir and datarootdir.
* configure.texi: Document install-html target.
* configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
gas/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* po/Make-in: Add install-html target.
* Makefile.am: Add install-html and install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
* doc/Makefile.am: Add install-html and install-html-am targets.
* doc/Makefile.in: Regenerate.
gprof/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* po/Make-in: Add install-html target.
* Makefile.am: Add install-html, install-html-am and
install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
intl/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* intl/Makefile.in: Add html info and dvi and install-html to .PHONY
Add install-html target.
ld/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.am: Add install-html, install-html-am, and
install-html-recursive targets.
* Makefile.in: Regenerate.
* configure.in: AC_SUBST datarootdir, docdir, htmldir.
* configure: Regenerate.
* po/Make-in: Add install-html target.
opcodes/
2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.am: Add install-html target.
* Makefile.in: Regenerate.
2006-04-06 21:49:35 +00:00
Nick Clifton
a135cb2ce1
Updated Vietnamese translation.
2006-04-06 10:09:41 +00:00
Alan Modra
47426b4127
* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
2006-03-31 11:43:14 +00:00
Bernd Schmidt
331f1cbe1c
* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
...
logic to identify halfword shifts.
2006-03-16 19:09:48 +00:00
Paul Brook
c16d2bf065
2006-03-16 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (insns): Add "svc".
gas/testsuite/
* gas/arm/svc.d: New test.
* gas/arm/svc.s: New test.
* gas/arm/inst.d: Accept svc mnemonic.
* gas/arm/thumb.d: Ditto.
* gas/arm/wince_inst.d: Ditto.
opcodes/
* arm-dis.c (arm_opcodes): Rename swi to svc.
(thumb_opcodes): Ditto.
2006-03-16 15:08:48 +00:00
DJ Delorie
5398310abc
* m32c-asm.c: Regenerate.
...
* m32c-desc.c: Likewise.
* m32c-desc.h: Likewise.
* m32c-dis.c: Likewise.
* m32c-ibld.c: Likewise.
* m32c-opc.c: Likewise.
* m32c-opc.h: Likewise.
2006-03-14 04:23:52 +00:00
DJ Delorie
5348b81e4c
i* m32c-desc.c: Regenerate.
...
* m32c-opc.c: Likewise.
* m32c-opc.h: Likewise.
2006-03-14 00:30:59 +00:00
DJ Delorie
253d272cfc
* m32c.cpu (mul.l): New.
...
(mulu.l): New.
* m32c-desc.c: Regenerate with mul.l, mulu.l.
* m32c-opc.c: Likewise.
* m32c-opc.h: Likewise.
2006-03-11 02:23:19 +00:00
Nick Clifton
f530741d16
Update Swedish translations
2006-03-09 17:28:11 +00:00
H.J. Lu
35c52694b9
gas/testsuite/
...
2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/2428
* gas/i386/i386.exp: Add rep, rep-suffix, x86-64-rep and
x86-64-rep-suffix.
* gas/i386/naked.d: Replace repz with rep.
* gas/i386/x86_64.d: Likewise.
* gas/i386/rep-suffix.d: New file.
* gas/i386/rep-suffix.s: Likewise.
* gas/i386/rep.d: Likewise.
* gas/i386/rep.s: Likewise.
* gas/i386/x86-64-rep-suffix.d: Likewise.
* gas/i386/x86-64-rep-suffix.s: Likewise.
* gas/i386/x86-64-rep.d: Likewise.
* gas/i386/x86-64-rep.s: Likewise.
opcodes/
2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/2428
* i386-dis.c (REP_Fixup): New function.
(AL): Remove duplicate.
(Xbr): New.
(Xvr): Likewise.
(Ybr): Likewise.
(Yvr): Likewise.
(indirDXr): Likewise.
(ALr): Likewise.
(eAXr): Likewise.
(dis386): Updated entries of ins, outs, movs, lods and stos.
2006-03-07 20:18:06 +00:00