* disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
(disassembler): Add bfd_arch_tic80 support to set disassemble
to print_insn_tic80.
* tic80-dis.c (print_insn_tic80): Add stub.
(ALL_MACHINES): Add cpu-tic80.o
(cpu-tic80.o, coff-tic80.o): Add dependencies.
* coff-tic80.c: Add skeleton, cloned from another coff config.
* coffcode.h (coff_write_object_contents): Set magic to TIC80MAGIC
for TIc80.
into a single object module. This avoids client programs picking
up part of the allocation routines from mmalloc and part from libc,
which can lead to undefined behavior.
(CFILES): Add mm.c
(TARGETOBJS): Define to be either the individual objects or the
single combined object.
(TARGETLIB): Create the archive using TARGETOBJS.
* mm.c: New file that simply #includes the other source C files.
includes config.h instead of host.h, tc.h instead of tp.h, and
targ-env.h instead of target-environment.h.
Also, obj-format.h includes targ-cpu.h instead of
target-processor.h.
start-sanitize-tic80
(Laying groundwork, that will be incrementally fleshed out,
for TIc80 support)
* configure.in (case ${generic_target}): Add tic80-*-coff entry.
* configure: Rebuild with autoconf.
* config/obj-coff.h (coff/tic80.h): Include if TC_TIC80 defined.
(TARGET_FORMAT): Define to "coff-tic80".
* config/tc-tic80.c: New file for TIc80 support.
* config/tc-tic80.h: New file for TIc80 support.
end-sanitize-tic80
of 64-bit values on Windows.
* config/i386/xm-windows.h: Leave CC_HAS_LONG_LONG defined,
undefine PRINTF_HAS_LONG_LONG, so that 64-bit values will
be printed without loss of upper bits.
* sparclet-stub.c: a few clean-ups, removing dead code
* config/sparc/tm-sparclet.h: make registers ASR15, ASR19 invisible
(they're not useful, you can't change, write or even read them)
* sparclet-rom.c: Remove includes of Unix system files.
Add function "sparclet_supply_register" so that parse_register_dump
will not seg-fault by calling a null function pointer.
Remove XMODEM support (unfinished work?).
Remove flag "MO_HANDLE_NL", so monitor's output can be read by humans.
Add fill command.
Remove colon from getreg.resp_delim so PSR register will work.
Remove pointer to sparclet_load (downloading SREC's doesn't work).
Null out local register names for %g0, all %cc and all %asr regs,
since the monitor can't report them. Will return zero instead.
* sparclet-stub.c: New -- remote protocol support for sparclet CPU.
* config/sparc/tm-sparclet.h: Re-arrange REGISTER_NAMES:
Add back %g0 and %psr, add %cc coprocessor regs, add %asr regs.
Adjust NUM_REGS and REGISTER_BYTES accordingly
from want and want_nopc.
(want_h8300s, want_nopc_h8300s): New variables for H8/S register
lists.
(e7000_fetch_registers): Use H8/300H or H8/S register list string
as needed.
(e7000_wait): Likewise.
Bringing over a change from hmse-h8s-beta branch.
interrupted by a signal, figure out whether the registers that
the proc_desc claims are saved have been saved yet.
(mips_push_dummy_frame): Write dummy frame register after all
registers have been saved in the dummy frame. Update comments
to reflect the fact that we are now using an AT_ENTRY_POINT
call dummy.
definition in inferior.h is sufficient.
* mips-tdep.c (mips_pc_in_call_dummy): Ditto.
(mips_push_arguments): Make sure that the stack is aligned to a
multiple of 8 after the arguments are pushed.
Structures are always passed by value in the old ABI.
Adjust argument register value on big endian targets when passing
a value whose length is less than the register size.
Write stack arguments with a single write_memory call.
(mips_pop_frame): Use frame_saved_regs instead of proc_desc to
decide which registers have to be restored.
* mpw-config.in: Test for NewFolderRecursive.
* mpw-install: Use symbolic name for startup filename.
* mpw-README: Add various additional details.
PR 10971
force a 64 bit multiplication.
(build_instruction) [OR]: In mips16 mode, don't do anything if the
destination register is 0, since that is the default mips16 nop
instruction.
