Commit 23283c1b changed the layout of some bss style sections on
powerpc64, but neglected to add a page gap before the third PT_LOAD
segment created by this reording. Without a page gap we get two
PT_LOAD headers that overlap by one page in memory. That shouldn't be
allowed because the dynamic loader will load garbage from the first
page of the last segment over the last page of the previous segment.
bfd/
* elf.c (_bfd_elf_map_sections_to_segments): Do not make a new
segment for loaded sections after nonloaded sections if the
sections are on the same page.
ld/testsuite/
* ld-powerpc/elfv2so.d: Update
bfd/
* elf64-ppc.c (toc_adjusting_stub_needed): Use the symbol value
plus addend rather than the original st_value when looking up
entries in opd->adjust.
ld/testsuite/
* ld-powerpc/tocopt6-inc.s, ld-powerpc/tocopt6a.s,
ld-powerpc/tocopt6b.s, ld-powerpc/tocopt6c.s,
ld-powerpc/tocopt6.d: New test.
* ld-powerpc/powerpc.exp (ppc64elftests): Add it.
When building a shared lib from non-PIC objects, we'll get dynamic
text relocations. These need to move with any insns we move.
Otherwise the dynamic reloc will modify the branch, resulting in
crashes and other unpleasant behaviour.
Also, ld -r --ppc476-workaround used with sufficiently aligned PIC
objects needs a fix for emitted REL16 relocs.
bfd/
* elf64-ppc.c (ppc_elf_relocate_section): Move dynamic text
relocs with insns moved by --ppc476-workaround. Correct
output of REL16 relocs.
ld/testsuite/
* ld-powerpc/ppc476-shared.s,
* ld-powerpc/ppc476-shared.lnk,
* ld-powerpc/ppc476-shared.d,
* ld-powerpc/ppc476-shared2.d: New tests.
* ld-powerpc/powerpc.exp: Run them.
Taking them out showed a bug in the powerpc64 backend with .branch_lt
being removed from output_bfd but not from previously set up segment
section maps. Removing the bfd sections meant their sh_flags (and
practically everything else) remaining zero, ie. not SHF_ALLOC,
triggering complaints about "`.branch_lt' can't be allocated in
segment".
include/elf/
* internal.h (ELF_SECTION_IN_SEGMENT_1): Ensure PT_LOAD and
similar segments only contain alloc sections.
ld/
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_after_allocation):
Call gld${EMULATION_NAME}_map_segments regardless of need_laying_out.
ld/testsuite/
* ld-powerpc/tocnovar.d: Revert last change.
I didn't commit this with the relro and powerpc .TOC. changes,
thinking that something should be done about the odd result of
.shstrtab appearing in PT_GNU_RELRO. On looking at it further,
I think that changing readelf would be wrong, so let's just
accept the results. Real binaries will always have other sections
past .got, so PT_GNU_RELRO won't finish past the end of loaded
sections.
* ld-powerpc/tocnovar.d: Adjust.
I was having a little closer look at what is going on here and noticed
that HJ unconditionally emits a NULL STT_FILE symbol before emitting
forced local symbols. That means we really don't need a second pass
over forced local symbols. The only reason for two passes is when
some forced local symbol can be emitted before the NULL STT_FILE. So
I set about removing the second pass, updating the testsuite all over
again. It's also unnecessary to emit the NULL STT_FILE when no
previous file symbol has been emitted.
bfd/
PR ld/17975
* elflink.c (struct elf_outext_info): Remove need_second_pass
and second_pass.
(elf_link_output_extsym): Delete code handling second forced
local pass. Move code emitting NULL STT_FILE symbol later, so
that it can be omitted if forced local is stripped. Don't
emit the NULL STT_FILE if no file symbols have been output.
(bfd_elf_final_link): Remove second forced local pass.
* elf32-ppc.c (add_stub_sym): Set linker_def on linker syms.
(ppc_elf_size_dynamic_sections): Likewise.
* elf64-ppc.c (ppc_build_one_stub): Likewise.
(build_global_entry_stubs): Likewise.
(ppc64_elf_build_stubs): Likewise.
ld/testsuite/
PR ld/17975
* ld-aarch64/gc-tls-relocs.d, * ld-alpha/tlspic.rd,
* ld-cris/libdso-2.d, * ld-i386/tlsdesc-nacl.rd, * ld-i386/tlsdesc.rd,
* ld-i386/tlsnopic-nacl.rd, * ld-i386/tlsnopic.rd,
* ld-i386/tlspic-nacl.rd, * ld-i386/tlspic.rd, * ld-ia64/tlspic.rd,
* ld-powerpc/tlsexe.r, * ld-powerpc/tlsexetoc.r,
* ld-powerpc/tlsso.r, * ld-powerpc/tlstocso.r,
* ld-s390/tlspic.rd, * ld-s390/tlspic_64.rd,
* ld-sparc/tlssunnopic32.rd, * ld-sparc/tlssunnopic64.rd,
* ld-sparc/tlssunpic32.rd, * ld-sparc/tlssunpic64.rd,
* ld-tic6x/shlib-1.rd, * ld-tic6x/shlib-1b.rd, * ld-tic6x/shlib-1r.rd,
* ld-tic6x/shlib-1rb.rd, * ld-tic6x/shlib-noindex.rd,
* ld-x86-64/tlsdesc-nacl.rd, * ld-x86-64/tlsdesc.rd,
* ld-x86-64/tlspic-nacl.rd, * ld-x86-64/tlspic.rd: Update.
The linker hardcoded r3 into a local-dynamic to local-exec TLS
optimization sequence. This is normally the case since r3 is required
as a parameter to (the optimized out) __tls_get_addr call. However,
it is possible for a compiler, LLVM in this case, to set up the
parameter value in another register then copy it to r3 before the
call.
When fixing this problem, I noticed that ppc32 had another bug when
optimizing away one of the TLS insns to a nop.
The patch also tidies a mask used by global-dynamic to initial-exec
TLS optimization, to just select the fields needed. Leaving the
offset in the instruction wasn't a bug since it will be overwritten
anyway.
bfd/
* elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD
optimization. Tidy mask for GOT_TLSGD optimization.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct
location of nop zapping high insn too.
ld/testsuite/
* ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test.
* ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test.
* ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
The changes to reorder sections for better relro protection on powerpc64,
3e2b0f31, 23283c1b, and 5ad18f16, run into a problem with xlc.
xlc -qdatalocal puts global variables into .toc, which means that .toc
must be writable. The simplest way to accomplish this is to edit the
linker script to remove .toc sections from .got on detecting xlc object
files.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Add "object_in_toc".
* elf64-ppc.c (ppc64_elf_add_symbol_hook): Assume that global symbols
in .toc indicate xlc compiled code that might require a rw .toc.
ld/
* emulparams/elf64ppc.sh (INITIAL_READWRITE_SECTIONS): Define.
* emultempl/ppc64elf.em (params): Init new field.
(ppc_after_open): New function.
(LDEMUL_AFTER_OPEN): Define.
* ldlang.c (lang_final): Whitespace fix.
ld/testsuite/
* ld-powerpc/tocvar.d, * ld-powerpc/tocvar.s: New test.
* ld-powerpc/tocnovar.d, * ld-powerpc/tocnovar.s: New test.
* ld-powerpc/powerpc.exp: Run tocvar and tocnovar.
This moves .got too, which requires .sdata and .sbss to move with it,
because these sections share addressing via the toc pointer and with
small-model code must be within a 16-bit signed offset. .plt, .iplt
and .branch_lt must also be moved since they are addressed via a
32-bit offset from the toc pointer, and we might have a very large
.data section.
This change means we may have some bss style sections before the data
segment, necessitating another PT_LOAD header. Also, since _edata is
defined at the end of the data segment it's possible with an empty
.data to have _edata at the end of .plt which looks a little unusual
since .plt is a bss style section. That should only happen rarely in
real world binaries, but does occur in the ld testsuite.
ld/
* emulparams/elf64ppc.sh (BSS_PLT): Don't define.
(OTHER_READWRITE_SECTIONS): Move .branch_lt to..
(OTHER_RELRO_SECTIONS_2): ..here.
(DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT,
PLT_BEFORE_GOT): Define.
* scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/
PLT_BEFORE_GOT combination.
(DATA_GOT, SDATA_GOT): Don't define if either is already defined.
ld/testsuite/
* ld-powerpc/ambiguousv1.d,
* ld-powerpc/ambiguousv1b.d,
* ld-powerpc/ambiguousv2.d,
* ld-powerpc/ambiguousv2b.d,
* ld-powerpc/elfv2exe.d,
* ld-powerpc/elfv2so.d,
* ld-powerpc/tlsexe.r,
* ld-powerpc/tlsexetoc.r,
* ld-powerpc/tlsso.r,
* ld-powerpc/tlstocso.r: Update.
Trying to use the SEC_LINKER_CREATED section flag to determine whether
a symbol is linker defined fails to work on targets like alpha that
define special SEC_COMMON sections. These might contain symbols that
originated in an object file.
include/
* bfdlink.h (struct bfd_link_hash_entry): Comment non_ir_ref. Add
linker_def.
bfd/
* elflink.c (_bfd_elf_define_linkage_sym): Set linker_def.
* linker.c (_bfd_generic_link_add_one_symbol): Clear linker_def
for CDEF, DEF, DEFW, COM.
ld/
* ldexp.c (exp_fold_tree_1 <etree_provide>): Test linker_def.
ld/testsuite/
* ld-powerpc/sdabase.s,
* ld-powerpc/sdabase.t,
* ld-powerpc/sdabase.d: New test.
* ld-powerpc/sdabase2.t,
* ld-powerpc/sdabase2.d: New test.
* ld-powerpc/powerpc.exp: Run them.
Only set the VLE flag if the instruction has been pulled via the VLE
instruction set. This way the flag is guaranteed to be set for VLE-only
instructions or for VLE-only processors, however it'll remain clear for
dual-mode instructions on dual-mode and, more importantly, standard-mode
processors.
gas/
* config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE
flag if both the processor and opcode flags match.
ld/testsuite/
* ld-powerpc/apuinfo-vle.rd: New test.
* ld-powerpc/apuinfo-vle.s: New test source.
* ld-powerpc/apuinfo.rd: Adjust according to GAS PPC_APUINFO_VLE
handling change.
* ld-powerpc/powerpc.exp: Run the new test.
This fixes a problem seen on powerpc64le ELFv2 when creating a
function symbol alias with ld --defsym. st_other needs to be copied
from the source symbol to the alias in order to set up the local entry
offset for the alias. I decided to make this change in the generic
ELF code rather than in elf64-ppc.c since it looks like other targets
that use st_other bits might benefit too.
bfd/
* elflink.c (_bfd_elf_copy_link_hash_symbol_type): Copy st_other
bits from source to dest.
* linker.c (_bfd_generic_copy_link_hash_symbol_type): Update comment.
* targets.c (struct bfd_target <_bfd_copy_link_hash_symbol_type>):
Likewise.
* bfd-in2.h: Regenerate.
ld/testsuite/
* ld-powerpc/defsym.s, * ld-powerpc/defsym.d: New test.
* ld-powerpc/powerpc.exp: Run it.
doesn't always mean you need to define a function symbol on plt code.
If all references are in read-write sections, then using dynamic relocs
is OK.
bfd/
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Clear
pointer_equality_needed when !readonly_dynrelocs.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise.
ld/testsuite/
* ld-powerpc/ambiguousv1.d: Match symbol table too.
* ld-powerpc/ambiguousv2.d: Likewise.
* ld-powerpc/ambiguousv1b.d: New.
* ld-powerpc/ambiguousv2b.d: New.
* ld-powerpc/powerpc.exp: Run new tests.
Power8 fuses addis,addi and addis,ld sequences when the target of the
addis is the same as the addi/ld. Thus
addis r12,r2,xxx@ha
addi r12,r12,xxx@l / ld r12,xxx@l(r12)
is faster than
addis r11,r2,xxx@ha
addi r12,r11,xxx@l / ld r12,xxx@l(r11)
So use the form that allows fusion in plt call and branch stubs.
bfd/
* elf64-ppc.c (ADDIS_R12_R2): Define.
(build_plt_stub): Support fusion on ELFv2 stub.
(ppc_build_one_stub): Likewise for plt branch stubs.
gold/
* powerpc.cc (addis_12_2): Define.
(Stub_table::do_write): Support fusion on ELFv2 stubs.
ld/testsuite/
* ld-powerpc/elfv2exe.d: Update for changed plt call stubs.
gdb/
* ppc64-tdep.c (ppc64_standard_linkage8): New.
(ppc64_skip_trampoline_code): Recognise ELFv2 stub supporting fusion.
ELFv2 needs to create plt entries in a non-PIC executable for an
address reference to a function defined in a shared object. It's
possible that an object file has no features that distinguish it as
ELFv1 or ELFv2, eg. an object only containing data. Such files need
to be handled like those that are known to be ELFv2.
However, this unnecessarily creates plt entries for the analogous
ELFv1 case, so arrange to set output abi version earlier, and use the
output abi version to further distinguish ambiguous input files.
bfd/
* elf64-ppc.c (ppc64_elf_check_relocs): Account for possibly
needed plt entries when taking the address of functions for
abiversion == 0 (ie. unknown) as well as abiversion == 2.
Move opd setup and abiversion checks to..
(ppc64_elf_before_check_relocs): ..here. Renamed from
ppc64_elf_process_dot_syms. Set output abiversion from input and
input abiversion from output, if either is not set.
(ppc64_elf_merge_private_bfd_data): Don't merge flags here.
(elf_backend_check_directives): Update.
ld/testsuite/
* ld-powerpc/startv1.s, * ld-powerpc/startv2.s, * ld-powerpc/funref.s,
* ld-powerpc/funv1.s, * ld-powerpc/funv2.s,
* ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv2.d: New test files.
* ld-powerpc/powerpc.exp: Run new tests.
This adds support for "func@localentry", an expression that returns the
ELFv2 local entry point address of function "func". I've excluded
dynamic relocation support because that obviously would require glibc
changes.
include/elf/
* ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
bfd/
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry.
(ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL.
(ppc64_elf_check_relocs): Likewise.
(ppc64_elf_relocate_section): Likewise.
* Add BFD_RELOC_PPC64_ADDR64_LOCAL.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Support @localentry.
(md_apply_fix): Support R_PPC64_ADDR64_LOCAL.
ld/testsuite/
* ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files.
* ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files.
* ld-powerpc/powerpc.exp: Run new test.
elfcpp/
* powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::local, global): Support
R_PPC64_ADDR64_LOCAL.
(Target_powerpc::Relocate::relocate): Likewise.
An assignment to dot in an output section that allocates space of
course keeps the output section. Here, I'm changing the behaviour for
assignments that don't allocate space. The idea is not so much to
allow people to force output of an empty section with ". = .", but
to fix cases where an otherwise empty section has padding added by an
alignment expression that changes with relaxation or .eh_frame
editing. Such a section might have zero size before relaxation and so
be stripped incorrectly.
ld/
* ld.texinfo (Output Section Discarding): Mention assigning to dot
as a way of keeping otherwise empty sections.
* ldexp.c (is_dot, is_value, is_sym_value, is_dot_ne_0,
is_dot_plus_0, is_align_conditional): New predicates.
(exp_fold_tree_1): Set SEC_KEEP when assigning to dot inside an
output section, except for some special cases.
* scripttempl/elfmicroblaze.sc: Use canonical form to align at
end of .heap and .stack.
ld/testsuite/
* ld-shared/elf-offset.ld: Align end of .bss with canonical form
of ALIGN that allows an empty .bss to be removed.
* ld-arm/arm-dyn.ld: Likewise.
* ld-arm/arm-lib.ld: Likewise.
* ld-elfvsb/elf-offset.ld: Likewise.
* ld-mips-elf/mips-dyn.ld: Likewise.
* ld-mips-elf/mips-lib.ld: Likewise.
* ld-arm/arm-no-rel-plt.ld: Remove duplicate ALIGN.
* ld-powerpc/vle-multiseg-1.ld: Remove ALIGN at start of section.
ALIGN address of section instead.
* ld-powerpc/vle-multiseg-2.ld: Likewise.
* ld-powerpc/vle-multiseg-3.ld: Likewise.
* ld-powerpc/vle-multiseg-4.ld: Likewise.
* ld-powerpc/vle-multiseg-6.ld: Likewise.
* ld-scripts/empty-aligned.d: Check section headers not program
headers. Remove xfail and notarget.
* ld-scripts/empty-aligned.t: Use canonical ALIGN for end of .text2.
Changing addis r2,r12,..; addi r2,r2,.. to lis r2,..; addi r2,r2..
in non-PIC executables has the benefit of removing a dependency on r12.
bfd/
* elf64-ppc.c (ppc64_elf_relocate_section): Edit global entry
prologue to non-PIC in non-PIC executables.
ld/testsuite/
* ld-powerpc/elfv2exe.d: Adjust for non-PIC global entry.
This change is to support the new ELFv2 ABI, which uses the value in
r12 on function entry to calculate the got/toc pointer.
bfd/
* elf64-ppc.c (build_plt_stub): Switch stubs to use r11 as base
reg and r12 as destination.
(ppc_build_one_stub): Likewise.
(ppc64_elf_build_stubs): Likewise for glink.
ld/testsuite/
* ld-powerpc/tls.s: Add proper .opd entry for _start.
* ld-powerpc/tlstoc.s: Likewise.
* ld-powerpc/relbrlt.d: Update for changed stubs.
* ld-powerpc/tls.d: Update for changed stubs and _start .opd entry.
* ld-powerpc/tls.g: Likewise.
* ld-powerpc/tlsexe.d: Likewise.
* ld-powerpc/tlsexe.g: Likewise.
* ld-powerpc/tlsexe.r: Likewise.
* ld-powerpc/tlsexetoc.d: Likewise.
* ld-powerpc/tlsexetoc.g: Likewise.
* ld-powerpc/tlsexetoc.r: Likewise.
* ld-powerpc/tlsso.d: Likewise.
* ld-powerpc/tlsso.g: Likewise.
* ld-powerpc/tlsso.r: Likewise.
* ld-powerpc/tlstoc.d: Likewise.
* ld-powerpc/tlstoc.g: Likewise.
* ld-powerpc/tlstocso.d: Likewise.
* ld-powerpc/tlstocso.g: Likewise.
* ld-powerpc/tlstocso.r: Likewise.
The .except, .loader and .typchk are not mapped to memory,
so do not set their SEC_ALLOC flag.
bfd/ChangeLog:
* coffcode.h (styp_to_sec_flags) [RS6000COFF_C]: Add handling
of STYP_EXCEPT, STYP_LOADER and STYP_TYPCHK sections.
ld/testsuite/ChangeLog:
* ld-powerpc/aix-core-sec-1.hd, ld-powerpc/aix-core-sec-2.hd,
ld-powerpc/aix-core-sec-3.hd: Adjust expected section flags
for section .loader.
* ld-elf/export-class.vd: New test.
* ld-elf/export-class-def.s: New test source.
* ld-elf/export-class-dep.s: New test source.
* ld-elf/export-class-lib.s: New test source.
* ld-elf/export-class-ref.s: New test source.
* ld-elf/export-class-lib.ver: New test version script.
* ld-elf/export-class.exp: New test script.
* ld-arm/arm-export-class.rd: New test.
* ld-arm/arm-export-class.xd: New test.
* ld-arm/export-class.exp: New test script.
* ld-i386/i386-export-class.rd: New test.
* ld-i386/i386-export-class.xd: New test.
* ld-i386/export-class.exp: New test script.
* ld-mips-elf/mips-32-export-class.rd: New test.
* ld-mips-elf/mips-32-export-class.xd: New test.
* ld-mips-elf/mips-64-export-class.rd: New test.
* ld-mips-elf/mips-64-export-class.xd: New test.
* ld-mips-elf/export-class.exp: New test script.
* ld-powerpc/powerpc-32-export-class.rd: New test.
* ld-powerpc/powerpc-32-export-class.xd: New test.
* ld-powerpc/powerpc-64-export-class.rd: New test.
* ld-powerpc/powerpc-64-export-class.xd: New test.
* ld-powerpc/export-class.exp: New test script.
* ld-x86-64/x86-64-64-export-class.rd: New test.
* ld-x86-64/x86-64-x32-export-class.rd: New test.
* ld-x86-64/export-class.exp: New test script.
* elflink.c (elf_link_input_bfd): Provide a file symbol for
each input file with local syms, if the input lacks such.
(bfd_elf_final_link): Add a file symbol to mark end of locals
for which we can associate with input files.
(struct elf_final_link_info): Add filesym_count field.
(struct elf_outext_info): Add need_second_pass and second_pass.
(elf_link_output_extsym): Detect symbols defined in the output
file, emit them on second pass over locals.
ld/testsuite/
Update to suit added STT_FILE symbols.
* ldemul.c (before_allocation_default): Revert last change.
ldlang.c (lang_add_section): Likewise.
(strip_excluded_output_sections): Don't strip output sections with
user input sections when emitrelocations, unless all are SEC_EXCLUDE.
ld/testsuite/
* ld-powerpc/vxworks-relax.rd: Remove check on reloc section
file offset and reloc symbol indices.
* elf64-ppc.c (struct ppc64_elf_obj_tdata): Rename
ha_relocs_not_using_r2 to unexpected_toc_insn.
(ok_lo_toc_insn): New function.
(ppc64_elf_edit_toc): Check insn on lo toc reloc. Emit warning.
(ppc64_elf_relocate_section): Don't check insn on lo toc reloc here.
Handle addic on lo toc reloc.
ld/testsuite/
* ld-powerpc/powerpc.exp: Expect ld warnings for tocopt test.
* ld-powerpc/tocopt.out: New file.
