As defined at AArch64 ELF Specification (4.6.7 Call and Jump
relocations), symbol with type of non STT_FUNC but in different input
section with relocation place should insert long branch veneer also.
Meanwhile the current long branch veneer infrastructure havn't considered
the situation where the branch destination is "sym_value + rela->addend".
This was OK because we only insert veneer for long call destination is
STT_FUNC symbol for which the addend is always zero. But as we relax the
support to other situations by this patch, we need to handle addend be
non-zero value. For example, for static function, relocation against
"local symbol" are turned into relocation against "section symbol + offset"
where there is a valid addend.
bfd/
* elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch
veneer for sym_sec != input_sec.
(elfNN_aarch64_size_stub): Support STT_SECTION symbol.
(elfNN_aarch64_final_link_relocate): Take rela addend into account when
calculation destination.
ld/
* testsuite/ld-aarch64/farcall-section.d: Delete.
* testsuite/ld-aarch64/farcall-section.s: Delete.
* testsuite/ld-aarch64/farcall-b-section.d: New expectation file.
* testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
* testsuite/ld-aarch64/farcall-b-section.s: New testcase.
* testsuite/ld-aarch64/farcall-bl-section.s: Likewise.
* testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
PR 19457
* testsuite/ld-scripts/script.exp (extract_symbol_test): Stop test
early for PE based targets.
* testsuite/ld-scripts/align.t: Use 0x1000 as VMA alignment.
* testsuite/ld-pe/tlssec32.d: Allow for relocatable output.
bfd/ChangeLog:
* elf32-arm.c ((elf32_arm_special_sections): Remove catch of noread
section using '.text.noread' pattern.
gas/ChangeLog:
* config/obj-elf.c (obj_elf_change_section) : Allow arm section with
SHF_ARM_NOREAD section flag.
* config/tc-arm.h (md_elf_section_letter) : Implement this hook to
handle letter 'y'.
(arm_elf_section_letter) : Declare it.
* config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set
SHF_ARM_NOREAD section flag.
* doc/c-arm.texi (ARM section attribute 'y'): Document it.
gas/testsuite/ChangeLog:
* gas/arm/section-execute-only.s: New test case.
* gas/arm/section-execute-only.d: Expected output.
ld/testsuite/ChangeLog:
* ld-arm/thumb1-noread-not-present-mixing-two-section.s: Add 'y'
attribute usage.
* ld-arm/thumb1-noread-present-one-section.s: Likewise.
* ld-arm/thumb1-noread-present-two-section.s: Likewise.
* ld-arm/thumb1-input-section-flag-match.s: Likewise.
binutils/ChangeLog:
* readelf.c (get_elf_section_flags): Display y letter for section
with SHF_ARM_NOREAD section flag in readelf section output.
(process_section_headers): Add y letter in readelf section output
key mapping for ARM architecture.
* testsuite/ld-scripts/rgn-at11.s: New file - based on rgn-at10.s
but with 16 byte section alignment.
* testsuite/ld-scripts/rgn-at11.d: Use new source file. Reenable
test for MIPS targets.
Oddly, config.sub converts a duple ending in -elf for these target to
-unknown-none, which means they aren't seen as elf targets by
binutils. So, counter that. This exposes a number of testsuite
issues (ones you would have seen if configuring with a full triple,
say m68hc11-unknown-elf).
binutils/
* testsuite/lib/binutils-common.exp (is_elf_format): Return true
for m68hc11/12 and xgate triples.
gas/
* testsuite/gas/cfi/cfi.exp: Exclude m68hc11/12 from m68k test.
ld/
* testsuite/lib/ld-lib.exp (check_shared_lib_support): Exclude xgate.
* testsuite/ld-elf/endsym.d: xfail m68hc11/12 and xgate.
* testsuite/ld-elf/pr14156a.d: Likewise.
* testsuite/ld-elf/pr14926.d: Don't run for m68hc11/12 and xgate.
* testsuite/ld-elf/sec64k.exp: Likewise.
2016-01-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
ld/
* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall v6-M (no profile)):
Set address of .foo section when linking.
* testsuite/ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Place myfunc
in .foo section.
* testsuite/ld-arm/farcall-thumb-thumb-m-no-profile.d: Adapt expected
output to the above changes.
bfd * elf32-arm.c (elf32_arm_fix_exidx_coverage): Insert cantunwind when
address in first unwind entry does not match start of section.
tests * ld-arm/arm-elf.exp: New test.
* ld-arm/unwind-mix.d: New file.
* ld-arm/unwind-mix1.s: New file.
* ld-arm/unwind-mix2.s: New file.
We have a problem in that in making compatibility checks while merging
private BFD data on the MIPS target we give priority to the attribute
check, which may fail and cause the function to abort early on. The
problem with this is the ABI compatibility aspect recorded in the
attributes is relatively minor compared to aspects recorded in the ELF
file header. However the premature exit causes any more important
compatibility aspect violated to be masked and not reported to the user
once a problem with attributes has been noticed.
So move the attribute check after the ELF file header flag check in
`_bfd_mips_elf_merge_private_bfd_data', and do not return prematurely
there. Take advantage of the resulting grouping of ELF file header
handling together and remove the premature success return point for the
first input object being handled, letting the code later on figure out
output ABI flags even for this object.
Update LD test cases according to messages from ELF file header checks
now preceding ones from attribute checks.
bfd/
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Move
attribute check after ELF file header flag check.
ld/
* testsuite/ld-mips-elf/attr-gnu-4-14.d: Update the order of
messages expected according to MIPS BFD private data merge
changes.
* testsuite/ld-mips-elf/attr-gnu-4-24.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-34.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-41.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-42.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-43.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-45.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-46.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-47.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-48.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-49.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-54.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-64.d: Likewise.
* testsuite/ld-mips-elf/attr-gnu-4-74.d: Likewise.
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
ld/testsuite/
* ld-arm/arm-elf.exp: Run new test "Thumb-Thumb farcall v6-M (no
profile)".
* ld-arm/farcall-thumb-thumb-m-no-profile-a.s: New file.
* ld-arm/farcall-thumb-thumb-m-no-profile-b.s: Likewise.
* ld-arm/farcall-thumb-thumb-m-no-profile.d: Likewise.
bfd * elf-bfd.h: Add callback to count additional relocations.
* elf32-arm.c (_arm_elf_section_data): Add new counter.
(insert_cantunwind_after): Increment relocations counter.
(elf32_arm_fix_exidx_coverage): Remove exidx entries and add
terminating CANTUNWIND entry only in final builds.
(elf32_arm_add_relocation): New function.
(elf32_arm_write_section): Add relocations in relocatable builds.
(elf32_arm_count_additional_relocs): New function.
(elf_backend_count_additional_relocs): New define.
* bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of
.rel section.
* bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define.
ld * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call
elf32_arm_fix_exidx_coverage for relocatable builds.
ld/testsuite
* ld-arm/arm-elf.exp: New test.
* ld-arm/unwind-rel.d: New file.
* ld-arm/unwind-rel1.s: New file.
* ld-arm/unwind-rel2.s: New file.
* ld-arm/unwind-rel3.s: New file.
include/elf
* arm.h: Add arm SHF_ARM_NOREAD section flag.
bfd * bfd-in2.h: Regenerate.
* section.c: Add SEC_ELF_NOREAD.
* elf32-arm.c (elf32_arm_post_process_headers): Only set
PF_X attribute if a segment only contains section with
SHF_ARM_NOREAD flag.
(elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
(elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
to bfd flag.
(elf32_arm_lookup_section_flags): New function to allow
INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
(elf32_arm_special_sections): Add special sections array
to catch section prefix by '.text.noread' pattern.
ld/testsuite
* ld-arm/arm-elf.exp: New tests.
* ld-arm/thumb1-input-section-flag-match.d: New
* ld-arm/thumb1-input-section-flag-match.s: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
* ld-arm/thumb1-noread-present-one-section.d: New
* ld-arm/thumb1-noread-present-one-section.s: New
* ld-arm/thumb1-noread-present-two-section.d: New
* ld-arm/thumb1-noread-present-two-section.s: New
binutils
* readelf.c (get_elf_section_flags): Add support for ARM specific
section flags.
2015-12-16 Mickael Guene <mickael.guene@st.com>
bfd/
* bfd-in2.h: Regenerate.
* reloc.c: Add new relocations.
* libbfd.h (bfd_reloc_code_real_names): Add new relocations
display names.
* elf32-arm.c (elf32_arm_howto_table_1): Add HOWTO for new
relocations.
(elf32_arm_reloc_map): Add bfd/arm mapping for new relocations.
(elf32_arm_final_link_relocate): Implement new relocations
resolution.
gas/
* doc/c-arm.texi: Add documentation about new directives
* config/tc-arm.c (group_reloc_table): Add mapping between gas
syntax and new relocations.
(do_t_add_sub): Keep new relocations for add operand.
(do_t_mov_cmp): Keep new relocations for mov operand.
(insns): Use 'shifter operand with possible group relocation'
operand parse code for movs operand.
(md_apply_fix): Implement mov and add encoding when new
relocations on them.
(tc_gen_reloc): Add new relocations.
(arm_fix_adjustable): Since offset has a limited range ([0:255])
we disable adjust_reloc_syms() for new relocations.
gas/testsuite/
* gas/arm/adds-thumb1-reloc-local.d: New
* gas/arm/adds-thumb1-reloc-local.s: New
* gas/arm/movs-thumb1-reloc-local.d: New
* gas/arm/movs-thumb1-reloc-local.s: New
include/
* elf/arm.h: Add new arm relocations.
ld/testsuite/
* ld-arm/arm-elf.exp (armelftests_common): Add new relocations
tests.
* ld-arm/thumb1-adds.d: New
* ld-arm/thumb1-adds.s: New
* ld-arm/thumb1-movs.d: New
* ld-arm/thumb1-movs.s: New
To support thumb1 execute-only code we need to support four new
relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC,
R_ARM_THM_ALU_ABS_G2_NC and R_ARM_THM_ALU_ABS_G3_NC).
These relocations allow the static linker to finalize construction
of symbol address.
Typical sequence of code to get address of the symbol foo is then
the following :
movs r3, #:upper8_15:#foo
lsls r3, #8
adds r3, #:upper0_7:#foo
lsls r3, #8
adds r3, #:lower8_15:#foo
lsls r3, #8
adds r3, #:lower0_7:#foo
This will give following sequence of text and relocations after
assembly :
4: 2300 movs r3, #0
4: R_ARM_THM_ALU_ABS_G3_NC foo
6: 021b lsls r3, r3, #8
8: 3300 adds r3, #0
8: R_ARM_THM_ALU_ABS_G2_NC foo
a: 021b lsls r3, r3, #8
c: 3300 adds r3, #0
c: R_ARM_THM_ALU_ABS_G1_NC foo
e: 021b lsls r3, r3, #8
10: 3300 adds r3, #0
10: R_ARM_THM_ALU_ABS_G0_NC foo
When creating a dummy BFD for an IR file, the output BFD is used as
a template for the new BFD, when it needs to be the input BFD passed
into the function when not dealing with a BFD plugin.
On most targets this is not an issue as the input and output formats
are the same anyway, but on MinGW targets, there are two variant
formats used (pe-i386/pe-x86-64 and pei-i386/pei-x86-64) which are
similar but not interchangeable here.
PR ld/18199
* plugin.c (plugin_get_ir_dummy_bfd): Use srctemplate as the
template when calling bfd_create if it does not use the BFD
plugin target vector.
Linker can't optimize R_386_GOT32 and R_386_GOT32X relocations if addend
isn't 0. It isn't valid to convert
movl foo@GOT+1(%ecx), %eax
to
leal foo@GOTOFF+1(%ecx), %eax
nor to convert
movq foo@GOTPCREL+1(%rip), %rax
to
leaq foo(%rip), %rax
for x86-64. We should check if addend is 0 before optimizing R_386_GOT32
and R_386_GOT32X relocations. Testcases are added for i386 and x86-64.
bfd/
* elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0.
(elf_i386_relocate_section): Skip R_386_GOT32X optimization if
addend isn't 0.
ld/testsuite/
* ld-i386/i386.exp: Run mov2a, mov2b and mov3.
* ld-i386/mov2.s: New file.
* ld-i386/mov2a.d: Likewise.
* ld-i386/mov2b.d: Likewise.
* ld-i386/mov3.d: Likewise.
* ld-i386/mov3.s: Likewise.
* ld-x86-64/mov2.s: Likewise.
* ld-x86-64/mov2a.d: Likewise.
* ld-x86-64/mov2b.d: Likewise.
* ld-x86-64/mov2c.d: Likewise.
* ld-x86-64/mov2d.d: Likewise.
* ld-x86-64/x86-64.exp: Run mov2a, mov2b, mov2c and mov2d.
Symbol defined by a linker assignment may have type bfd_link_hash_new
or bfd_link_hash_undefined. And h->def_regular is always set.
elf_i386_convert_load and elf_x86_64_convert_load should check
h->def_regular as well as bfd_link_hash_undefined and bfd_link_hash_new
to see if a symbol is defined by a linker script.
bfd/
PR ld/19319
* elf32-i386.c (elf_i386_convert_load): Check h->def_regular
instead of bfd_link_hash_new.
* elf64-x86-64.c (elf_x86_64_convert_load): Likewise. Skip
relocation overflow for bfd_link_hash_undefined and
bfd_link_hash_new if h->def_regular is set.
ld/testsuite/
PR ld/19319
* ld-i386/i386.exp: Run pr19319 test.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pr19319.dd: New file.
* ld-i386/pr19319a.S: Likewise.
* ld-i386/pr19319b.S: Likewise.
* ld-x86-64/pr19319.dd: Likewise.
* ld-x86-64/pr19319a.S: Likewise.
* ld-x86-64/pr19319b.S: Likewise.
Make the little-endian emulation the default for the `mips*el-mti-elf*'
and `mips*el-img-elf*' targets, fixing the issue of LD rejecting, in its
default configuration, object files produced by GAS also in its default
configuration.
ld/
* configure.tgt <mips*el-mti-elf*, mips*el-img-elf*>: Add
targets.
Another option might be to not bump "dot" for .tbss alignment in the
main section sizing loop, but that could leak some of the following
section into the TLS segment. Leakage shouldn't matter since it will
be to bytes past the end of .tdata, but for now this is a safer
option.
PR ld/19264
* ldlang.c (lang_size_sections): Don't ignore .tbss when
adjusting start of relro region.
bfd/
* elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output
section to bfd_abs_section_ptr if the stub is discarded.
ld/testsuite/
* ld-mips-elf/mips16-fp-stub-1.s: New.
* ld-mips-elf/mips16-fp-stub-2.s: New.
* ld-mips-elf/mips16-fp-stub.d: New.
* ld-mips-elf/mips-elf.exp: Run new tests.
* ld-mips-elf/mips16-intermix.d: Update expected output.
https://sourceware.org/ml/binutils/2015-10/msg00137.html
ld * Makefile.am (ALL_64_EMULATION_SOURCES): Add support for
CloudABI on aarch64. For this target we have to make sure we use
ELFOSABI_CLOUDABI instead of ELFOSABI_NONE.
* configure.tgt (targ_emul): Likewise.
* emulparams/aarch64cloudabi.sh: New file.
* emulparams/aarch64cloudabib.sh: New file.
* Makefile.in: Regenerate.
bfd * config.bfd (targ_defvec): Add support for CloudABI on aarch64.
For this target we have to make sure we use ELFOSABI_CLOUDABI
instead of ELFOSABI_NONE.
* configure.ac (tb): Likewise.
* elfnn-aarch64.c: Likewise.
* targets.c (_bfd_target_vector): Likewise.
* configure: Regenerate.
gas * config/tc-aarch64.c (elf64_aarch64_target_format): Select the
cloudabi format if the TARGET_OS is cloudabi.
PR ld/19146
* lexsup.c (parse_args): Correct error message for an option that
is missing its argument if that option is the last one on the
command line.
The last patch missed handling the case where the ideal place to put
an orphan was after a non-existent output section statement, as can
happen when not using the builtin linker scripts. This patch uses the
updated flags for that case too, and extends the support to mmo and pe.
PR ld/19162
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Pass
updated flags to lang_output_section_find_by_flags.
* emultempl/mmo.em (mmo_place_orphan): Merge flags for any
other input sections that might match a new output section to
decide placement.
* emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
* emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
* ldlang.c (lang_output_section_find_by_flags): Add sec_flags param.
* ldlang.h (lang_output_section_find_by_flags): Update prototype.
If given input sections with differing flags, we'd like to place the
section according to the final output section flags.
bfd/
PR ld/19162
* elflink.c (_bfd_elf_gc_mark_reloc): Move code iterating over
linker input bfds..
* section.c (bfd_get_next_section_by_name): ..to here. Add ibfd param.
(bfd_get_linker_section): Adjust bfd_get_next_section_by_name call.
* tekhex.c (first_phase): Likewise.
* elflink.c (bfd_elf_gc_sections): Likewise.
* bfd-in2.h: Regenerate.
ld/
PR ld/19162
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Check flags
before calling _bfd_elf_match_sections_by_type. Merge flags for
any other input sections that might match a new output section to
decide placement.
bfd * bfd-in2.h: Regenerate.
* bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how
STM32L4XX instruction scanning should be done.
(bfd_elf32_arm_set_stm32l4xx_fix)
(bfd_elf32_arm_stm32l4xx_erratum_scan)
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes.
(bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument
to prototype.
* elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME)
(STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros.
(elf32_stm32l4xx_erratum_type): New enum.
(elf32_stm32l4xx_erratum_list): New struct. List of veneers or
jumps to veneers.
(_arm_elf_section_data): Add stm32l4xx_erratumcount,
stm32l4xx_erratumlist.
(elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size,
stm32l4xx_fix and num_stm32l4xx_fixes fields.
(ctz): New function.
(popcount): New function.
(elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix.
(put_thumb2_insn): New function.
(STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for
LDM instructions.
(STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for
VLDM instructions.
(bfd_elf32_arm_allocate_interworking_sections): Initialise erratum
glue section.
(record_stm32l4xx_erratum_veneer) : New function. Create a single
veneer, and its associated symbols.
(bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue.
(bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of
erratum workaround required.
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find
out where veneers and branches to veneers have been placed in
virtual memory after layout.
(is_thumb2_ldmia): New function.
(is_thumb2_ldmdb): Likewise.
(is_thumb2_vldm ): Likewise.
(stm32l4xx_need_create_replacing_stub): New function. Decide if a
veneer must be emitted.
(bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an
input BFD for potential erratum-triggering insns. Record results.
(bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in
global hash table.
(elf32_arm_size_dynamic_sections): Collect glue information.
(create_instruction_branch_absolute): New function.
(create_instruction_ldmia): Likewise.
(create_instruction_ldmdb): Likewise.
(create_instruction_mov): Likewise.
(create_instruction_sub): Likewise.
(create_instruction_vldmia): Likewise.
(create_instruction_vldmdb): Likewise.
(create_instruction_udf_w): Likewise.
(create_instruction_udf): Likewise.
(push_thumb2_insn32): Likewise.
(push_thumb2_insn16): Likewise.
(stm32l4xx_fill_stub_udf): Likewise.
(stm32l4xx_create_replacing_stub_ldmia): New function. Expands the
replacing stub for ldmia instructions.
(stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb.
(stm32l4xx_create_replacing_stub_vldm): Likewise for vldm.
(stm32l4xx_create_replacing_stub): New function. Dispatches the
stub emission to the appropriate functions.
(elf32_arm_write_section): Output veneers, and branches to veneers.
ld * ld.texinfo: Description of the STM32L4xx erratum workaround.
* emultempl/armelf.em (stm32l4xx_fix): New.
(arm_elf_before_allocation): Choose the type of fix, scan for
erratum.
(gld${EMULATION_NAME}_finish): Fix veneer locations.
(arm_elf_create_output_section_statements): Propagate
stm32l4xx_fix value.
(PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX.
(PARSE_AND_LIST_LONGOPTS): Add entry for handling
--fix-stm32l4xx-629360.
(PARSE_AND_LIST_OPTION): Add entry for helping on
--fix-stm32l4xx-629360.
(PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX.
tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX
tests.
* ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New.
* ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise.
* ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise.
* ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise.
* ld-arm/stm32l4xx-fix-all.d: Likewise.
* ld-arm/stm32l4xx-fix-all.s: Likewise.
* ld-arm/stm32l4xx-fix-it-block.d: Likewise.
* ld-arm/stm32l4xx-fix-it-block.s: Likewise.
* ld-arm/stm32l4xx-fix-ldm.d: Likewise.
* ld-arm/stm32l4xx-fix-ldm.s: Likewise.
* ld-arm/stm32l4xx-fix-vldm.d: Likewise.
* ld-arm/stm32l4xx-fix-vldm.s: Likewise.
Makes these symbols defined before bfd_elf_size_dynamic_sections, to
avoid horrible hacks elsewhere. The exp_fold_tree undefweak change
is necessary to define undefweak symbols early too. The comment was
wrong. PROVIDE in fact defines undefweak symbols, via
bfd_elf_record_link_assignment.
PR ld/19175
* ldlang.c (lang_insert_orphan): Evaluate __start_* and __stop_*
symbol PROVIDE expressions.
* ldexp.c (exp_fold_tree_1 <etree_provide>): Define undefweak
references.
Symbol symbol defined by an assignment in a linker script has type
bfd_link_hash_new. elf_i386_convert_load and elf_x86_64_convert_load
should check bfd_link_hash_new to see if a symbol is defined by a linker
script.
bfd/
PR ld/19175
* elf32-i386.c (elf_i386_convert_load): Check bfd_link_hash_new
instead of calling bfd_link_get_defined_symbol.
* elf64-x86-64.c (elf_x86_64_convert_load): Likewise. Skip
relocation overflow for bfd_link_hash_new.
* linker.c (bfd_link_get_defined_symbol): Removed.
* bfd-in2.h: Regenerated.
ld/testsuite/
PR ld/19175
* ld-i386/i386.exp: Run pr19175.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pr19175.d: New file.
* ld-i386/pr19175.s: Likewise.
* ld-i386/pr19175.t: Likewise.
* ld-x86-64/pr19175.d: Likewise.
* ld-x86-64/pr19175.s: Likewise.
* ld-x86-64/pr19175.t: Likewise.
Since __start_XXX and __stop_XXX symbols aren't defined when address
load is being converted, we need to check if there is an XXX output
section to get their section and value. This patch adds a new function,
bfd_link_get_defined_symbol, to search for the XXX output section to
check if __start_XXX and __stop_XXX symbols are defined.
bfd/
PR ld/19171
* elf32-i386.c (elf_i386_convert_load): Call
bfd_link_get_defined_symbol to check if a symbol is defined.
* elf64-x86-64.c (elf_x86_64_convert_load): Call
bfd_link_get_defined_symbol to get defined symbol section and
value.
* linker.c (bfd_link_get_defined_symbol): New function.
* bfd-in2.h: Regenerated.
ld/testsuite/
PR ld/19171
* ld-i386/lea1.s: Add tests for address load of __start_XXX
and __stop_XXX.
* ld-i386/mov1.s: Likewise.
* ld-x86-64/lea1.s: Likewise.
* ld-x86-64/mov1.s: Likewise.
* ld-i386/lea1a.d: Updated.
* ld-i386/lea1b.d: Likewise.
* ld-i386/lea1c.d: Likewise.
* ld-i386/mov1a.d: Likewise.
* ld-i386/mov1b.d: Likewise.
* ld-x86-64/lea1a.d: Likewise.
* ld-x86-64/lea1b.d: Likewise.
* ld-x86-64/lea1c.d: Likewise.
* ld-x86-64/lea1d.d: Likewise.
* ld-x86-64/lea1e.d: Likewise.
* ld-x86-64/lea1f.d: Likewise.
* ld-x86-64/mov1a.d: Likewise.
* ld-x86-64/mov1b.d: Likewise.
* ld-x86-64/mov1c.d: Likewise.
* ld-x86-64/mov1d.d: Likewise.
SEC_KEEP check in elf_gc_sweep was missing in commit:
commit bde6f3eb6d
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Fri Jan 8 01:43:23 2010 +0000
Set SEC_KEEP on section XXX for undefined __start_XXX/__stop_XXX
bfd/
2010-01-07 H.J. Lu <hongjiu.lu@intel.com>
PR ld/11133
* elflink.c (_bfd_elf_gc_mark_hook): Check section XXX for
undefined __start_XXX/__stop_XXX in all input files and set
SEC_KEEP.
This patch adds SEC_KEEP check to elf_gc_sweep.
bfd/
PR ld/19161
* elflink.c (elf_gc_sweep): Always keep sections marked with
SEC_KEEP.
ld/testsuite/
PR ld/19161
* ld-gc/gc.exp: Run pr19161 test.
* ld-gc/pr19161-1.c: New file.
* ld-gc/pr19161-2.c: Likewise.
* ld-gc/pr19161.d: Likewise.
This patch adds support for the R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX relocations proposed in
https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0
to gas and ld. It updates gas to generate R_X86_64_GOTPCRELX,
R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory
operand, foo@GOTPCREL(%rip). With the locally defined symbol, foo, we
convert
mov foo@GOTPCREL(%rip), %reg
to
lea foo(%rip), %reg
and convert
call/jmp *foo@GOTPCREL(%rip)
to
nop call foo/jmp foo nop
When PIC is false, convert
test %reg, foo@GOTPCREL(%rip)
to
test $foo, %reg
and convert
binop foo@GOTPCREL(%rip), %reg
to
binop $foo, %reg
where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.
bfd/
* elf64-x86-64.c: Include opcode/i386.h.
(x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX.
(R_X86_64_standard): Replace R_X86_64_PLT32_BND with
R_X86_64_REX_GOTPCRELX.
(x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and
BFD_RELOC_X86_64_REX_GOTPCRELX.
(need_convert_mov_to_lea): Renamed to ...
(need_convert_load): This.
(elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX. Replace need_convert_mov_to_lea with
need_convert_load.
(elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX.
(elf_x86_64_size_dynamic_sections): Likewise.
(elf_x86_64_relocate_section): Likewise.
(elf_x86_64_convert_mov_to_lea): Renamed to ...
(elf_x86_64_convert_load): This. Replace need_convert_mov_to_lea
with need_convert_load. Support R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX transformations.
* reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New.
(BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX.
(tc_gen_reloc): Likewise.
(i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or
BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set.
* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return
true for BFD_RELOC_X86_64_GOTPCRELX and
BFD_RELOC_X86_64_REX_GOTPCRELX.
gas/testsuite/
* gas/i386/i386.exp: Run x86-64-gotpcrel.
* gas/i386/x86-64-gotpcrel.d: New file.
* gas/i386/x86-64-gotpcrel.s: Likewise.
* gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
* gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with
R_X86_64_REX_GOTPCRELX.
* gas/i386/ilp32/x86-64-localpic.d: Likewise.
include/elf/
* x86-64.h (R_X86_64_GOTPCRELX): New.
(R_X86_64_REX_GOTPCRELX): Likewise.
ld/testsuite/
* ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL
with R_X86_64_REX_GOTPCRELX.
* ld-x86-64/plt-main1.rd: Likewise.
* ld-x86-64/plt-main3.rd: Likewise.
* ld-x86-64/plt-main4.rd: Likewise.
* ld-x86-64/gotpcrel1.dd: New file.
* ld-x86-64/gotpcrel1.out: Likewise.
* ld-x86-64/gotpcrel1a.S: Likewise.
* ld-x86-64/gotpcrel1b.c: Likewise.
* ld-x86-64/gotpcrel1c.c: Likewise.
* ld-x86-64/gotpcrel1d.S: Likewise.
* ld-x86-64/load1.s: Likewise.
* ld-x86-64/load1a.d: Likewise.
* ld-x86-64/load1b.d: Likewise.
* ld-x86-64/load1c.d: Likewise.
* ld-x86-64/load1d.d: Likewise.
* ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d
tests. Run gotpcrel1 test.
This patch adds support for the R_386_GOT32X relocation proposed in
https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I
to gas and ld. It updates gas to generate R_386_GOT32X relocation for
memory operand, foo@GOT[(%reg)]. We must encode "mov foo@GOT, %eax"
with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be
transformed to "lea foo, %eax". With the locally defined symbol, foo,
we convert
mov foo@GOT[(%reg1)], %reg2
to
lea foo[@GOTOFF(%reg1)], %reg2
and convert
call/jmp *foo@GOT[(%reg)]
to
nop call foo/jmp foo nop
When PIC is false, convert
test %reg1, foo@GOT[(%reg2)]
to
test $foo, %reg1
and convert
binop foo@GOT[(%reg1)], %reg2
to
binop $foo, %reg2
where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.
bfd/
* elf32-i386.c: Include opcode/i386.h.
(elf_howto_table): Add R_386_GOT32X.
(R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X.
(elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X.
(need_convert_mov_to_lea): Renamed to ...
(need_convert_load): This.
(elf_i386_check_relocs): Handle R_386_GOT32X. Replace
need_convert_mov_to_lea with need_convert_load.
(elf_i386_gc_sweep_hook): Handle R_386_GOT32X.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Likewise.
(elf_i386_convert_mov_to_lea): Renamed to ...
(elf_i386_convert_load): This. Replace need_convert_mov_to_lea
with need_convert_load. Support R_386_GOT32X transformations.
* reloc.c (BFD_RELOC_386_GOT32X): New.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_GOT32X.
(tc_gen_reloc): Likewise.
(match_template): Force 0x8b encoding for "mov foo@GOT, %eax".
(output_disp): Check for "call/jmp *mem", "mov mem, %reg",
"test %reg, mem" and "binop mem, %reg" where binop is one of
adc, add, and, cmp, or, sbb, sub, xor instructions. Set
fx_tcbit if the REX prefix is generated. Set fx_tcbit2 if
BFD_RELOC_386_GOT32X should be generated.
(i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2
is set.
gas/testsuite/
* gas/i386/got.d: New file.
* gas/i386/got.s: Likewise.
* gas/i386/i386.exp: Run got.
* gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X.
* gas/i386/mixed-mode-reloc32.d: Likewise.
* gas/i386/reloc32.d: Likewise.
include/elf/
* i386.h (R_386_GOT32X): New relocation.
ld/testsuite/
* ld-i386/branch1.d: New file.
* ld-i386/branch1.s: Likewise.
* ld-i386/call1.d: Likewise.
* ld-i386/call1.s: Likewise.
* ld-i386/call2.d: Likewise.
* ld-i386/call2.s: Likewise.
* ld-i386/got1.dd: Likewise.
* ld-i386/got1.out: Likewise.
* ld-i386/got1a.S: Likewise.
* ld-i386/got1b.c: Likewise.
* ld-i386/got1c.c: Likewise.
* ld-i386/got1d.S: Likewise.
* ld-i386/jmp1.d: Likewise.
* ld-i386/jmp1.s: Likewise.
* ld-i386/jmp2.d: Likewise.
* ld-i386/jmp2.s: Likewise.
* ld-i386/load1.d: Likewise.
* ld-i386/load1.s: Likewise.
* ld-i386/load2.d: Likewise.
* ld-i386/load2.s: Likewise.
* ld-i386/load3.d: Likewise.
* ld-i386/load3.s: Likewise.
* ld-i386/load4.s: Likewise.
* ld-i386/load4a.d: Likewise.
* ld-i386/load4b.d: Likewise.
* ld-i386/load5.s: Likewise.
* ld-i386/load5a.d: Likewise.
* ld-i386/load5b.d: Likewise.
* ld-i386/load6.d: Likewise.
* ld-i386/load6.s: Likewise.
* ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2,
load1, load2, load3, load4a, load4b, load5a, load5b and load6
tests. Run got1 test.
PR gas/19109
. * configure.ac: Note the 'none' is an acceptable argument to
--enable-compressed-debug-sections.
* configure: Regenerate.
gas * configure.ac: Restore --enable-compressed-debug-sections.
Do not enable compressed debug sections by default for x86 Linux
targets.
* configure: Regenerate.
ld * configure.ac: Add --enable-compressed-debug-sections.
* configure: Regenerate.
* config.in: Regenerate.
* ld.texinfo: Document how to determine the default action for
debug sections.
* ldmain.c (main): If DEFAULT_FLAG_COMPRESS_DEBUG is defined then
set the compress_debug field of the link_info structure to
zlib-gabi.
* lexsup.c (elf_static_list_options): Output the default setting
for the --compress-debug-sections option.
* NEWS: Mention the new configure option.
There is no need to check def_regular when converting mov to lea for
loading address of local symbols since def_regular may be false for
common symbols and SYMBOL_REFERENCES_LOCAL is sufficient.
bfd/
* elf32-i386.c (elf_i386_convert_mov_to_lea): Don't check
def_regular.
* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Likewise.
ld/testsuite/
* ld-i386/lea1.s: Add a test for loading address of local common
symbol.
* ld-x86-64/lea1.s: Likewise.
* ld-i386/lea1a.d: Updated.
* ld-i386/lea1b.d: Likewise.
* ld-i386/lea1c.d: Likewise.
* ld-x86-64/lea1a.d: Likewise.
* ld-x86-64/lea1b.d: Likewise.
* ld-x86-64/lea1c.d: Likewise.
* ld-x86-64/lea1d.d: Likewise.
* ld-x86-64/lea1e.d: Likewise.
* ld-x86-64/lea1f.d: Likewise.
Run the test for more than just ELF. Shows that objcopy --extract-symbol
isn't working on PE, mips, mmix and some aout targets.
* config/default.exp (size): New global.
* ld-elf/extract-symbol-1.s,
* ld-elf/extract-symbol-1.ld,
* ld-elf/extract-symbol-1sec.d,
* ld-elf/extract-symbol-1sym.d: Delete.
* ld-scripts/script.exp (extract_symbol_test): New.
We may see an unversioned definition after the default version. We
should skip the unversioned definition in this case.
bfd/
PR ld/19073
* elflink.c (_bfd_elf_add_default_symbol): Skip the unversioned
definition after the default version.
ld/testsuite/
PR ld/19073
* ld-elf/pr19073.map: New file.
* ld-elf/pr19073.rd: Likewise.
* ld-elf/pr19073.s: Likewise.
* ld-elf/shared.exp (build_tests): Add tests for PR ld/19073.
For ELF linker, a common symbol isn't a definition. When we decide if a
symbol should be re-exported, we should check if the symbol isn't
undefined, not if it is a definition.
bfd/
PR ld/18914
* elflink.c (elf_link_add_object_symbols): Don't re-export a
symbol if it isn't undefined.
ld/testsuite/
PR ld/18914
* ld-elf/exclude.exp: Also check exclude_common.
* ld-elf/exclude2.s: Add exclude_common.
bfd/
2015-10-02 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Add
TLSIE_MOVW_GOTTPREL_G1.
(aarch64_tls_transition_without_check): Add
TLSIE_MOVW_GOTTPREL_G1 to TLSLE_MOVW_TPREL_G2
transition for local symbol.
(elfNN_aarch64_tls_relax): Add a argument to pass tp offset.
Add TLSIE_MOVW_GOTTPREL_G1 relaxation.
(elfNN_aarch64_relocate_section): Call elfNN_aarch64_tls_relax
with new argument.
ld/testsuite/
2015-10-02 Renlin Li <renlin.li@arm.com>
* ld-aarch64/aarch64-elf.exp (tls-relax-large-le-ie): Run new test.
* ld-aarch64/tls-relax-large-ie-le.d: New.
* ld-aarch64/tls-relax-large-ie-le.s: New.
bfd/
2015-10-02 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC):
Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1.
(aarch64_tls_transition_without_check): Likewise
(elfNN_aarch64_tls_relax): Likwise.
ld/testsuite/
2015-10-02 Renlin Li <renlin.li@arm.com>
* ld-aarch64/aarch64-elf.exp: run new test
* ld-aarch64/tls-relax-large-gd-ie.d: New.
* ld-aarch64/tls-relax-large-gd-ie.s: New.
* ld-aarch64/tls-relax-large-gd-le.d: New.
* ld-aarch64/tls-relax-large-gd-le.s: New.
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.
bfd/
PR ld/19031
* elf64-x86-64.c (elf_x86_64_check_relocs): Set
pointer_equality_needed for R_X86_64_PC32 reloc in non-code
sections.
ld/testsuite/
PR ld/19031
* ld-x86-64/x86-64.exp: Run PR ld/19031 test.
* ld-x86-64/pr19031.out: New file.
* ld-x86-64/pr19031a.c: Likewise.
* ld-x86-64/pr19031b.S: Likewise.
* ld-x86-64/pr19031c.c: Likewise.
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.
bfd/
PR ld/19031
* elf32-i386.c (elf_i386_check_relocs): Set
pointer_equality_needed for R_386_PC32 reloc in non-code
sections.
ld/testsuite/
PR ld/19031
* ld-i386/i386.exp: Run PR ld/19031 test.
* ld/testsuite/ld-i386/pr19031.out: New file.
* ld/testsuite/ld-i386/pr19031a.c: Likewise.
* ld/testsuite/ld-i386/pr19031b.S: Likewise.
* ld/testsuite/ld-i386/pr19031c.c: Likewise.
When we check consistency for merge ELF sections, we should not only
check EI_CLASS, but also compatible e_machine.
bfd/
PR ld/19013
* elflink.c (_bfd_elf_merge_sections): Only merge input bfds
that have the compatible ELF machine code with the output bfd.
ld/testsuite/
PR ld/19013
* ld-x86-64/pr19013-nacl.d: New file.
* ld-x86-64/pr19013-x32.d: Likewise.
* ld-x86-64/pr19013.d: Likewise.
* ld-x86-64/pr19013.s: Likewise.
* ld-x86-64/x86-64.exp: Run PR ld/19013 tests.
In objcopy, copy_object calls copy_section to copy contents of input
section to output section. When --gap-fill= is used, objcopy extends
the size of output sectios to fill gaps between output sections with
gap fills. In this case, we adjust the output section size to skip
gap files to avoid reading beypond the input section buffer before
calling copy_section and restore the output section size after input
sections have been copied.
binutils/
PR binutils/19005
* objcopy.c (copy_object): Adjust the output section size to
skip gap fills between sections when copying from input sections
to output sections.
ld/testsuite/
PR binutils/19005
* ld-elf/pr19005.d: New file.
* ld-elf/pr19005.s: Likewise.
* ld-elf/pr19005.t: Likewise.
