Commit graph

65 commits

Author SHA1 Message Date
Andrew Cagney
63fe2cc799 Fix typo, WITH_TARGET_WORD_BITSIZE not WITH_TARGET_BITSIZE. 1997-10-02 23:37:30 +00:00
Andrew Cagney
af51b8d56d Add/use SIM_AC_OPTION_BITSIZE. 1997-09-25 07:19:05 +00:00
Andrew Cagney
92f91d1ff0 Remove need to update <targ>/Makefile.in when adding optional options
to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
1997-09-23 01:25:26 +00:00
Andrew Cagney
794e9ac96a Simplify logic behind the generic configuration option --enable-sim-alignment. 1997-09-22 02:49:57 +00:00
Andrew Cagney
b45caf050c Add support for --enable-sim-alignment to simulator common aclocal.m4
Add support for --alignment={strict,nonstrict,forced} to simulator common
run-time options.
For v850 use, make the default NONSTRICT_ALIGNMENT.
1997-09-22 00:24:46 +00:00
Felix Lee
2001e533ff * sim-main.h (kill): macro was missing args.
(SIGTRAP): define for MSVC.
1997-09-17 23:46:49 +00:00
Andrew Cagney
a2ab5e65eb Update to reflect change to sim/common/aclocal.m4 (allow sim/common
directory to specify its own unqiue config.h file).
1997-09-15 08:25:04 +00:00
Andrew Cagney
70c8abdb4c Use updated MSMASK, MSMASKED macros.
Fix sat problem in d30v.
1997-09-08 17:23:16 +00:00
David Edelsohn
6fea47635b * configure: Regenerated to track ../common/aclocal.m4 changes. 1997-09-05 00:42:05 +00:00
Andrew Cagney
6dbaff8f60 Finish implementation of sim-memopt.
Use in d30v and tic80.
Make available a generic sim_read, sim_write implementation.
1997-09-04 10:08:44 +00:00
Andrew Cagney
a34abff813 o Add modulo argument to sim_core_attach
o	Add sim-memopt module - memory option processing.
1997-09-04 03:47:39 +00:00
Andrew Cagney
4b2a6aed84 Use sim_state_alloc to create common sim object. 1997-09-01 03:26:31 +00:00
Andrew Cagney
4113ba4cd7 Passify GCC. 1997-08-30 00:01:12 +00:00
Andrew Cagney
8811705410 Fix doco on enable-sim-inline. 1997-08-27 22:43:18 +00:00
Andrew Cagney
d6fea803dc Add MSBIT* and LSBIT* macro's to sim-bits.h
Add more macro's for extracting sub word quantites to sim-endian.h
1997-08-27 07:56:27 +00:00
Andrew Cagney
fafce69ab1 Add ABFD argument to sim_create_inferior. Document.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
1997-08-27 04:44:41 +00:00
Andrew Cagney
7230ff0faa Flush defunct sim_kill. 1997-08-26 02:05:18 +00:00
Andrew Cagney
247fccdeb5 Add ABFD argument to sim_open call. Pass through to sim_config so
that image properties such as endianness can be checked.

More strongly document the expected behavour of each of the sim_*
interfaces.

Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN.  Use in sim_config.
1997-08-25 23:14:25 +00:00
Mark Alexander
9e61ae7d3c * sim-calls.c (sim_store_register): Allow accumulators
other than A0 to be modified.  Correct error message.
1997-08-09 04:54:08 +00:00
Andrew Cagney
128b51546e Add assembler information to igen input files. 1997-05-30 07:25:13 +00:00
Andrew Cagney
4e95b94e1e Fix subu immed - was incorrectly using unsigned. 1997-05-29 07:25:20 +00:00
Andrew Cagney
2f2e6c5d5b Extend xor-endian and per-cpu support in core module.
Allow negated test when watching value within core.
1997-05-27 06:48:20 +00:00
Andrew Cagney
50a2a69182 Watchpoint interface. 1997-05-21 06:54:13 +00:00
Andrew Cagney
ff82f21409 Part II of adding callback argument to sim_open(). Update all the
other simulators; remove SIM_DESC from depreciated function
sim_set_callbacks().
1997-05-20 01:57:43 +00:00
Andrew Cagney
24aa2b57af Depreciate sim_set_callbacks() function. Set simulator callbacks
during sim_open().
1997-05-20 00:05:27 +00:00
Michael Meissner
8c5b6ead7d Make getpid, kill supported system calls 1997-05-19 23:02:30 +00:00
Andrew Cagney
2e61a3ad9c Graft sim/common event and other code onto the mips simulator. 1997-05-19 13:30:30 +00:00
Andrew Cagney
fd76456bdb Make simulator event-queue manager a bit more signal safe. 1997-05-19 06:55:56 +00:00
Andrew Cagney
f03b093cd3 o Implement generic halt/restart/abort module.
Use in tic80 and d30v simulators.
o	Add signal hook to sim-core module
1997-05-19 03:42:33 +00:00
Andrew Cagney
37a684b84d o Make tic80 insn file more `cache ready'
o	Have igen always zero r0 instead of constantly checking if
	the designated register is r0.
1997-05-16 03:27:40 +00:00
Andrew Cagney
07b4c0a66c Remove some of the flake from the c80 floating point. 1997-05-15 16:39:38 +00:00
Andrew Cagney
aa3a044769 Fix double conversion problem. 1997-05-15 02:21:11 +00:00
Andrew Cagney
2310e3c2b5 Passify gcc's warnings. 1997-05-15 00:14:33 +00:00
Michael Meissner
93555c3b02 Make columns line up for fpu operation tracing 1997-05-14 22:06:45 +00:00
Michael Meissner
1b6f4dde35 Make sure r0 == 0; Return EINVAL for system calls that are defined but not provided; Provide traps 74-79 as debugging traps 1997-05-13 22:04:32 +00:00
Andrew Cagney
8490235019 Remove ANNULed cycle - was confusing gdb. 1997-05-13 13:57:49 +00:00
Michael Meissner
d01082ada2 Fix ld/st tracing 1997-05-12 21:16:26 +00:00
Andrew Cagney
9af5dcea8f Clear cntrl-c after handling it. 1997-05-12 08:33:56 +00:00
Andrew Cagney
c445af5a2b c80 simulator fixes. 1997-05-12 04:57:49 +00:00
Michael Meissner
8ad6078850 Fix endian problems with ld.d/st.d 1997-05-12 02:04:02 +00:00
Michael Meissner
450be2349a Fix shift/lmo insns; Subu does arithmetic unsigned 1997-05-11 14:32:32 +00:00
Michael Meissner
20b2f9bc83 And short immediate instructions use unsigned immediates, not signed. 1997-05-10 16:40:21 +00:00
Michael Meissner
89d1a47805 Fix xor in simulator 1997-05-09 20:16:01 +00:00
Michael Meissner
aaa7b25260 Make cmp produce the correct results 1997-05-09 19:48:52 +00:00
Andrew Cagney
9efd3f7412 Update CIA as well as NIA when a 64bit insn is encountered. 1997-05-09 00:21:13 +00:00
Michael Meissner
c3cad878c9 Really fix the bbo/bbz instructions. 1997-05-08 23:04:22 +00:00
Michael Meissner
1e0e7911a5 reverse bit number for bbo/bbz instructions. 1997-05-08 19:58:20 +00:00
Michael Meissner
53dcd669e5 Fix non-anulled calls so that return address is correct 1997-05-08 18:36:00 +00:00
Michael Meissner
30a05dbd8d Change output format slightly 1997-05-08 16:32:06 +00:00
Michael Meissner
8c3b5af125 Change output format slightly 1997-05-08 16:14:54 +00:00