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Author SHA1 Message Date
Nick Clifton
17e5723725 PR 11297: Add support for 8-bit relocations to the AVR toolchain. 2010-02-23 11:38:36 +00:00
Matthew Gretton-Dann
8a59fff3dd PR 9861 
* gas/config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
	compiler's predefines.
 2010-02-22 10:24:56 +00:00
Matthew Gretton-Dann
cd21e5460f * bfd/elf32-arm.c (elf32_arm_merge_eabi_attributes): Add support for 
merging Tag_DIV_use, Tag_MPextension_use, and
	Tag_MPextension_use_legacy tags.
	* binutils/readelf.c (arm_attr_tag_Advanced_SIMD_arch): Add
	description of newly permitted attribute values.
	(arm_attr_tag_Virtualization_use): Likewise.
	(arm_attr_tag_DIV_use): Add description of new attribute.
	(arm_attr_tag_MPextension_use_legacy): Likewise.
	* gas/config/tc-arm.c (arm_convert_symbolic_attribute):
	Add Tag_DIV_use.
	* gas/doc/c-arm.texi: Likewise.
	* gas/testsuite/gas/arm/attr-order.d: Fix test for new names for
	attribute values.
	* include/elf/arm.h (Tag_MPextension_use): Renumber.
	(Tag_DIV_use): Add.
	(Tag_MPextension_use_legacy): Likewise.
	* ld/testsuite/ld-arm/attr-merge-3.attr: Fix test for new attribute
	values.
	* ld/testsuite/ld-arm/attr-merge-3b.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-unknown-1.d: Fix test now that 42
	is a recognised attribute ID.
	* ld/testsuite/ld-arm/attr-merge-unknown-1.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-6.attr: New test.
	* ld/testsuite/ld-arm/attr-merge-6a.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-6b.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
	* ld/testsuite/ld-arm/attr-merge-7a.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-7b.s: Likewise.
	* ld/testsuite/ld-arm/arm-elf.exp: Run the new tests.
 2010-02-18 10:56:28 +00:00
Daniel Gutson
5be8be5d5d gas/ 
* config/tc-arm.c (asm_opcode): operands type
	change.
	(BAD_PC_ADDRESSING): New macro message.
	(BAD_PC_WRITEBACK): Likewise.
	(MIX_ARM_THUMB_OPERANDS): New macro.
	(operand_parse_code): Added enum values.
	(parse_operands): Added thumb/arm distinction,
	plus new enum values handling.
	(encode_arm_addr_mode_2): Validations enhanced.
	(encode_arm_addr_mode_3): Likewise.
	(do_rm_rd_rn): Likewise.
	(encode_thumb32_addr_mode): Likewise.
	(do_t_ldrex): Likewise.
	(do_t_ldst): Likewise.
	(do_t_strex): Likewise.
	(md_assemble): Call parse_operands with
	a new parameter.
	(OPS_1): New macro.
	(OPS_2): Likewise.
	(OPS_3): Likewise.
	(OPS_4): Likewise.
	(OPS_5): Likewise.
	(OPS_6): Likewise.
	(insns): Updated insns operands.

	gas/testsuite/
	* gas/arm/sp-pc-validations-bad.d: New testcase.
	* gas/arm/sp-pc-validations-bad.l: New file.
	* gas/arm/sp-pc-validations-bad.s: New file.
	* gas/arm/sp-pc-validations-bad-t.d: New testcase.
	* gas/arm/sp-pc-validations-bad-t.l: New file.
	* gas/arm/sp-pc-validations-bad-t.s: New file.
	* gas/arm/sp-pc-usage-t.d: Removed invalid insns.
	* gas/arm/sp-pc-usage-t.s: Likewise.
	* gas/arm/unpredictable.d: Likewise.
	* gas/arm/unpredictable.s: Likewise.
	* gas/arm/thumb2_bcond.d: Added test.
	* gas/arm/thumb2_bcond.s: Likewise.
 2010-02-12 20:15:13 +00:00
Tristan Gingold
9d0e849713 gas/ 
2010-02-12  Tristan Gingold  <gingold@adacore.com>
	    Douglas B Rupp  <rupp@gnat.com>

	* config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
	(DUMMY_RELOC_IA64_SLOTCOUNT): Added.
	(pseudo_func): Add an entry for slotcount.
	(md_begin): Initialize slotcount pseudo symbol.
	(ia64_parse_name): Handle @slotcount parameter.
	(ia64_gen_real_reloc_type): Handle slotcount.
	(md_apply_fix): Ditto.
	* doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.

gas/testsuite/
2010-02-12  Tristan Gingold  <gingold@adacore.com>

	* gas/ia64/slotcount.s, gas/ia64/slotcount.s: New test.
	* gas/ia64/ia64.exp: Add slotcount test (vms only).
 2010-02-12 14:34:45 +00:00
Sterling Augustine
6fa78d941b 2010-02-11 Sterling Augustine <sterling@jaw.hq.tensilica.com> 
* config/tc-xtensa.c (istack_init): Don't call memset.
 2010-02-11 19:08:09 +00:00
Sterling Augustine
a89c407e4b 2010-02-11 Sterling Augustine <sterling@tensilica.com> 
* config/tc-xtensa.c (cache_literal_section): Handle prefixes as
	well as suffixes.
 2010-02-11 19:00:21 +00:00
H.J. Lu
24981e7b95 Reformat build_modrm_byte. 
2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Reformat.
 2010-02-11 14:02:50 +00:00
H.J. Lu
c75ef631bd Update copyright. 
gas/

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c: Update copyright.

opcodes/

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c: Update copyright.
	* i386-gen.c: Likewise.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.
 2010-02-11 13:41:19 +00:00
Sebastian Pop
a683cc34e4 2010-02-10 Quentin Neill <quentin.neill@amd.com> 
Sebastian Pop  <sebastian.pop@amd.com>

gas:
        * config/tc-i386.c (vec_imm4) New operand type.
        (fits_in_imm4): New.
        (VEX_check_operands): New.
        (check_reverse): Call VEX_check_operands.
        (build_modrm_byte): Reintroduce code for 5
        operand insns.  Fix whitespace.

gas/testsuite:
        * gas/i386/x86-64-xop.d: Add vpermil2p[sd] tests.
        * gas/i386/x86-64-xop.s: Likewise.
        * gas/i386/xop.d: Likewise.
        * gas/i386/xop.s: Likewise.

opcodes:
        * i386-dis.c (OP_EX_VexImmW): Reintroduced
        function to handle 5th imm8 operand.
        (PREFIX_VEX_3A48): Added.
        (PREFIX_VEX_3A49): Added.
        (VEX_W_3A48_P_2): Added.
        (VEX_W_3A49_P_2): Added.
        (prefix table): Added entries for PREFIX_VEX_3A48
        and PREFIX_VEX_3A49.
        (vex table): Added entries for VEX_W_3A48_P_2 and
        and VEX_W_3A49_P_2.
        * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
        for Vec_Imm4 operands.
        * i386-opc.h (enum): Added Vec_Imm4.
        (i386_operand_type): Added vec_imm4.
        * i386-opc.tbl: Add entries for vpermilp[ds].
        * i386-init.h: Regenerated.
        * i386-tbl.h: Regenerated.
 2010-02-11 05:06:14 +00:00
Sterling Augustine
3c83b96e24 2010-02-10 Sterling Augustine <sterling@tensilica.com> 
* config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
 2010-02-10 20:18:14 +00:00
Richard Sandiford
cdc51b0748 gas/ 
* config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
	-mpwr6 and -mpwr7.

opcodes/
	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	and "pwr7".  Move "a2" into alphabetical order.
 2010-02-10 19:59:07 +00:00
Sterling Augustine
3a1e9c4a2d 2010-02-09 Sterling Augustine <sterling@tensilica.com> 
* config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
	(next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
	(xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
 2010-02-09 19:36:50 +00:00
Christophe Lyon
486499d044 2010-02-08 Christophe Lyon <christophe.lyon@st.com> 
gas/
	* config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
	non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
	BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
	BFD_RELOC_ARM_PCREL_CALL)

	gas/testsuite/
	* gas/arm/branch-reloc.s, gas/arm/branch-reloc.d,
	gas/arm/branch-reloc.l: New tests and expected results with all
	variants of call: ARM/Thumb, local/global, inter/intra-section,
	using BL/BLX.
 2010-02-09 14:44:50 +00:00
Sterling Augustine
19ef5f3d6d 2010-02-08 Sterling Augustine <sterling@tensilica.com> 
* config/tc-xtensa.c (frag_format_size): Generalize logic to
	handle more instruction	sizes and fetch widths.
	(branch_align_power): Likewise.
	(text_align_power): Likewise.
	(bytes_to_stretch): Likewise.
 2010-02-08 18:45:05 +00:00
Alan Modra
ce3d2015b2 include/ 
* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
bfd/
	* archures.c (bfd_mach_ppc_titan): Define.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add titan entry.
opcodes/
	* ppc-dis.c (ppc_opts): Add titan entry.
	* ppc-opc.c (TITAN, MULHW): Define.
	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
gas/
	* config/tc-ppc.c (md_show_usage): Mention -mtitan.  Don't use tabs.
	(ppc_mach): Handle titan.
	* doc/c-ppc.texi: Mention -mtitan.
gas/testsuite/
	* gas/ppc/titan.d, * gas/ppc/titan.s: New test.
	* gas/ppc/ppc.exp: Run it.
 2010-02-08 01:59:38 +00:00
Sterling Augustine
1beeb6866d 10-02-05 Sterling Augustine <sterling@tensilica.com> 
* config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
	replace with...
	(xtensa_fetch_width) ...this.
 2010-02-05 18:52:27 +00:00
Sebastian Pop
68339fdf88 2010-02-03 Quentin Neill <quentin.neill@amd.com> 
gas/
	* config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
	(i386_align_code): Rename  PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
	* config/tc-i386.h (processor_type): Same.
	* doc/c-i386.texi: Change amdfam15 to bdver1.

opcodes/
	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	to CPU_BDVER1_FLAGS
	* i386-init.h: Regenerated.

testsuite/
	* gas/i386/i386.exp: Rename amdfam15 test cases to bdver1.
	* gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to
	gas/i386/x86-64-nops-1-bdver1.d.
	* gas/i386/nops-1-amdfam15.d: Renamed test case to
	gas/i386/nops-1-bdver1.d.
 2010-02-03 20:36:14 +00:00
Nick Clifton
99b253c514 PR 11136 
* config/tc-arm.c (neon_check_type): Handle a neon_shape value of
        NS_NULL.
        * gas/arm/neon-omit.s: Add instruction that causes crash.
        * gas/arm/neon-omit.d: Add expected disassembly.
 2010-01-29 16:02:41 +00:00
Dave Korn
31907d5e90 gas/ChangeLog: 
* NEWS: Mention new feature.
	* config/obj-coff.c (obj_coff_section): Accept digits and use
	to override default section alignment power if specified.
	* doc/as.texinfo (.section directive): Update documentation.

gas/testsuite/ChangeLog:

	* gas/pe/section-align-1.s: New test source file.
	* gas/pe/section-align-1.d: Likewise control script.
	* gas/pe/section-align-2.s: Likewise ...
	* gas/pe/section-align-2.d: ... and likewise.
	* gas/pe/pe.exp: Invoke new testcases.
 2010-01-27 22:01:38 +00:00
H.J. Lu
539f890d01 Allow VL=1 on AVX scalar instructions. 
gas/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (avxscalar): New.
	(OPTION_MAVXSCALAR): Likewise.
	(build_vex_prefix): Select vector_length for scalar instructions
	based on avxscalar.
	(md_longopts): Add OPTION_MAVXSCALAR.
	(md_parse_option): Handle OPTION_MAVXSCALAR.
	(md_show_usage): Add -mavxscalar=.

	* doc/c-i386.texi: Document -mavxscalar=.

gas/testsuite/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/avx-scalar-intel.d: New.
	* gas/i386/avx-scalar.d: Likewise.
	* gas/i386/avx-scalar.s: Likewise.
	* gas/i386/x86-64-avx-scalar-intel.d: Likewise.
	* gas/i386/x86-64-avx-scalar.d: Likewise.
	* gas/i386/x86-64-avx-scalar.s: Likewise.

	* gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel,
	x86-64-avx-scalar and x86-64-avx-scalar-intel.

opcodes/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (XMScalar): New.
	(EXdScalar): Likewise.
	(EXqScalar): Likewise.
	(EXqScalarS): Likewise.
	(VexScalar): Likewise.
	(EXdVexScalarS): Likewise.
	(EXqVexScalarS): Likewise.
	(XMVexScalar): Likewise.
	(scalar_mode): Likewise.
	(d_scalar_mode): Likewise.
	(d_scalar_swap_mode): Likewise.
	(q_scalar_mode): Likewise.
	(q_scalar_swap_mode): Likewise.
	(vex_scalar_mode): Likewise.
	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	q_scalar_mode, q_scalar_swap_mode.
	(OP_XMM): Handle scalar_mode.
	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	and q_scalar_swap_mode.
	(OP_VEX): Handle vex_scalar_mode.
 2010-01-27 14:34:40 +00:00
H.J. Lu
80de6e001d Set the first 3byte VEX prefix individually. 
2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
	0xc4 individually.
 2010-01-24 15:44:05 +00:00
Richard Sandiford
c865e45b1b bfd/ 
* coff-rs6000.c (xcoff_howto_table): Change size to 0 and bitsize to 1.
	(_bfd_xcoff_reloc_type_lookup): Handle BFD_RELOC_NONE.
	* coff64-rs6000.c (xcoff64_howto_table): Change size to 0 and
	bitsize to 1.
	(xcoff64_reloc_type_lookup): Handle BFD_RELOC_NONE.

gas/
	* write.h (fix_at_start): Declare.
	* write.c (fix_new_internal): Add at_beginning parameter.
	Use it instead of REVERSE_SORT_RELOCS.  Fix the handling of
	seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
	(fix_new, fix_new_exp): Update accordingly.
	(fix_at_start): New function.
	* config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
	(ppc_ref): New function, for OBJ_XCOFF.
	(md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
	* config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.

gas/testsuite/
	* gas/ppc/xcoff-ref-1.s, gas/ppc/xcoff-ref-1.l: New test.
	* gas/ppc/aix.exp: Run it.


ld/testsuite/
	* ld-powerpc/aix-ref-1-32.od, ld-powerpc/aix-ref-1-64.od,
	ld-powerpc/aix-ref-1.s: New tests.
	* ld-powerpc/aix52.exp: Run them.
 2010-01-23 12:05:33 +00:00
Rainer Orth
53e5c8fee6 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only 
on 64-bit Solaris/x86.
	Include obj-format.h earlier.
 2010-01-21 20:58:34 +00:00
Andreas Krebbel
55786da2bf 2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* readelf.c (get_machine_flags): Handle EF_S390_HIGH_GPRS.

2010-01-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390.h (EF_S390_HIGH_GPRS): Added macro definition.

2010-01-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/tc-s390.c (s390_elf_final_processing): New function.
	* config/tc-s390.h (elf_tc_final_processing): New macro definition.
	(s390_elf_final_processing): Added prototype.

2010-01-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* elf32-s390.c (elf32_s390_merge_private_bfd_data): New function.
	(bfd_elf32_bfd_merge_private_bfd_data): New macro definition.
 2010-01-21 11:40:28 +00:00
Tristan Gingold
37a1f2771f 2010-01-18 Tristan Gingold <gingold@adacore.com> 
* config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
 2010-01-19 09:14:54 +00:00
Sebastian Pop
a6461c0251 2010-01-15 Sebastian Pop <sebastian.pop@amd.com> 
gas/
	* config/tc-i386.c (md_assemble): Before accessing the IMM field
	check that it's not an XOP insn.

gas/testsuite/
	* gas/i386/x86-64-xop.d: Add missing patterns.
	* gas/i386/x86-64-xop.s: Same.
	* gas/i386/xop.d: Same.
	* gas/i386/xop.s: Same.

opcodes/
	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	* i386-tbl.h: Regenerated.
 2010-01-15 21:24:13 +00:00
Jie Zhang
62fb9fe1fc * config/bfin-aux.h: Remove argument names in function 
declarations.
	* config/bfin-lex.l (parse_int): Fix shadowed variable name
	warning.
	* config/bfin-parse.y (value_match): Remove argument names
	in declaration.
	(notethat): Likewise.
	(yyerror): Likewise.
 2010-01-14 04:52:57 +00:00
Daniel Jacobowitz
afa62d5e34 gas/ 
* config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.

	gas/testsuite/
	* gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test.
	* gas/arm/relax_branch_align.d: Expect a default NOP instruction.
	* gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with
	Thumb-2.

	ld/testsuite/
	* ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with
	-mcpu=cortex-a8.
 2010-01-13 19:01:10 +00:00
Nick Clifton
52b010e442 * config/tc-h8300.c (h8300_elf_section): New function - issue a 
warning message if a new section is created without setting any
        attributes for it.
        (md_pseudo_table): Intercept section creation pseudos.
        (md_pcrel_from): Replace abort with an error message.
        * config/obj-elf.c (obj_elf_section_name): Export this function.
        * config/obj-elf.h (obj_elf_section_name): Prototype.

        * gas/elf/section0.d: Skip this test for the h8300.
        * gas/elf/section1.d: Likewise.
        * gas/elf/section6.d: Likewise.
        * gas/elf/elf.exp: Skip section2 and section5 tests when the
        target is the h8300.

        * ld-scrips/sort.exp: Skip these tests when the target is the
        h8300.
 2010-01-13 14:08:54 +00:00
Sebastian Pop
69dd98654a 2010-01-06 Quentin Neill <quentin.neill@amd.com> 
gas/
       * config/tc-i386.c (cpu_arch): Add amdfam15.
         (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
       * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
       * doc/c-i386.texi: Add amdfam15.

opcodes/
       * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
       * i386-init.h: Regenerated.

testsuite/
       * gas/i386/i386.exp: Add new amdfam15 test cases.
       * gas/i386/nops-1-amdfam15.d: New.
 2010-01-06 22:52:47 +00:00
Nick Clifton
e3e535bc58 * arm-dis.c (print_insn): Fixed search for next 
symbol and data dumping condition, and the
    initial mapping symbol state.

    * gas/arm/dis-data.d: New test case.
    * gas/arm/dis-data.s: New file.
 2010-01-06 15:02:45 +00:00
Daniel Gutson
4316f0d240 2010-01-04 Daniel Gutson <dgutson@codesourcery.com> 
gas/
        * config/tc-arm.c (do_neon_logic): Accept imm value
        in the third operand too.
        (operand_parse_code): OP_RNDQ_IMVNb renamed to
        OP_RNDQ_Ibig.
        (parse_operands): OP_NILO case removed, applied renaming.
        (insns): Neon shape changed for some logic instructions.

        gas/testsuite/
        * gas/arm/neon-logic.d: New test case.
        * gas/arm/neon-logic.s: New file.
 2010-01-04 23:31:04 +00:00
Daniel Gutson
b1a769ed35 2010-01-04 Daniel Gutson <dgutson@codesourcery.com> 
gas/
    * config/tc-arm.c (do_neon_ldx_stx): Added
    validation for vector load/store insns.

    gas/testsuite/
    * gas/arm/neon-addressing-bad.d: New test case.
    * gas/arm/neon-addressing-bad.s: New file.
    * gas/arm/neon-addressing-bad.l: New file.
 2010-01-04 22:19:03 +00:00
Alan Modra
0dc9305793 bfd/ 
* archures.c: Add bfd_mach_ppc_e500mc64.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add entry for
	bfd_mach_ppc_e500mc64.
gas/
	* config/tc-ppc.c (md_show_usage): Document -me500mc64.
opcodes/
	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 2010-01-04 02:32:56 +00:00
Daniel Gutson
88714cb802 2010-01-03 Daniel Gutson <dgutson@codesourcery.com> 
gas/
    * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
    (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
    (NEON_ENCODE): New macro.
    (check_neon_suffixes): New macro.
    (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
    (do_vfp_nsyn_opcode): Likewise.
    (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
    (do_vfp_nsyn_cmp): Likewise.
    (do_neon_shl_imm): Likewise.
    (do_neon_qshl_imm): Likewise.
    (neon_dyadic_misc): Likewise.
    (do_neon_mac_maybe_scalar): Likewise.
    (do_neon_qdmulh): Likewise.
    (do_neon_qmovn): Likewise.
    (do_neon_qmovun): Likewise.
    (do_neon_movn): Likewise.
    (neon_mac_reg_scalar_long): Likewise.
    (do_neon_vmull): Likewise.
    (do_neon_trn): Likewise.
    (do_neon_ldx_stx): Likewise.
    (neon_dp_fixup): Changed signature and set the flag.
    (neon_three_same): Call the above with new signature.
    (neon_two_same): Likewise.
    (neon_imm_shift): Likewise.
    (neon_mul_mac): Likewise.
    (do_neon_abs_neg): Likewise.
    (neon_mixed_length): Likewise.
    (do_neon_ext): Likewise.
    (do_neon_mov): Likewise.
    (do_neon_tbl_tbx): Likewise.
    (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
    (neon_compare): Likewise.
    (do_neon_shll): Likewise.
    (do_neon_cvt): Likewise.
    (do_neon_mvn): Likewise.
    (do_neon_dup): Likewise.
    (md_assemble): Call check_neon_suffixes ().

    gas/testsuite/
    * gas/arm/neon-suffix-bad.d: New test case.
    * gas/arm/neon-suffix-bad.s: New file.
    * gas/arm/neon-suffix-bad.l: New file.
 2010-01-04 00:39:28 +00:00
Ramana Radhakrishnan
4a42ebbc0e Fix Thumb2 bl range options. 
2009-12-21  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
            Richard Earnshaw  <richard.earnshaw@arm.com>

        * config/tc-arm.c (encode_thumb2_b_bl_offset): New. Refactored
        from md_apply_fix.
        (md_apply_fix): Fixup range checks for Thumb2 version
        of unconditional calls. Call encode_thumb2_b_bl_offset for
        unconditional branches / function calls.
 2009-12-21 12:56:41 +00:00
H.J. Lu
2426c15ff8 Replace VexNDS, VexNDD and VexLWP with VexVVVV. 
gas/

2009-12-19  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Check vexvvvv instead
	of vexnds and vexndd.
	(build_modrm_byte): Check vexvvvv instead of vexnds, vexndd
	and vexlwp.

opcodes/

2009-12-19  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove VexNDS, VexNDD and
	VexLWP.  Add VexVVVV.

	* i386-opc.h (VexNDS): Removed.
	(VexNDD): Likewise.
	(VexLWP): Likewise.
	(VEXXDS): New.
	(VEXNDD): Likewise.
	(VEXLWP): Likewise.
	(VexVVVV): Likewise.
	(i386_opcode_modifier): Remove vexnds, vexndd and vexlwp.
	Add vexvvvv.

	* i386-opc.tbl: Replace VexNDS with VexVVVV=1, VexNDD with
	VexVVVV=2 and VexLWP with VexVVVV=3.
	* i386-tbl.h: Regenerated.
 2009-12-19 18:36:27 +00:00
Maciej W. Rozycki
7c0fc5246b gas/ 
* config/tc-mips.c (s_mips_ent): Also set BSF_FUNCTION for
	".aent".

	gas/testsuite/
	* gas/mips/aent.d: New test.
	* gas/mips/aent.s: Source for the new test.
	* gas/mips/mips.exp: Run it.
 2009-12-19 00:21:29 +00:00
Steve Ellcey
fd4db1a12f 2009-12-18 Steve Ellcey <sje@cup.hp.com> 
* config/tc-hppa.c: Change access to access_ctr.
 2009-12-18 18:11:56 +00:00
Nick Clifton
ff4a8d2b93 PR binutils/10924 
* config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
        register.
        (do_mrs): Likewise.
        (do_mul): Likewise.

        * arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
        unique register numbers.  Extend support for %<>R format to
        thumb32 and coprocessor instructions.

        * gas/arm/unpredictable.s: Add more unpredictable instructions.
        * gas/arm/unpredictable.d: Add expected disassemblies.
 2009-12-17 09:52:18 +00:00
H.J. Lu
2eb952a4d9 Remove ByteOkIntel. 
gas/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Set i.suffix to 0 in
	Intel syntax if size is ignored and b/l/w suffixes are
	illegal.
	(check_byte_reg): Remove byteokintel check.

opcodes/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove ByteOkIntel.

	* i386-opc.h (ByteOkIntel): Removed.
	(i386_opcode_modifier): Remove byteokintel.

	* i386-opc.tbl: Remove ByteOkIntel.
	* i386-tbl.h: Regenerated.
 2009-12-16 20:08:32 +00:00
H.J. Lu
7f399153c6 Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode. 
gas/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38,
	vex0f3a, xop08, xop09 and xop0a with vexopcode.

opcodes/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
	Vex0F3A, XOP08, XOP09 and XOP0A.  Add VexOpcode.

	* i386-opc.h (Vex0F): Removed.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(VexOpcode): New.
	(VEX0F): Likewise.
	(VEX0F38): Likewise.
	(VEX0F3A): Likewise.
	(XOP08): Defined as a macro.
	(XOP09): Likewise.
	(XOP0A): Likewise.
	(i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
	xop09 and xop0a.  Add vexopcode.

	* i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
	VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
	XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
	* i386-tbl.h: Regenerated.
 2009-12-16 15:43:16 +00:00
H.J. Lu
8c43a48b28 Replace VEX2SOURCES with XOP2SOURCES. 
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Check XOP2SOURCES
	instead VEX2SOURCES.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEX2SOURCES): Renamed to ...
	(XOP2SOURCES): This.
 2009-12-16 05:18:11 +00:00
H.J. Lu
8cd7925b45 Replace Vex2Sources and Vex3Sources with VexSources. 
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Check vexsources
	instead of vex3sources.
	(build_modrm_byte): Check vexsources instead of vex2sources
	and vex3sources.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex3Sources and
	Vex2Sources.  Add VexSources.

	* i386-opc.h ()Vex2Sources: Removed.
	(Vex3Sources): Likewise.
	(VEX2SOURCES): New.
	(VEX3SOURCES): Likewise.
	(VexSources): Likewise.
	(i386_opcode_modifier): Remove vex2sources and vex3sources.
	Add vexsources.

	* i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
	Vex3Sourceswith VexSources=2.
	* i386-tbl.h: Regenerated.
 2009-12-16 04:00:35 +00:00
H.J. Lu
1ef99a7be9 Remove VexW0 and VexW1. Add VexW. 
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
	with vexw.
	(build_modrm_byte): Likewise.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1.  Add
	VexW.

	* i386-opc.h (VexW0): Removed.
	(VexW1): Likewise.
	(VEXW0): New.
	(VEXW1): Likewise.
	(VexW): Likewise.
	(i386_opcode_modifier): Remove vexw0 and vexw1.  Add vexw.

	* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
	Vex=2.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2009-12-16 02:10:45 +00:00
H.J. Lu
e3c58833bf Define VEX128 and VEX256. 
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Use VEX256.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEX128): New.
	(VEX256): Likewise.
 2009-12-15 16:36:59 +00:00
Nick Clifton
34ab888845 PR gas/11089 
* config/tc-rx.c (rx_equ): Rename 'expr' to 'expression' in order
        to avoid shadowing a global symbol of the same name.
 2009-12-14 10:59:37 +00:00
Nick Clifton
c7d6f51805 * config/tc-microblaze.c (md_assemble): Rename 'imm' to 'immed' in 
order to avoid shadowing global variable of the same name.
 2009-12-14 09:50:18 +00:00
Andrew Jenner
2e98972ef6 * config/tc-arm.c (arm_init_frag): Set thumb MODE_RECORDED flag for 
non-elf.
       (arm_handle_align): Re-enable assert for non-elf.
 2009-12-11 17:44:24 +00:00