Richard Earnshaw
fcd6d8d6b7
* tc-arm.c (md_parse_option): Tidy up setting of cpu_variant for
...
various command line options.
2002-01-15 14:43:09 +00:00
Richard Earnshaw
21f0f23a55
* tc-arm.c (md_longopts): On targets that aren't bi-endian, support
...
the -EL/-EB option that matches the target's endianness.
(md_parse_option): Likewise.
2002-01-14 17:37:23 +00:00
Richard Earnshaw
ce058b6cfb
* tc-arm.c (md_longopts): Fix misplaced #endif -- the -oabi option
...
is not dependent on ARM_BI_ENDIAN.
2002-01-14 15:36:30 +00:00
Richard Earnshaw
f03698e661
* tc-arm.c (all error messages): Normalize capitalization of messages.
...
* tc-arm.h (md_operand): Delete define.
* tc-arm.c (in_my_get_expression): New static variable.
(my_get_expression): Set and clear it.
(md_operand): New function. If called from my_get_expression
put the error in inst.error.
(output_inst): Now takes argument of instruction being assembled.
Print it out with any error message.
(do_ldst, do_ldstv4, thumb_load_store): Fault attempt to use a store
with '=' syntax.
(end_of_line): Don't update inst.error if it is already set.
2002-01-14 15:01:04 +00:00
Richard Earnshaw
e28cd48c21
* tc-arm.c ((do_ldst): Fix handling an immediate expression pseudo
...
op that can be translated into a mvn instruction.
* gas/arm/ldconst.s gas/arm/ldconst.d: New files. Test ldr with
immediate pseudo-operations.
* gas/arm/arm.exp: Run it.
2002-01-11 18:00:17 +00:00
Richard Earnshaw
6c43fab6fb
* tc-arm.c (struct reg_entry): Move before prototypes.
...
(int_register, cp_register, fp_register): Delete.
(reg_table): Delete. Replaced with ...
(rn_table, cp_table, cn_table, fn_table, mav_mvf_table)
(mav_mvd_table, mav_mvfx_table, mav_mvdx_table, mav_mvax_table)
(mav_dspsc_table): ... one table per register set.
(arm_reg_hsh): Delete.
(struct reg_map): New structure.
(all_reg_maps): New array.
(enum arm_reg_type): New enums.
(build_reg_hsh): New function.
(insert_reg_alias): Use hash table passed by caller. Adjust all
callers.
(create_register_alias): New function, split out from ...
(md_assemble): ... here.
(md_begin): Build new register hash tables.
(arm_reg_parse): New argument for the hash table to search. Adjust all
callers.
(arm_reg_parse_any): New function.
(co_proc_number): Look up the processor number in the processor hash
table.
(cirrus_regtype): Delete.
(cirrus_register, cirrus_mvf_register, cirrus_mvd_register)
(cirrus_mvfx_register, cirrus_mvdx_register, cirrus_mvax_register)
(ARM_EXT_MAVERICKsc_register): Delete.
(do_c_binops_1, do_c_binops_2, do_c_binops_3): Delete.
(do_c_binops_1[a-o], do_c_binops_2[a-c], do_c_binops_3[a-d]): New
functions.
(do_c_triple_4, do_c_triple_5): Delete.
(do_c_triple_4[ab], do_c_triple_5[a-h]): New functions.
(do_c_quad_6): Delete.
(do_c_quad_6[ab]): New functions.
(do_c_binops, do_c_triple, do_c_quad, do_c_shift, do_c_ldst): Rework
arguments to use new register parsing methods.
(cirrus_reg_required_here): Likewise.
(insns): Reclassify cirrus maverick worker functions.
(cirrus_valid_reg): Delete.
2002-01-10 11:47:35 +00:00
Richard Earnshaw
f2b7cb0a5f
* tc-arm.c (do_arit, do_cmp, do_mov, do_ldst, do_ldstt, do_ldmstm)
...
(do_branch, do_swi, do_adr, do_adrl, do_empty, do_mul, do_mla)
(do_swap, do_msr, do_mrs, do_mull, do_ldstv4, do_bx, do_blx)
(do_bkpt, do_clz, do_lstc2, do_cdp2, do_co_reg2, do_smla, do_smlal)
(do_smul, do_qadd, do_pld, do_ldrd, do_co_reg2c, do_cdp, do_lstc)
(do_co_reg, do_fpa_ctrl, do_fpa_ldst, do_fpa_ldmstm, do_fpa_monadic)
(do_fpa_dyadic, do_fpa_cmp, do_fpa_from_reg, do_fpa_to_reg, do_mia)
(do_mar, do_mra, do_c_binops, do_c_binops_1, do_c_binops_2)
(do_c_binops_3, do_c_triple, do_c_triple_4, do_c_triple_5, do_c_quad)
(do_c_quad_6, do_c_dspsc, do_c_dspsc_1, do_c_dspsc_2, do_c_shift)
(do_c_shift_1, do_c_shift_2, do_c_ldst, do_c_ldst_1, do_c_ldst_2)
(do_c_ldst_3, do_c_ldst_4, do_branch25): Delete redundant argument,
FLAGS.
(struct asm_opcode): Adjust parms field accordingly.
(md_assemble): Don't pass dummy second argument when calling worker
functions.
(build_arm_ops_hsh): Add prototype
(BAD_FLAGS): Delete.
2001-12-06 10:23:20 +00:00
Richard Earnshaw
90e4755aee
* tc-arm.c (struct asm_opcode): Delete comp_suffix and flags. Add
...
cond_offset. Rename variants->variant.
(insns): Adjust for new format. Explicitly code each variant that
takes flags. Remove temporary instructions.
(struct arm_it): Remove redundant field suffix.
(s_flag, ldr_flags, str_flags, byte_flag, cmp_flags, ldm_flags)
(stm_flags, lfm_flags, sfm_flags, round_flags, fix_flags, except_flag)
(long_flag): Delete.
(struct asm_flg): Delete.
(LONGEST_INST): Delete.
(V4_STR_BIT): Define.
(struct thumb_opcode): Rename variants->variant.
(do_empty): Renamed from do_nop.
(ldst_extend): Delete argument hwse. Split code for half-word and
signed byte instructions to ...
(ldst_extend_v4): ... here.
(ld_mode_required_here): Use ldst_extend_v4.
(do_ldrd): Simplify now that this is only called for ldrd. No
need to test for XScale, which was wrong anyway. Don't reject r12
as a target register. Add test that ldrd doesn't update an index
register.
(do_pld): Don't allow post-indexed or write-back addressing modes.
Adjust call to ldst_extend.
(do_adr): Split code for adrl to ...
(do_adrl): ... here.
(do_cmp): No need to fold in COND_BIT.
(do_ldst): Simplify. Split code for ldrt/strt into do_ldstt. Split
code to handle half-word and signed byte instructions to ...
(do_ldstv4): ... here.
(do_ldstt): New function. Handle load/store with translate.
(do_ldmstm): Write feature modification bits directly into
inst.instruction.
(do_fpa_ldst): Remove suffix handling code.
(do_fpa_dyadic, do_fpa_monadic, do_fpa_from_reg): Likewise.
(do_fpa_ldmstm): Type of access is now held in inst.instruction.
(build_arm_ops_hsh): New function.
(md_begin): Call it. Don't build the ARM opcode directly.
(md_assemble): Simplify ARM instruction handling.
2001-12-05 11:59:26 +00:00
Nick Clifton
8350bcd967
Only clear cpu part when specifying 'xscale' cpu (don't change the fpu part)
2001-12-04 11:28:29 +00:00
Nick Clifton
94f592af1b
Update all uses of md_apply_fix to use md_apply_fix3. Make it a void function.
2001-11-15 21:29:00 +00:00
Richard Earnshaw
c9b604bd23
* tc-arm.c: Re-arrange prototypes by architecture.
...
(insns): Re-arrange instructions by archtitecture. Pld instruction
is part of ARMv5E.
(tinsns): blx and bkpt are part of ARMv5T.
(do_fp_{ctrl,ldst,ldstm,dyadic,monadic,cmp,from_reg,to_reg}): Rename
to do_fpa_*. All callers changed.
* tc-arm.c (insns): Add two temporary instructions to handle
ldrd/strd.
2001-11-02 17:25:11 +00:00
Richard Earnshaw
b89dddec96
General cleanup of feature definitions.
...
* tc-arm.c (ARM_EXT_LONGMUL, ARM_EXT_HALFWORD, ARM_EXT_THUMB): Delete.
(ARM_2UP, ARM_ALL, ARM_3UP, ARM_6UP): Delete.
(FPU_CORE, FPU_FPA10, FPA_FPA11, FPU_ALL, FPA_MEMMULTI): Delete.
(ARM_EXT_V{1,2,2S,3,3M,4,4T,5T,5ExP}): New defines.
(ARM_EXT_V{5,5E}): Synchronize with above.
(ARM_ARCH_V*): Define a complete set in terms of above features.
(ARM_{1,2,3,250,6,7,8,9,STRONG}): Define in terms of architecture.
(FPU_FPA_EXT_V[12]): Define.
(FPU_ARCH_FPE, FPU_ARCH_FPA): Define in terms of above.
(FPU_ANY): Define.
(FPU_DEFAULT): Default to FPA.
(CPU_DEFAULT): For XScale, this is now just ARM_ARCH_XSCALE; for
Thumb, this is now ARM_ARCH_V5T.
(insns): Rework for new feature defines.
(tinsns): Likewise.
(opcode_select, do_ldst, md_begin, md_parse_option): Likewise.
2001-10-31 14:48:23 +00:00
H.J. Lu
8420dfca80
2001-10-20 H.J. Lu <hjl@gnu.org>
...
* config/tc-arm.c (do_c_shift): Use ISDIGIT instead of isdigit.
(cirrus_parse_offset): Likewise.
2001-10-20 22:41:09 +00:00
Nick Clifton
da89cce1af
Restore line_comment_chars after a SNAFU.
2001-10-19 10:53:19 +00:00
Nick Clifton
f57c81f6dd
Remove semicolon from ARM comment chars list
2001-10-18 21:06:03 +00:00
Nick Clifton
05d2d07e5f
Replace CONST with const
2001-10-13 09:50:02 +00:00
Aldy Hernandez
90f9b791a1
* config/tc-arm.c: Change MAVERIK to MAVERICK.
2001-10-09 16:08:57 +00:00
Aldy Hernandez
22d9c8c52f
updated credits
2001-10-08 19:31:33 +00:00
Aldy Hernandez
404ff6b5ae
* gas/config/tc-arm.c (ARM_EXT_MAVERIK): New macro.
...
(cirrus_regtype): New enum.
(LONGEST_INST): Change to 10.
(CIRRUS_MODE1): New.
(CIRRUS_MODE2): New.
(CIRRUS_MODE3): New.
(CIRRUS_MODE4): New.
(CIRRUS_MODE5): New.
(CIRRUS_MODE6): New.
(insns): Add cirrus dsp instructions.
(ARM_EXT_MAVERIKSC_REG): New.
(cirrus_register): New.
(cirrus_mvf_register): New.
(cirrus_mvd_register): New.
(cirrus_mvfx_register): New.
(cirrus_mvdx_register): New.
(cirrus_mvax_register): New.
(ARM_EXT_MAVERIKsc_register): New.
(reg_table): Add cirrus registers.
(cirrus_valid_reg): New.
(cirrus_reg_required_here): New.
(do_c_binops_1): New.
(do_c_binops_2): New.
(do_c_binops_3): New.
(do_c_triple_4): New.
(do_c_triple_5): New.
(do_c_quad_6): New.
(do_c_dspsc_1): New.
(do_c_dspsc_2): New.
(do_c_shift_1): New.
(do_c_shift_2): New.
(do_c_ldst_1): New.
(do_c_ldst_2): New.
(do_c_ldst_3): New.
(do_c_ldst_4): New.
(do_c_binops): New.
(do_c_triple): New.
(do_c_quad): New.
(do_c_dspsc): New.
(do_c_shift): New.
(cirrus_parse_offset): New.
(do_c_ldst): New.
(md_parse_option): Add arm9e.
(md_show_usage): Same.
2001-10-08 19:05:34 +00:00
Nick Clifton
2c20dfb248
Add missing function protoypes.
2001-09-27 09:58:01 +00:00
H.J. Lu
3882b01078
Locale changes from Bruno Haible <haible@clisp.cons.org>.
2001-09-19 05:33:36 +00:00
Nick Clifton
d827344236
Use MVN to build simple inverted constants.
2001-06-27 08:15:52 +00:00
Nick Clifton
1cac90122e
Allow adrCCl. [Patch from Phillip BLundel]
...
Updated ARM tests.
2001-06-21 19:46:54 +00:00
Nick Clifton
b99bd4efbd
Restore file accidentally deleted during man page cleanup
2001-06-19 16:26:43 +00:00
Nick Clifton
c45021f2d2
Remove auot generated man pages
2001-06-19 11:57:29 +00:00
Phil Blundell
2172d73b21
2001-06-18 Philip Blundell <philb@gnu.org>
...
* config/tc-arm.c (do_msr): Remove restriction on usage of
immediate operands.
2001-06-19 07:33:21 +00:00
Phil Blundell
0b317b0807
2001-06-13 Philip Blundell <philb@gnu.org>
...
* config/tc-arm.c (thumb_shift): Improve wording of error message.
(do_t_arit): Likewise.
2001-06-14 07:58:12 +00:00
Nick Clifton
3971ce954f
fix test for overlflow of literal pool
2001-06-12 08:27:53 +00:00
Nick Clifton
15f65ae412
When truncating an aligned block, ensure that the low order bits of the
...
alignment are preserved.
2001-05-11 10:01:41 +00:00
Nick Clifton
d8708f403e
Do not insert more than MAX_MEM_FOR_RS_ALIGN_CODE bytes.
2001-05-06 10:11:33 +00:00
Nick Clifton
6e1e737c86
Fix indentation and parenthesis
2001-05-02 18:40:10 +00:00
Nick Clifton
c7e4034828
Add gas and ld support for openrisc
2001-05-02 18:14:31 +00:00
Nick Clifton
5cb1517bba
imprrove error message
2001-05-02 11:33:12 +00:00
Nick Clifton
16a0c2d4ec
Add ability to pad code alignment frags with no-ops.
2001-04-26 15:19:21 +00:00
Nick Clifton
0285c67df1
Automate generate on man pages
2001-03-25 20:32:31 +00:00
Nick Clifton
83e7603d4f
Always set machine type based on cpu_variant.
2001-03-12 23:37:39 +00:00
Nick Clifton
f7e42eb4af
Fix copyright notices
2001-03-08 23:24:26 +00:00
Nick Clifton
4f3c3dbb37
Fix BLX(1) for Thumb
2001-03-06 22:33:47 +00:00
Phil Blundell
b1e2e654ad
2001-02-12 Philip Blundell <pb@futuretv.com>
...
* config/tc-arm.c (do_ldst): Improve warnings for unpredictable
ldrt/strt instructions.
2001-02-12 13:32:25 +00:00
Nick Clifton
cd17328aad
Remove redundant bit from "fa" and "da" flags
2001-01-19 04:35:29 +00:00
Nick Clifton
7a91e76ad1
Allow ADRL relocs to be adjusted in arm-coff
2001-01-11 01:40:18 +00:00
Kazu Hirata
bc80588841
2000-12-03 Kazu Hirata <kazu@hxi.com>
...
* tc-a29k.c: Fix formatting.
* tc-alpha.c: Likewise.
* tc-arm.c: Likewise.
* tc-cris.c: Likewise.
* tc-hppa.c: Likewise.
* tc-i370.c: Likewise.
* tc-i386.c: Likewise.
* tc-i860.c: Likewise.
* tc-i960.c: Likewise.
* tc-ia64.c: Likewise.
* tc-m68hc11.c: Likewise.
* tc-m68k.c: Likewise.
* tc-m88k.c: Likewise.
* tc-pj.c: Likewise.
* tc-ppc.c: Likewise.
* tc-sh.c: Likewise.
* tc-sparc.c: Likewise.
* tc-tahoe.c: Likewise.
* tc-vax.c: Likewise.
2000-12-03 06:49:23 +00:00
Nick Clifton
077b8428ab
Add ARM v5t, v5te and XScale support
2000-11-25 00:21:40 +00:00
Nick Clifton
8179bd9b1b
Add support for .line and .file pseudo ops.
2000-11-17 18:46:43 +00:00
Richard Henderson
4dc7ead9fd
* as.c (debug_type): Init to DEBUG_UNSPECIFIED.
...
* as.h (debug_type): Clarify documentation of the meaning
of this variable.
* dwarf2dbg.c (DWARF2_LINE_MIN_INSN_LENGTH): Default to 1.
(print_stats): Fix parenthesis problem.
(now_subseg_size): New.
(dwarf2_finish): Use it. If DEBUG_DWARF2, emit bits for .debug_info.
(dwarf2_directive_file): Don't set debug_type.
(dwarf2_where): Honor DEBUG_DWARF2 first.
(dwarf2_emit_insn): Renamed from dwarf2_generate_asm_lineno;
do nothing if not emitting dwarf2 debug info, or no work.
* dwarf2dbg.h (dwarf2_emit_insn): Update.
* ecoff.c (add_file): Turn on DEBUG_ECOFF only if DEBUG_UNSPECIFIED.
(ecoff_new_file): Likewise.
* read.c (generate_lineno_debug): Kill ecoff hackery. Update
commentary wrt dwarf2.
* config/tc-alpha.c (alpha_adjust_symtab_relocs): Add
ATTRIBUTE_UNUSED as needed.
(emit_insn): Call dwarf2_emit_insn.
(s_alpha_file): New.
(s_alpha_loc): New.
(s_alpha_coff_wrapper): Don't handle them.
(md_pseudo_table): Update for .file and .loc.
* config/tc-alpha.h (DWARF2_LINE_MIN_INSN_LENGTH): New.
* config/tc-arm.c (output_inst): Update for dwarf2_emit_insn;
don't protect with debug_type.
* config/tc-hppa.c (md_assemble): Likewise.
* config/tc-m68hc11.c (m68hc11_new_insn): Likewise.
* config/tc-mn10300.c (md_assemble): Likewise.
* config/tc-sh.c (md_assemble): Likewise.
* config/tc-v850.c (md_assemble): Likewise.
* config/tc-arm.c (arm_end_of_source): Remove.
* config/tc-hppa.c (pa_end_of_source): Remove.
* config/tc-m68hc11.c (m68hc11_end_of_source): Remove.
* config/tc-mn10300.c (mn10300_finalize): Remove.
* config/tc-sh.c (sh_finalize): Remove.
* config/tc-v850.c (sh_finalize): Remove.
* config/tc-arm.h (md_end): Remove.
* config/tc-hppa.h (md_end): Remove.
(DWARF2_LINE_MIN_INSN_LENGTH): New.
* config/tc-m68hc11.h (md_end): Remove.
* config/tc-mn10300.h (md_end): Remove.
* config/tc-sh.h (md_end): Remove.
* config/tc-v850.h (md_end): Remove.
* config/tc-ia64.c (emit_one_bundle): Don't protect
dwarf2 bits with debug_type.
(md_assemble): Likewise.
(ia64_end_of_source): Don't call dwarf2_finish.
2000-11-17 08:47:52 +00:00
Kazu Hirata
4a1805b14d
2000-11-14 Kazu Hirata <kazu@hxi.com>
...
* config/aout_gnu.h: Fix formatting.
* config/atof-vax.c: Likewise.
* config/m68k-parse.h: Likewise.
* config/m88k-opcode.h: Likewise.
* config/obj-elf.c: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-cris.c: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-mn10300.c: Likewise.
* config/te-386bsd.h: Likewise.
* config/te-hppa.h: Likewise.
* config/te-nbsd.h: Likewise.
* config/te-ppcnw.h: Likewise.
* config/te-sparcaout.h: Likewise.
* config/te-tmips.h: Likewise.
* config/vax-inst.h: Likewise.
* config/vms-conf.h: Likewise.
2000-11-14 20:57:30 +00:00
Nick Clifton
8d6b5c8e2f
Add include of "dwarf2dbg.h"
2000-11-05 19:28:57 +00:00
Nick Clifton
37d8bb275b
Preserve copy of case clobber opcodes so that .req pseudo op works
2000-11-02 19:32:47 +00:00
Phil Blundell
6c17cfe4d2
2000-11-02 Theo Honohan <th@futuretv.com>
...
* config/tc-arm.c (do_msr): Improve error message.
2000-11-02 15:10:57 +00:00
Aldy Hernandez
bf1b588105
handle lower cased cpsr and spsr
2000-10-27 13:55:49 +00:00
Nick Clifton
85a3969410
Add --gdwarf2 support to ARM toolchain
2000-10-25 19:15:34 +00:00
Kazu Hirata
1dab94dd91
2000-09-14 Kazu Hirata <kazu@hxi.com>
...
* config/tc-a29k.c: Fix formatting.
* config/tc-alpha.c: Likewise.
* config/tc-arc.c: Likewise.
* config/tc-arc.h: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-arm.h: Likewise.
* config/tc-avr.c: Likewise.
* config/tc-avr.h: Likewise.
* config/tc-tic30.c: Likewise.
* config/tc-tic30.h: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-tic54x.h: Likewise.
* config/tc-tic80.c: Likewise.
* config/tc-tic80.h: Likewise.
2000-09-15 01:06:52 +00:00
Phil Blundell
e0e3ecca5c
2000-09-08 Philip Blundell <philb@gnu.org>
...
* config/tc-arm.c (md_apply_fix3): Correct handling of ADRL when
offset is negative.
2000-09-08 21:05:33 +00:00
Nick Clifton
66102fe268
Replace as_tsktsk with as_warn.
...
Make reference to first element of shift_names explicit.
2000-08-18 19:27:30 +00:00
Nick Clifton
004af544ae
Minor formatting changes
2000-08-17 23:57:52 +00:00
Nick Clifton
4fb7971f4b
Allow illegal shifts by zero to be recorded as logical shift lefts by zero.
2000-08-17 23:46:43 +00:00
Nick Clifton
8cb8bcbabb
Tidy up decoding of shift based addressing modes.
...
Add extra tests for these addressing modes
2000-08-16 19:02:00 +00:00
Nick Clifton
70485b5c18
Warn abouyt "bx pc" not being very useful.
2000-08-16 17:48:50 +00:00
Nick Clifton
046b3b54ee
Allow "bx pc" in ARM mode.
2000-08-14 21:20:03 +00:00
Nick Clifton
d78c7dcade
Undo some formatting fixes
2000-08-02 01:00:15 +00:00
Nick Clifton
3f9dfb2cd9
Fix skip of 'cpsr_all' flag
2000-08-01 23:10:02 +00:00
Kazu Hirata
28e4f854cf
2000-08-01 Kazu Hirata <kazu@hxi.com>
...
* config/obj-som.c: Fix formatting.
* config/obj-ieee.c: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-v850.c: Likewise.
2000-08-01 19:02:49 +00:00
Alexandre Oliva
8de8f17e3d
* config/tc-arm.c (psrs): Accept combinations of flags.
2000-07-04 05:49:04 +00:00
Nick Clifton
1994a7c76c
Fix spelling typos.
...
Remove use of DEFUN().
2000-06-25 17:59:22 +00:00
Alan Modra
63a0b638d4
Don't treat `;' as a line separator by default.
...
Explicitly mention `;' in line_separator_chars in each backend.
2000-06-09 00:00:04 +00:00
Nick Clifton
9bab93495a
Assign correct reloc value to size 1 constant valued fixes.
2000-06-08 19:19:23 +00:00
Alan Modra
b75c0c920f
is_end_of_line fixes.
2000-06-02 02:52:10 +00:00
Scott Bambrough
a6836251f6
The ARM assembler is not assembling the following instruction
...
correctly.
mrs lr, spsr
The string pointer is advanced to far before the check to set
the SPSR bit.
Thu Jun 01 2000 Scott Bambrough <scottb@netwinder.org>
* config/tc-arm.c (do_mrs): Allow SPSR_BIT to be set correctly.
2000-06-01 19:07:54 +00:00
Nick Clifton
322f2c4579
Add support for _x and _s flags to MSR instruction
2000-05-15 19:25:22 +00:00
Nick Clifton
adcf07e614
Document behaviour of .align 0 for ARM targets.
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Remove incomplete v5e code from tc-arm.c
2000-04-24 23:57:30 +00:00
Alan Modra
fc633e5b97
Remove U suffix from constants for K&R compilers.
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Fix a couple of 64 bit nits.
2000-04-13 01:08:05 +00:00
Nick Clifton
d92b1a8a2a
Add support for BFD_RELOC_{ARM|THUMB}_PCREL_BLX relocs.
2000-04-08 00:11:46 +00:00
Nick Clifton
d1a1bf19b4
Add "bal" instruction pattern.
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Add test of assembling "bal" instruction
2000-03-29 18:25:37 +00:00
Nick Clifton
114241553a
fix bug detecting pc-rel overflow
2000-03-19 22:09:23 +00:00
Nick Clifton
43f0557653
Fix adr pseudo op for Thumb.
2000-03-17 22:12:08 +00:00
Nick Clifton
ec9991dc51
minor formatting improvements
2000-03-17 20:00:36 +00:00
Nick Clifton
684b81fabf
fix compile time warning messages
2000-03-17 19:44:41 +00:00
Nick Clifton
672314026c
Handle same-section relocations where the destination is at an address >=
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0x00400000.
2000-03-17 19:35:44 +00:00
Nick Clifton
056350c6bd
Add support for WinCE targeted toolchains.
2000-02-24 19:49:18 +00:00
Nick Clifton
557537a556
Add ATPCS register naming support
2000-01-31 22:14:50 +00:00
Nick Clifton
2f0ca46a49
Apply Thoams de Lellis's patch to fic disassembly of Thumb instructions when
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bounded by non-function labels.
2000-01-27 20:05:32 +00:00
Nick Clifton
858f4ff6ff
fix formatting
1999-12-22 19:54:41 +00:00
Nick Clifton
df32bc61b0
Apply patch from Philip Blundell to allow .previous to work for arm-elf
1999-12-22 19:44:15 +00:00
Nick Clifton
b4d0b2b3ab
Add support for -marm720 command line switch
1999-12-14 19:40:59 +00:00
Nick Clifton
a64bcdd8d3
Fix .force_thumb
1999-11-29 15:29:34 +00:00
Donald Lindsay
92a66162a2
tc-arm.c: minor changes and support for upcoming V5E variant.
1999-11-16 04:15:55 +00:00
Jeff Law
acb5662391
* config/tc-arm.c (reg_required_here): Improve comments.
1999-10-28 03:03:53 +00:00
Jeff Law
b49cfa5dae
* config/tc-arm.c (thumb_opcode): Add "variants" field.
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(tinsns): Initialize variants field.
1999-10-28 02:53:42 +00:00
Jeff Law
90ca882f04
* tc-arm.c (bad_args, bad_pc): Renamed to BAD_ARGS and BAD_PC
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respectively.
1999-10-27 22:52:35 +00:00
Nick Clifton
29c4c6b539
fix compile time warnings
1999-10-27 18:13:28 +00:00
Nick Clifton
913f265c25
Rename MULTI_SET_PSR to LDM_TYPE_2_OR_3
1999-09-22 09:05:32 +00:00
Nick Clifton
325188ecac
Only support interworking and pic for ELF or COFF targets
1999-09-08 13:10:28 +00:00
Nick Clifton
231b5e2936
slight code improvement over previous delta
1999-09-01 15:32:46 +00:00
Nick Clifton
5856c19ac4
Do not align sectins when producing ELF format objects.
1999-09-01 10:57:19 +00:00
Nick Clifton
50f4163fd6
If an offset is invalid, display it.
1999-08-18 09:12:11 +00:00
Nick Clifton
114502711b
Look for register conflicts on stores as well as loads.
1999-08-16 17:47:29 +00:00
Nick Clifton
276b1dc2a2
Only pass positive values to validate_offset_imm()
1999-08-13 08:38:20 +00:00
Nick Clifton
ae5ad4adf9
Tidy up formatting.
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Fix Thubm weak function support.
1999-08-12 10:32:42 +00:00
Catherine Moore
c8d259f7df
Fix up vtable entry relocs
1999-07-30 15:08:39 +00:00
Nick Clifton
2f992c04c2
Apply patch from Philip Blundell <pb@nexus.co.uk>
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Prepend LOCAL_LABEL_PREFIX (if defined) to local symbols.
ARM: Set F_SOFTFLOAT in the output file if -mno-fpu was given.
1999-07-15 01:33:07 +00:00