(struct insn_label_list): Define.
(insn_labels, free_insn_labels): New static variables.
(mips_clear_insn_labels): New static function.
(append_insn): Mark all mips16 text labels, and make them odd.
Handle all labels after emitting a nop, not just one. Call
mips_clear_insn_labels rather than just clearing insn_label.
(mips_emit_delays): Add insns parameter, and use it to decide
whether to mark mips16 labels. Handle all labels, not just one.
Force mips16 labels to be odd. Change all callers.
(mips16_immed): Don't check for an odd branch target.
(md_apply_fix): Don't check mips16 mode for a branch reloc.
(mips16_extended_frag): Ignore the low bit in a branch target.
(md_convert_frag): Likewise.
(mips_no_prev_insn): Call mips_clear_insn_labels rather than just
clearing insn_label.
(mips_align, mips_flush_pending_output, s_cons): Likewise.
(s_float_cons, s_gpword): Likewise.
(s_align): Use insn_labels rather than insn_label.
(s_cons, s_float_cons, s_gpword): Likewise.
(mips_frob_file_after_relocs): New function.
(mips_define_label): Rewrite to add to insn_labels list.
* config/tc-mips.h (tc_frob_file_after_relocs): Define.
* ecoff.c (ecoff_build_symbols): If the size of a function comes
out odd, increment it.
(RELAX_MIPS16_ENCODE): Add dslot and jal_dslot arguments, and
store them. Adjust other RELAX_MIPS16 macros.
(RELAX_MIPS16_DSLOT): Define.
(RELAX_MIPS16_JAL_DSLOT): Define.
(append_insn): Pass new arguments to RELAX_MIPS16_ENCODE. Correct
handling of whether previous instruction has a fixup. Set
prev_insn_reloc_type.
(mips_no_prev_insn): Clear prev_insn_reloc_type.
(mips16_extended_frag): Use the right base address for a PC
relative add or load.
(md_convert_frag): Likewise. If a PC relative add or load is
used, record the alignment for the section.
system, don't set the section alignment to 2**4.
(s_change_sec): Likewise.
(append_insn): Call record_alignment for the section.
(md_section_align): Don't align the section size for an embedded
ELF system.
arguments, and store them. Adjust other RELAX_MIPS16 macros.
(RELAX_MIPS16_USER_SMALL): Define.
(RELAX_MIPS16_USER_EXT): Define.
(mips16_small, mips16_ext): New static variables.
(append_insn): Pass mips16_small and mips16_ext to
RELAX_MIPS16_ENCODE.
(mips16_ip): Set mips16_small and mips16_ext.
(mips16_immed): Don't check mips16_autoextend.
(mips16_extended_frag): Check USER_SMALL and USER_EXT.
mips_cpu is 5000, set interlocks and cop_interlocks.
(mips_ip): Give a better error message if the ISA level is wrong.
(md_parse_option): Recognize -mcpu=[v][r]5000.
* config/tc-mips.c (load_register): Remove unnecessary code that
was causing the high 32bits of 64bit constants to be lost.
Fixes PR10503. The compiler was producing the assembler code:
dli $3,0xfffffffffffff
when constructing the softfloat library. Unfortunately it was being
incorrectly assembled.
* config/tc-mips.c: Added cop_interlocks, to avoid NOP insertion
between co-processor comparisons and branches for the VR4300.
The preliminary documentation was slightly unclear on this issue, but
NEC have confirmed that there is an interlock within the CPU.
(mips_target_format): If mips_64, return elf64 targets rather than
elf32 ones.
(md_longopts): Add "32" and "64".
(md_parse_option): Handle -32 and -64.
(md_show_usage): Mention -32 and -64.
(cons_fix_new_mips): If mips_64, don't convert an 8 byte reloc to
a 4 byte one.
(mips_frob_file): Declare.
* config/tc-mips.c (struct mips_hi_fixup): Define.
(mips_hi_fixup_list): New static variable.
(imm_unmatched_hi): New static variable.
(md_assemble): Clear imm_reloc, imm_unmatched_hi, and
offset_reloc. Pass imm_unmatched_hi to append_insn.
(append_insn): Add unmatched_hi parameter. If it is set, add the
new fixup to mips_hi_fixup_list. Change all callers.
(mips_ip): Set imm_unmatched_hi when appropriate.
(mips_frob_file): New function.
(s_extern): Don't declare.
(reg_needs_delay): New static function.
(macro_build): Permit GOT/CALL_HI/LO relocs.
(macro_build_lui): If place is not NULL, use the number in the
expression.
(load_address): Handle mips_big_got case.
(macro): Handle mips_big_got for M_LA_AB, M_JAL_A, and load and
store macros.
(OPTION_XGOT): Define.
(md_longopts): Add "xgot" if OBJ_ELF.
(md_parse_option): Handle -xgot.
(md_show_usage): Mention -xgot.
(md_apply_fix): Permit GOT/CALL_HI/LO relocs.
(tc_gen_reloc): Handle GOT/CALL_HI/LO relocs.
* config/tc-mips.c (mips_4010): New static variable.
(interlocks): New static variable.
(md_begin): Check for a cpu of "r4010". Set mips_4010 correctly.
If mips_4650 or mips_4010, set interlocks.
(append_insn): Check interlocks, not mips_4650.
(mips_emit_delays): Likewise.
(mips_ip): Only permit INSN_4010 instructions if mips_4010.
(md_longopts): Add "m4010" and "no-m4010".
(md_parse_option): Accept -mcpu=r4010. Handle -m4010 and
-no-m4010.
(md_show_usage): Document -m4010 and -no-m4010.
(ecoff_directive_def): Set ecoff_debugging_seen.
(ecoff_stab): Likewise.
* ecoff.h: Make idempotent.
(ecoff_debugging_seen): Declare.
* config/tc-mips.c: Include ecoff.h.
(mips_debug): New static variable.
(s_stringer, s_mips_space): Remove unneeded declarations.
(md_parse_option): In case 'g', set mips_debug to debugging level.
(mips_local_label): New function.
* tc-mips.h (LOCAL_LABEL): Call mips_local_label.
(mips_local_label): Declare.
PR 6978.
* config/obj-multi.h (obj_frob_symbol, obj_frob_file, S_GET_SIZE, S_SET_SIZE,
S_GET_ALIGN, S_SET_ALIGN, obj_copy_symbol_attributes, OBJ_PROCESS_STAB): New
macros.
* config/tc-mips.c: Protect against redefining them also when including
obj-elf.h. Test only OBJ_ELF for including elf/mips.h.
* config/tc-mips.c (mips_target_format): Changed to a function, checking flavor
and byte order at run time.
(md_parse_option, cases OPTION_EB and OPTION_EL): Set target_big_endian here.
(md_begin): Not here.
* config/tc-mips.h (mips_target_format): Adjust declaration.
(TARGET_FORMAT): Call mips_target_format.
* config/tc-mips.h (USE_GLOBAL_POINTER_OPT): Define in terms of OUTPUT_FLAVOR.
* config/tc-mips.c (g_switch_value, g_switch_seen): Define unconditionally.
(md_begin, mips_ip, md_parse_option, s_change_sec, s_option, s_abicalls,
nopic_need_relax): Check USE_GLOBAL_POINTER_OPT at run time, instead of
compiling conditionally on GPOPT.
(GPOPT): Don't define.
(md_shortopts): Always include -G.
(RDATA_SECTION_NAME): Select at run time.
(md_begin): Test for ELF format at run time instead of compile time.
(mips_ip, s_change_sec): Ditto.
(md_parse_option, cases OPTION_CALL_SHARED and OPTION_NON_SHARED): Ditto.
(OPTION_CALL_SHARED, OPTION_NON_SHARED, mips_regmask_frag): Define
unconditionally.
(nopic_need_relax): New static function, split out from
md_estimate_size_before_relax.
(md_estimate_size_before_relax): Call it.
(load_address, macro): In NO_PIC branches, if nopic_need_relax returns nonzero,
don't attempt GP optimization.
* subsegs.c (subsegs_begin): Don't do it here.
* as.c (main): Call frag_init before subsegs_begin.
* frags.c (frag_append_1_char): New function.
* frags.h (frag_append_1_char): Declare it.
(FRAG_APPEND_1_CHAR): Call it. Old definition is commented out for now.
* as.h (struct frag): Added (but commented out) new fields for tracking current
alignment.
(frag_now_fix): Changed macro to function declaration.
* frags.c (frag_now_fix): Define function here.
(frag_new): Use it instead of accessing `frags' directly.
* frags.h (frags): Change comment to indicate it shouldn't be accessed directly.
* subsegs.h (struct frchain): New field frch_obstack, intended to eventually
replace global `frags' obstack.
* subsegs.c (subseg_set_rest): Use frag_now_fix instead of accessing `frags'
directly. Initialize fields of new frchainS explicitly instead of with memset.
* config/obj-coff.c (obj_coff_ln) [!BFD_ASSEMBLER]: Use frag_now_fix.
* config/tc-mips.c (s_loc), config/obj-vms.c (vms_resolve_symbol_redef),
symbols.c (colon): Likewise.
(md_begin): Don't mips_cpu if it was already set.
(md_parse_option): For -mipsN, don't set mips_cpu if it was
already set. For -mcpu=, just set mips_cpu, not mips_isa.
(s_elf_section): New static function.
* ecoff.c (ecoff_build_symbols): Don't abort if we don't recognize
the section when setting the storage class; default to sc_Data.
(s_mips_globl): New static function; needed for Irix 5 support.
* ecoff.c (ecoff_build_symbols): If BSF_FUNCTION is set for an
external symbol with no type, set the type to st_Proc rather than
st_Global. Don't set the index of an external st_Proc or
st_StaticProc symbol unless it is also a local symbol.
(insns_since_cache_access): New static variable.
(md_begin): Set mips_cpu as well as mips_isa.
(append_insn): If mips_cpu is 4600, require four nop instructions
between an instruction which accesses the cache and certain CACHE
instructions. Keep track of the number of instructions seen since
an instruction which accesses the cache.
(md_parse_option): Set mips_cpu as well as mips_isa.
PR 5433.
(macro): Correct M_LI_SS SVR4_PIC/EMBEDDED_PIC case. After M_LI_D
or M_L_DOB or label dob, force a new frag to avoid getting
confused in tc_gen_reloc.
(mips_ip): Use RDATA_SECTION_NAME, not .rdata.
(s_change_sec): Likewise.
with the preceding instruction even if .set nobopt has been seen.
.set nobopt actually controls whether to bring up an instruction
from the branch target, which gas does not currently support.
* config/tc-mips.c (macro_build): Permit BFD_RELOC_PCREL_LO16 for
certain cases of 'i', 'j' and 'o'. Change 'u' to take an
argument, the reloc type.
(load_register): Pass reloc type to macro_build for 'u'.
(macro): Likewise. For M_LA_AB permit a difference expression
when generating embedded PIC code between an arbitrary symbol and
a symbol in the .text section.
(mips_force_relocation): Force BFD_RELOC_PCREL_HI16_S and
BFD_RELOC_PCREL_LO16 to be emitted.
(md_apply_fix): Check that most relocs are not PC relative.
Handle BFD_RELOC_PCREL_HI16_S and BFD_RELOC_PCREL_LO16.
(tc_gen_reloc): Change #error to as_fatal. Handle
BFD_RELOC_PCREL_LO16 and BFD_RELOC_PCREL_HI16_S.
macro_build for nori case.
(SWITCH_TABLE): Define.
(mips_force_relocation): Force a relocation for a switch table
entry.
(md_apply_fix): Write switch table entry value into file.
(tc_gen_reloc): Use BFD_RELOC_GPREL32 for a switch table entry,
and set the addend to the difference between the reloc address and
the subtrahend.
embedded PIC code, accept the difference between two local symbols
as being constant.
(mips_force_relocation): Only force a reloc to be generated for a
PC relative fixup.
(md_apply_fix): For BFD_RELOC_32 and BFD_RELOC_LO16, put the fixup
value into the file if the fixup will not generate a reloc.
branch with an instruction that uses $at, in case the branch is
later expanded.
(macro): If EMBEDDED_PIC, case M_JAL_A may use $at.
(md_pcrel_from): If not OBJ_AOUT, return 4 for an undefined symbol
to make it pcrel_offset.
(tc_gen_reloc): If not OBJ_AOUT, set the reloc addend to
reloc->address; another gruesome hack to get gas reloc handling to
do the right thing.
(mips_pic): Change from int to enum mips_pic_level. Change all
uses (0 becomes NO_PIC, 2 becomes SVR4_PIC).
(load_address): Handle EMBEDDED_PIC.
(macro): Handle EMBEDDED_PIC in all PIC cases.
(md_parse_option): Accept -membedded-pic to use EMBEDDED_PIC. If
OBJ_ELF, accept -KPIC and -call_shared to use SVR4_PIC and accept
-non_shared to use NO_PIC (this is how the Irix 5 assembler
works). Do not permit -G with SVR4_PIC.
(s_abicalls): Warn if -G was used, and force -G 0.
(tc_gen_reloc): Set reloc->addend to 0 for a PC relative reloc for
anything but a.out, not just for ELF. For ECOFF, don't generate a
BFD_RELOC_16_PCREL_S2 reloc unless using EMBEDDED_PIC.
(md_parse_option): Set g_switch_seen for -G option.
(s_option): If creating PIC code, force the GP size to be 0. Warn
if -G switch used with a non-zero value.
* listing.c: Include subsegs.h.
(listing_prev_line): New function.
(calc_hex): Reset byte_in_frag to zero for each new frag.
* config/tc-mips.c (append_insn): Call listing_prev_line after
emitting nop instructions.
* Makefile.in (listing.o): Depends upon subsegs.h.
