* configure.in (bfd_elf32_bigarm_vec): Include elf-vxworks.lo.
(bfd_elf32_bigarm_symbian_vec): Likewise.
(bfd_elf32_bigarm_vxworks_vec): Likewise.
(bfd_elf32_littlearm_vec): Likewise.
(bfd_elf32_littlearm_symbian_vec): Likewise.
(bfd_elf32_littlearm_vxworks_vec): Likewise.
* configure: Regenerate.
* elf32-arm.c: Include libiberty.h and elf-vxworks.h.
(RELOC_SECTION, RELOC_SIZE, SWAP_RELOC_IN, SWAP_RELOC_OUT): New macros.
(elf32_arm_vxworks_bed): Add forward declaration.
(elf32_arm_howto_table_1): Fix the masks for R_ASM_ABS12.
(elf32_arm_vxworks_exec_plt0_entry): New table.
(elf32_arm_vxworks_exec_plt_entry): Likewise.
(elf32_arm_vxworks_shared_plt_entry): Likewise.
(elf32_arm_link_hash_table): Add vxworks_p and srelplt2 fields.
(reloc_section_p): New function.
(create_got_section): Use RELOC_SECTION.
(elf32_arm_create_dynamic_sections): Likewise. Call
elf_vxworks_create_dynamic_sections for VxWorks targets.
Choose between the two possible values of plt_header_size
and plt_entry_size.
(elf32_arm_link_hash_table_create): Initialize vxworks_p and srelplt2.
(elf32_arm_abs12_reloc): New function.
(elf32_arm_final_link_relocate): Call it. Allow the creation of
dynamic R_ARM_ABS12 relocs on VxWorks. Use reloc_section_p,
RELOC_SIZE, SWAP_RELOC_OUT and RELOC_SECTION. Initialize the
r_addend fields of relocs. On rela targets, skip any code that
adjusts in-place addends. When using _bfd_link_final_relocate
to perform a final relocation, pass rel->r_addend as the addend
argument.
(elf32_arm_merge_private_bfd_data): If one of the bfds is a VxWorks
object, ignore flags that are not standard on VxWorks.
(elf32_arm_check_relocs): Allow the creation of dynamic R_ARM_ABS12
relocs on VxWorks. Use reloc_section_p.
(elf32_arm_adjust_dynamic_symbol): Use RELOC_SECTION and RELOC_SIZE.
(allocate_dynrelocs): Use RELOC_SIZE. Account for the size of
.rela.plt.unloaded relocs on VxWorks targets.
(elf32_arm_size_dynamic_sections): Use RELOC_SIZE. Check for
.rela.plt.unloaded as well as .rel(a).plt. Add DT_RELA* tags
instead of DT_REL* tags on RELA targets.
(elf32_arm_finish_dynamic_symbol): Use RELOC_SECTION, RELOC_SIZE
and SWAP_RELOC_OUT. Initialize r_addend fields. Handle VxWorks
PLT entries. Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
(elf32_arm_finish_dynamic_sections): Use RELOC_SECTION, RELOC_SIZE
and SWAP_RELOC_OUT. Initialize r_addend fields. Handle DT_RELASZ
like DT_RELSZ. Handle the VxWorks form of initial PLT entry.
Correct the .rela.plt.unreloaded symbol indexes.
(elf32_arm_output_symbol_hook): Call the VxWorks version of this
hook on VxWorks targets.
(elf32_arm_vxworks_link_hash_table_create): Set vxworks_p to true.
Minor formatting tweak.
(elf32_arm_vxworks_final_write_processing): New function.
(elf_backend_add_symbol_hook): Override for VxWorks and reset
for Symbian.
(elf_backend_final_write_processing): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_want_plt_sym): Likewise.
(ELF_MAXPAGESIZE): Likewise.
(elf_backend_may_use_rel_p): Minor formatting tweak.
(elf_backend_may_use_rela_p): Likewise.
(elf_backend_default_use_rela_p): Likewise.
(elf_backend_rela_normal): Likewise.
* Makefile.in (elf32-arm.lo): Depend on elf-vxworks.h.
gas/
* config/tc-arm.c (md_apply_fix): Install a value of zero into a
BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
R_ARM_ABS12 reloc.
(tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
gas/testsuite/
* gas/arm/abs12.s, gas/arm/abs12.d: New test.
* gas/arm/pic.d: Skip for *-*-vxworks*...
* gas/arm/pic_vxworks.d: ...use this version instead.
* gas/arm/unwind_vxworks.d: Fix expected output.
ld/
* emulparams/armelf_vxworks.sh: Include vxworks.sh.
(MAXPAGESIZE): Define.
* emulparams/vxworks.sh: Undefine.
* Makefile.am (earmelf_vxworks.c): Depend on vxworks.sh and vxworks.em.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd,
* ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd,
* ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s,
* ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd,
* ld-arm/vxworks2-static.sd: New tests.
* ld-arm/arm-elf.exp: Run them.
2006-02-28 Jan Beulich <jbeulich@novell.com>
PR/1070
* macro.c (getstring): Don't treat parentheses special anymore.
(get_any_string): Don't consider '(' and ')' as quoting anymore.
Special-case '(', ')', '[', and ']' when dealing with non-quoting
characters.
gas/testsuite/
2006-02-28 Jan Beulich <jbeulich@novell.com>
* gas/macros/paren[sd]: New.
* gas/macros/macros.exp: Run new test.
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (output_insn): Support Intel Merom New
Instructions.
* gas/config/tc-i386.h (CpuMNI): New.
(CpuUnknownFlags): Add CpuMNI.
gas/testsuite/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add merom and x86-64-merom.
* gas/i386/merom.d: New file.
* gas/i386/merom.s: Likewise.
* gas/i386/x86-64-merom.d: Likewise.
* gas/i386/x86-64-merom.s: Likewise.
include/opcode/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Merom New Instructions.
opcodes/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
Intel Merom New Instructions.
(THREE_BYTE_0): Likewise.
(THREE_BYTE_1): Likewise.
(three_byte_table): Likewise.
(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
THREE_BYTE_1 for entry 0x3a.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(print_insn): Handle 3-byte opcodes used by Intel Merom New
Instructions.
* gas/sparc/rdhpr.s: New test.
* gas/sparc/rdhpr.d: New test.
* gas/sparc/wrhpr.s: New test.
* gas/sparc/wrhpr.d: New test.
* gas/sparc/window.s: New test.
* gas/sparc/window.d: New test.
* gas/sparc/rdpr.s: Add case for reading %gl register.
* gas/sparc/rdpr.d: Likewise.
* gas/sparc/wrpr.s: Add case for writing %gl register.
* gas/sparc/wrpr.d: Likewise.
* gas/sparc/sparc.exp: Update for new tests.
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix".
* gas/i386/x86-64-crx-suffix.d: New file.
* gas/i386/x86-64-crx.d: Likewise.
* gas/i386/x86-64-crx.s: Likewise.
opcodes/
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c ('Z'): Add a new macro.
(dis386_twobyte): Use "movZ" for control register moves.
* config/tc-avr.c (mod_index): New union to allow conversion
between pointers and integers.
(md_begin, avr_ldi_expression): Use it.
* config/tc-i370.c (md_assemble): Add cast for argument to print
statement.
* config/tc-tic54x.c (subsym_substitute): Likewise.
* config/tc-mn10200.c (md_assemble): Use a union to convert the
opindex field of fr_cgen structure into a pointer so that it can
be stored in a frag.
* config/tc-mn10300.c (md_assemble): Likewise.
* config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
types.
* config/tc-v850.c: Replace uses of (int) casts with correct
types.
* gas/tic54x/address.d: Work with 64bit hosts.
* gas/tic54x/addrfar.d: Likewise.
* gas/tic54x/align.d: Likewise.
* gas/tic54x/all-opcodes.d: Likewise.
* gas/tic54x/asg.d: Likewise.
* gas/tic54x/cons.d: Likewise.
* gas/tic54x/consfar.d: Likewise.
* gas/tic54x/extaddr.d: Likewise.
* gas/tic54x/field.d: Likewise.
* gas/tic54x/labels.d: Likewise.
* gas/tic54x/loop.d: Likewise.
* gas/tic54x/lp.d: Likewise.
* gas/tic54x/macro.d: Likewise.
* gas/tic54x/math.d: Likewise.
* gas/tic54x/opcodes.d: Likewise.
* gas/tic54x/sections.d: Likewise.
* gas/tic54x/set.d: Likewise.
* gas/tic54x/struct.d: Likewise.
* gas/tic54x/subsym.d: Likewise.
2005-12-22 Jan Beulich <jbeulich@novell.com>
* symbols.h (snapshot_symbol): First parameter is now pointer
to pointer to symbolS.
* symbols.c (snapshot_symbol): Likewise. Store resulting symbol
there. Use symbol_equated_p.
* expr.c (resolve_expression): Change first argument to
snapshot_symbol. Track possibly changed add_symbol consistently
across function. Resolve more special cases with known result.
Also update final_val when replacing add_symbol.
gas/testsuite/
2005-12-22 Jan Beulich <jbeulich@novell.com>
* gas/all/cond.s: Also check .if works on equates to undefined
when the expression value can be known without knowing the
value of the symbol.
* gas/all/cond.l: Adjust.
* gas/i386/equ.s: Also check .if works on (equates to)
registers when the expression value can be known without
knowing the value of the register.
* gas/i386/equ.e: Adjust.
2005-12-14 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (add_prefix): More fine-grained handling of
REX prefixes. Or new prefix value into i.prefix instead of
assigning.
gas/testsuite/
2005-12-14 Jan Beulich <jbeulich@novell.com>
* gas/i386/rex.[sd]: New.
* gas/i386/i386.exp: Run new test.
* config/tc-hppa.c (hppa_fix_adjustable): Don't reject for reduction
R_HPPA relocations that are 32-bits wide.
* gas/all/redef2.d: Allow "$DATA$" as well as ".data" in matches.
* gas/all/weakref1.d: Allow "$CODE$" as well as ".text" in matches.
* gas/hppa/reloc/reloc.exp: Adjust regexp for new output.
* gas/all/gas.exp (redef3): xfail on hppa*-*-hpux*.
* gas/all/redef.d: Add -j "\$DATA\$". Modify regexp to check for
"$DATA$" as well as ".data".
* gas/all/redef2.d: Likewise.
2005-11-17 Jan Beulich <jbeulich@novell.com>
* symbols.h (S_CLEAR_VOLATILE): Declare.
* symbols.c (colon): Also accept redefinable symbols for
redefinition. Clone them before modifying.
(S_CLEAR_VOLATILE): Define.
* cond.c (s_ifdef): Also test for equated symbols.
* read.c (s_comm_internal): Also exclude non-redefinable
equated symbols. Clone redefinable ones before modifying.
(s_weakref): Clone redefinable symbols before modifying.
* doc/internals.texi: Document sy_volatile, sy_forward_ref,
S_IS_VOLATILE, S_SET_VOLATILE, S_CLEAR_VOLATILE,
S_IS_FORWARD_REF, and S_SET_FORWARD_REF.
gas/testsuite/
2005-11-17 Jan Beulich <jbeulich@novell.com>
* gas/all/cond.s: Also check ifdef works on equates and
commons.
* gas/all/cond.l: Adjust.
* gas/all/redef2.s: Also test redefining equate to label.
* gas/all/redef2.d: Adjust.
* gas/all/redef3.[sd]: New.
* gas/all/redef4.s: New.
* gas/all/redef5.s: New.
* gas/elf/redef.s: New, copied from original gas/all/redef2.s.
* gas/elf/redef.d: Remove #source.
* gas/all/gas.exp: Remove exclusion of iq2000-*-* from and
adjust xfails for redefinition tests. Run new tests. Exclude
alpha*-*-*, mips*-*-*, *c54x*-*-* from weakref tests.
* config/tc-arm.c (s_arm_unwind_save_core): Don't emit an extra
opcode if r4-r15 are not saved.
gas/testsuite/
* gas/arm/unwind.s, gas/arm/unwind.d, gas/arm/unwind_vxworks.d: Add
a test for saving only the low registers.
instructions. Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
save/restore encoding of the args field.
* mips16-opc.c: Add MIPS16e save/restore opcodes.
* mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
codes for save/restore.
* config/tc-mips.c (mips16_ip): Add handling of 'm' and 'M' codes
for the MIPS16e save/restore instructions.
* gas/mips/mips.exp: Run new save/restore tests.
* gas/testsuite/gas/mips/mips16e-save.s: New test for generating
different styles of save/restore instructions.
* gas/testsuite/gas/mips/mips16e-save.d: New.
