ld/
* emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes. ld/testsuite/ * ld-powerpc/relbrlt.d: Update for stub alignment change. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise.
This commit is contained in:
parent
6501578cfe
commit
bd518033e9
10 changed files with 36 additions and 21 deletions
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@ -1,3 +1,7 @@
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2011-10-10 Alan Modra <amodra@gmail.com>
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* emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes.
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2011-10-09 Alan Modra <amodra@gmail.com>
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* emultempl/ppc64elf.em (ppc_create_output_section_statements): Add
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@ -378,7 +378,8 @@ ppc_add_stub_section (const char *stub_sec_name, asection *input_section)
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| SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_KEEP);
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stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd,
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stub_sec_name, flags);
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if (stub_sec == NULL)
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if (stub_sec == NULL
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|| !bfd_set_section_alignment (stub_file->the_bfd, stub_sec, 5))
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goto err_ret;
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output_section = input_section->output_section;
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@ -1,3 +1,13 @@
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2011-10-10 Alan Modra <amodra@gmail.com>
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* ld-powerpc/relbrlt.d: Update for stub alignment change.
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* ld-powerpc/tlsexe.g: Likewise.
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* ld-powerpc/tlsexe.r: Likewise.
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* ld-powerpc/tlsexetoc.g: Likewise.
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* ld-powerpc/tlsexetoc.r: Likewise.
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* ld-powerpc/tlsso.g: Likewise.
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* ld-powerpc/tlsso.r: Likewise.
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2011-10-08 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/13250
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@ -7,7 +7,7 @@
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Disassembly of section \.text:
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0*100000b0 <_start>:
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0*100000c0 <_start>:
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[0-9a-f ]*: 49 bf 00 2d bl .*
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[0-9a-f ]*: R_PPC64_REL24 \.text\+0x37e003c
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[0-9a-f ]*: 60 00 00 00 nop
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@ -23,38 +23,38 @@ Disassembly of section \.text:
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[0-9a-f ]*<.*plt_branch.*>:
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[0-9a-f ]*: e9 62 80 00 ld r11,-32768\(r2\)
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[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00d8
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[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00e8
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[0-9a-f ]*: 7d 69 03 a6 mtctr r11
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[0-9a-f ]*: 4e 80 04 20 bctr
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[0-9a-f ]*<.*long_branch.*>:
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[0-9a-f ]*: 49 bf 00 10 b .* <far>
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[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00ec
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[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00fc
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[0-9a-f ]*<.*plt_branch.*>:
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[0-9a-f ]*: e9 62 80 08 ld r11,-32760\(r2\)
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[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00e0
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[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00f0
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[0-9a-f ]*: 7d 69 03 a6 mtctr r11
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[0-9a-f ]*: 4e 80 04 20 bctr
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\.\.\.
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0*137e00ec <far>:
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0*137e00fc <far>:
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[0-9a-f ]*: 4e 80 00 20 blr
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\.\.\.
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0*13bf00d0 <far2far>:
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0*13bf00e0 <far2far>:
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[0-9a-f ]*: 4e 80 00 20 blr
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\.\.\.
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0*157e00d4 <huge>:
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0*157e00e4 <huge>:
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[0-9a-f ]*: 4e 80 00 20 blr
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Disassembly of section \.branch_lt:
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0*157f00d8 <\.branch_lt>:
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0*157f00e8 <\.branch_lt>:
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[0-9a-f ]*: 00 00 00 00 .*
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[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00d0
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[0-9a-f ]*: 13 bf 00 d0 .*
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[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00e0
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[0-9a-f ]*: 13 bf 00 e0 .*
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[0-9a-f ]*: 00 00 00 00 .*
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[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00d4
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[0-9a-f ]*: 15 7e 00 d4 .*
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[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00e4
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[0-9a-f ]*: 15 7e 00 e4 .*
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@ -7,6 +7,6 @@
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.*: +file format elf64-powerpc
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Contents of section \.got:
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.* 00000000 10018610 ffffffff ffff8018 .*
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.* 00000000 10018620 ffffffff ffff8018 .*
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.* 00000000 00000000 00000000 00000000 .*
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.* 00000000 00000000 00000000 00000000 .*
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@ -16,7 +16,7 @@ Section Headers:
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+\[[ 0-9]+\] \.dynstr +.*
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+\[[ 0-9]+\] \.rela\.dyn +.*
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+\[[ 0-9]+\] \.rela\.plt +.*
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+\[[ 0-9]+\] \.text +PROGBITS .* 0+128 0+ +AX +0 +0 +8
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+\[[ 0-9]+\] \.text +PROGBITS .* 0+128 0+ +AX +0 +0 +32
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+\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8
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+\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8
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+\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8
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.*: +file format elf64-powerpc
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Contents of section \.got:
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.* 00000000 100185a8 00000000 00000000 .*
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.* 00000000 100185c0 00000000 00000000 .*
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.* 00000000 00000000 00000000 00000000 .*
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.* 00000000 00000000 00000000 00000001 .*
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.* 00000000 00000000 00000000 00000001 .*
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+\[[ 0-9]+\] \.dynstr +.*
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+\[[ 0-9]+\] \.rela\.dyn +.*
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+\[[ 0-9]+\] \.rela\.plt +.*
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+\[[ 0-9]+\] \.text +PROGBITS .* 0+e8 0+ +AX +0 +0 +8
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+\[[ 0-9]+\] \.text +PROGBITS .* 0+e8 0+ +AX +0 +0 +32
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+\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8
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+\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8
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+\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8
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.*: +file format elf64-powerpc
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Contents of section \.got:
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.* 00000000 00018778 00000000 00000000 .*
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.* 00000000 00018780 00000000 00000000 .*
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.* 00000000 00000000 00000000 00000000 .*
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.* 00000000 00000000 00000000 00000000 .*
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.* 00000000 00000000 00000000 00000000 .*
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[0-9a-f ]+R_PPC64_TPREL16 +0+60 le0 \+ 0
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[0-9a-f ]+R_PPC64_TPREL16_HA +0+68 le1 \+ 0
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[0-9a-f ]+R_PPC64_TPREL16_LO +0+68 le1 \+ 0
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[0-9a-f ]+R_PPC64_TPREL16_DS +0+105f0 \.tdata \+ 28
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[0-9a-f ]+R_PPC64_TPREL16_HA +0+105f0 \.tdata \+ 30
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[0-9a-f ]+R_PPC64_TPREL16_LO +0+105f0 \.tdata \+ 30
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[0-9a-f ]+R_PPC64_TPREL16_DS +0+105f8 \.tdata \+ 28
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[0-9a-f ]+R_PPC64_TPREL16_HA +0+105f8 \.tdata \+ 30
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[0-9a-f ]+R_PPC64_TPREL16_LO +0+105f8 \.tdata \+ 30
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[0-9a-f ]+R_PPC64_DTPMOD64 +0+
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[0-9a-f ]+R_PPC64_DTPREL64 +0+
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[0-9a-f ]+R_PPC64_DTPREL64 +0+18
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