diff --git a/ld/ChangeLog b/ld/ChangeLog index 7be0e7db1f..8257eecd83 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,7 @@ +2011-10-10 Alan Modra + + * emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes. + 2011-10-09 Alan Modra * emultempl/ppc64elf.em (ppc_create_output_section_statements): Add diff --git a/ld/emultempl/ppc64elf.em b/ld/emultempl/ppc64elf.em index 9df85c4dfc..0a49c5ba4c 100644 --- a/ld/emultempl/ppc64elf.em +++ b/ld/emultempl/ppc64elf.em @@ -378,7 +378,8 @@ ppc_add_stub_section (const char *stub_sec_name, asection *input_section) | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_KEEP); stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd, stub_sec_name, flags); - if (stub_sec == NULL) + if (stub_sec == NULL + || !bfd_set_section_alignment (stub_file->the_bfd, stub_sec, 5)) goto err_ret; output_section = input_section->output_section; diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 29ae5aea53..6d323de152 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,13 @@ +2011-10-10 Alan Modra + + * ld-powerpc/relbrlt.d: Update for stub alignment change. + * ld-powerpc/tlsexe.g: Likewise. + * ld-powerpc/tlsexe.r: Likewise. + * ld-powerpc/tlsexetoc.g: Likewise. + * ld-powerpc/tlsexetoc.r: Likewise. + * ld-powerpc/tlsso.g: Likewise. + * ld-powerpc/tlsso.r: Likewise. + 2011-10-08 H.J. Lu PR ld/13250 diff --git a/ld/testsuite/ld-powerpc/relbrlt.d b/ld/testsuite/ld-powerpc/relbrlt.d index c12017de6d..0f0aae0d17 100644 --- a/ld/testsuite/ld-powerpc/relbrlt.d +++ b/ld/testsuite/ld-powerpc/relbrlt.d @@ -7,7 +7,7 @@ Disassembly of section \.text: -0*100000b0 <_start>: +0*100000c0 <_start>: [0-9a-f ]*: 49 bf 00 2d bl .* [0-9a-f ]*: R_PPC64_REL24 \.text\+0x37e003c [0-9a-f ]*: 60 00 00 00 nop @@ -23,38 +23,38 @@ Disassembly of section \.text: [0-9a-f ]*<.*plt_branch.*>: [0-9a-f ]*: e9 62 80 00 ld r11,-32768\(r2\) -[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00d8 +[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00e8 [0-9a-f ]*: 7d 69 03 a6 mtctr r11 [0-9a-f ]*: 4e 80 04 20 bctr [0-9a-f ]*<.*long_branch.*>: [0-9a-f ]*: 49 bf 00 10 b .* -[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00ec +[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00fc [0-9a-f ]*<.*plt_branch.*>: [0-9a-f ]*: e9 62 80 08 ld r11,-32760\(r2\) -[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00e0 +[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00f0 [0-9a-f ]*: 7d 69 03 a6 mtctr r11 [0-9a-f ]*: 4e 80 04 20 bctr \.\.\. -0*137e00ec : +0*137e00fc : [0-9a-f ]*: 4e 80 00 20 blr \.\.\. -0*13bf00d0 : +0*13bf00e0 : [0-9a-f ]*: 4e 80 00 20 blr \.\.\. -0*157e00d4 : +0*157e00e4 : [0-9a-f ]*: 4e 80 00 20 blr Disassembly of section \.branch_lt: -0*157f00d8 <\.branch_lt>: +0*157f00e8 <\.branch_lt>: [0-9a-f ]*: 00 00 00 00 .* -[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00d0 -[0-9a-f ]*: 13 bf 00 d0 .* +[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00e0 +[0-9a-f ]*: 13 bf 00 e0 .* [0-9a-f ]*: 00 00 00 00 .* -[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00d4 -[0-9a-f ]*: 15 7e 00 d4 .* +[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00e4 +[0-9a-f ]*: 15 7e 00 e4 .* diff --git a/ld/testsuite/ld-powerpc/tlsexe.g b/ld/testsuite/ld-powerpc/tlsexe.g index 558f39ff05..4fc913ab5f 100644 --- a/ld/testsuite/ld-powerpc/tlsexe.g +++ b/ld/testsuite/ld-powerpc/tlsexe.g @@ -7,6 +7,6 @@ .*: +file format elf64-powerpc Contents of section \.got: -.* 00000000 10018610 ffffffff ffff8018 .* +.* 00000000 10018620 ffffffff ffff8018 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-powerpc/tlsexe.r b/ld/testsuite/ld-powerpc/tlsexe.r index d79248ea11..fa67483b47 100644 --- a/ld/testsuite/ld-powerpc/tlsexe.r +++ b/ld/testsuite/ld-powerpc/tlsexe.r @@ -16,7 +16,7 @@ Section Headers: +\[[ 0-9]+\] \.dynstr +.* +\[[ 0-9]+\] \.rela\.dyn +.* +\[[ 0-9]+\] \.rela\.plt +.* - +\[[ 0-9]+\] \.text +PROGBITS .* 0+128 0+ +AX +0 +0 +8 + +\[[ 0-9]+\] \.text +PROGBITS .* 0+128 0+ +AX +0 +0 +32 +\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8 diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.g b/ld/testsuite/ld-powerpc/tlsexetoc.g index 50568865cf..556b216138 100644 --- a/ld/testsuite/ld-powerpc/tlsexetoc.g +++ b/ld/testsuite/ld-powerpc/tlsexetoc.g @@ -7,7 +7,7 @@ .*: +file format elf64-powerpc Contents of section \.got: -.* 00000000 100185a8 00000000 00000000 .* +.* 00000000 100185c0 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000001 .* .* 00000000 00000000 00000000 00000001 .* diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.r b/ld/testsuite/ld-powerpc/tlsexetoc.r index d175aa7077..6af3e98da2 100644 --- a/ld/testsuite/ld-powerpc/tlsexetoc.r +++ b/ld/testsuite/ld-powerpc/tlsexetoc.r @@ -16,7 +16,7 @@ Section Headers: +\[[ 0-9]+\] \.dynstr +.* +\[[ 0-9]+\] \.rela\.dyn +.* +\[[ 0-9]+\] \.rela\.plt +.* - +\[[ 0-9]+\] \.text +PROGBITS .* 0+e8 0+ +AX +0 +0 +8 + +\[[ 0-9]+\] \.text +PROGBITS .* 0+e8 0+ +AX +0 +0 +32 +\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8 +\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8 diff --git a/ld/testsuite/ld-powerpc/tlsso.g b/ld/testsuite/ld-powerpc/tlsso.g index 330cb18242..82ccc8dc9d 100644 --- a/ld/testsuite/ld-powerpc/tlsso.g +++ b/ld/testsuite/ld-powerpc/tlsso.g @@ -7,7 +7,7 @@ .*: +file format elf64-powerpc Contents of section \.got: -.* 00000000 00018778 00000000 00000000 .* +.* 00000000 00018780 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* .* 00000000 00000000 00000000 00000000 .* diff --git a/ld/testsuite/ld-powerpc/tlsso.r b/ld/testsuite/ld-powerpc/tlsso.r index 3879d50528..4167b3a5c3 100644 --- a/ld/testsuite/ld-powerpc/tlsso.r +++ b/ld/testsuite/ld-powerpc/tlsso.r @@ -48,9 +48,9 @@ Relocation section '\.rela\.dyn' at offset .* contains 16 entries: [0-9a-f ]+R_PPC64_TPREL16 +0+60 le0 \+ 0 [0-9a-f ]+R_PPC64_TPREL16_HA +0+68 le1 \+ 0 [0-9a-f ]+R_PPC64_TPREL16_LO +0+68 le1 \+ 0 -[0-9a-f ]+R_PPC64_TPREL16_DS +0+105f0 \.tdata \+ 28 -[0-9a-f ]+R_PPC64_TPREL16_HA +0+105f0 \.tdata \+ 30 -[0-9a-f ]+R_PPC64_TPREL16_LO +0+105f0 \.tdata \+ 30 +[0-9a-f ]+R_PPC64_TPREL16_DS +0+105f8 \.tdata \+ 28 +[0-9a-f ]+R_PPC64_TPREL16_HA +0+105f8 \.tdata \+ 30 +[0-9a-f ]+R_PPC64_TPREL16_LO +0+105f8 \.tdata \+ 30 [0-9a-f ]+R_PPC64_DTPMOD64 +0+ [0-9a-f ]+R_PPC64_DTPREL64 +0+ [0-9a-f ]+R_PPC64_DTPREL64 +0+18