1997-02-04 21:42:27 +00:00
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dnl Process this file with autoconf to produce a configure script.
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sinclude(../common/aclocal.m4)
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1996-06-26 03:26:09 +00:00
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AC_PREREQ(2.5)dnl
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1995-11-08 15:44:38 +00:00
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AC_INIT(Makefile.in)
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1996-11-20 10:00:42 +00:00
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SIM_AC_COMMON
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1995-11-08 15:44:38 +00:00
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1997-05-21 06:54:13 +00:00
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dnl Options available in this module
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SIM_AC_OPTION_INLINE(0)
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1997-09-22 09:40:57 +00:00
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SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
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1997-05-21 06:54:13 +00:00
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SIM_AC_OPTION_HOSTENDIAN
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SIM_AC_OPTION_WARNINGS
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1996-06-05 08:16:16 +00:00
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# Ensure a reasonable default simulator is constructed:
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case "${target}" in
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1997-09-07 20:33:22 +00:00
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# start-sanitize-tx19
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mipstx19*-*-*) SIMCONF="-mips1 -mcpu=r1900 -mno-fp --warnings";;
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# end-sanitize-tx19
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1997-10-29 19:42:49 +00:00
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# start-sanitize-tx49
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mips64tx49*-*-*) SIMCONF="-mips3 --warnings -mcpu=r4900";;
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# end-sanitize-tx49
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1997-02-11 13:26:34 +00:00
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# start-sanitize-r5900
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1997-09-23 16:21:23 +00:00
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mips64r59*-*-*) SIMCONF="-mips3 --warnings -mcpu=r5900";;
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1997-02-11 13:26:34 +00:00
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# end-sanitize-r5900
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1996-06-05 08:16:16 +00:00
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mips64*-*-*) SIMCONF="-mips0 --warnings";;
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Add support for mips16 (16 bit MIPS implementation):
* gencode.c (inst_type): Add mips16 instruction encoding types.
(GETDATASIZEINSN): Define.
(MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
mtlo.
(MIPS16_DECODE): New table, for mips16 instructions.
(bitmap_val): New static function.
(struct mips16_op): Define.
(mips16_op_table): New table, for mips16 operands.
(build_mips16_operands): New static function.
(process_instructions): If PC is odd, decode a mips16
instruction. Break out instruction handling into new
build_instruction function.
(build_instruction): New static function, broken out of
process_instructions. Check modifiers rather than flags for SHIFT
bit count and m[ft]{hi,lo} direction.
(usage): Pass program name to fprintf.
(main): Remove unused variable this_option_optind. Change
``*loptarg++'' to ``loptarg++''.
(my_strtoul): Parenthesize && within ||.
* interp.c (sim_trace): If tracefh is NULL, set it to stderr.
(LoadMemory): Accept a halfword pAddr if vAddr is odd.
(simulate): If PC is odd, fetch a 16 bit instruction, and
increment PC by 2 rather than 4.
* configure.in: Add case for mips16*-*-*.
* configure: Rebuild.
1996-11-26 18:12:44 +00:00
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mips16*-*-*) SIMCONF="-mips0 --warnings";;
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1996-06-05 08:16:16 +00:00
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mips*-*-*) SIMCONF="-mips2 --warnings";;
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*) SIMCONF="-mips0 --warnings";;
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esac
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1996-11-20 10:00:42 +00:00
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AC_SUBST(SIMCONF)
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1995-11-08 15:44:38 +00:00
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1997-09-20 18:22:22 +00:00
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case "${target}" in
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# start-sanitize-tx19
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mipstx19*-*-*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
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# end-sanitize-tx19
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*) SIM_SUBTARGET="";;
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esac
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AC_SUBST(SIM_SUBTARGET)
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1997-10-14 07:27:31 +00:00
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#
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# Select the byte order of the target
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#
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1998-01-21 22:08:37 +00:00
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mips_endian=
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default_endian=
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1997-10-14 07:27:31 +00:00
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case "${target}" in
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# start-sanitize-tx19
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1998-01-21 22:08:37 +00:00
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mipstx19*-*-*) default_endian=BIG_ENDIAN ;;
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1997-10-14 07:27:31 +00:00
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# end-sanitize-tx19
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# start-sanitize-r5900
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mips64r59*-*-*) mips_endian=LITTLE_ENDIAN ;;
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# end-sanitize-r5900
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1998-01-21 22:08:37 +00:00
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mips64*-*-*) default_endian=BIG_ENDIAN ;;
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mips16*-*-*) default_endian=BIG_ENDIAN ;;
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mips*-*-*) default_endian=BIG_ENDIAN ;;
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*) default_endian=BIG_ENDIAN ;;
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1997-10-14 07:27:31 +00:00
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esac
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1998-01-21 22:08:37 +00:00
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SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)
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1997-10-14 07:27:31 +00:00
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#
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# Select the bitsize of the target
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#
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case "${target}" in
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# start-sanitize-tx19
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mipstx19*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
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# end-sanitize-tx19
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# start-sanitize-r5900
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mips64r59*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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# end-sanitize-r5900
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mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
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*) mips_bitsize=64 ; mips_msb=63 ;;
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esac
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SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb)
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#
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# Select the floating hardware support of the target
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#
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mips_fpu=HARDWARE_FLOATING_POINT
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case "${target}" in
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# start-sanitize-tx19
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mipstx19*-*-*) mips_fpu=SOFT_FLOATING_POINT ;;
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# end-sanitize-tx19
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# start-sanitize-r5900
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mips64r59*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
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# end-sanitize-r5900
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mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
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mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
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mips*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
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*) mips_fpu=HARD_FLOATING_POINT ;;
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esac
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SIM_AC_OPTION_FLOAT($mips_fpu)
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1998-02-01 03:29:48 +00:00
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#
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# Select the level of SMP support
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#
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case "${target}" in
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# start-sanitize-r5900
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mips64r59*-*-*) mips_smp=1 ;;
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# end-sanitize-r5900
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*) mips_smp=0 ;;
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esac
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SIM_AC_OPTION_SMP($mips_smp)
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1997-10-24 07:54:21 +00:00
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#
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1997-11-05 09:43:34 +00:00
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# Select the IGEN architecture
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1997-10-24 07:54:21 +00:00
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#
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1997-11-05 09:43:34 +00:00
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sim_use_gen=NO
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1997-12-09 04:01:06 +00:00
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sim_igen_machine="-M mipsIV"
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sim_m16_machine="-M mips16"
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1997-11-05 09:43:34 +00:00
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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1997-10-27 07:55:24 +00:00
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1997-10-24 07:54:21 +00:00
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case "${target}" in
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1997-10-27 06:42:13 +00:00
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# start-sanitize-tx19
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1997-11-05 09:43:34 +00:00
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mipstx19*-*-*) sim_default_gen=M16
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1997-12-09 04:01:06 +00:00
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sim_igen_machine="-M tx19"
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sim_m16_machine="-M tx19"
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1997-11-05 09:43:34 +00:00
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sim_igen_filter="32"
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sim_m16_filter="16"
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;;
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1997-10-27 06:42:13 +00:00
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# end-sanitize-tx19
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1997-10-24 07:54:21 +00:00
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# start-sanitize-r5900
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1997-11-05 09:43:34 +00:00
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mips64r59*-*-*) sim_default_gen=IGEN
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1998-01-31 06:56:13 +00:00
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sim_use_gen=IGEN
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1997-12-09 04:01:06 +00:00
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sim_igen_machine="-M r5900"
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1997-11-05 09:43:34 +00:00
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;;
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1997-10-24 07:54:21 +00:00
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# end-sanitize-r5900
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# start-sanitize-vr5400
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1997-11-05 09:43:34 +00:00
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mips64vr54*-*-*) sim_default_gen=IGEN
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sim_use_gen=IGEN
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1997-12-09 04:01:06 +00:00
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sim_igen_machine="-M vr5000,vr5400 -G gen-multi-sim=vr5400"
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1997-11-05 09:43:34 +00:00
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;;
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1997-10-24 07:54:21 +00:00
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# end-sanitize-vr5400
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1997-11-14 08:27:38 +00:00
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mips64vr5*-*-*) sim_default_gen=IGEN
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1997-12-12 19:24:34 +00:00
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sim_use_gen=IGEN
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1997-12-09 04:01:06 +00:00
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sim_igen_machine="-M vr5000"
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1997-12-12 19:24:34 +00:00
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# start-sanitize-vr5400
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sim_igen_machine="-M vr5000,vr5400 -G gen-multi-sim=vr5000"
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# end-sanitize-vr5400
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1997-11-14 08:27:38 +00:00
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;;
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1997-11-05 09:43:34 +00:00
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mips16*-*-*) sim_default_gen=M16
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;;
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mips32*-*-*) sim_default_gen=IGEN
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sim_igen_filter="32,f"
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;;
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*) sim_default_gen=IGEN
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;;
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1997-10-24 07:54:21 +00:00
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esac
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1998-02-01 03:29:48 +00:00
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sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
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sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
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1997-10-27 07:55:24 +00:00
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AC_SUBST(sim_igen_flags)
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AC_SUBST(sim_m16_flags)
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1997-10-24 07:54:21 +00:00
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1997-11-05 09:43:34 +00:00
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#
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# Enable igen
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#
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AC_ARG_ENABLE(sim-igen,
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[ --enable-sim-igen=opts Enable IGEN simulator],
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[case "${enableval}" in
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yes) sim_gen="${sim_default_gen}";;
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no) sim_gen=NO;;
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16) sim_gen=M16;;
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*) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-stdio"); sim_gen="";;
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esac
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if test x"$silent" != x"yes" && test x"$sim_gen" != x""; then
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echo "Setting sim_igen = $sim_gen" 6>&1
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fi],[sim_gen="${sim_use_gen}"])dnl
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AC_SUBST(sim_gen)
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1997-10-24 07:54:21 +00:00
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1997-05-21 06:54:13 +00:00
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AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)
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1996-06-03 15:58:45 +00:00
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AC_CHECK_LIB(m, fabs)
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1996-09-26 10:39:34 +00:00
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AC_CHECK_FUNCS(aint anint sqrt)
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1996-06-03 15:58:45 +00:00
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1996-11-20 10:00:42 +00:00
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SIM_AC_OUTPUT
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