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old-cross-binutils/opcodes/ia64-raw.tbl

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IA-64 ELF support.
2000-04-21 20:22:24 +00:00
Resource Name; Writers; Readers; Semantics of Dependency
ALAT; chk.a.clr, IC:mem-readers-alat, IC:mem-writers, IC:invala-all; IC:mem-readers-alat, IC:mem-writers, IC:chk-a, invala.e; none
AR[BSP]; br.call, brl.call, br.ret, cover, IC:mov-to-AR-BSPSTORE, rfi; br.call, brl.call, br.ia, br.ret, cover, flushrs, loadrs, IC:mov-from-AR-BSP, rfi; impliedF
AR[BSPSTORE]; alloc, loadrs, flushrs, IC:mov-to-AR-BSPSTORE; alloc, br.ia, flushrs, IC:mov-from-AR-BSPSTORE; impliedF
AR[CCV]; IC:mov-to-AR-CCV; br.ia, IC:cmpxchg, IC:mov-from-AR-CCV; impliedF
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
AR[CFLG]; IC:mov-to-AR-CFLG; br.ia, IC:mov-from-AR-CFLG; impliedF
Patch to update IA-64 port to SDM 2.1. bfd/ChangeLog * cpu-ia64-opc.c: Add operand constant "ar.csd". gas/ChangeLog * config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint" instruction. (emit_one_bundle): Handle "hint" instruction. (operand_match): Match IA64_OPND_AR_CSD. gas/testsuite/ChangeLog * gas/ia64/opc-b.d: Update for instructions added by SDM2.1. * gas/ia64/opc-b.s: Ditto. * gas/ia64/opc-f.d: Ditto. * gas/ia64/opc-f.s: Ditto. * gas/ia64/opc-i.d: Ditto. * gas/ia64/opc-i.s: Ditto. * gas/ia64/opc-m.d: Ditto. * gas/ia64/opc-m.s: Ditto. * gas/ia64/opc-x.d: Ditto. * gas/ia64/opc-x.s: Ditto. include/opcode/ChangeLog * ia64.h: Fix copyright message. (IA64_OPND_AR_CSD): New operand kind. opcodes/ChangeLog * ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction. * ia64-opc-b.c: Add "hint.b" instruction. * ia64-opc-f.c: Add "hint.f" instruction. * ia64-opc-i.c: Add "hint.i" instruction. * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and "cmp8xchg16" instructions. * ia64-opc-x.c: Add "hint.x" instruction. * ia64-opc.h (AR_CSD): New macro. * ia64-ic.tbl: Update according to SDM2.1. * ia64-raw.tbl: Ditto. * ia64-waw.tbl: Ditto. * ia64-gen.c (in_iclass): Handle "hint" like "nop". (lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD], AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR]. * ia64-asmtab.c: Regenerate.
2002-12-05 02:08:02 +00:00
AR[CSD]; ld16, IC:mov-to-AR-CSD; br.ia, cmp8xchg16, IC:mov-from-AR-CSD, st16; impliedF
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
AR[EC]; IC:mod-sched-brs, br.ret, IC:mov-to-AR-EC; br.call, brl.call, br.ia, IC:mod-sched-brs, IC:mov-from-AR-EC; impliedF
Patch to update IA-64 port to SDM 2.1. bfd/ChangeLog * cpu-ia64-opc.c: Add operand constant "ar.csd". gas/ChangeLog * config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint" instruction. (emit_one_bundle): Handle "hint" instruction. (operand_match): Match IA64_OPND_AR_CSD. gas/testsuite/ChangeLog * gas/ia64/opc-b.d: Update for instructions added by SDM2.1. * gas/ia64/opc-b.s: Ditto. * gas/ia64/opc-f.d: Ditto. * gas/ia64/opc-f.s: Ditto. * gas/ia64/opc-i.d: Ditto. * gas/ia64/opc-i.s: Ditto. * gas/ia64/opc-m.d: Ditto. * gas/ia64/opc-m.s: Ditto. * gas/ia64/opc-x.d: Ditto. * gas/ia64/opc-x.s: Ditto. include/opcode/ChangeLog * ia64.h: Fix copyright message. (IA64_OPND_AR_CSD): New operand kind. opcodes/ChangeLog * ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction. * ia64-opc-b.c: Add "hint.b" instruction. * ia64-opc-f.c: Add "hint.f" instruction. * ia64-opc-i.c: Add "hint.i" instruction. * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and "cmp8xchg16" instructions. * ia64-opc-x.c: Add "hint.x" instruction. * ia64-opc.h (AR_CSD): New macro. * ia64-ic.tbl: Update according to SDM2.1. * ia64-raw.tbl: Ditto. * ia64-waw.tbl: Ditto. * ia64-gen.c (in_iclass): Handle "hint" like "nop". (lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD], AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR]. * ia64-asmtab.c: Regenerate.
2002-12-05 02:08:02 +00:00
AR[EFLAG]; IC:mov-to-AR-EFLAG; br.ia, IC:mov-from-AR-EFLAG; impliedF
AR[FCR]; IC:mov-to-AR-FCR; br.ia, IC:mov-from-AR-FCR; impliedF
AR[FDR]; IC:mov-to-AR-FDR; br.ia, IC:mov-from-AR-FDR; impliedF
AR[FIR]; IC:mov-to-AR-FIR; br.ia, IC:mov-from-AR-FIR; impliedF
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
AR[FPSR].sf0.controls; IC:mov-to-AR-FPSR, fsetc.s0; br.ia, IC:fp-arith-s0, IC:fcmp-s0, IC:fpcmp-s0, fsetc, IC:mov-from-AR-FPSR; impliedF
AR[FPSR].sf1.controls; IC:mov-to-AR-FPSR, fsetc.s1; br.ia, IC:fp-arith-s1, IC:fcmp-s1, IC:fpcmp-s1, IC:mov-from-AR-FPSR; impliedF
AR[FPSR].sf2.controls; IC:mov-to-AR-FPSR, fsetc.s2; br.ia, IC:fp-arith-s2, IC:fcmp-s2, IC:fpcmp-s2, IC:mov-from-AR-FPSR; impliedF
AR[FPSR].sf3.controls; IC:mov-to-AR-FPSR, fsetc.s3; br.ia, IC:fp-arith-s3, IC:fcmp-s3, IC:fpcmp-s3, IC:mov-from-AR-FPSR; impliedF
AR[FPSR].sf0.flags; IC:fp-arith-s0, fclrf.s0, IC:fcmp-s0, IC:fpcmp-s0, IC:mov-to-AR-FPSR; br.ia, fchkf, IC:mov-from-AR-FPSR; impliedF
AR[FPSR].sf1.flags; IC:fp-arith-s1, fclrf.s1, IC:fcmp-s1, IC:fpcmp-s1, IC:mov-to-AR-FPSR; br.ia, fchkf.s1, IC:mov-from-AR-FPSR; impliedF
AR[FPSR].sf2.flags; IC:fp-arith-s2, fclrf.s2, IC:fcmp-s2, IC:fpcmp-s2, IC:mov-to-AR-FPSR; br.ia, fchkf.s2, IC:mov-from-AR-FPSR; impliedF
AR[FPSR].sf3.flags; IC:fp-arith-s3, fclrf.s3, IC:fcmp-s3, IC:fpcmp-s3, IC:mov-to-AR-FPSR; br.ia, fchkf.s3, IC:mov-from-AR-FPSR; impliedF
AR[FPSR].traps; IC:mov-to-AR-FPSR; br.ia, IC:fp-arith, fchkf, fcmp, fpcmp, IC:mov-from-AR-FPSR; impliedF
AR[FPSR].rv; IC:mov-to-AR-FPSR; br.ia, IC:fp-arith, fchkf, fcmp, fpcmp, IC:mov-from-AR-FPSR; impliedF
Patch to update IA-64 port to SDM 2.1. bfd/ChangeLog * cpu-ia64-opc.c: Add operand constant "ar.csd". gas/ChangeLog * config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint" instruction. (emit_one_bundle): Handle "hint" instruction. (operand_match): Match IA64_OPND_AR_CSD. gas/testsuite/ChangeLog * gas/ia64/opc-b.d: Update for instructions added by SDM2.1. * gas/ia64/opc-b.s: Ditto. * gas/ia64/opc-f.d: Ditto. * gas/ia64/opc-f.s: Ditto. * gas/ia64/opc-i.d: Ditto. * gas/ia64/opc-i.s: Ditto. * gas/ia64/opc-m.d: Ditto. * gas/ia64/opc-m.s: Ditto. * gas/ia64/opc-x.d: Ditto. * gas/ia64/opc-x.s: Ditto. include/opcode/ChangeLog * ia64.h: Fix copyright message. (IA64_OPND_AR_CSD): New operand kind. opcodes/ChangeLog * ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction. * ia64-opc-b.c: Add "hint.b" instruction. * ia64-opc-f.c: Add "hint.f" instruction. * ia64-opc-i.c: Add "hint.i" instruction. * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and "cmp8xchg16" instructions. * ia64-opc-x.c: Add "hint.x" instruction. * ia64-opc.h (AR_CSD): New macro. * ia64-ic.tbl: Update according to SDM2.1. * ia64-raw.tbl: Ditto. * ia64-waw.tbl: Ditto. * ia64-gen.c (in_iclass): Handle "hint" like "nop". (lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD], AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR]. * ia64-asmtab.c: Regenerate.
2002-12-05 02:08:02 +00:00
AR[FSR]; IC:mov-to-AR-FSR; br.ia, IC:mov-from-AR-FSR; impliedF
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
AR[ITC]; IC:mov-to-AR-ITC; br.ia, IC:mov-from-AR-ITC; impliedF
AR[K%], % in 0 - 7; IC:mov-to-AR-K+1; br.ia, IC:mov-from-AR-K+1; impliedF
AR[LC]; IC:mod-sched-brs-counted, IC:mov-to-AR-LC; br.ia, IC:mod-sched-brs-counted, IC:mov-from-AR-LC; impliedF
AR[PFS]; br.call, brl.call; alloc, br.ia, br.ret, epc, IC:mov-from-AR-PFS; impliedF
AR[PFS]; IC:mov-to-AR-PFS; alloc, br.ia, epc, IC:mov-from-AR-PFS; impliedF
AR[PFS]; IC:mov-to-AR-PFS; br.ret; none
AR[RNAT]; alloc, flushrs, loadrs, IC:mov-to-AR-RNAT, IC:mov-to-AR-BSPSTORE; alloc, br.ia, flushrs, loadrs, IC:mov-from-AR-RNAT; impliedF
AR[RSC]; IC:mov-to-AR-RSC; alloc, br.ia, flushrs, loadrs, IC:mov-from-AR-RSC, IC:mov-from-AR-BSPSTORE, IC:mov-to-AR-RNAT, IC:mov-from-AR-RNAT, IC:mov-to-AR-BSPSTORE; impliedF
gas/ 2007-11-14 Tristan Gingold <gingold@adacore.com> * config/tc-ia64.c (AR_RUC): Defined. (ar): Add "ar.ruc". (specify_resource): Handle AR_RUC like AR_ITC. gas/testsuite/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for ar.ruc. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/invalid-ar.s: Likewise. * gas/ia64/regs.s: Add tests for ar.ruc and ar44. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/invalid-ar.l: Likewise. * gas/ia64/regs.d: Likewise. opcodes/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * ia64-ic.tbl: Updated for Itanium 9100 series. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. 2007-11-14 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Handle ar.ruc. * ia64-gen.c (lookup_regindex): Likewise.
2007-11-14 22:31:54 +00:00
AR[RUC]; IC:mov-to-AR-RUC; br.ia, IC:mov-from-AR-RUC; impliedF
Patch to update IA-64 port to SDM 2.1. bfd/ChangeLog * cpu-ia64-opc.c: Add operand constant "ar.csd". gas/ChangeLog * config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint" instruction. (emit_one_bundle): Handle "hint" instruction. (operand_match): Match IA64_OPND_AR_CSD. gas/testsuite/ChangeLog * gas/ia64/opc-b.d: Update for instructions added by SDM2.1. * gas/ia64/opc-b.s: Ditto. * gas/ia64/opc-f.d: Ditto. * gas/ia64/opc-f.s: Ditto. * gas/ia64/opc-i.d: Ditto. * gas/ia64/opc-i.s: Ditto. * gas/ia64/opc-m.d: Ditto. * gas/ia64/opc-m.s: Ditto. * gas/ia64/opc-x.d: Ditto. * gas/ia64/opc-x.s: Ditto. include/opcode/ChangeLog * ia64.h: Fix copyright message. (IA64_OPND_AR_CSD): New operand kind. opcodes/ChangeLog * ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction. * ia64-opc-b.c: Add "hint.b" instruction. * ia64-opc-f.c: Add "hint.f" instruction. * ia64-opc-i.c: Add "hint.i" instruction. * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and "cmp8xchg16" instructions. * ia64-opc-x.c: Add "hint.x" instruction. * ia64-opc.h (AR_CSD): New macro. * ia64-ic.tbl: Update according to SDM2.1. * ia64-raw.tbl: Ditto. * ia64-waw.tbl: Ditto. * ia64-gen.c (in_iclass): Handle "hint" like "nop". (lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD], AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR]. * ia64-asmtab.c: Regenerate.
2002-12-05 02:08:02 +00:00
AR[SSD]; IC:mov-to-AR-SSD; br.ia, IC:mov-from-AR-SSD; impliedF
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
AR[UNAT]{%}, % in 0 - 63; IC:mov-to-AR-UNAT, st8.spill; br.ia, ld8.fill, IC:mov-from-AR-UNAT; impliedF
gas/ 2007-11-14 Tristan Gingold <gingold@adacore.com> * config/tc-ia64.c (AR_RUC): Defined. (ar): Add "ar.ruc". (specify_resource): Handle AR_RUC like AR_ITC. gas/testsuite/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for ar.ruc. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/invalid-ar.s: Likewise. * gas/ia64/regs.s: Add tests for ar.ruc and ar44. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/invalid-ar.l: Likewise. * gas/ia64/regs.d: Likewise. opcodes/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * ia64-ic.tbl: Updated for Itanium 9100 series. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. 2007-11-14 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Handle ar.ruc. * ia64-gen.c (lookup_regindex): Likewise.
2007-11-14 22:31:54 +00:00
AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 46-47, 67-111; IC:none; br.ia, IC:mov-from-AR-rv+1; none
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
AR%, % in 48-63, 112-127; IC:mov-to-AR-ig+1; br.ia, IC:mov-from-AR-ig+1; impliedF
BR%, % in 0 - 7; br.call+1, brl.call+1; IC:indirect-brs+1, IC:indirect-brp+1, IC:mov-from-BR+1; impliedF
BR%, % in 0 - 7; IC:mov-to-BR+1; IC:indirect-brs+1; none
BR%, % in 0 - 7; IC:mov-to-BR+1; IC:indirect-brp+1, IC:mov-from-BR+1; impliedF
CFM; IC:mod-sched-brs; IC:mod-sched-brs; impliedF
CFM; IC:mod-sched-brs; cover, alloc, rfi, loadrs, br.ret, br.call, brl.call; impliedF
CFM; IC:mod-sched-brs; IC:cfm-readers+2; impliedF
CFM; br.call, brl.call, br.ret, clrrrb, cover, rfi; IC:cfm-readers; impliedF
CFM; alloc; IC:cfm-readers; none
CPUID#; IC:none; IC:mov-from-IND-CPUID+3; specific
CR[CMCV]; IC:mov-to-CR-CMCV; IC:mov-from-CR-CMCV; data
CR[DCR]; IC:mov-to-CR-DCR; IC:mov-from-CR-DCR, IC:mem-readers-spec; data
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
CR[EOI]; IC:mov-to-CR-EOI; IC:none; SC Section 5.8.3.4, "End of External Interrupt Register (EOI <20> CR67)" on page 2:119
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
CR[GPTA]; IC:mov-to-CR-GPTA; IC:mov-from-CR-GPTA, thash; data
CR[IFA]; IC:mov-to-CR-IFA; itc.i, itc.d, itr.i, itr.d; implied
CR[IFA]; IC:mov-to-CR-IFA; IC:mov-from-CR-IFA; data
CR[IFS]; IC:mov-to-CR-IFS; IC:mov-from-CR-IFS; data
CR[IFS]; IC:mov-to-CR-IFS; rfi; implied
CR[IFS]; cover; rfi, IC:mov-from-CR-IFS; implied
CR[IHA]; IC:mov-to-CR-IHA; IC:mov-from-CR-IHA; data
gas/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (CR_IIB0): New. (CR_IIB1): Likewise. (cr): Add cr.iib0 and cr.iib1. (specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1. gas/testsuite/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/regs.s: Likewise. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/regs.d: Likewise. include/opcode/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update IA64_RS_CR. opcodes/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1. * ia64-gen.c (lookup_specifier): Likewise. * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated.
2008-08-28 14:07:50 +00:00
CR[IIB%], % in 0 - 1; IC:mov-to-CR-IIB; IC:mov-from-CR-IIB; data
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
CR[IIM]; IC:mov-to-CR-IIM; IC:mov-from-CR-IIM; data
CR[IIP]; IC:mov-to-CR-IIP; IC:mov-from-CR-IIP; data
CR[IIP]; IC:mov-to-CR-IIP; rfi; implied
CR[IIPA]; IC:mov-to-CR-IIPA; IC:mov-from-CR-IIPA; data
CR[IPSR]; IC:mov-to-CR-IPSR; IC:mov-from-CR-IPSR; data
CR[IPSR]; IC:mov-to-CR-IPSR; rfi; implied
CR[IRR%], % in 0 - 3; IC:mov-from-CR-IVR; IC:mov-from-CR-IRR+1; data
CR[ISR]; IC:mov-to-CR-ISR; IC:mov-from-CR-ISR; data
CR[ITIR]; IC:mov-to-CR-ITIR; IC:mov-from-CR-ITIR; data
Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again. gas/ChangeLog * config/tc-ia64.c (dv_sem): Add "stop". (specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now. (specify_resource, case IA64_RS_PRr): New for regs 16 to 62. (specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to match above. (mark_resources): Check IA64_RS_PRr. gas/testsuite/ChangeLog * gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/dv-imply.d: Regenerate. * gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d, gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l, gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise. include/opcode/ChangeLog * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP. opcodes/ChangeLog * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change. * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP. (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62". * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update. * ia64-asmtab.c: Regnerate.
2000-09-22 19:43:50 +00:00
CR[ITIR]; IC:mov-to-CR-ITIR; itc.i, itc.d, itr.i, itr.d; implied
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
CR[ITM]; IC:mov-to-CR-ITM; IC:mov-from-CR-ITM; data
CR[ITV]; IC:mov-to-CR-ITV; IC:mov-from-CR-ITV; data
CR[IVA]; IC:mov-to-CR-IVA; IC:mov-from-CR-IVA; instr
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
CR[IVR]; IC:none; IC:mov-from-CR-IVR; SC Section 5.8.3.2, "External Interrupt Vector Register (IVR <20> CR65)" on page 2:118
CR[LID]; IC:mov-to-CR-LID; IC:mov-from-CR-LID; SC Section 5.8.3.1, "Local ID (LID <20> CR64)" on page 2:117
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
CR[LRR%], % in 0 - 1; IC:mov-to-CR-LRR+1; IC:mov-from-CR-LRR+1; data
CR[PMV]; IC:mov-to-CR-PMV; IC:mov-from-CR-PMV; data
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
CR[PTA]; IC:mov-to-CR-PTA; IC:mov-from-CR-PTA, IC:mem-readers, IC:mem-writers, IC:non-access, thash; data
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
CR[TPR]; IC:mov-to-CR-TPR; IC:mov-from-CR-TPR, IC:mov-from-CR-IVR; data
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
CR[TPR]; IC:mov-to-CR-TPR; IC:mov-to-PSR-l+17, ssm+17; SC Section 5.8.3.3, "Task Priority Register (TPR <20> CR66)" on page 2:119
CR[TPR]; IC:mov-to-CR-TPR; rfi; implied
gas/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (CR_IIB0): New. (CR_IIB1): Likewise. (cr): Add cr.iib0 and cr.iib1. (specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1. gas/testsuite/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/regs.s: Likewise. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/regs.d: Likewise. include/opcode/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update IA64_RS_CR. opcodes/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1. * ia64-gen.c (lookup_specifier): Likewise. * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated.
2008-08-28 14:07:50 +00:00
CR%, % in 3-7, 10-15, 18, 28-63, 75-79, 82-127; IC:none; IC:mov-from-CR-rv+1; none
Add Intel Itanium Series 9500 support bfd/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * cpu-ia64-opc.c (ins_cnt6a): New function. (ext_cnt6a): Ditto. (ins_strd5b): Ditto. (ext_strd5b): Ditto. (elf64_ia64_operands): Add new operand types. gas/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * config/tc-ia64.c (reg_symbol): Add a new register. (indirect_reg): Ditto. (pseudo_func): Add new symbolic constants. (operand_match): Add new operand types recognition. (operand_insn): Add new register recognition. (md_begin): Add new register definition. (specify_resource): Add new register recognition. gas/testsuite/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * gas/testsuite/gas/ia64/psn.d: New file. * gas/testsuite/gas/ia64/psn.s: New file. * gas/testsuite/gas/ia64/ia64.exp: Add new testcase. * gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests. * gas/testsuite/gas/ia64/opc-m.d: Ditto. include/opcode/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * ia64.h (ia64_opnd): Add new operand types. opcodes/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * ia64-asmtab.h (completer_index): Extend bitfield to full uint. * ia64-gen.c: Promote completer index type to longlong. (irf_operand): Add new register recognition. (in_iclass_mov_x): Add an entry for the new mov_* instruction type. (lookup_specifier): Add new resource recognition. (insert_bit_table_ent): Relax abort condition according to the changed completer index type. (print_dis_table): Fix printf format for completer index. * ia64-ic.tbl: Add a new instruction class. * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions. * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions. * ia64-opc.h: Define short names for new operand types. * ia64-raw.tbl: Add new RAW resource for DAHR register. * ia64-waw.tbl: Add new WAW resource for DAHR register. * ia64-asmtab.c: Regenerate.
2012-09-04 13:52:06 +00:00
DAHR%, % in 0-7; br.call, brl.call, br.ret, IC:mov-to-DAHR; br.call, IC:mem-readers, IC:mem-writers, IC:mov-from-DAHR; implied
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
DBR#; IC:mov-to-IND-DBR+3; IC:mov-from-IND-DBR+3; impliedF
DBR#; IC:mov-to-IND-DBR+3; IC:probe-all, IC:lfetch-all, IC:mem-readers, IC:mem-writers; data
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
DTC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, itc.i, itc.d, itr.i, itr.d; IC:mem-readers, IC:mem-writers, IC:non-access; data
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
DTC; itc.i, itc.d, itr.i, itr.d; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, itc.i, itc.d, itr.i, itr.d; impliedF
DTC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; none
DTC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; itc.i, itc.d, itr.i, itr.d; impliedF
DTC_LIMIT*; ptc.g, ptc.ga; ptc.g, ptc.ga; impliedF
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
DTR; itr.d; IC:mem-readers, IC:mem-writers, IC:non-access; data
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
DTR; itr.d; ptc.g, ptc.ga, ptc.l, ptr.d, itr.d; impliedF
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
DTR; ptr.d; IC:mem-readers, IC:mem-writers, IC:non-access; data
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
DTR; ptr.d; ptc.g, ptc.ga, ptc.l, ptr.d; none
DTR; ptr.d; itr.d, itc.d; impliedF
FR%, % in 0 - 1; IC:none; IC:fr-readers+1; none
FR%, % in 2 - 127; IC:fr-writers+1\IC:ldf-c+1\IC:ldfp-c+1; IC:fr-readers+1; impliedF
FR%, % in 2 - 127; IC:ldf-c+1, IC:ldfp-c+1; IC:fr-readers+1; none
Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again. gas/ChangeLog * config/tc-ia64.c (dv_sem): Add "stop". (specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now. (specify_resource, case IA64_RS_PRr): New for regs 16 to 62. (specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to match above. (mark_resources): Check IA64_RS_PRr. gas/testsuite/ChangeLog * gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/dv-imply.d: Regenerate. * gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d, gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l, gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise. include/opcode/ChangeLog * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP. opcodes/ChangeLog * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change. * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP. (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62". * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update. * ia64-asmtab.c: Regnerate.
2000-09-22 19:43:50 +00:00
GR0; IC:none; IC:gr-readers+1; none
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
GR%, % in 1 - 127; IC:ld-c+1+13; IC:gr-readers+1; none
GR%, % in 1 - 127; IC:gr-writers+1\IC:ld-c+1+13; IC:gr-readers+1; impliedF
IBR#; IC:mov-to-IND-IBR+3; IC:mov-from-IND-IBR+3; impliedF
InService*; IC:mov-to-CR-EOI; IC:mov-from-CR-IVR; data
InService*; IC:mov-from-CR-IVR; IC:mov-from-CR-IVR; impliedF
InService*; IC:mov-to-CR-EOI; IC:mov-to-CR-EOI; impliedF
IP; IC:all; IC:all; none
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
ITC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; epc, vmsw; instr
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
ITC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; itc.i, itc.d, itr.i, itr.d; impliedF
ITC; ptc.e, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d; ptr.i, ptr.d, ptc.e, ptc.g, ptc.ga, ptc.l; none
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
ITC; itc.i, itc.d, itr.i, itr.d; epc, vmsw; instr
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
ITC; itc.i, itc.d, itr.i, itr.d; itc.d, itc.i, itr.d, itr.i, ptr.d, ptr.i, ptc.g, ptc.ga, ptc.l; impliedF
ITC_LIMIT*; ptc.g, ptc.ga; ptc.g, ptc.ga; impliedF
ITR; itr.i; itr.i, itc.i, ptc.g, ptc.ga, ptc.l, ptr.i; impliedF
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
ITR; itr.i; epc, vmsw; instr
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
ITR; ptr.i; itc.i, itr.i; impliedF
ITR; ptr.i; ptc.g, ptc.ga, ptc.l, ptr.i; none
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
ITR; ptr.i; epc, vmsw; instr
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
memory; IC:mem-writers; IC:mem-readers; none
MSR#; IC:mov-to-IND-MSR+5; IC:mov-from-IND-MSR+5; specific
PKR#; IC:mov-to-IND-PKR+3; IC:mem-readers, IC:mem-writers, IC:mov-from-IND-PKR+4, IC:probe-all; data
PKR#; IC:mov-to-IND-PKR+3; IC:mov-to-IND-PKR+4; none
PKR#; IC:mov-to-IND-PKR+3; IC:mov-from-IND-PKR+3; impliedF
PKR#; IC:mov-to-IND-PKR+3; IC:mov-to-IND-PKR+3; impliedF
PMC#; IC:mov-to-IND-PMC+3; IC:mov-from-IND-PMC+3; impliedF
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
PMC#; IC:mov-to-IND-PMC+3; IC:mov-from-IND-PMD+3; SC Section 7.2.1, "Generic Performance Counter Registers" for PMC[0].fr on page 2:150
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
PMD#; IC:mov-to-IND-PMD+3; IC:mov-from-IND-PMD+3; impliedF
Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again. gas/ChangeLog * config/tc-ia64.c (dv_sem): Add "stop". (specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now. (specify_resource, case IA64_RS_PRr): New for regs 16 to 62. (specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to match above. (mark_resources): Check IA64_RS_PRr. gas/testsuite/ChangeLog * gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/dv-imply.d: Regenerate. * gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d, gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l, gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise. include/opcode/ChangeLog * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP. opcodes/ChangeLog * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change. * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP. (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62". * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update. * ia64-asmtab.c: Regnerate.
2000-09-22 19:43:50 +00:00
PR0; IC:pr-writers+1; IC:pr-readers-br+1, IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR+12, IC:mov-to-PR+12; none
PR%, % in 1 - 15; IC:pr-writers+1, IC:mov-to-PR-allreg+7; IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR, IC:mov-to-PR+12; impliedF
PR%, % in 1 - 15; IC:pr-writers-fp+1; IC:pr-readers-br+1; impliedF
PR%, % in 1 - 15; IC:pr-writers-int+1, IC:mov-to-PR-allreg+7; IC:pr-readers-br+1; none
PR%, % in 16 - 62; IC:pr-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR, IC:mov-to-PR+12; impliedF
PR%, % in 16 - 62; IC:pr-writers-fp+1; IC:pr-readers-br+1; impliedF
PR%, % in 16 - 62; IC:pr-writers-int+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-readers-br+1; none
PR63; IC:mod-sched-brs, IC:pr-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR, IC:mov-to-PR+12; impliedF
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
PR63; IC:pr-writers-fp+1, IC:mod-sched-brs; IC:pr-readers-br+1; impliedF
PR63; IC:pr-writers-int+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg; IC:pr-readers-br+1; none
PSR.ac; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um; IC:mem-readers, IC:mem-writers; implied
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
PSR.ac; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mem-readers, IC:mem-writers; data
PSR.ac; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR, IC:mov-from-PSR-um; impliedF
PSR.ac; rfi; IC:mem-readers, IC:mem-writers, IC:mov-from-PSR, IC:mov-from-PSR-um; impliedF
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
PSR.be; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um; IC:mem-readers, IC:mem-writers; implied
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
PSR.be; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mem-readers, IC:mem-writers; data
PSR.be; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR, IC:mov-from-PSR-um; impliedF
PSR.be; rfi; IC:mem-readers, IC:mem-writers, IC:mov-from-PSR, IC:mov-from-PSR-um; impliedF
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
PSR.bn; bsw, rfi; IC:gr-readers+10, IC:gr-writers+10; impliedF
gas/ 2007-11-14 Tristan Gingold <gingold@adacore.com> * config/tc-ia64.c (AR_RUC): Defined. (ar): Add "ar.ruc". (specify_resource): Handle AR_RUC like AR_ITC. gas/testsuite/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for ar.ruc. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/invalid-ar.s: Likewise. * gas/ia64/regs.s: Add tests for ar.ruc and ar44. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/invalid-ar.l: Likewise. * gas/ia64/regs.d: Likewise. opcodes/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * ia64-ic.tbl: Updated for Itanium 9100 series. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. 2007-11-14 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Handle ar.ruc. * ia64-gen.c (lookup_regindex): Likewise.
2007-11-14 22:31:54 +00:00
PSR.cpl; epc, br.ret; IC:priv-ops, br.call, brl.call, epc, IC:mov-from-AR-ITC, IC:mov-from-AR-RUC, IC:mov-to-AR-ITC, IC:mov-to-AR-RSC, IC:mov-to-AR-RUC, IC:mov-to-AR-K, IC:mov-from-IND-PMD, IC:probe-all, IC:mem-readers, IC:mem-writers, IC:lfetch-all; implied
PSR.cpl; rfi; IC:priv-ops, br.call, brl.call, epc, IC:mov-from-AR-ITC, IC:mov-from-AR-RUC, IC:mov-to-AR-ITC, IC:mov-to-AR-RSC, IC:mov-to-AR-RUC, IC:mov-to-AR-K, IC:mov-from-IND-PMD, IC:probe-all, IC:mem-readers, IC:mem-writers, IC:lfetch-all; impliedF
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
PSR.da; rfi; IC:mem-readers, IC:lfetch-all, IC:mem-writers, IC:probe-fault; impliedF
PSR.db; IC:mov-to-PSR-l; IC:lfetch-all, IC:mem-readers, IC:mem-writers, IC:probe-fault; data
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
PSR.db; IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
PSR.db; rfi; IC:lfetch-all, IC:mem-readers, IC:mem-writers, IC:mov-from-PSR, IC:probe-fault; impliedF
PSR.dd; rfi; IC:lfetch-all, IC:mem-readers, IC:probe-fault, IC:mem-writers; impliedF
PSR.dfh; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:fr-readers+8, IC:fr-writers+8; data
PSR.dfh; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
PSR.dfh; rfi; IC:fr-readers+8, IC:fr-writers+8, IC:mov-from-PSR; impliedF
PSR.dfl; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:fr-writers+8, IC:fr-readers+8; data
PSR.dfl; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
PSR.dfl; rfi; IC:fr-writers+8, IC:fr-readers+8, IC:mov-from-PSR; impliedF
PSR.di; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; br.ia; data
PSR.di; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
PSR.di; rfi; br.ia, IC:mov-from-PSR; impliedF
PSR.dt; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mem-readers, IC:mem-writers, IC:non-access; data
PSR.dt; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
PSR.dt; rfi; IC:mem-readers, IC:mem-writers, IC:non-access, IC:mov-from-PSR; impliedF
PSR.ed; rfi; IC:lfetch-all, IC:mem-readers-spec; impliedF
PSR.i; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
PSR.ia; rfi; IC:all; none
PSR.ic; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
PSR.ic; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; cover, itc.i, itc.d, itr.i, itr.d, IC:mov-from-interruption-CR, IC:mov-to-interruption-CR; data
PSR.ic; rfi; IC:mov-from-PSR, cover, itc.i, itc.d, itr.i, itr.d, IC:mov-from-interruption-CR, IC:mov-to-interruption-CR; impliedF
PSR.id; rfi; IC:all; none
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
PSR.is; br.ia, rfi; IC:none; none
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
PSR.it; rfi; IC:branches, IC:mov-from-PSR, chk, epc, fchkf, vmsw; impliedF
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
PSR.lp; IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
PSR.lp; IC:mov-to-PSR-l; br.ret; data
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
PSR.lp; rfi; IC:mov-from-PSR, br.ret; impliedF
PSR.mc; rfi; IC:mov-from-PSR; impliedF
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
PSR.mfh; IC:fr-writers+9, IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR-um, IC:mov-from-PSR; impliedF
PSR.mfl; IC:fr-writers+9, IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR-um, IC:mov-from-PSR; impliedF
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
PSR.pk; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:lfetch-all, IC:mem-readers, IC:mem-writers, IC:probe-all; data
PSR.pk; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
PSR.pk; rfi; IC:lfetch-all, IC:mem-readers, IC:mem-writers, IC:mov-from-PSR, IC:probe-all; impliedF
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
PSR.pp; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR; impliedF
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
PSR.ri; rfi; IC:all; none
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
PSR.rt; IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
PSR.rt; IC:mov-to-PSR-l; alloc, flushrs, loadrs; data
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
PSR.rt; rfi; IC:mov-from-PSR, alloc, flushrs, loadrs; impliedF
PSR.si; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
gas/ 2007-11-14 Tristan Gingold <gingold@adacore.com> * config/tc-ia64.c (AR_RUC): Defined. (ar): Add "ar.ruc". (specify_resource): Handle AR_RUC like AR_ITC. gas/testsuite/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for ar.ruc. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/invalid-ar.s: Likewise. * gas/ia64/regs.s: Add tests for ar.ruc and ar44. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/invalid-ar.l: Likewise. * gas/ia64/regs.d: Likewise. opcodes/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * ia64-ic.tbl: Updated for Itanium 9100 series. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. 2007-11-14 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Handle ar.ruc. * ia64-gen.c (lookup_regindex): Likewise.
2007-11-14 22:31:54 +00:00
PSR.si; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-AR-ITC, IC:mov-from-AR-RUC; data
PSR.si; rfi; IC:mov-from-AR-ITC, IC:mov-from-AR-RUC, IC:mov-from-PSR; impliedF
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
PSR.sp; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
PSR.sp; IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l; IC:mov-from-IND-PMD, IC:mov-to-PSR-um, rum, sum; data
PSR.sp; rfi; IC:mov-from-IND-PMD, IC:mov-from-PSR, IC:mov-to-PSR-um, rum, sum; impliedF
PSR.ss; rfi; IC:all; impliedF
PSR.tb; IC:mov-to-PSR-l; IC:branches, chk, fchkf; data
PSR.tb; IC:mov-to-PSR-l; IC:mov-from-PSR; impliedF
PSR.tb; rfi; IC:branches, chk, fchkf, IC:mov-from-PSR; impliedF
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
PSR.up; IC:user-mask-writers-partial+7, IC:mov-to-PSR-um, IC:sys-mask-writers-partial+7, IC:mov-to-PSR-l, rfi; IC:mov-from-PSR-um, IC:mov-from-PSR; impliedF
gas/ 2007-11-14 Tristan Gingold <gingold@adacore.com> * config/tc-ia64.c (AR_RUC): Defined. (ar): Add "ar.ruc". (specify_resource): Handle AR_RUC like AR_ITC. gas/testsuite/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for ar.ruc. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/invalid-ar.s: Likewise. * gas/ia64/regs.s: Add tests for ar.ruc and ar44. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/invalid-ar.l: Likewise. * gas/ia64/regs.d: Likewise. opcodes/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * ia64-ic.tbl: Updated for Itanium 9100 series. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. 2007-11-14 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Handle ar.ruc. * ia64-gen.c (lookup_regindex): Likewise.
2007-11-14 22:31:54 +00:00
PSR.vm; vmsw; IC:mem-readers, IC:mem-writers, IC:mov-from-AR-ITC, IC:mov-from-AR-RUC, IC:mov-from-IND-CPUID, IC:mov-to-AR-ITC, IC:priv-ops\vmsw, cover, thash, ttag; implied
PSR.vm; rfi; IC:mem-readers, IC:mem-writers, IC:mov-from-AR-ITC, IC:mov-from-AR-RUC, IC:mov-from-IND-CPUID, IC:mov-to-AR-ITC, IC:priv-ops\vmsw, cover, thash, ttag; impliedF
gas/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2006-02-23 00:17:24 +00:00
RR#; IC:mov-to-IND-RR+6; IC:mem-readers, IC:mem-writers, itc.i, itc.d, itr.i, itr.d, IC:non-access, ptc.g, ptc.ga, ptc.l, ptr.i, ptr.d, thash, ttag; data
IA-64 ELF support.
2000-04-21 20:22:24 +00:00
RR#; IC:mov-to-IND-RR+6; IC:mov-from-IND-RR+6; impliedF
RSE; IC:rse-writers+14; IC:rse-readers+14; impliedF
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