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old-cross-binutils/ld/testsuite/ld-powerpc/relbrlt.d

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* ld-powerpc/plt1.s: New. * ld-powerpc/plt1.d: New. * ld-powerpc/relbrlt.s: New. * ld-powerpc/relbrlt.d: New. * ld-powerpc/powerpc.exp: Run them.
2006-10-24 13:29:37 +00:00
#source: relbrlt.s
#as: -a64
bfd/ * elf32-ppc.c: Include dwarf2.h. (struct ppc_elf_link_hash_table): Add glink_eh_frame. (ppc_elf_create_glink): Create .eh_frame section. (glink_eh_frame_cie): New array. (ppc_elf_size_dynamic_sections): Size glink_eh_frame. (ppc_elf_finish_dynamic_sections): Write glink_eh_frame. * elf64-ppc.c: Include dwarg2.h. (struct ppc_link_hash_table): Add glink_eh_frame. (create_linkage_sections): Create .eh_frame section. (ppc64_elf_size_dynamic_sections): Arrange to drop unneeded glink_eh_frame. (glink_eh_frame_cie): New array. (ppc64_elf_size_stubs): Size glink_eh_frame. (ppc64_elf_build_stubs): Init glink_eh_frame contents. (ppc64_elf_finish_dynamic_sections): Write glink_eh_frame. ld/ * emulparams/elf32ppc.sh: Source plt_unwind.sh. * emulparams/elf64ppc.sh: Likewise. * emultempl/ppc32elf.em (OPTION_NO_TLS_OPT): Adjust. (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Append to existing values. * emultempl/ppc64elf.em (OPTION_STUBGROUP_SIZE): Adjust. (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Append to existing values. ld/testsuite/ * ld-powerpc/powerpc.exp: Use --no-ld-generated-unwind-info with some tests. * ld-powerpc/relbrlt.d: Likewise.
2011-07-26 01:57:18 +00:00
#ld: -melf64ppc --no-ld-generated-unwind-info --emit-relocs
bfd/ * elf64-ppc.c (build_plt_stub): Add relocs on plt call stubs if emitrelocations. (get_relocs): New function, split out from.. (ppc_build_one_stub): ..here. Add relocs on plt_branch stubs if emitrelocations. Remove indx temp. (ppc_size_one_stub): Count new stub relocs. (ppc64_elf_size_stubs): Count new glink reloc. (ppc64_elf_build_stubs): Emit glink reloc if emitrelocations. (ppc64_elf_finish_dynamic_sections): Output glink relocs. * elf32-ppc.c (ppc_elf_finish_dynamic_sections): Describe non-pic glink code. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. Also check .branch_lt section.
2008-03-01 06:52:52 +00:00
#objdump: -Dr
* ld-powerpc/plt1.s: New. * ld-powerpc/plt1.d: New. * ld-powerpc/relbrlt.s: New. * ld-powerpc/relbrlt.d: New. * ld-powerpc/powerpc.exp: Run them.
2006-10-24 13:29:37 +00:00
.*: file format elf64-powerpc
Disassembly of section \.text:
ld/ * emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes. ld/testsuite/ * ld-powerpc/relbrlt.d: Update for stub alignment change. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise.
2011-10-10 09:05:41 +00:00
0*100000c0 <_start>:
bfd/ * elf64-ppc.c (ADDI_R12_R12, LD_R11_0R2, LD_R2_0R2): Define. Update stub comments. (build_plt_stub): Build two variants, one without "addis". (ppc_build_one_stub): Build stubs without "addis" if possible. (ppc_size_one_stub): Size new stubs. ld/testsuite/ * ld-powerpc/relbrlt.s (.text.pad2): Adjust space. * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.d: Update. * ld-powerpc/tlsexe.g: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.d: Update. * ld-powerpc/tlsexetoc.g: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.d: Update. * ld-powerpc/tlsso.g: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.d: Update. * ld-powerpc/tlstocso.g: Update.
2007-08-13 00:20:59 +00:00
[0-9a-f ]*: 49 bf 00 2d bl .*
[0-9a-f ]*: R_PPC64_REL24 \.text\+0x37e003c
bfd/ * elf64-ppc.c (create_linkage_sections): Use section ".branch_lt" for branch lookup table. ld/ * emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Add ".branch_lt". * emultempl/ppc64elf.em (ppc_add_stub_section): Create without SEC_RELOC flag set. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.r: Update.
2007-02-13 01:53:03 +00:00
[0-9a-f ]*: 60 00 00 00 nop
[0-9a-f ]*: 49 bf 00 19 bl .*
[0-9a-f ]*: R_PPC64_REL24 \.text\+0x3bf0020
[0-9a-f ]*: 60 00 00 00 nop
bfd/ * elf64-ppc.c (ADDI_R12_R12, LD_R11_0R2, LD_R2_0R2): Define. Update stub comments. (build_plt_stub): Build two variants, one without "addis". (ppc_build_one_stub): Build stubs without "addis" if possible. (ppc_size_one_stub): Size new stubs. ld/testsuite/ * ld-powerpc/relbrlt.s (.text.pad2): Adjust space. * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.d: Update. * ld-powerpc/tlsexe.g: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.d: Update. * ld-powerpc/tlsexetoc.g: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.d: Update. * ld-powerpc/tlsso.g: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.d: Update. * ld-powerpc/tlstocso.g: Update.
2007-08-13 00:20:59 +00:00
[0-9a-f ]*: 49 bf 00 21 bl .*
bfd/ * elf64-ppc.c (create_linkage_sections): Use section ".branch_lt" for branch lookup table. ld/ * emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Add ".branch_lt". * emultempl/ppc64elf.em (ppc_add_stub_section): Create without SEC_RELOC flag set. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.r: Update.
2007-02-13 01:53:03 +00:00
[0-9a-f ]*: R_PPC64_REL24 \.text\+0x57e0024
[0-9a-f ]*: 60 00 00 00 nop
[0-9a-f ]*: 00 00 00 00 \.long 0x0
[0-9a-f ]*: 4b ff ff e4 b .* <_start>
* ld-powerpc/plt1.s: New. * ld-powerpc/plt1.d: New. * ld-powerpc/relbrlt.s: New. * ld-powerpc/relbrlt.d: New. * ld-powerpc/powerpc.exp: Run them.
2006-10-24 13:29:37 +00:00
\.\.\.
bfd/ * elf64-ppc.c (create_linkage_sections): Use section ".branch_lt" for branch lookup table. ld/ * emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Add ".branch_lt". * emultempl/ppc64elf.em (ppc_add_stub_section): Create without SEC_RELOC flag set. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.r: Update.
2007-02-13 01:53:03 +00:00
[0-9a-f ]*<.*plt_branch.*>:
bfd/ * elf64-ppc.c (ADDI_R12_R12, LD_R11_0R2, LD_R2_0R2): Define. Update stub comments. (build_plt_stub): Build two variants, one without "addis". (ppc_build_one_stub): Build stubs without "addis" if possible. (ppc_size_one_stub): Size new stubs. ld/testsuite/ * ld-powerpc/relbrlt.s (.text.pad2): Adjust space. * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.d: Update. * ld-powerpc/tlsexe.g: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.d: Update. * ld-powerpc/tlsexetoc.g: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.d: Update. * ld-powerpc/tlsso.g: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.d: Update. * ld-powerpc/tlstocso.g: Update.
2007-08-13 00:20:59 +00:00
[0-9a-f ]*: e9 62 80 00 ld r11,-32768\(r2\)
ld/ * emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes. ld/testsuite/ * ld-powerpc/relbrlt.d: Update for stub alignment change. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise.
2011-10-10 09:05:41 +00:00
[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00e8
bfd/ * elf64-ppc.c (create_linkage_sections): Use section ".branch_lt" for branch lookup table. ld/ * emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Add ".branch_lt". * emultempl/ppc64elf.em (ppc_add_stub_section): Create without SEC_RELOC flag set. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.r: Update.
2007-02-13 01:53:03 +00:00
[0-9a-f ]*: 7d 69 03 a6 mtctr r11
[0-9a-f ]*: 4e 80 04 20 bctr
[0-9a-f ]*<.*long_branch.*>:
bfd/ * elf64-ppc.c (ADDI_R12_R12, LD_R11_0R2, LD_R2_0R2): Define. Update stub comments. (build_plt_stub): Build two variants, one without "addis". (ppc_build_one_stub): Build stubs without "addis" if possible. (ppc_size_one_stub): Size new stubs. ld/testsuite/ * ld-powerpc/relbrlt.s (.text.pad2): Adjust space. * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.d: Update. * ld-powerpc/tlsexe.g: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.d: Update. * ld-powerpc/tlsexetoc.g: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.d: Update. * ld-powerpc/tlsso.g: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.d: Update. * ld-powerpc/tlstocso.g: Update.
2007-08-13 00:20:59 +00:00
[0-9a-f ]*: 49 bf 00 10 b .* <far>
ld/ * emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes. ld/testsuite/ * ld-powerpc/relbrlt.d: Update for stub alignment change. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise.
2011-10-10 09:05:41 +00:00
[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00fc
bfd/ * elf64-ppc.c (create_linkage_sections): Use section ".branch_lt" for branch lookup table. ld/ * emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Add ".branch_lt". * emultempl/ppc64elf.em (ppc_add_stub_section): Create without SEC_RELOC flag set. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.r: Update.
2007-02-13 01:53:03 +00:00
[0-9a-f ]*<.*plt_branch.*>:
bfd/ * elf64-ppc.c (ADDI_R12_R12, LD_R11_0R2, LD_R2_0R2): Define. Update stub comments. (build_plt_stub): Build two variants, one without "addis". (ppc_build_one_stub): Build stubs without "addis" if possible. (ppc_size_one_stub): Size new stubs. ld/testsuite/ * ld-powerpc/relbrlt.s (.text.pad2): Adjust space. * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.d: Update. * ld-powerpc/tlsexe.g: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.d: Update. * ld-powerpc/tlsexetoc.g: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.d: Update. * ld-powerpc/tlsso.g: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.d: Update. * ld-powerpc/tlstocso.g: Update.
2007-08-13 00:20:59 +00:00
[0-9a-f ]*: e9 62 80 08 ld r11,-32760\(r2\)
ld/ * emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes. ld/testsuite/ * ld-powerpc/relbrlt.d: Update for stub alignment change. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise.
2011-10-10 09:05:41 +00:00
[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00f0
bfd/ * elf64-ppc.c (create_linkage_sections): Use section ".branch_lt" for branch lookup table. ld/ * emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Add ".branch_lt". * emultempl/ppc64elf.em (ppc_add_stub_section): Create without SEC_RELOC flag set. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.r: Update.
2007-02-13 01:53:03 +00:00
[0-9a-f ]*: 7d 69 03 a6 mtctr r11
[0-9a-f ]*: 4e 80 04 20 bctr
* ld-powerpc/plt1.s: New. * ld-powerpc/plt1.d: New. * ld-powerpc/relbrlt.s: New. * ld-powerpc/relbrlt.d: New. * ld-powerpc/powerpc.exp: Run them.
2006-10-24 13:29:37 +00:00
\.\.\.
ld/ * emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes. ld/testsuite/ * ld-powerpc/relbrlt.d: Update for stub alignment change. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise.
2011-10-10 09:05:41 +00:00
0*137e00fc <far>:
bfd/ * elf64-ppc.c (create_linkage_sections): Use section ".branch_lt" for branch lookup table. ld/ * emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Add ".branch_lt". * emultempl/ppc64elf.em (ppc_add_stub_section): Create without SEC_RELOC flag set. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.r: Update.
2007-02-13 01:53:03 +00:00
[0-9a-f ]*: 4e 80 00 20 blr
* ld-powerpc/plt1.s: New. * ld-powerpc/plt1.d: New. * ld-powerpc/relbrlt.s: New. * ld-powerpc/relbrlt.d: New. * ld-powerpc/powerpc.exp: Run them.
2006-10-24 13:29:37 +00:00
\.\.\.
ld/ * emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes. ld/testsuite/ * ld-powerpc/relbrlt.d: Update for stub alignment change. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise.
2011-10-10 09:05:41 +00:00
0*13bf00e0 <far2far>:
bfd/ * elf64-ppc.c (create_linkage_sections): Use section ".branch_lt" for branch lookup table. ld/ * emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Add ".branch_lt". * emultempl/ppc64elf.em (ppc_add_stub_section): Create without SEC_RELOC flag set. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.r: Update.
2007-02-13 01:53:03 +00:00
[0-9a-f ]*: 4e 80 00 20 blr
* ld-powerpc/plt1.s: New. * ld-powerpc/plt1.d: New. * ld-powerpc/relbrlt.s: New. * ld-powerpc/relbrlt.d: New. * ld-powerpc/powerpc.exp: Run them.
2006-10-24 13:29:37 +00:00
\.\.\.
ld/ * emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes. ld/testsuite/ * ld-powerpc/relbrlt.d: Update for stub alignment change. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise.
2011-10-10 09:05:41 +00:00
0*157e00e4 <huge>:
bfd/ * elf64-ppc.c (create_linkage_sections): Use section ".branch_lt" for branch lookup table. ld/ * emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Add ".branch_lt". * emultempl/ppc64elf.em (ppc_add_stub_section): Create without SEC_RELOC flag set. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. * ld-powerpc/tlsexe.r: Update. * ld-powerpc/tlsexetoc.r: Update. * ld-powerpc/tlsso.r: Update. * ld-powerpc/tlstocso.r: Update.
2007-02-13 01:53:03 +00:00
[0-9a-f ]*: 4e 80 00 20 blr
bfd/ * elf64-ppc.c (build_plt_stub): Add relocs on plt call stubs if emitrelocations. (get_relocs): New function, split out from.. (ppc_build_one_stub): ..here. Add relocs on plt_branch stubs if emitrelocations. Remove indx temp. (ppc_size_one_stub): Count new stub relocs. (ppc64_elf_size_stubs): Count new glink reloc. (ppc64_elf_build_stubs): Emit glink reloc if emitrelocations. (ppc64_elf_finish_dynamic_sections): Output glink relocs. * elf32-ppc.c (ppc_elf_finish_dynamic_sections): Describe non-pic glink code. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. Also check .branch_lt section.
2008-03-01 06:52:52 +00:00
Disassembly of section \.branch_lt:
ld/ * ldlang.h (lang_output_section_statement_type): Add after_end field. (lang_abs_symbol_at_beginning_of, lang_abs_symbol_at_end_of): Delete. (section_for_dot): Declare. * ldlang.c (lang_size_sections_1): Correct comment. (current_section): Move earlier. (current_assign, prefer_next_section): New static vars. (lang_do_assignments_1): Add found_end param. Detect _end assignment to set found_end. Set os->after_end. Set above statics. (lang_do_assignments): Adjust lang_do_assignments_1 call. Init vars. (section_for_dot): New function. (lang_set_startof): Don't make an absolute symbol. (lang_abs_symbol_at_beginning_of, lang_abs_symbol_at_end_of): Delete. * ldexp.c (new_rel_from_abs): Use section_for_dot. * emultempl/lnk960.em (symbol_at_beginning_of): New function. (symbol_at_end_of): Likewise. (lnk960_after_allocation): Use them. * scripttempl/elf.sc: Precede OTHER_GOT_SYMBOLS with . = .; and likewise before __bss_start. ld/testsuite/ Update far too many tests.
2012-06-15 15:13:41 +00:00
0*157f00e8 .*:
bfd/ * elf64-ppc.c (build_plt_stub): Add relocs on plt call stubs if emitrelocations. (get_relocs): New function, split out from.. (ppc_build_one_stub): ..here. Add relocs on plt_branch stubs if emitrelocations. Remove indx temp. (ppc_size_one_stub): Count new stub relocs. (ppc64_elf_size_stubs): Count new glink reloc. (ppc64_elf_build_stubs): Emit glink reloc if emitrelocations. (ppc64_elf_finish_dynamic_sections): Output glink relocs. * elf32-ppc.c (ppc_elf_finish_dynamic_sections): Describe non-pic glink code. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. Also check .branch_lt section.
2008-03-01 06:52:52 +00:00
[0-9a-f ]*: 00 00 00 00 .*
ld/ * emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes. ld/testsuite/ * ld-powerpc/relbrlt.d: Update for stub alignment change. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise.
2011-10-10 09:05:41 +00:00
[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00e0
[0-9a-f ]*: 13 bf 00 e0 .*
bfd/ * elf64-ppc.c (build_plt_stub): Add relocs on plt call stubs if emitrelocations. (get_relocs): New function, split out from.. (ppc_build_one_stub): ..here. Add relocs on plt_branch stubs if emitrelocations. Remove indx temp. (ppc_size_one_stub): Count new stub relocs. (ppc64_elf_size_stubs): Count new glink reloc. (ppc64_elf_build_stubs): Emit glink reloc if emitrelocations. (ppc64_elf_finish_dynamic_sections): Output glink relocs. * elf32-ppc.c (ppc_elf_finish_dynamic_sections): Describe non-pic glink code. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. Also check .branch_lt section.
2008-03-01 06:52:52 +00:00
[0-9a-f ]*: 00 00 00 00 .*
ld/ * emultempl/ppc64elf.em (ppc_add_stub_section): Align to 32 bytes. ld/testsuite/ * ld-powerpc/relbrlt.d: Update for stub alignment change. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise.
2011-10-10 09:05:41 +00:00
[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00e4
[0-9a-f ]*: 15 7e 00 e4 .*
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