2006-07-18 14:06:10 +00:00
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2006-07-18 Maciej W. Rozycki <macro@mips.com>
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* gas/mips/mips4.s, gas/mips/mips4.d: Enable the "pref" test. Change
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|
arguments for "madd.s" so that the instruction is correct for mips1
|
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and still matches "bc3*".
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2006-07-13 22:25:48 +00:00
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2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
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Michael Meissner <michael.meissner@amd.com>
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* gas/i386/amdfam10.s: New file for amdfam10 instructions.
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* gam/i386/amdfam10.d: Ditto.
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* gas/i386/x86-64-amdfam10.s: Ditto.
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* gam/i386/x86-64-amdfam10.d: Ditto.
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2006-07-12 09:02:00 +00:00
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2006-07-12 Nick Clifton <nickc@redhat.com>
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* gas/sh/basic.exp: Run "too_large" dump test.
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* gas/sh/too_large.s: New test file. Check that .byte directives
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do not generate a bogus overflow message.
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* gas/sh/too_large.s: New test control file.
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2006-07-05 17:08:09 +00:00
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2006-07-05 Julian Brown <julian@codesourcery.com>
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* gas/arm/vfp-neon-syntax.d: Tweak expected fmsrr syntax.
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* gas/arm/vfp-neon-syntax_t2.d: Likewise.
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* gas/arm/vfp2.d: Likewise.
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* gas/arm/vfp2_t2.d: Likewise.
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2006-07-04 16:39:08 +00:00
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2006-07-04 Thiemo Seufer <ths@mips.com>
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* gas/mips/e32-rel2.d, gas/mips/e32-rel4.d: Use -mabi=32 for as.
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* gas/mips/mips.exp: Move mips16e testcase to ELF only tests.
|
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|
Run elf{el}-rel2 and elf-rel4 for all arches with gpr64. Run
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e32-rel2 and e32-rel4 also for 64 bit configurations.
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gas/
2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch_tune_set): New.
(cpu_arch_isa): Likewise.
(i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
nops with short or long nop sequences based on -march=/.arch
and -mtune=.
(set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
set cpu_arch_tune and cpu_arch_tune_flags.
(md_parse_option): For -march=, set cpu_arch_isa and set
cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
0. Set cpu_arch_tune_set to 1 for -mtune=.
(i386_target_format): Don't set cpu_arch_tune.
gas/testsuite/
2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops-1, nops-1-i386, nops-1-i686,
nops-1-merom, nops-2, nops-2-i386, nops-2-merom, x86-64-nops-1,
x86-64-nops-1-k8, x86-64-nops-1-nocona and x86-64-nops-1-merom.
* gas/i386/nops-1.s: New file.
* gas/i386/nops-2.s: Likewise.
* gas/i386/nops-1-i386.d: Likewise.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-1-merom.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d: Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/x86-64-nops-1.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Likewise.
* gas/i386/x86-64-nops-1-merom.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/sse2.d: Updated to expect xchg %ax,%ax as 2 byte
nop.
2006-06-23 21:47:36 +00:00
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2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/i386.exp: Run nops-1, nops-1-i386, nops-1-i686,
|
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|
nops-1-merom, nops-2, nops-2-i386, nops-2-merom, x86-64-nops-1,
|
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|
x86-64-nops-1-k8, x86-64-nops-1-nocona and x86-64-nops-1-merom.
|
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* gas/i386/nops-1.s: New file.
|
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* gas/i386/nops-2.s: Likewise.
|
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|
* gas/i386/nops-1-i386.d: Likewise.
|
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|
* gas/i386/nops-1-i686.d: Likewise.
|
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|
* gas/i386/nops-1-merom.d: Likewise.
|
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|
* gas/i386/nops-1.d: Likewise.
|
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* gas/i386/nops-2-i386.d: Likewise.
|
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* gas/i386/nops-2-merom.d: Likewise.
|
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* gas/i386/nops-2.d: Likewise.
|
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* gas/i386/x86-64-nops-1.s: Likewise.
|
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|
* gas/i386/x86-64-nops-1-k8.d: Likewise.
|
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|
* gas/i386/x86-64-nops-1-merom.d: Likewise.
|
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* gas/i386/x86-64-nops-1-nocona.d: Likewise.
|
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|
* gas/i386/x86-64-nops-1.d: Likewise.
|
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|
* gas/i386/sse2.d: Updated to expect xchg %ax,%ax as 2 byte
|
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|
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|
nop.
|
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|
2006-06-20 17:09:29 +00:00
|
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|
2006-06-20 Thiemo Seufer <ths@networkno.de>
|
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|
|
* gas/mips/mips.exp: Explicitly specify o32 ABI.
|
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|
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|
|
* gas/mips/mips64-dsp.d: Dump o32 register names.
|
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|
* gas/mips/smartmips.d: Explicitly specify o32 ABI.
|
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|
2006-06-18 10:05:27 +00:00
|
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|
2006-06-18 Nick Clifton <nickc@redhat.com>
|
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* gas/arm/group-reloc-alu-encoding-bad.d: Skip for non-ELF
|
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|
targets.
|
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* gas/arm/group-reloc-alu-parsing-bad.d: Likewise.
|
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|
* gas/arm/group-reloc-ldc-encoding-bad.d: Likewise.
|
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|
|
* gas/arm/group-reloc-ldc-parsing-bad.d: Likewise.
|
|
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|
|
* gas/arm/group-reloc-ldc.d: Likewise.
|
|
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|
* gas/arm/group-reloc-ldr-encoding-bad.d: Likewise.
|
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|
|
* gas/arm/group-reloc-ldr-parsing-bad.d: Likewise.
|
|
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|
|
* gas/arm/group-reloc-ldr.d: Likewise.
|
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|
* gas/arm/group-reloc-ldrs-encoding-bad.d: Likewise.
|
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|
|
* gas/arm/group-reloc-ldrs-parsing-bad.d: Likewise.
|
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|
* gas/arm/group-reloc-ldrs.d: Likewise.
|
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|
|
* include/elf/arm.h: Correct names of R_ARM_LDC_G{0,1,2}
to R_ARM_LDC_SB_G{0,1,2} respectively.
bfd/
* bfd-in2.h: Regenerate.
* elf32-arm.c (R_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0,
R_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1, R_ARM_ALU_PC_G2,
R_ARM_LDR_PC_G1, R_ARM_LDR_PC_G2, R_ARM_LDRS_PC_G0,
R_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G2, R_ARM_LDC_PC_G0,
R_ARM_LDC_PC_G1, R_ARM_LDC_PC_G2, R_ARM_ALU_SB_G0_NC,
R_ARM_ALU_SB_G0, R_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1,
R_ARM_ALU_SB_G2, R_ARM_LDR_SB_G0, R_ARM_LDR_SB_G1,
R_ARM_LDR_SB_G2, R_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G1,
R_ARM_LDRS_SB_G2, R_ARM_LDC_SB_G0, R_ARM_LDC_SB_G1,
R_ARM_LDC_SB_G2): New relocation types.
(R_ARM_PC13): Rename to AAELF name R_ARM_LDR_PC_G0 and
adjust HOWTO entry to be consistent with R_ARM_LDR_PC_G1
and friends.
(elf32_arm_howto_table_3): Delete; contents merged into
elf32_arm_howto_table_2.
(elf32_arm_howto_from_type): Adjust correspondingly.
(elf32_arm_reloc_map): Extend with the above relocations.
(calculate_group_reloc_mask): New function.
(identify_add_or_sub): New function.
(elf32_arm_final_link_relocate): Support for the above
relocations.
* reloc.c: Add enumeration entries for BFD_RELOC_ARM_...
codes to correspond to the above relocations.
gas/
* config/tc-arm.c (enum parse_operand_result): New.
(struct group_reloc_table_entry): New.
(enum group_reloc_type): New.
(group_reloc_table): New array.
(find_group_reloc_table_entry): New function.
(parse_shifter_operand_group_reloc): New function.
(parse_address_main): New function, incorporating code
from the old parse_address function. To be used via...
(parse_address): wrapper for parse_address_main; and
(parse_address_group_reloc): new function, likewise.
(enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
OP_ADDRGLDRS, OP_ADDRGLDC.
(parse_operands): Support for these new operand codes.
New macro po_misc_or_fail_no_backtrack.
(encode_arm_cp_address): Preserve group relocations.
(insns): Modify to use the above operand codes where group
relocations are permitted.
(md_apply_fix): Handle the group relocations
ALU_PC_G0_NC through LDC_SB_G2.
(tc_gen_reloc): Likewise.
(arm_force_relocation): Leave group relocations for the linker.
(arm_fix_adjustable): Likewise.
gas/testsuite/
* gas/arm/group-reloc-alu.d: New test.
* gas/arm/group-reloc-alu-encoding-bad.d: New test.
* gas/arm/group-reloc-alu-encoding-bad.l: New test.
* gas/arm/group-reloc-alu-encoding-bad.s: New test.
* gas/arm/group-reloc-alu-parsing-bad.d: New test.
* gas/arm/group-reloc-alu-parsing-bad.l: New test.
* gas/arm/group-reloc-alu-parsing-bad.s: New test.
* gas/arm/group-reloc-alu.s: New test.
* gas/arm/group-reloc-ldc.d: New test.
* gas/arm/group-reloc-ldc-encoding-bad.d: New test.
* gas/arm/group-reloc-ldc-encoding-bad.l: New test.
* gas/arm/group-reloc-ldc-encoding-bad.s: New test.
* gas/arm/group-reloc-ldc-parsing-bad.d: New test.
* gas/arm/group-reloc-ldc-parsing-bad.l: New test.
* gas/arm/group-reloc-ldc-parsing-bad.s: New test.
* gas/arm/group-reloc-ldc.s: New test.
* gas/arm/group-reloc-ldr.d: New test.
* gas/arm/group-reloc-ldr-encoding-bad.d: New test.
* gas/arm/group-reloc-ldr-encoding-bad.l: New test.
* gas/arm/group-reloc-ldr-encoding-bad.s: New test.
* gas/arm/group-reloc-ldr-parsing-bad.d: New test.
* gas/arm/group-reloc-ldr-parsing-bad.l: New test.
* gas/arm/group-reloc-ldr-parsing-bad.s: New test.
* gas/arm/group-reloc-ldr.s: New test.
* gas/arm/group-reloc-ldrs.d: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.d: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.l: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.s: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.d: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.l: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.s: New test.
* gas/arm/group-reloc-ldrs.s: New test.
ld/testsuite/
* ld-arm/group-relocs-alu-bad.d: New test.
* ld-arm/group-relocs-alu-bad.s: New test.
* ld-arm/group-relocs.d: New test.
* ld-arm/group-relocs-ldc-bad.d: New test.
* ld-arm/group-relocs-ldc-bad.s: New test.
* ld-arm/group-relocs-ldr-bad.d: New test.
* ld-arm/group-relocs-ldr-bad.s: New test.
* ld-arm/group-relocs-ldrs-bad.d: New test.
* ld-arm/group-relocs-ldrs-bad.s: New test.
* ld-arm/group-relocs.s: New test.
* ld-arm/arm-elf.exp: Wire in new tests.
2006-06-15 11:03:02 +00:00
|
|
|
|
2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/group-reloc-alu.d: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-alu-encoding-bad.d: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-alu-encoding-bad.l: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-alu-encoding-bad.s: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-alu-parsing-bad.d: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-alu-parsing-bad.l: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-alu-parsing-bad.s: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-alu.s: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldc.d: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldc-encoding-bad.d: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldc-encoding-bad.l: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldc-encoding-bad.s: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldc-parsing-bad.d: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldc-parsing-bad.l: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldc-parsing-bad.s: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldc.s: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldr.d: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldr-encoding-bad.d: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldr-encoding-bad.l: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldr-encoding-bad.s: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldr-parsing-bad.d: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldr-parsing-bad.l: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldr-parsing-bad.s: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldr.s: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldrs.d: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldrs-encoding-bad.d: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldrs-encoding-bad.l: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldrs-encoding-bad.s: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldrs-parsing-bad.d: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldrs-parsing-bad.l: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldrs-parsing-bad.s: New test.
|
|
|
|
|
|
* gas/arm/group-reloc-ldrs.s: New test.
|
|
|
|
|
|
|
2006-06-14 18:04:44 +00:00
|
|
|
|
2006-06-14 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Maciej W. Rozycki <macro@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/elf-rel6.d, gas/mips/elf-rel6.s: Extend testcase.
|
|
|
|
|
|
* gas/mips/elf-rel6.d-n32.d, gas/mips/elf-rel6-n64.d: New files.
|
|
|
|
|
|
* gas/mips/mips.exp: Run new testcases.
|
|
|
|
|
|
|
2006-06-14 08:29:42 +00:00
|
|
|
|
2006-06-14 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips16e-jrc.d, gas/mips/mips16e-save.d,
|
|
|
|
|
|
gas/mips/mips32-dsp.d, gas/mips/mips32-mt.d: Explicitly specify
|
|
|
|
|
|
o32 ABI.
|
|
|
|
|
|
|
2006-06-12 18:59:37 +00:00
|
|
|
|
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Run nops and x86-64-nops.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/nops.d: New file.
|
|
|
|
|
|
* gas/i386/nops.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-nops.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-nops.s: Likewise.
|
|
|
|
|
|
|
gas/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Don't add rex64 for
"xchg %rax,%rax".
gas/testsuite/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/opcode.s: Add "xchg %ax,%ax".
* gas/i386/opcode.d: Updated.
* gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax,
xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8.
* gas/i386/x86-64-opcode.d: Updated.
include/opcode/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Update comment for 64bit NOP.
opcodes/
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (NOP_Fixup): Removed.
(NOP_Fixup1): New.
(NOP_Fixup2): Likewise.
(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
2006-06-12 18:55:44 +00:00
|
|
|
|
2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/opcode.s: Add "xchg %ax,%ax".
|
|
|
|
|
|
* gas/i386/opcode.d: Updated.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax,
|
|
|
|
|
|
xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8.
|
|
|
|
|
|
* gas/i386/x86-64-opcode.d: Updated.
|
|
|
|
|
|
|
2006-06-09 11:53:39 +00:00
|
|
|
|
2006-06-09 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips32-sf32.s, gas/mips/mips32-sf32.d: New test for odd
|
|
|
|
|
|
single precision FPRs on MIPS32.
|
|
|
|
|
|
* gas/mips/mips.exp: Run them.
|
|
|
|
|
|
|
2006-06-08 21:42:50 +00:00
|
|
|
|
2006-06-08 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips32.s: Added cop2 branches with explicit condition
|
|
|
|
|
|
code register numbers.
|
|
|
|
|
|
* gas/mips/mips32.d: Likewise.
|
|
|
|
|
|
|
2006-06-07 14:31:51 +00:00
|
|
|
|
2006-06-07 Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/itblock.s: New file. Helper macro for making all-true IT
|
|
|
|
|
|
blocks.
|
|
|
|
|
|
* gas/arm/neon-cond-bad-inc.s: New test. Make sure unconditional
|
|
|
|
|
|
Neon instructions are rejected...
|
|
|
|
|
|
* gas/arm/neon-cond-bad.s: In ARM mode, and...
|
|
|
|
|
|
* gas/arm/neon-cond-bad_t2.s: Accepted in Thumb mode (with IT).
|
|
|
|
|
|
* gas/arm/neon-cond-bad.l: Expected error output in ARM mode.
|
|
|
|
|
|
* gas/arm/neon-cond-bad.d: Control ARM mode test.
|
|
|
|
|
|
* gas/arm/neon-cond-bad_t2.d: Expected output in Thumb mode.
|
|
|
|
|
|
* gas/arm/vfp-neon-syntax-inc.s: Test VFP Neon-style syntax.
|
|
|
|
|
|
* gas/arm/vfp-neon-syntax.s: ...in ARM mode.
|
|
|
|
|
|
* gas/arm/vfp-neon-syntax_t2.s: ...and Thumb mode.
|
|
|
|
|
|
* gas/arm/vfp-neon-syntax.d: Expected output in ARM mode.
|
|
|
|
|
|
* gas/arm/vfp-neon-syntax_t2.d: Expected output in Thumb mode.
|
|
|
|
|
|
|
2006-06-07 14:08:19 +00:00
|
|
|
|
2006-06-06 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/thumb2_bcond.d: Update expected output.
|
|
|
|
|
|
* gas/arm/thumb32.d: Ditto.
|
|
|
|
|
|
* gas/arm/vfp1_t2.d: Ditto.
|
|
|
|
|
|
* gas/arm/vfp1xD_t2.d: Ditto.
|
|
|
|
|
|
|
2006-06-06 10:49:48 +00:00
|
|
|
|
2006-06-06 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Chao-ying Fu <fu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips64-dsp.s, gas/mips/mips64-dsp.d: New DSP64 tests.
|
|
|
|
|
|
* gas/mips/mips.exp: Run DSP64 tests.
|
|
|
|
|
|
|
2006-06-05 16:28:36 +00:00
|
|
|
|
2006-06-05 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips32-dsp.d, gas/mips/mips32-dsp.s, gas/mips/mips32-mt.d,
|
|
|
|
|
|
gas/mips/mips32-mt.s: Remove instructions with invalid arguments.
|
|
|
|
|
|
* gas/mips/mips32-dsp.l, gas/mips/mips32-mt.l: Delete file.
|
|
|
|
|
|
|
2006-05-25 08:09:03 +00:00
|
|
|
|
2006-05-25 Richard Sandiford <richard@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/m68k/mcf-fpu.s: Add fmovemd and fmovem instructions.
|
|
|
|
|
|
* gas/m68k/mcf-fpu.d: Adjust accordingly.
|
|
|
|
|
|
|
2006-05-25 04:07:53 +00:00
|
|
|
|
2006-05-25 Jie Zhang <jie.zhang@analog.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/bfin/vector2.s, gas/bfin/vector2.d: Test to ensure (m) is not
|
|
|
|
|
|
thrown away.
|
|
|
|
|
|
|
[ gas/ChangeLog ]
* config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
(ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
ISA_HAS_MXHC1): New macros.
(HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
(mips_cpu_info): Change to use combined ASE/IS_ISA flag.
(MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
(mips_after_parse_args): Change default handling of float register
size to account for 32bit code with 64bit FP. Better sanity checking
of ISA/ASE/ABI option combinations.
(s_mipsset): Support switching of GPR and FPR sizes via
.set {g,f}p={32,64,default}. Better sanity checking for .set ASE
options.
(mips_elf_final_processing): We should record the use of 64bit FP
registers in 32bit code but we don't, because ELF header flags are
a scarce ressource.
(mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
(mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
* doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
missing -march options. Document .set arch=CPU. Move .set smartmips
to ASE page. Use @code for .set FOO examples.
[ gas/testsuite/Changelog ]
* gas/mips/mips-gp32-fp64-pic.d, mips/mips-gp32-fp64.d,
gas/mips/mips-gp64-fp32-pic.d, gas/mips/mips-gp64-fp32.l,
gas/mips/mips-gp64-fp64.d: Adjust test cases to the changes assembler
output.
* gas/mips/mips-gp32-fp64.l, gas/mips/mips-gp64-fp32-pic.l: New files,
catch assembler warnings.
2006-05-23 15:37:20 +00:00
|
|
|
|
2006-05-23 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips-gp32-fp64-pic.d, mips/mips-gp32-fp64.d,
|
|
|
|
|
|
gas/mips/mips-gp64-fp32-pic.d, gas/mips/mips-gp64-fp32.l,
|
|
|
|
|
|
gas/mips/mips-gp64-fp64.d: Adjust test cases to the changes assembler
|
|
|
|
|
|
output.
|
|
|
|
|
|
* gas/mips/mips-gp32-fp64.l, gas/mips/mips-gp64-fp32-pic.l: New files,
|
|
|
|
|
|
catch assembler warnings.
|
|
|
|
|
|
|
2006-05-22 08:58:08 +00:00
|
|
|
|
2006-05-22 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips32-dsp.l: Fix expected unsigned decoding of -1 in
|
|
|
|
|
|
warning messages.
|
|
|
|
|
|
* gas/mips/mips32-mt.l: Likewise.
|
|
|
|
|
|
|
2006-05-19 22:48:13 +00:00
|
|
|
|
2006-05-19 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/vxworks1-el.d, gas/mips/vxworks1-xgot-el.d: Add little
|
|
|
|
|
|
endian testcases.
|
|
|
|
|
|
* gas/mips/vxworks1.d, gas/mips/vxworks1-xgot.d: Build as big endian.
|
|
|
|
|
|
* gas/mips/mips.exp: Run new testcases.
|
|
|
|
|
|
|
2006-05-14 15:35:22 +00:00
|
|
|
|
2006-05-14 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips.exp: Run new tests.
|
|
|
|
|
|
* gas/mips/mips16e.s, gas/mips/mips16e.d, gas/mips/mips16e-64.s,
|
|
|
|
|
|
gas/mips/mips16e-64.d, gas/mips/mips16e-64.l: New tests.
|
|
|
|
|
|
|
2006-05-11 15:05:17 +00:00
|
|
|
|
2006-05-11 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/local_function.d: New test.
|
|
|
|
|
|
* gas/arm/local_function.s: New test.
|
|
|
|
|
|
|
2006-05-11 14:30:58 +00:00
|
|
|
|
2006-05-11 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/jal-range.l: Don't check the range of j or jal
|
|
|
|
|
|
addresses.
|
|
|
|
|
|
|
2006-05-09 17:05:55 +00:00
|
|
|
|
2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-gidt.d: Adjusted.
|
|
|
|
|
|
|
2006-05-09 16:05:40 +00:00
|
|
|
|
2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Run x86-64-gidt.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-gidt.d: New file.
|
|
|
|
|
|
* gas/i386/x86-64-gidt.s: Likewise.
|
|
|
|
|
|
|
2006-05-09 14:16:50 +00:00
|
|
|
|
2006-05-09 David Ung <davidu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/jal-range.l: Only warn about an out-of-range j or jal
|
|
|
|
|
|
address.
|
|
|
|
|
|
|
2006-05-08 18:18:09 +00:00
|
|
|
|
2006-05-08 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips32.s, gas/mips/mips32.d: Extend testcase to check
|
|
|
|
|
|
larger offset arguments for cache instructions.
|
|
|
|
|
|
|
2006-05-08 15:57:05 +00:00
|
|
|
|
2006-05-08 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
|
|
|
|
|
David Ung <davidu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/smartmips.s, gas/mips/smartmips.d: New smartmips test.
|
|
|
|
|
|
* gas/mips/mips.exp: Run smartmips test.
|
|
|
|
|
|
|
2006-05-05 18:53:09 +00:00
|
|
|
|
2006-05-05 Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/vfp-neon-overlap.s: New test. Overlapping VFP/Neon
|
|
|
|
|
|
instructions.
|
|
|
|
|
|
* gas/arm/vfp-neon-overlap.d: Expected output of above.
|
|
|
|
|
|
* gas/arm/vfp1xD.d: Test for fldmx/fstmx.
|
|
|
|
|
|
* gas/arm/vfp1xD_t2.d: Likewise.
|
|
|
|
|
|
* gas/arm/vfpv3-32drs.d: Likewise.
|
|
|
|
|
|
|
2006-05-05 16:38:09 +00:00
|
|
|
|
2006-05-05 Nigel Stephens <nigel@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/noreorder.s, gas/mips/noreorder.d: New test for
|
|
|
|
|
|
reorder/noreorder corner case.
|
|
|
|
|
|
* gas/mips/mips.exp: Run new test.
|
|
|
|
|
|
|
2006-05-04 15:41:00 +00:00
|
|
|
|
2006-05-04 Kazu Hirata <kazu@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/armv1.d (error-output): New.
|
|
|
|
|
|
* gas/arm/armv1.l: New.
|
|
|
|
|
|
* gas/arm/thumb32.d (error-output): New.
|
|
|
|
|
|
* gas/arm/thumb32.l: New.
|
|
|
|
|
|
|
[ gas/testsuite/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
* gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2.
* gas/mips/set-arch.d: Adjust according to opcode table changes.
[ include/opcode/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips.h: Add INSN_SMARTMIPS define.
[ opcodes/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips-dis.c (mips_arch_choices): Add smartmips instruction
decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
MIPS64R2.
* mips-opc.c: fix random typos in comments.
(INSN_SMARTMIPS): New defines.
(mips_builtin_opcodes): Add paired single support for MIPS32R2.
Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
FP_S and FP_D flags to denote single and double register
accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
for MIPS32R2. Add SmartMIPS instructions. Add two-argument
variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
release 2 ISAs.
* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
2006-05-04 10:47:05 +00:00
|
|
|
|
2006-05-04 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2.
|
|
|
|
|
|
* gas/mips/set-arch.d: Adjust according to opcode table changes.
|
|
|
|
|
|
|
2006-05-03 20:59:20 +00:00
|
|
|
|
2006-05-03 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips32-mt.d: Fix mftr argument order.
|
|
|
|
|
|
|
2006-05-02 14:42:30 +00:00
|
|
|
|
2006-05-02 Joseph Myers <joseph@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/iwmmxt.s: Increase offsets for wstrb and wstrh.
|
|
|
|
|
|
* gas/arm/iwmmxt.d: Update expected results.
|
|
|
|
|
|
* gas/arm/iwmmxt-bad2.s: Test wstrb, wstrh, wldrb and wldrh.
|
|
|
|
|
|
* gas/arm/iwmmxt-bad2.l: Update expected error messages.
|
|
|
|
|
|
|
2006-04-30 00:21:26 +00:00
|
|
|
|
2006-04-29 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/fp.d: New file.
|
|
|
|
|
|
* gas/i386/fp.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Run "fp".
|
|
|
|
|
|
|
2006-04-28 13:17:00 +00:00
|
|
|
|
2006-04-28 Thiemo Seufer <ths@mips.com>
|
|
|
|
|
|
David Ung <davidu@mips.com>
|
2006-04-28 13:38:49 +00:00
|
|
|
|
Nigel Stephens <nigel@mips.com>
|
2006-04-28 13:17:00 +00:00
|
|
|
|
|
|
|
|
|
|
* gas/mips/cp0sel-names-mips32r2.d,
|
|
|
|
|
|
gas/mips/cp0sel-names-mips64r2.d: Update for MT register names.
|
|
|
|
|
|
|
2006-04-26 16:02:40 +00:00
|
|
|
|
2006-04-26 Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
2006-04-28 13:17:00 +00:00
|
|
|
|
* gas/arm/neon-const.s: New testcase. Neon floating-point constants.
|
|
|
|
|
|
* gas/arm/neon-const.d: Expected output of above.
|
|
|
|
|
|
* gas/arm/neon-cov.d: Expect floating-point disassembly for VMOV.F32.
|
2006-04-26 16:02:40 +00:00
|
|
|
|
|
2006-04-26 15:55:17 +00:00
|
|
|
|
2006-04-26 Julian Brown <julian@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/neon-psyn.s: Basic test of programmers syntax.
|
|
|
|
|
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* gas/arm/neon-psyn.d: Expected output of above.
|
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|
|
2006-04-26 Julian Brown <julian@codesourcery.com>
|
2006-04-26 15:42:17 +00:00
|
|
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|
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|
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|
* gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon instruction.
|
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|
|
|
|
* gas/arm/copro.d: Update accordingly.
|
|
|
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|
|
* gas/arm/neon-cond.s: New test. Conditional Neon opcodes in ARM mode.
|
|
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|
* gas/arm/neon-cond.d: Expected results of above.
|
|
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|
* gas/arm/neon-cov.s: New test. Coverage of Neon instructions.
|
|
|
|
|
|
* gas/arm/neon-cov.d: Expected results of above.
|
|
|
|
|
|
* gas/arm/neon-ldst-es.s: New test. Element and structure loads and
|
|
|
|
|
|
stores.
|
|
|
|
|
|
* gas/arm/neon-ldst-es.d: Expected results of above.
|
|
|
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|
* gas/arm/neon-ldst-rm.s: New test. Single and multiple register loads
|
|
|
|
|
|
and stores.
|
|
|
|
|
|
* gas/arm/neon-ldst-rm.d: Expected results of above.
|
|
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|
* gas/arm/neon-omit.s: New test. Omission of optional operands.
|
|
|
|
|
|
* gas/arm/neon-omit.d: Expected results of above.
|
|
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|
* gas/arm/vfp1.d: Expect Neon syntax for some VFP instructions.
|
|
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* gas/arm/vfp1_t2.d: Likewise.
|
|
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* gas/arm/vfp1xD.d: Likewise.
|
|
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* gas/arm/vfp1xD_t2.d: Likewise.
|
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* gas/arm/vfp2.d: Likewise.
|
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|
* gas/arm/vfp2_t2.d: Likewise.
|
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|
* gas/arm/vfp3-32drs.s: New test. Extended D register range for VFP
|
|
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|
|
|
instructions.
|
|
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|
|
* gas/arm/vfp3-32drs.d: Expected results of above.
|
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|
* gas/arm/vfp3-const-conv.s: New test. VFPv3 constant-load and
|
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|
|
conversion instructions.
|
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|
* gas/arm/vfp3-const-conv.d: Expected results of above.
|
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|
2006-04-20 12:39:51 +00:00
|
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|
2005-04-20 Paul Brook <paul@codesourcery.com>
|
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* gas/arm/arch7.d: Remove skip.
|
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* gas/arm/svc.d: Ditto.
|
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* gas/arm/thumb2_bcond.d: Ditto.
|
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* gas/arm/thumb2_it_bad.d: Ditto.
|
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|
2006-04-18 17:52:37 +00:00
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|
2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
|
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PR gas/2533
|
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* gas/i386/inval.s: Add test for illegal immediate register
|
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operand.
|
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* gas/i386/inval.l: Updated.
|
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|
2006-04-16 11:53:00 +00:00
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|
2006-04-16 Nick Clifton <nickc@redhat.com>
|
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* gas/arm/arch7.d: Skip test for non-ELF targets.
|
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* gas/arm/blx-local.d: Likewise.
|
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* gas/arm/svc.d: Likewise.
|
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* gas/arm/thumb2_bcond.d: Likewise.
|
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* gas/arm/thumb2_it_bad.d: Likewise.
|
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|
2006-04-07 15:08:04 +00:00
|
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|
|
2006-04-07 Paul Brook <paul@codesourcery.com>
|
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* gas/arm/blx-local.d: New test.
|
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* gas/arm/blx-local.d: New test.
|
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|
2006-04-07 15:03:45 +00:00
|
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|
2006-04-07 Paul Brook <paul@codesourcery.com>
|
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* gas/arm/thumb2_pool.d: New test.
|
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* gas/arm/thumb2_pool.s: New test.
|
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|
bfd/
* config.bfd (sparc-*-vxworks*): New stanza.
* configure.in (bfd_elf32_sparc_vxworks_vec): New stanza.
(bfd_elf32_sparc_vec, bfd_elf64_sparc_vec): Add elf-vxworks.lo.
* configure: Regenerate.
* elf32-sparc.c: Include elf-vxworks.h.
(elf32_sparc_vxworks_link_hash_table_create: New.
(elf32_sparc_vxworks_final_write_processing): New.
(TARGET_BIG_SYM): Override for VxWorks.
(TARGET_BIG_NAME, ELF_MINPAGESIZE): Likewise.
(bfd_elf32_bfd_link_hash_table_create): Likewise.
(elf_backend_want_got_plt, elf_backend_plt_readonly): Likewise.
(elf_backend_got_header_size, elf_backend_add_symbol_hook): Likewise.
(elf_backend_link_output_symbol_hook): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_final_write_processing, elf32_bed): Likewise.
* elfxx-sparc.c: Include libiberty.h and elf-vxworks.h.
(sparc_vxworks_exec_plt0_entry, sparc_vxworks_exec_plt_entry): New.
(sparc_vxworks_shared_plt0_entry, sparc_vxworks_shared_plt_entry): New.
(_bfd_sparc_elf_link_hash_table_create): Don't initialize
build_plt_entry here.
(create_got_section): Initialize sgotplt for VxWorks.
(_bfd_sparc_elf_create_dynamic_sections): Initialize build_plt_entry,
plt_header_size and plt_entry_size, with new VxWorks-specific settings.
Call elf_vxworks_create_dynamic_sections for VxWorks.
(allocate_dynrelocs): Use plt_header_size and plt_entry_size.
Allocate room for .got.plt and .rela.plt.unloaded entries on VxWorks.
(_bfd_sparc_elf_size_dynamic_sections): Don't allocate a nop in .plt
for VxWorks. Check for the .got.plt section.
(sparc_vxworks_build_plt_entry): New function.
(_bfd_sparc_elf_finish_dynamic_symbol): Add handling of VxWorks PLTs.
Don't make _GLOBAL_OFFSET_TABLE_ and _PROCEDURE_LINKAGE_TABLE_
absolute on VxWorks.
(sparc32_finish_dyn): Add special handling for DT_RELASZ
and DT_PLTGOT on VxWorks.
(sparc_vxworks_finish_exec_plt): New.
(sparc_vxworks_finish_shared_plt): New.
(_bfd_sparc_elf_finish_dynamic_sections): Call them.
Use plt_header_size and plt_entry_size.
* elfxx-sparc.h (_bfd_sparc_elf_link_hash_table): Add is_vxworks,
srelplt2, sgotplt, plt_header_size and plt_entry_size fields.
* Makefile.am (elfxx-sparc.lo): Depend on elf-vxworks.h.
(elf32-sparc.lo): Likewise.
* Makefile.in: Regenerate.
* targets.c (bfd_elf32_sparc_vxworks_vec): Declare.
(_bfd_target_vector): Add a pointer to it.
gas/
* config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
(GOTT_BASE, GOTT_INDEX): New.
(tc_gen_reloc): Don't alter relocations against GOTT_BASE and
GOTT_INDEX when generating VxWorks PIC.
* configure.tgt (sparc*-*-vxworks*): Remove this special case;
use the generic *-*-vxworks* stanza instead.
gas/testsuite/
* gas/sparc/vxworks-pic.s, gas/sparc/vxworks-pic.d: New test.
* gas/sparc/sparc.exp: Run it. Remove sparc*-*-vxworks* XFAILs.
ld/
* configure.tgt (sparc*-*-vxworks*): New stanza.
* emulparams/elf32_sparc_vxworks.sh: New file.
* Makefile.am (ALL_EMULATIONS): Add eelf32_sparc_vxworks.o.
(eelf32_sparc_vxworks.c): New rule.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-sparc/vxworks1.dd, ld-sparc/vxworks1.ld, ld-sparc/vxworks1-lib.dd,
* ld-sparc/vxworks1-lib.nd, ld-sparc/vxworks1-lib.rd,
* ld-sparc/vxworks1-lib.s, ld-sparc/vxworks1.rd, ld-sparc/vxworks1.s,
* ld-sparc/vxworks1-static.d, ld-sparc/vxworks2.s,
* ld-sparc/vxworks2.sd, ld-sparc/vxworks2-static.sd: New tests.
* ld-sparc/sparc.exp: Run them.
2006-04-05 12:41:59 +00:00
|
|
|
|
2006-04-05 Richard Sandiford <richard@codesourcery.com>
|
|
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|
|
|
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|
|
* gas/sparc/vxworks-pic.s, gas/sparc/vxworks-pic.d: New test.
|
|
|
|
|
|
* gas/sparc/sparc.exp: Run it. Remove sparc*-*-vxworks* XFAILs.
|
|
|
|
|
|
|
2006-04-26 09:24:07 +00:00
|
|
|
|
2006-03-23 Michael Matz <matz@suse.de>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/reloc64.s: Accept 64-bit forms.
|
|
|
|
|
|
* gas/i386/reloc64.d: Adjust.
|
|
|
|
|
|
* gas/i386/reloc64.l: Adjust.
|
|
|
|
|
|
|
2006-03-24 05:07:53 +00:00
|
|
|
|
2006-03-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/rep.s: Pad with .p2align.
|
|
|
|
|
|
* gas/i386/rep.d: Adjust.
|
|
|
|
|
|
|
Richard Sandiford <richard@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
Zack Weinberg <zack@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
bfd/
* bfd-in2.h: Regenerate.
* config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas.
* configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza.
(bfd_elf32_littlemips_vxworks_vec): Likewise.
(bfd_elf32_bigmips_vec): Add elf-vxworks.lo.
(bfd_elf32_littlemips_vec): Likewise.
(bfd_elf32_nbigmips_vec): Likewise.
(bfd_elf32_nlittlemips_vec): Likewise.
(bfd_elf32_ntradbigmips_vec): Likewise.
(bfd_elf32_ntradlittlemips_vec): Likewise.
(bfd_elf32_tradbigmips_vec): Likewise.
(bfd_elf32_tradlittlemips_vec): Likewise.
(bfd_elf64_bigmips_vec): Likewise.
(bfd_elf64_littlemips_vec): Likewise.
(bfd_elf64_tradbigmips_vec): Likewise.
(bfd_elf64_tradlittlemips_vec): Likewise.
* elf32-mips.c: Include elf-vxworks.h.
(mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto
instead of calling mips_elf32_rtype_to_howto directly.
(mips_vxworks_copy_howto_rela): New reloc howto.
(mips_vxworks_jump_slot_howto_rela): Likewise.
(mips_vxworks_bfd_reloc_type_lookup): New function.
(mips_vxworks_rtype_to_howto): Likewise.
(mips_vxworks_final_write_processing): Likewise.
(TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks.
(TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise.
(elf_backend_want_got_plt): Likewise.
(elf_backend_want_plt_sym): Likewise.
(elf_backend_got_symbol_offset): Likewise.
(elf_backend_want_dynbss): Likewise.
(elf_backend_may_use_rel_p): Likewise.
(elf_backend_may_use_rela_p): Likewise.
(elf_backend_default_use_rela_p): Likewise.
(elf_backend_got_header_size: Likewise.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_finish_dynamic_symbol): Likewise.
(bfd_elf32_bfd_link_hash_table_create): Likewise.
(elf_backend_add_symbol_hook): Likewise.
(elf_backend_link_output_symbol_hook): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_final_write_processing: Likewise.
(elf_backend_additional_program_headers): Likewise.
(elf_backend_modify_segment_map): Likewise.
(elf_backend_symbol_processing): Likewise.
* elfxx-mips.c: Include elf-vxworks.h.
(mips_elf_link_hash_entry): Add is_relocation_target and
is_branch_target fields.
(mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt,
srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields.
(MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros.
(MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument.
Return 3 for VxWorks.
(ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a
mips_elf_link_hash_table. Return 0 for VxWorks.
(MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a
mips_elf_link_hash_table. Update the call to ELF_MIPS_GP_OFFSET.
(mips_vxworks_exec_plt0_entry): New variable.
(mips_vxworks_exec_plt_entry): Likewise.
(mips_vxworks_shared_plt0_entry): Likewise.
(mips_vxworks_shared_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize the new hash_entry fields.
(mips_elf_rel_dyn_section): Change the bfd argument to a
mips_elf_link_hash_table. Use MIPS_ELF_REL_DYN_NAME to get
the name of the section.
(mips_elf_initialize_tls_slots): Update the call to
mips_elf_rel_dyn_section.
(mips_elf_gotplt_index): New function.
(mips_elf_local_got_index): Add an input_section argument.
Update the call to mips_elf_create_local_got_entry.
(mips_elf_got_page): Likewise.
(mips_elf_got16_entry): Likewise.
(mips_elf_create_local_got_entry): Add bfd_link_info and input_section
arguments. Create dynamic relocations for each entry on VxWorks.
(mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE.
(mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE
and MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Update the uses of
MIPS_ELF_GOT_MAX_SIZE. Create .got.plt on VxWorks.
(is_gott_symbol): New function.
(mips_elf_calculate_relocation): Use a dynobj local variable.
Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and
mips_elf_got_page_entry. Set G to the .got.plt entry when calculating
VxWorks R_MIPS_CALL* relocations. Calculate and use G for all GOT
relocations on VxWorks. Add dynamic relocations for references
to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Don't
create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64
in VxWorks executables.
(mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument.
Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry.
Don't allocate a null entry on VxWorks.
(mips_elf_create_dynamic_relocation): Update the call to
mips_elf_rel_dyn_section. Use absolute rather than relative
relocations for VxWorks, and make them RELA rather than REL.
(_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic
read-only on VxWorks. Update the call to mips_elf_rel_dyn_section.
Create the .plt, .rela.plt, .dynbss and .rela.bss sections on
VxWorks. Likewise create the _PROCEDURE_LINKAGE_TABLE symbol.
Call elf_vxworks_create_dynamic_sections for VxWorks and
initialize the plt_header_size and plt_entry_size fields.
(_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be
used in VxWorks executables. Don't allocate dynamic relocations
for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables.
Set is_relocation_target for each symbol referenced by a relocation.
Allocate .rela.dyn entries for relocations against the special
VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols. Create GOT
entries for all VxWorks R_MIPS_GOT16 relocations. Don't allocate
a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*,
R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations. Update the calls
to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations.
Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26
relocations. Don't set no_fn_stub on VxWorks.
(_bfd_mips_elf_adjust_dynamic_symbol): Update the call to
mips_elf_allocate_dynamic_relocations.
(_bfd_mips_vxworks_adjust_dynamic_symbol): New function.
(_bfd_mips_elf_always_size_sections): Do not allocate GOT page
entries for VxWorks, and do not create multiple GOTs.
(_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME.
Handle .got specially for VxWorks. Update the uses of
MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations.
Check for sgotplt and splt. Allocate the .rel(a).dyn contents last,
once its final size is known. Set DF_TEXTREL for VxWorks. Add
DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL
tags on VxWorks. Do not add the MIPS-specific tags for VxWorks.
(_bfd_mips_vxworks_finish_dynamic_symbol): New function.
(mips_vxworks_finish_exec_plt): Likewise.
(mips_vxworks_finish_shared_plt): Likewise.
(_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call
to mips_elf_rel_dyn_section. Use a VxWorks-specific value of
DT_PLTGOT. Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL,
DT_PLTRELSZ and DT_JMPREL. Update the uses of MIPS_RESERVED_GOTNO
and mips_elf_rel_dyn_section. Use a different GOT header for
VxWorks. Don't sort .rela.dyn on VxWorks. Finish the PLT on VxWorks.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): New function.
(_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_
on VxWorks. Update the call to ELF_MIPS_GP_OFFSET.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
(_bfd_mips_vxworks_link_hash_table_create): Likewise.
* libbfd.h: Regenerate.
* Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h.
(elf32-mips.lo): Likewise.
* Makefile.in: Regenerate.
* reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare.
* targets.c (bfd_elf32_bigmips_vxworks_vec): Declare.
(bfd_elf32_littlemips_vxworks_vec): Likewise.
(_bfd_target_vector): Add entries for them.
gas/
* config/tc-mips.c (mips_target_format): Handle vxworks targets.
(md_begin): Complain about -G being used for PIC. Don't change
the text, data and bss alignments on VxWorks.
(reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
generating VxWorks PIC.
(load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
(macro): Likewise, but do not treat la $25 specially for
VxWorks PIC, and do not handle jal.
(OPTION_MVXWORKS_PIC): New macro.
(md_longopts): Add -mvxworks-pic.
(md_parse_option): Don't complain about using PIC and -G together here.
Handle OPTION_MVXWORKS_PIC.
(md_estimate_size_before_relax): Always use the first relaxation
sequence on VxWorks.
* config/tc-mips.h (VXWORKS_PIC): New.
gas/testsuite/
* gas/mips/vxworks1.s, gas/mips/vxworks1.d,
* gas/mips/vxworks1-xgot.d: New tests.
* gas/mips/mips.exp: Run them. Do not run other tests on VxWorks.
include/elf/
* mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs.
ld/
* configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use
separate VxWorks emulations.
* emulparams/elf32ebmipvxworks.sh: New file.
* emulparams/elf32elmipvxworks.sh: New file.
* Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and
eelf32elmipvxworks.o.
(eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd,
* ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd,
* ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s,
* ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd,
* ld-mips/vxworks2-static.sd: New tests.
* ld-mips/mips-elf.exp: Run them.
2006-03-22 09:28:15 +00:00
|
|
|
|
2006-03-22 Richard Sandiford <richard@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/vxworks1.s, gas/mips/vxworks1.d,
|
|
|
|
|
|
* gas/mips/vxworks1-xgot.d: New tests.
|
|
|
|
|
|
* gas/mips/mips.exp: Run them. Do not run other tests on VxWorks.
|
|
|
|
|
|
|
2006-03-21 14:35:27 +00:00
|
|
|
|
2006-03-21 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/thumb32.d: Correct expected output.
|
|
|
|
|
|
|
2006-03-20 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
(do_t_branch): Encode branches inside IT blocks as unconditional.
(do_t_cps): New function.
(do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
(opcode_lookup): Allow conditional suffixes on all instructions in
Thumb mode.
(md_assemble): Advance condexec state before checking for errors.
(insns): Use do_t_cps.
gas/testsuite/
* gas/arm/thumb2_bcond.d: New test.
* gas/arm/thumb2_bcond.s: New test.
* gas/arm/thumb2_it_bad.d: New test.
* gas/arm/thumb2_it_bad.l: New test.
* gas/arm/thumb2_it_bad.s: New test.
2006-03-20 15:38:02 +00:00
|
|
|
|
2006-03-20 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/thumb2_bcond.d: New test.
|
|
|
|
|
|
* gas/arm/thumb2_bcond.s: New test.
|
|
|
|
|
|
* gas/arm/thumb2_it_bad.d: New test.
|
|
|
|
|
|
* gas/arm/thumb2_it_bad.l: New test.
|
|
|
|
|
|
* gas/arm/thumb2_it_bad.s: New test.
|
|
|
|
|
|
|
2006-03-17 14:03:36 +00:00
|
|
|
|
2006-03-17 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/thumb32.d: Add ldm and stm tests.
|
|
|
|
|
|
* gas/arm/thumb32.s: Ditto.
|
|
|
|
|
|
|
2006-03-16 19:09:25 +00:00
|
|
|
|
2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/bfin/shift2.s: Add new tests.
|
|
|
|
|
|
* gas/bfin/shift.d: Match changed disassembler behaviour.
|
|
|
|
|
|
* gas/bfin/parallel2.d: Likewise.
|
|
|
|
|
|
* gas/bfin/shift2.d: Likewise; also match new tests.
|
|
|
|
|
|
|
2006-03-16 15:08:48 +00:00
|
|
|
|
2006-03-16 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/svc.d: New test.
|
|
|
|
|
|
* gas/arm/svc.s: New test.
|
|
|
|
|
|
* gas/arm/inst.d: Accept svc mnemonic.
|
|
|
|
|
|
* gas/arm/thumb.d: Ditto.
|
|
|
|
|
|
* gas/arm/wince_inst.d: Ditto.
|
|
|
|
|
|
|
2006-03-09 23:05:59 +00:00
|
|
|
|
2006-03-09 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/nomapping.d: New test.
|
|
|
|
|
|
* gas/arm/nomapping.s: New test.
|
|
|
|
|
|
|
2006-03-07 20:18:06 +00:00
|
|
|
|
2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/2428
|
|
|
|
|
|
* gas/i386/i386.exp: Add rep, rep-suffix, x86-64-rep and
|
|
|
|
|
|
x86-64-rep-suffix.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/naked.d: Replace repz with rep.
|
|
|
|
|
|
* gas/i386/x86_64.d: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/rep-suffix.d: New file.
|
|
|
|
|
|
* gas/i386/rep-suffix.s: Likewise.
|
|
|
|
|
|
* gas/i386/rep.d: Likewise.
|
|
|
|
|
|
* gas/i386/rep.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-rep-suffix.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-rep-suffix.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-rep.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-rep.s: Likewise.
|
|
|
|
|
|
|
bfd/
* configure.in (bfd_elf32_bigarm_vec): Include elf-vxworks.lo.
(bfd_elf32_bigarm_symbian_vec): Likewise.
(bfd_elf32_bigarm_vxworks_vec): Likewise.
(bfd_elf32_littlearm_vec): Likewise.
(bfd_elf32_littlearm_symbian_vec): Likewise.
(bfd_elf32_littlearm_vxworks_vec): Likewise.
* configure: Regenerate.
* elf32-arm.c: Include libiberty.h and elf-vxworks.h.
(RELOC_SECTION, RELOC_SIZE, SWAP_RELOC_IN, SWAP_RELOC_OUT): New macros.
(elf32_arm_vxworks_bed): Add forward declaration.
(elf32_arm_howto_table_1): Fix the masks for R_ASM_ABS12.
(elf32_arm_vxworks_exec_plt0_entry): New table.
(elf32_arm_vxworks_exec_plt_entry): Likewise.
(elf32_arm_vxworks_shared_plt_entry): Likewise.
(elf32_arm_link_hash_table): Add vxworks_p and srelplt2 fields.
(reloc_section_p): New function.
(create_got_section): Use RELOC_SECTION.
(elf32_arm_create_dynamic_sections): Likewise. Call
elf_vxworks_create_dynamic_sections for VxWorks targets.
Choose between the two possible values of plt_header_size
and plt_entry_size.
(elf32_arm_link_hash_table_create): Initialize vxworks_p and srelplt2.
(elf32_arm_abs12_reloc): New function.
(elf32_arm_final_link_relocate): Call it. Allow the creation of
dynamic R_ARM_ABS12 relocs on VxWorks. Use reloc_section_p,
RELOC_SIZE, SWAP_RELOC_OUT and RELOC_SECTION. Initialize the
r_addend fields of relocs. On rela targets, skip any code that
adjusts in-place addends. When using _bfd_link_final_relocate
to perform a final relocation, pass rel->r_addend as the addend
argument.
(elf32_arm_merge_private_bfd_data): If one of the bfds is a VxWorks
object, ignore flags that are not standard on VxWorks.
(elf32_arm_check_relocs): Allow the creation of dynamic R_ARM_ABS12
relocs on VxWorks. Use reloc_section_p.
(elf32_arm_adjust_dynamic_symbol): Use RELOC_SECTION and RELOC_SIZE.
(allocate_dynrelocs): Use RELOC_SIZE. Account for the size of
.rela.plt.unloaded relocs on VxWorks targets.
(elf32_arm_size_dynamic_sections): Use RELOC_SIZE. Check for
.rela.plt.unloaded as well as .rel(a).plt. Add DT_RELA* tags
instead of DT_REL* tags on RELA targets.
(elf32_arm_finish_dynamic_symbol): Use RELOC_SECTION, RELOC_SIZE
and SWAP_RELOC_OUT. Initialize r_addend fields. Handle VxWorks
PLT entries. Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
(elf32_arm_finish_dynamic_sections): Use RELOC_SECTION, RELOC_SIZE
and SWAP_RELOC_OUT. Initialize r_addend fields. Handle DT_RELASZ
like DT_RELSZ. Handle the VxWorks form of initial PLT entry.
Correct the .rela.plt.unreloaded symbol indexes.
(elf32_arm_output_symbol_hook): Call the VxWorks version of this
hook on VxWorks targets.
(elf32_arm_vxworks_link_hash_table_create): Set vxworks_p to true.
Minor formatting tweak.
(elf32_arm_vxworks_final_write_processing): New function.
(elf_backend_add_symbol_hook): Override for VxWorks and reset
for Symbian.
(elf_backend_final_write_processing): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_want_plt_sym): Likewise.
(ELF_MAXPAGESIZE): Likewise.
(elf_backend_may_use_rel_p): Minor formatting tweak.
(elf_backend_may_use_rela_p): Likewise.
(elf_backend_default_use_rela_p): Likewise.
(elf_backend_rela_normal): Likewise.
* Makefile.in (elf32-arm.lo): Depend on elf-vxworks.h.
gas/
* config/tc-arm.c (md_apply_fix): Install a value of zero into a
BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
R_ARM_ABS12 reloc.
(tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
gas/testsuite/
* gas/arm/abs12.s, gas/arm/abs12.d: New test.
* gas/arm/pic.d: Skip for *-*-vxworks*...
* gas/arm/pic_vxworks.d: ...use this version instead.
* gas/arm/unwind_vxworks.d: Fix expected output.
ld/
* emulparams/armelf_vxworks.sh: Include vxworks.sh.
(MAXPAGESIZE): Define.
* emulparams/vxworks.sh: Undefine.
* Makefile.am (earmelf_vxworks.c): Depend on vxworks.sh and vxworks.em.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd,
* ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd,
* ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s,
* ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd,
* ld-arm/vxworks2-static.sd: New tests.
* ld-arm/arm-elf.exp: Run them.
2006-03-07 08:39:21 +00:00
|
|
|
|
2006-03-07 Richard Sandiford <richard@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/abs12.s, gas/arm/abs12.d: New test.
|
|
|
|
|
|
* gas/arm/pic.d: Skip for *-*-vxworks*...
|
|
|
|
|
|
* gas/arm/pic_vxworks.d: ...use this version instead.
|
|
|
|
|
|
* gas/arm/unwind_vxworks.d: Fix expected output.
|
|
|
|
|
|
|
2006-03-06 13:42:05 +00:00
|
|
|
|
2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/m68k/arch-cpu-1.s: Tweak.
|
|
|
|
|
|
* gas/m68k/arch-cpu-1.d: Tweak.
|
|
|
|
|
|
|
2006-02-28 07:57:09 +00:00
|
|
|
|
2006-02-28 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/all/altmacro.s: Adjust.
|
|
|
|
|
|
* gas/all/altmac2.s: Adjust.
|
|
|
|
|
|
|
2006-02-28 07:55:36 +00:00
|
|
|
|
2006-02-28 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/macros/paren[sd]: New.
|
|
|
|
|
|
* gas/macros/macros.exp: Run new test.
|
|
|
|
|
|
|
2006-02-27 15:35:37 +00:00
|
|
|
|
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Add merom and x86-64-merom.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/merom.d: New file.
|
|
|
|
|
|
* gas/i386/merom.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-merom.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-merom.s: Likewise.
|
|
|
|
|
|
|
2006-02-25 01:36:12 +00:00
|
|
|
|
2006-02-24 David S. Miller <davem@sunset.davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/sparc/rdhpr.s: New test.
|
|
|
|
|
|
* gas/sparc/rdhpr.d: New test.
|
|
|
|
|
|
* gas/sparc/wrhpr.s: New test.
|
|
|
|
|
|
* gas/sparc/wrhpr.d: New test.
|
|
|
|
|
|
* gas/sparc/window.s: New test.
|
|
|
|
|
|
* gas/sparc/window.d: New test.
|
|
|
|
|
|
* gas/sparc/rdpr.s: Add case for reading %gl register.
|
|
|
|
|
|
* gas/sparc/rdpr.d: Likewise.
|
|
|
|
|
|
* gas/sparc/wrpr.s: Add case for writing %gl register.
|
|
|
|
|
|
* gas/sparc/wrpr.d: Likewise.
|
|
|
|
|
|
* gas/sparc/sparc.exp: Update for new tests.
|
|
|
|
|
|
|
2006-02-24 Paul Brook <paul@codesourcery.com>
gas/
* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
(struct asm_barrier_opt): Define.
(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
(parse_psr): Accept V7M psr names.
(parse_barrier): New function.
(enum operand_parse_code): Add OP_oBARRIER.
(parse_operands): Implement OP_oBARRIER.
(do_barrier): New function.
(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
(do_t_cpsi): Add V7M restrictions.
(do_t_mrs, do_t_msr): Validate V7M variants.
(md_assemble): Check for NULL variants.
(v7m_psrs, barrier_opt_names): New tables.
(insns): Add V7 instructions. Mark V6 instructions absent from V7M.
(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
(struct cpu_arch_ver_table): Define.
(cpu_arch_ver): New.
(aeabi_set_public_attributes): Use cpu_arch_ver. Set
Tag_CPU_arch_profile.
* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
* gas/arm/thumb32.d: Fix expected msr and mrs output.
* gas/arm/arch7.d: New test.
* gas/arm/arch7.s: New test.
* gas/arm/arch7m-bad.l: New test.
* gas/arm/arch7m-bad.d: New test.
* gas/arm/arch7m-bad.s: New test.
include/opcode/
* arm.h: Add V7 feature bits.
opcodes/
* arm-dis.c (arm_opcodes): Add V7 instructions.
(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
(print_arm_address): New function.
(print_insn_arm): Use it. Add 'P' and 'U' cases.
(psr_name): New function.
(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
2006-02-24 15:36:36 +00:00
|
|
|
|
2006-02-24 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/thumb32.d: Fix expected msr and mrs output.
|
|
|
|
|
|
* gas/arm/arch7.d: New test.
|
|
|
|
|
|
* gas/arm/arch7.s: New test.
|
|
|
|
|
|
* gas/arm/arch7m-bad.l: New test.
|
|
|
|
|
|
* gas/arm/arch7m-bad.d: New test.
|
|
|
|
|
|
* gas/arm/arch7m-bad.s: New test.
|
|
|
|
|
|
|
2006-02-23 21:36:18 +00:00
|
|
|
|
2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/ia64/opc-i.s: Add tests for tf.
|
|
|
|
|
|
* gas/ia64/pseudo.s: Likewise.
|
|
|
|
|
|
* gas/ia64/opc-i.d: Updated.
|
|
|
|
|
|
* gas/ia64/pseudo.d: Likewise.
|
|
|
|
|
|
|
2006-02-23 00:17:24 +00:00
|
|
|
|
2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/ia64/dv-raw-err.s: Add check for vmsw.0.
|
|
|
|
|
|
* gas/ia64/dv-raw-err.l: Updated.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1.
|
|
|
|
|
|
* gas/ia64/opc-b.d: Updated.
|
|
|
|
|
|
|
2006-02-22 15:03:30 +00:00
|
|
|
|
2005-02-22 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/thumb32.d: Fix expected pld opcode.
|
|
|
|
|
|
|
2006-02-17 14:36:28 +00:00
|
|
|
|
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
|
|
|
|
|
|
Anil Paranjape <anilp1@kpitcummins.com>
|
|
|
|
|
|
Shilin Shakti <shilins@kpitcummins.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/xc16x: New directory.
|
|
|
|
|
|
* gas/xc16x/xc16x.exp: New file
|
|
|
|
|
|
* gas/xc16x/add.s: New file
|
|
|
|
|
|
* gas/xc16x/add_test.s: New file
|
|
|
|
|
|
* gas/xc16x/addb.s: New file
|
|
|
|
|
|
* gas/xc16x/addc.s: New file
|
|
|
|
|
|
* gas/xc16x/addcb.s: New file
|
|
|
|
|
|
* gas/xc16x/and.s: New file
|
|
|
|
|
|
* gas/xc16x/andb.s: New file
|
|
|
|
|
|
* gas/xc16x/bfldl.s: New file
|
|
|
|
|
|
* gas/xc16x/bit.s: New file
|
|
|
|
|
|
* gas/xc16x/calla.s: New file
|
|
|
|
|
|
* gas/xc16x/calli.s: New file
|
|
|
|
|
|
* gas/xc16x/cmp.s: New file
|
|
|
|
|
|
* gas/xc16x/cmp_test.s: New file
|
|
|
|
|
|
* gas/xc16x/cmpb.s: New file
|
|
|
|
|
|
* gas/xc16x/cmpi.s: New file
|
|
|
|
|
|
* gas/xc16x/cpl.s: New file
|
|
|
|
|
|
* gas/xc16x/div.s: New file
|
|
|
|
|
|
* gas/xc16x/jmpa.s: New file
|
|
|
|
|
|
* gas/xc16x/jmpi.s: New file
|
|
|
|
|
|
* gas/xc16x/jmpr.s: New file
|
|
|
|
|
|
* gas/xc16x/mov.s: New file
|
|
|
|
|
|
* gas/xc16x/mov_test.s: New file
|
|
|
|
|
|
* gas/xc16x/movb.s: New file
|
|
|
|
|
|
* gas/xc16x/movbs.s: New file
|
|
|
|
|
|
* gas/xc16x/movbz.s: New file
|
|
|
|
|
|
* gas/xc16x/mul.s: New file
|
|
|
|
|
|
* gas/xc16x/neg.s: New file
|
|
|
|
|
|
* gas/xc16x/nop.s: New file
|
|
|
|
|
|
* gas/xc16x/or.s: New file
|
|
|
|
|
|
* gas/xc16x/orb.s: New file
|
|
|
|
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|
* gas/xc16x/prior.s: New file
|
|
|
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|
|
* gas/xc16x/pushpop.s: New file
|
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|
* gas/xc16x/ret.s: New file
|
|
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|
* gas/xc16x/scxt.s: New file
|
|
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* gas/xc16x/shlrol.s: New file
|
|
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|
* gas/xc16x/sub.s: New file
|
|
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|
|
* gas/xc16x/sub_test.s: New file
|
|
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|
|
* gas/xc16x/subb.s: New file
|
|
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|
|
* gas/xc16x/subcb.s: New file
|
|
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|
|
* gas/xc16x/syscontrol1.s: New file
|
|
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|
* gas/xc16x/syscontrol2.s: New file
|
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|
* gas/xc16x/trap.s: New file
|
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|
* gas/xc16x/xor.s: New file
|
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* gas/xc16x/xorb.s: New file
|
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|
2006-02-12 17:26:21 +00:00
|
|
|
|
2006-02-12 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/x86-64-crx-suffix.d: Undo the last change.
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|
2006-02-11 18:08:35 +00:00
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|
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
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* gas/i386/i386.exp: Add "x86-64-drx" and "x86-64-drx-suffix".
|
|
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|
|
* gas/i386/x86-64-crx-suffix.d: Minor update.
|
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|
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|
|
* gas/i386/x86-64-drx-suffix.d: New file.
|
|
|
|
|
|
* gas/i386/x86-64-drx.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-drx.s: Likewise.
|
|
|
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|
|
2006-02-11 17:00:59 +00:00
|
|
|
|
2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix".
|
|
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|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-crx-suffix.d: New file.
|
|
|
|
|
|
* gas/i386/x86-64-crx.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-crx.s: Likewise.
|
|
|
|
|
|
|
* bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e,
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x,
bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249,
bfd_mach_mcf547x, bfd_mach_mcf548x): Remove.
(bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div,
bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac,
bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp,
bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac,
bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac,
bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac,
bfd_mach_mcf_isa_b_usp_float_emac): New.
(bfd_default_scan): Update coldfire mapping.
* bfd/bfd-in.h (bfd_m68k_mach_to_features,
bfd_m68k_features_to_mach): Declare.
* bfd/bfd-in2.h: Rebuilt.
* bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines,
adjust legacy names.
(m68k_arch_features): New.
(bfd_m68k_mach_to_features,
bfd_m68k_features_to_mach): Define.
* bfd/elf32-m68k.c (elf32_m68k_object_p): New.
(elf32_m68k_merge_private_bfd_data): Merge the CF EF flags.
(elf32_m68k_print_private_bfd_data): Print the CF EF flags.
(elf_backend_object_p): Define.
* bfd/ieee.c (ieee_write_processor): Update coldfire machines.
* bfd/libbfd.h: Rebuilt.
* gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
mcf5329_control_regs): New.
(not_current_architecture, selected_arch, selected_cpu): New.
(m68k_archs, m68k_extensions): New.
(archs): Renamed to ...
(m68k_cpus): ... here. Adjust.
(n_arches): Remove.
(md_pseudo_table): Add arch and cpu directives.
(find_cf_chip, m68k_ip): Adjust table scanning.
(no_68851, no_68881): Remove.
(md_assemble): Lazily initialize.
(select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
(md_init_after_args): Move functionality to m68k_init_arch.
(mri_chip): Adjust table scanning.
(md_parse_option): Reimplement 'm' processing to add -march & -mcpu
options with saner parsing.
(m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
m68k_init_arch): New.
(s_m68k_cpu, s_m68k_arch): New.
(md_show_usage): Adjust.
(m68k_elf_final_processing): Set CF EF flags.
* gas/config/tc-m68k.h (m68k_init_after_args): Remove.
(tc_init_after_args): Remove.
* gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
(M68k-Directives): Document .arch and .cpu directives.
* gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
* gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New.
* include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ...
(EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here.
(EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS,
EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC,
EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New.
* include/opcode/m68k.h (m68008, m68ec030, m68882): Remove.
(m68k_mask): New.
(cpu_m68k, cpu_cf): New.
(mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants.
* opcodes/m68k-dis.c (print_insn_m68k): Use
bfd_m68k_mach_to_features.
* binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
2006-02-07 19:01:10 +00:00
|
|
|
|
2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
|
|
|
|
|
|
* testsuite/gas/m68k/arch-cpu-1.[sd]: New.
|
|
|
|
|
|
|
2005-02-02 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
T2_OPCODE_RSB): Define.
(thumb32_negate_data_op): New function.
(md_apply_fix): Use it.
gas/testsuite/
* gas/arm/thumb2_invert.d: New test.
* gas/arm/thumb2_invert.s: New test.
2006-02-02 13:34:17 +00:00
|
|
|
|
2005-02-02 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/thumb2_invert.d: New test.
|
|
|
|
|
|
* gas/arm/thumb2_invert.s: New test.
|
|
|
|
|
|
|
2006-01-31 16:19:41 +00:00
|
|
|
|
2006-01-31 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/testsuite/gas/arm/iwmmxt-bad.s: Add check for bad register name.
|
|
|
|
|
|
* gas/testsuite/gas/arm/iwmmxt-bad.l: Ditto.
|
|
|
|
|
|
|
2006-01-18 14:52:11 +00:00
|
|
|
|
2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/z80/z80.exp: Add offset.
|
2006-01-18 15:00:22 +00:00
|
|
|
|
* gas/z80/offset.d: New file.
|
|
|
|
|
|
* gas/z80/offset.s: New file.
|
2006-01-18 14:52:11 +00:00
|
|
|
|
|
2006-01-16 16:23:30 +00:00
|
|
|
|
2006-01-16 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/m68k/all.exp: Add mcf-fpu.
|
|
|
|
|
|
* gas/m68k/mcf-fpu.d: New file.
|
|
|
|
|
|
* gas/m68k/mcf-fpu.s: New file.
|
|
|
|
|
|
|
2006-01-11 17:39:50 +00:00
|
|
|
|
2006-01-11 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/tic54x/address.d: Work with 64bit hosts.
|
|
|
|
|
|
* gas/tic54x/addrfar.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/align.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/all-opcodes.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/asg.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/cons.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/consfar.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/extaddr.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/field.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/labels.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/loop.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/lp.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/macro.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/math.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/opcodes.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/sections.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/set.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/struct.d: Likewise.
|
|
|
|
|
|
* gas/tic54x/subsym.d: Likewise.
|
|
|
|
|
|
|
2006-01-09 17:14:40 +00:00
|
|
|
|
2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/2117
|
|
|
|
|
|
* gas/ia64/ia64.exp: Add ltoff22x-2, ltoff22x-3, ltoff22x-4 and
|
|
|
|
|
|
ltoff22x-5.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/ia64/ltoff22x-2.d: New file.
|
|
|
|
|
|
* gas/ia64/ltoff22x-2.s: Likewise.
|
|
|
|
|
|
* gas/ia64/ltoff22x-3.d: Likewise.
|
|
|
|
|
|
* gas/ia64/ltoff22x-3.s: Likewise.
|
|
|
|
|
|
* gas/ia64/ltoff22x-4.d: Likewise.
|
|
|
|
|
|
* gas/ia64/ltoff22x-4.s: Likewise.
|
|
|
|
|
|
* gas/ia64/ltoff22x-5.d: Likewise.
|
|
|
|
|
|
* gas/ia64/ltoff22x-5.s: Likewise.
|
|
|
|
|
|
|
2006-01-03 05:52:15 +00:00
|
|
|
|
2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/2101
|
|
|
|
|
|
* gas/mmix/hex2.s, gas/mmix/hex2.d: New test.
|
|
|
|
|
|
|
2006-01-16 23:15:07 +00:00
|
|
|
|
For older changes see ChangeLog-2005
|
2004-01-02 11:16:21 +00:00
|
|
|
|
|
|
|
|
|
|
Local Variables:
|
|
|
|
|
|
mode: change-log
|
|
|
|
|
|
left-margin: 8
|
|
|
|
|
|
fill-column: 74
|
|
|
|
|
|
version-control: never
|
|
|
|
|
|
End:
|
