Added a 3DS port. Requires a9lh
This commit is contained in:
parent
2e7b37527a
commit
a049fc5f8a
14 changed files with 280 additions and 8 deletions
BIN
arm9loaderhax.bin
Executable file
BIN
arm9loaderhax.bin
Executable file
Binary file not shown.
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@ -1,15 +1,20 @@
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arch = x86_64
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arch = 3ds
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MODE = debug
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MODE = debug
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#MODE = release # enables optimization
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#MODE = release # enables optimization
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export PATH := $(HOME)/opt/bin:$(PATH)
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export PATH := $(HOME)/opt/bin:$(PATH)
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ARCHFLAGS =
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ifeq ($(arch),x86)
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ifeq ($(arch),x86)
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PREFIX = i686-elf-
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PREFIX = i686-elf-
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libpath = i686-elf
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else
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else
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ifeq ($(arch),x86_64)
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ifeq ($(arch),x86_64)
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PREFIX = x86_64-elf-
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PREFIX = x86_64-elf-
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ARCHFLAGS =
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libpath = x86_64-elf
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else
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ifeq ($(arch),3ds)
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PREFIX = arm-none-eabi-
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libpath = arm-none-eabi
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endif
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endif
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endif
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endif
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endif
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@ -2,11 +2,11 @@ include ../kernel.settings
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SRCS = $(shell find hal/$(arch) -name '*.cpp' -o -name '*.[cS]')
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SRCS = $(shell find hal/$(arch) -name '*.cpp' -o -name '*.[cS]')
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KERNSRCS = $(shell find kernel -name '*.cpp' -o -name '*.c')
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KERNSRCS = $(shell find kernel -name '*.cpp' -o -name '*.c')
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#OBJS = $(addsuffix .o,$(basename $(SRCS)))
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#OBJS = $(addsuffix .o,$(basename $(SRCS)))
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OBJS = $(addsuffix .o,$(basename $(KERNSRCS)))
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OBJS = #$(addsuffix .o,$(basename $(KERNSRCS)))
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LD = $(PREFIX)g++
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LD = $(PREFIX)g++
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LDFLAGS = -nostdlib -nodefaultlibs -nostdlib -fno-builtin $(ARCHFLAGS) -T kernel-$(arch).ld -z max-page-size=0x1000
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LDFLAGS = -nostdlib -nodefaultlibs -nostdlib -fno-builtin $(ARCHFLAGS) -T kernel-$(arch).ld -z max-page-size=0x1000
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all: hal kernel
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all: hal #kernel #uncomment when done with 3ds
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$(LD) $(LDFLAGS) -o mtgos $(OBJS) libhal.a -lgcc
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$(LD) $(LDFLAGS) -o mtgos $(OBJS) libhal.a -lgcc
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hal:
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hal:
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make -C hal
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make -C hal
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36
kernel/hal/3ds/Makefile
Normal file
36
kernel/hal/3ds/Makefile
Normal file
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@ -0,0 +1,36 @@
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include ../../../kernel.settings
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ARM9SRCS = $(shell find arm9 -name '*.cpp' -o -name '*.[cS]')
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ARM11SRCS = $(shell find arm11 -name '*.cpp' -o -name '*.[cS]')
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ARM9OBJS = $(addsuffix .o,$(basename $(ARM9SRCS)))
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ARM11OBJS = $(addsuffix .o,$(basename $(ARM11SRCS)))
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ARM9FLAGS = -mcpu=arm946e-s -march=armv5te -mlittle-endian
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ARM11FLAGS = -mcpu=mpcore -mlittle-endian
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CPP = $(PREFIX)g++
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CC = $(PREFIX)gcc
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AR = $(PREFIX)ar
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ASFLAGS =
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CFLAGS += -Wall -fno-stack-protector -nostdinc -Ic_include/ -I../../kernel/c_include -ffreestanding -std=c11 -fno-builtin -Werror -nostdlib -g -fpie
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CPPFLAGS += -Wall -fno-stack-protector -nostdinc -std=c++14 -Iinclude/ -Ic_include/ -I../../kernel/c_include -I../../kernel/include -fno-rtti -fno-exceptions -ffreestanding -fno-builtin -Werror -nostdlib -fno-use-cxa-atexit -Wextra -Wno-unused -g -fno-pie -Wno-reorder
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all: $(ARM9OBJS) $(ARM11OBJS)
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arm9/%.o: arm9/%.cpp
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$(CPP) $(CPPFLAGS) $(ARM9FLAGS) -c -o $@ $^
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arm9/%.o: arm9/%.c
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$(CC) $(CFLAGS) $(ARM9FLAGS) -c -o $@ $^
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arm9/%.o: arm9/%.S
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$(CC) $(CFLAGS) $(ARM9FLAGS) -c -o $@ $^
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arm11/%.o: arm11/%.cpp
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$(CPP) $(CPPFLAGS) $(ARM9FLAGS) -c -o $@ $^
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arm11/%.o: arm11/%.c
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$(CC) $(CFLAGS) $(ARM9FLAGS) -c -o $@ $^
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arm11/%.o: arm11/%.S
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$(CC) $(CFLAGS) $(ARM9FLAGS) -c -o $@ $^
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clean:
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66
kernel/hal/3ds/arm11/init/arm11init.cpp
Normal file
66
kernel/hal/3ds/arm11/init/arm11init.cpp
Normal file
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@ -0,0 +1,66 @@
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//Notice: 0x1FFFFFF8 is a pointer to a function that is being executed by
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//A11 SYS_CORE
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//If it's zero, SYS_CORE is ready for a new task
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#include <stdint.h>
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#include <stdfnt.h>
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void(**fpointer)(void)=(void(**)(void))0x1FFFFFF8;
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void __attribute__((naked)) arm11Stub(void)
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{
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//Disable interrupts
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__asm(".word 0xF10C01C0");
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//Wait for the entry to be set
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while(*fpointer == &arm11Stub);
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//Jump to it
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(*fpointer)();
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}
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void mainRoutine() {
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*fpointer=nullptr;
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while(true) {
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if(!(*fpointer))
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continue;
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(*fpointer)();
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*fpointer=nullptr;
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}
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}
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unsigned int seed=0;
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unsigned int random() {
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return seed=0x41C64E6D * seed + 0x00006073;
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}
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#define CALCXY_top(x,y) ((x)*240+240-(y))
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void initScreen() {
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//top screen lfb size: 0x5dc00
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//bottom screen lfb size: 0x4b000
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//lfb locations: 0x18000000 (left 1)
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//lfb locations: 0x18060000 (left 2)
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//lfb locations: 0x180C0000 (right 1)
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//lfb locations: 0x18120000 (right 2)
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//lfb locations: 0x18180000 (bottom 1)
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//lfb locations: 0x181D0000 (bottom 2)
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unsigned int *fb_init=(unsigned int*)0x10400400;
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fb_init[0x70/4]&=~0x7;
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fb_init[0x170/4]&=~0x7;
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fb_init[0x68/4]=0x18000000; //Left eye
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fb_init[0x6C/4]=0x18060000; //Left eye
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fb_init[0x90/4]=960;
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fb_init[0x94/4]=0x180C0000; //Right eye
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fb_init[0x98/4]=0x18120000; //Right eye
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fb_init[0x168/4]=0x18180000;
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fb_init[0x16C/4]=0x181D0000;
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fb_init[0x190/4]=960;
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int *lfb=(int*)0x18060000;
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for(int bx=0;bx<32;bx++) {
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for(int by=0;by<8;by++) {
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for(int x=0;x<8;x++) {
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for(int y=0;y<8;y++) {
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if(font[bx+by*32][y]&(1<<x))
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lfb[CALCXY_top(bx*8+x,by*8+y)]=0xFFFFFF00;
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else
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lfb[CALCXY_top(bx*8+x,by*8+y)]=0x0;
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}
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}
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}
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}
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fb_init[0x78/4]=1;
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}
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63
kernel/hal/3ds/arm9/boot/boot.S
Normal file
63
kernel/hal/3ds/arm9/boot/boot.S
Normal file
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@ -0,0 +1,63 @@
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.section .text.start
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.align 4
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b _start
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.word 0, 0
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.global _start
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.extern main
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_start:
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mov sp, #0x27000000
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//Disable caches/mpu
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mrc p15, 0, r0, c1, c0, 0
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bic r0, #0x1000 //Disable instruction cache
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bic r0, #0x4 //Disable data cache
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bic r0, #0x1 //Disable MPU
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mcr p15, 0, r0, c1, c0, 0
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ldr r0, =0x33333333
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mcr p15, 0, r0, c5, c0, 2 //Write data access
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mcr p15, 0, r0, c5, c0, 3 //Write instruction access
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// Sets MPU permissions and cache settings
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ldr r0, =0xFFFF001D // ffff0000 32k | bootrom (unprotected part)
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ldr r1, =0x3000801B // fff00000 16k | dtcm
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ldr r2, =0x01FF801D // 01ff8000 32k | itcm
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ldr r3, =0x08000029 // 08000000 2M | arm9 mem (O3DS / N3DS)
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ldr r4, =0x10000029 // 10000000 2M | io mem (ARM9 / first 2MB)
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ldr r5, =0x20000037 // 20000000 256M | fcram (O3DS / N3DS)
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ldr r6, =0x1FF00027 // 1FF00000 1M | dsp / axi wram
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ldr r7, =0x1800002D // 18000000 8M | vram (+ 2MB)
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mov r8, #0x29
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mcr p15, 0, r0, c6, c0, 0
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mcr p15, 0, r1, c6, c1, 0
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mcr p15, 0, r2, c6, c2, 0
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mcr p15, 0, r3, c6, c3, 0
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mcr p15, 0, r4, c6, c4, 0
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mcr p15, 0, r5, c6, c5, 0
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mcr p15, 0, r6, c6, c6, 0
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mcr p15, 0, r7, c6, c7, 0
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mcr p15, 0, r8, c3, c0, 0 // Write bufferable 0, 3, 5
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mcr p15, 0, r8, c2, c0, 0 // Data cacheable 0, 3, 5
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mcr p15, 0, r8, c2, c0, 1 // Inst cacheable 0, 3, 5
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// Enable dctm
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ldr r0, =0x3000800A // set dtcm
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mcr p15, 0, r0, c9, c1, 0 // set the dtcm Region Register
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// Enable caches
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mrc p15, 0, r0, c1, c0, 0 // read control register
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orr r0, r0, #(1<<18) // - itcm enable
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orr r0, r0, #(1<<16) // - dtcm enable
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orr r0, r0, #(1<<12) // - instruction cache enable
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orr r0, r0, #(1<<2) // - data cache enable
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orr r0, r0, #(1<<0) // - mpu enable
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mcr p15, 0, r0, c1, c0, 0 // write control register
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// Flush caches
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mov r0, #0
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mcr p15, 0, r0, c7, c5, 0 // flush I-cache
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mcr p15, 0, r0, c7, c6, 0 // flush D-cache
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mcr p15, 0, r0, c7, c10, 4 // drain write buffer
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// Fixes mounting of SDMC
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ldr r0, =0x10000020
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mov r1, #0x340
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str r1, [r0]
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b init
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14
kernel/hal/3ds/arm9/init/init.cpp
Normal file
14
kernel/hal/3ds/arm9/init/init.cpp
Normal file
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@ -0,0 +1,14 @@
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void __attribute__((naked)) arm11Stub(void);
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void mainRoutine();
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void initScreen();
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void(**a11fpointer)(void)=(void(**)(void))0x1FFFFFF8;
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extern "C" void init() {
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*a11fpointer=&arm11Stub;
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for(int i=0;i<100;i++);
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*a11fpointer=&mainRoutine;
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while(*a11fpointer);
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*a11fpointer=&initScreen;
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while(*a11fpointer);
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while(true);
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}
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@ -19,7 +19,7 @@ all: $(OBJS)
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%.o: %.c
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%.o: %.c
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$(CC) $(CFLAGS) -c -o $@ $^
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$(CC) $(CFLAGS) -c -o $@ $^
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%.o: $.S
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%.o: %.S
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$(CC) $(CFLAGS) -c -o $@ $^
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$(CC) $(CFLAGS) -c -o $@ $^
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clean:
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clean:
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11
kernel/kernel-3ds.ld
Normal file
11
kernel/kernel-3ds.ld
Normal file
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@ -0,0 +1,11 @@
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ENTRY(_start)
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SECTIONS
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{
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. = 0x23F00000;
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.text.start : { *(.text.start)}
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.text : {*(.text)}
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.data : {*(.data)}
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.bss : {*(.bss COMMON)}
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.rodata : {*(.rodata)}
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. = ALIGN(4);
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}
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BIN
kernel/libhal.a
BIN
kernel/libhal.a
Binary file not shown.
BIN
test.elf
BIN
test.elf
Binary file not shown.
45
user/3ds/syscall.S
Normal file
45
user/3ds/syscall.S
Normal file
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.global screenout_init
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// void * screenout_init(int err);
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screenout_init:
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stmdb sp!, {r0} //r0 is err
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mov r0, #0
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svc #0 //Only one svc
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sub sp, #4
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bx lr
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.global screenout_out
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// void * screenout_out(void* handle, char *str);
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screenout_out:
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stmdb sp!, {r1} // R1 is str
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mov r1, r0 //R0 is handle
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mov r0, #1
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svc #0
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add sp, #4
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bx lr
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.global screenout_clear
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// void * screenout_clear(void* handle);
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screenout_clear:
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mov r1, r0
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mov r0, #2
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svc #0
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bx lr
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.global screenout_setcolor
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// void * screenout_setcolor(void* handle, uint32_t BG, uint32_t FG)
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screenout_setcolor:
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stmdb sp!, {r1, r2}
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mov r1, r0
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mov r0, #3
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svc #0
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add sp, #8
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bx lr
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.global screenout_destroy
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// void * screenout_destroy(void * handle)
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screenout_destroy:
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mov r1, r0
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mov r0, #0x10000
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sub r0, #1
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svc #0
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bx lr
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@ -6,9 +6,13 @@ CPP = $(PREFIX)g++
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LD = $(PREFIX)ld
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LD = $(PREFIX)ld
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ASFLAGS = $(ARCHFLAGS)
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ASFLAGS = $(ARCHFLAGS)
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CPPFLAGS = $(ARCHFLAGS) -Wall -fno-stack-protector -nostdinc -std=c++14 -Iinclude/ -Ic_include/ -fno-rtti -fno-exceptions -ffreestanding -fno-builtin -Werror -nostdlib -fno-use-cxa-atexit -Wextra -Wno-unused -g -fpie
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CPPFLAGS = $(ARCHFLAGS) -Wall -fno-stack-protector -nostdinc -std=c++14 -Iinclude/ -Ic_include/ -fno-rtti -fno-exceptions -ffreestanding -fno-builtin -Werror -nostdlib -fno-use-cxa-atexit -Wextra -Wno-unused -g -fpie
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LDFLAGS = -Ttest-$(arch).ld
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LDFLAGS = -Ttest-$(arch).ld -L/opt/lib/gcc/$(libpath)/6.1.0/
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ifeq ($(arch),3ds)
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ASFLAGS += -mcpu=mpcore -mlittle-endian
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CPPFLAGS += -mcpu=mpcore -mlittle-endian
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endif
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test.elf: $(OBJS) $(arch)/syscall.o
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test.elf: $(OBJS) $(arch)/syscall.o
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$(LD) $(LDFLAGS) -o $@ $^
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$(LD) $(LDFLAGS) -o $@ $^ -lgcc
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%.o: %.cpp
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%.o: %.cpp
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$(CPP) $(CPPFLAGS) -c -o $@ $^
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$(CPP) $(CPPFLAGS) -c -o $@ $^
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28
user/test-3ds.ld
Normal file
28
user/test-3ds.ld
Normal file
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@ -0,0 +1,28 @@
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ENTRY(_start)
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OUTPUT_FORMAT(elf32-littlearm)
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SECTIONS
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{
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. = 0x20000000;
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.text : {
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*(.text)
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}
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.data ALIGN(4096) : {
|
||||||
|
start_ctors = .;
|
||||||
|
KEEP(*( .init_array ));
|
||||||
|
KEEP(*(SORT_BY_INIT_PRIORITY( .init_array.* )));
|
||||||
|
*(.ctors)
|
||||||
|
end_ctors = .;
|
||||||
|
start_dtors = .;
|
||||||
|
*(.dtors)
|
||||||
|
end_dtors = .;
|
||||||
|
*(.data)
|
||||||
|
*(.got)
|
||||||
|
}
|
||||||
|
.rodata ALIGN(4096) : {
|
||||||
|
*(.rodata)
|
||||||
|
}
|
||||||
|
.bss ALIGN(4096) : {
|
||||||
|
*(.bss)
|
||||||
|
}
|
||||||
|
. = ALIGN(4096);
|
||||||
|
}
|
Loading…
Reference in a new issue