Added a 3DS port. Requires a9lh

This commit is contained in:
Morten Delenk 2016-06-28 11:32:24 +02:00
parent 2e7b37527a
commit a049fc5f8a
14 changed files with 280 additions and 8 deletions

BIN
arm9loaderhax.bin Executable file

Binary file not shown.

View file

@ -1,15 +1,20 @@
arch = x86_64
arch = 3ds
MODE = debug
#MODE = release # enables optimization
export PATH := $(HOME)/opt/bin:$(PATH)
ARCHFLAGS =
ifeq ($(arch),x86)
PREFIX = i686-elf-
libpath = i686-elf
else
ifeq ($(arch),x86_64)
PREFIX = x86_64-elf-
ARCHFLAGS =
libpath = x86_64-elf
else
ifeq ($(arch),3ds)
PREFIX = arm-none-eabi-
libpath = arm-none-eabi
endif
endif
endif

View file

@ -2,11 +2,11 @@ include ../kernel.settings
SRCS = $(shell find hal/$(arch) -name '*.cpp' -o -name '*.[cS]')
KERNSRCS = $(shell find kernel -name '*.cpp' -o -name '*.c')
#OBJS = $(addsuffix .o,$(basename $(SRCS)))
OBJS = $(addsuffix .o,$(basename $(KERNSRCS)))
OBJS = #$(addsuffix .o,$(basename $(KERNSRCS)))
LD = $(PREFIX)g++
LDFLAGS = -nostdlib -nodefaultlibs -nostdlib -fno-builtin $(ARCHFLAGS) -T kernel-$(arch).ld -z max-page-size=0x1000
all: hal kernel
all: hal #kernel #uncomment when done with 3ds
$(LD) $(LDFLAGS) -o mtgos $(OBJS) libhal.a -lgcc
hal:
make -C hal

36
kernel/hal/3ds/Makefile Normal file
View file

@ -0,0 +1,36 @@
include ../../../kernel.settings
ARM9SRCS = $(shell find arm9 -name '*.cpp' -o -name '*.[cS]')
ARM11SRCS = $(shell find arm11 -name '*.cpp' -o -name '*.[cS]')
ARM9OBJS = $(addsuffix .o,$(basename $(ARM9SRCS)))
ARM11OBJS = $(addsuffix .o,$(basename $(ARM11SRCS)))
ARM9FLAGS = -mcpu=arm946e-s -march=armv5te -mlittle-endian
ARM11FLAGS = -mcpu=mpcore -mlittle-endian
CPP = $(PREFIX)g++
CC = $(PREFIX)gcc
AR = $(PREFIX)ar
ASFLAGS =
CFLAGS += -Wall -fno-stack-protector -nostdinc -Ic_include/ -I../../kernel/c_include -ffreestanding -std=c11 -fno-builtin -Werror -nostdlib -g -fpie
CPPFLAGS += -Wall -fno-stack-protector -nostdinc -std=c++14 -Iinclude/ -Ic_include/ -I../../kernel/c_include -I../../kernel/include -fno-rtti -fno-exceptions -ffreestanding -fno-builtin -Werror -nostdlib -fno-use-cxa-atexit -Wextra -Wno-unused -g -fno-pie -Wno-reorder
all: $(ARM9OBJS) $(ARM11OBJS)
arm9/%.o: arm9/%.cpp
$(CPP) $(CPPFLAGS) $(ARM9FLAGS) -c -o $@ $^
arm9/%.o: arm9/%.c
$(CC) $(CFLAGS) $(ARM9FLAGS) -c -o $@ $^
arm9/%.o: arm9/%.S
$(CC) $(CFLAGS) $(ARM9FLAGS) -c -o $@ $^
arm11/%.o: arm11/%.cpp
$(CPP) $(CPPFLAGS) $(ARM9FLAGS) -c -o $@ $^
arm11/%.o: arm11/%.c
$(CC) $(CFLAGS) $(ARM9FLAGS) -c -o $@ $^
arm11/%.o: arm11/%.S
$(CC) $(CFLAGS) $(ARM9FLAGS) -c -o $@ $^
clean:

View file

@ -0,0 +1,66 @@
//Notice: 0x1FFFFFF8 is a pointer to a function that is being executed by
//A11 SYS_CORE
//If it's zero, SYS_CORE is ready for a new task
#include <stdint.h>
#include <stdfnt.h>
void(**fpointer)(void)=(void(**)(void))0x1FFFFFF8;
void __attribute__((naked)) arm11Stub(void)
{
//Disable interrupts
__asm(".word 0xF10C01C0");
//Wait for the entry to be set
while(*fpointer == &arm11Stub);
//Jump to it
(*fpointer)();
}
void mainRoutine() {
*fpointer=nullptr;
while(true) {
if(!(*fpointer))
continue;
(*fpointer)();
*fpointer=nullptr;
}
}
unsigned int seed=0;
unsigned int random() {
return seed=0x41C64E6D * seed + 0x00006073;
}
#define CALCXY_top(x,y) ((x)*240+240-(y))
void initScreen() {
//top screen lfb size: 0x5dc00
//bottom screen lfb size: 0x4b000
//lfb locations: 0x18000000 (left 1)
//lfb locations: 0x18060000 (left 2)
//lfb locations: 0x180C0000 (right 1)
//lfb locations: 0x18120000 (right 2)
//lfb locations: 0x18180000 (bottom 1)
//lfb locations: 0x181D0000 (bottom 2)
unsigned int *fb_init=(unsigned int*)0x10400400;
fb_init[0x70/4]&=~0x7;
fb_init[0x170/4]&=~0x7;
fb_init[0x68/4]=0x18000000; //Left eye
fb_init[0x6C/4]=0x18060000; //Left eye
fb_init[0x90/4]=960;
fb_init[0x94/4]=0x180C0000; //Right eye
fb_init[0x98/4]=0x18120000; //Right eye
fb_init[0x168/4]=0x18180000;
fb_init[0x16C/4]=0x181D0000;
fb_init[0x190/4]=960;
int *lfb=(int*)0x18060000;
for(int bx=0;bx<32;bx++) {
for(int by=0;by<8;by++) {
for(int x=0;x<8;x++) {
for(int y=0;y<8;y++) {
if(font[bx+by*32][y]&(1<<x))
lfb[CALCXY_top(bx*8+x,by*8+y)]=0xFFFFFF00;
else
lfb[CALCXY_top(bx*8+x,by*8+y)]=0x0;
}
}
}
}
fb_init[0x78/4]=1;
}

View file

@ -0,0 +1,63 @@
.section .text.start
.align 4
b _start
.word 0, 0
.global _start
.extern main
_start:
mov sp, #0x27000000
//Disable caches/mpu
mrc p15, 0, r0, c1, c0, 0
bic r0, #0x1000 //Disable instruction cache
bic r0, #0x4 //Disable data cache
bic r0, #0x1 //Disable MPU
mcr p15, 0, r0, c1, c0, 0
ldr r0, =0x33333333
mcr p15, 0, r0, c5, c0, 2 //Write data access
mcr p15, 0, r0, c5, c0, 3 //Write instruction access
// Sets MPU permissions and cache settings
ldr r0, =0xFFFF001D // ffff0000 32k | bootrom (unprotected part)
ldr r1, =0x3000801B // fff00000 16k | dtcm
ldr r2, =0x01FF801D // 01ff8000 32k | itcm
ldr r3, =0x08000029 // 08000000 2M | arm9 mem (O3DS / N3DS)
ldr r4, =0x10000029 // 10000000 2M | io mem (ARM9 / first 2MB)
ldr r5, =0x20000037 // 20000000 256M | fcram (O3DS / N3DS)
ldr r6, =0x1FF00027 // 1FF00000 1M | dsp / axi wram
ldr r7, =0x1800002D // 18000000 8M | vram (+ 2MB)
mov r8, #0x29
mcr p15, 0, r0, c6, c0, 0
mcr p15, 0, r1, c6, c1, 0
mcr p15, 0, r2, c6, c2, 0
mcr p15, 0, r3, c6, c3, 0
mcr p15, 0, r4, c6, c4, 0
mcr p15, 0, r5, c6, c5, 0
mcr p15, 0, r6, c6, c6, 0
mcr p15, 0, r7, c6, c7, 0
mcr p15, 0, r8, c3, c0, 0 // Write bufferable 0, 3, 5
mcr p15, 0, r8, c2, c0, 0 // Data cacheable 0, 3, 5
mcr p15, 0, r8, c2, c0, 1 // Inst cacheable 0, 3, 5
// Enable dctm
ldr r0, =0x3000800A // set dtcm
mcr p15, 0, r0, c9, c1, 0 // set the dtcm Region Register
// Enable caches
mrc p15, 0, r0, c1, c0, 0 // read control register
orr r0, r0, #(1<<18) // - itcm enable
orr r0, r0, #(1<<16) // - dtcm enable
orr r0, r0, #(1<<12) // - instruction cache enable
orr r0, r0, #(1<<2) // - data cache enable
orr r0, r0, #(1<<0) // - mpu enable
mcr p15, 0, r0, c1, c0, 0 // write control register
// Flush caches
mov r0, #0
mcr p15, 0, r0, c7, c5, 0 // flush I-cache
mcr p15, 0, r0, c7, c6, 0 // flush D-cache
mcr p15, 0, r0, c7, c10, 4 // drain write buffer
// Fixes mounting of SDMC
ldr r0, =0x10000020
mov r1, #0x340
str r1, [r0]
b init

View file

@ -0,0 +1,14 @@
void __attribute__((naked)) arm11Stub(void);
void mainRoutine();
void initScreen();
void(**a11fpointer)(void)=(void(**)(void))0x1FFFFFF8;
extern "C" void init() {
*a11fpointer=&arm11Stub;
for(int i=0;i<100;i++);
*a11fpointer=&mainRoutine;
while(*a11fpointer);
*a11fpointer=&initScreen;
while(*a11fpointer);
while(true);
}

View file

@ -19,7 +19,7 @@ all: $(OBJS)
%.o: %.c
$(CC) $(CFLAGS) -c -o $@ $^
%.o: $.S
%.o: %.S
$(CC) $(CFLAGS) -c -o $@ $^
clean:

11
kernel/kernel-3ds.ld Normal file
View file

@ -0,0 +1,11 @@
ENTRY(_start)
SECTIONS
{
. = 0x23F00000;
.text.start : { *(.text.start)}
.text : {*(.text)}
.data : {*(.data)}
.bss : {*(.bss COMMON)}
.rodata : {*(.rodata)}
. = ALIGN(4);
}

Binary file not shown.

BIN
test.elf

Binary file not shown.

45
user/3ds/syscall.S Normal file
View file

@ -0,0 +1,45 @@
.global screenout_init
// void * screenout_init(int err);
screenout_init:
stmdb sp!, {r0} //r0 is err
mov r0, #0
svc #0 //Only one svc
sub sp, #4
bx lr
.global screenout_out
// void * screenout_out(void* handle, char *str);
screenout_out:
stmdb sp!, {r1} // R1 is str
mov r1, r0 //R0 is handle
mov r0, #1
svc #0
add sp, #4
bx lr
.global screenout_clear
// void * screenout_clear(void* handle);
screenout_clear:
mov r1, r0
mov r0, #2
svc #0
bx lr
.global screenout_setcolor
// void * screenout_setcolor(void* handle, uint32_t BG, uint32_t FG)
screenout_setcolor:
stmdb sp!, {r1, r2}
mov r1, r0
mov r0, #3
svc #0
add sp, #8
bx lr
.global screenout_destroy
// void * screenout_destroy(void * handle)
screenout_destroy:
mov r1, r0
mov r0, #0x10000
sub r0, #1
svc #0
bx lr

View file

@ -6,9 +6,13 @@ CPP = $(PREFIX)g++
LD = $(PREFIX)ld
ASFLAGS = $(ARCHFLAGS)
CPPFLAGS = $(ARCHFLAGS) -Wall -fno-stack-protector -nostdinc -std=c++14 -Iinclude/ -Ic_include/ -fno-rtti -fno-exceptions -ffreestanding -fno-builtin -Werror -nostdlib -fno-use-cxa-atexit -Wextra -Wno-unused -g -fpie
LDFLAGS = -Ttest-$(arch).ld
LDFLAGS = -Ttest-$(arch).ld -L/opt/lib/gcc/$(libpath)/6.1.0/
ifeq ($(arch),3ds)
ASFLAGS += -mcpu=mpcore -mlittle-endian
CPPFLAGS += -mcpu=mpcore -mlittle-endian
endif
test.elf: $(OBJS) $(arch)/syscall.o
$(LD) $(LDFLAGS) -o $@ $^
$(LD) $(LDFLAGS) -o $@ $^ -lgcc
%.o: %.cpp
$(CPP) $(CPPFLAGS) -c -o $@ $^

28
user/test-3ds.ld Normal file
View file

@ -0,0 +1,28 @@
ENTRY(_start)
OUTPUT_FORMAT(elf32-littlearm)
SECTIONS
{
. = 0x20000000;
.text : {
*(.text)
}
.data ALIGN(4096) : {
start_ctors = .;
KEEP(*( .init_array ));
KEEP(*(SORT_BY_INIT_PRIORITY( .init_array.* )));
*(.ctors)
end_ctors = .;
start_dtors = .;
*(.dtors)
end_dtors = .;
*(.data)
*(.got)
}
.rodata ALIGN(4096) : {
*(.rodata)
}
.bss ALIGN(4096) : {
*(.bss)
}
. = ALIGN(4096);
}