From 02551ae4991d818adb824fe39a82437281ee5306 Mon Sep 17 00:00:00 2001 From: LSChyi Date: Mon, 14 Sep 2020 18:33:43 +0800 Subject: [PATCH] [Keyboard] add Phoenix keyboard (#10256) * setup keyboard * fit v1 board setting * remove unused def and add ergodox_pretty * add user hooks * add ergodox_pretty to info * apply suggestions * use default split usb timeout --- keyboards/phoenix/chconf.h | 714 +++++++++++++++++++++ keyboards/phoenix/config.h | 50 ++ keyboards/phoenix/halconf.h | 525 +++++++++++++++ keyboards/phoenix/info.json | 58 ++ keyboards/phoenix/keymaps/default/keymap.c | 129 ++++ keyboards/phoenix/mcuconf.h | 253 ++++++++ keyboards/phoenix/phoenix.c | 85 +++ keyboards/phoenix/phoenix.h | 94 +++ keyboards/phoenix/readme.md | 15 + keyboards/phoenix/rules.mk | 48 ++ 10 files changed, 1971 insertions(+) create mode 100644 keyboards/phoenix/chconf.h create mode 100644 keyboards/phoenix/config.h create mode 100644 keyboards/phoenix/halconf.h create mode 100644 keyboards/phoenix/info.json create mode 100644 keyboards/phoenix/keymaps/default/keymap.c create mode 100644 keyboards/phoenix/mcuconf.h create mode 100644 keyboards/phoenix/phoenix.c create mode 100644 keyboards/phoenix/phoenix.h create mode 100644 keyboards/phoenix/readme.md create mode 100644 keyboards/phoenix/rules.mk diff --git a/keyboards/phoenix/chconf.h b/keyboards/phoenix/chconf.h new file mode 100644 index 00000000000..7dc4f84a8a0 --- /dev/null +++ b/keyboards/phoenix/chconf.h @@ -0,0 +1,714 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_6_0_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 10000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM TRUE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/keyboards/phoenix/config.h b/keyboards/phoenix/config.h new file mode 100644 index 00000000000..81fc3677ffc --- /dev/null +++ b/keyboards/phoenix/config.h @@ -0,0 +1,50 @@ + +/* Copyright 2019 + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ +#pragma once + +#include "config_common.h" + +/* USB Device descriptor parameter */ +#define VENDOR_ID 0x456B +#define PRODUCT_ID 0x0001 +#define DEVICE_VER 0x0001 +#define MANUFACTURER ErgoKB +#define PRODUCT Phoenix + +/* key matrix size */ +#define MATRIX_ROWS 12 +#define MATRIX_COLS 7 + +#define MOUSEKEY_INTERVAL 10 +#define MOUSEKEY_DELAY 0 +#define MOUSEKEY_TIME_TO_MAX 60 +#define MOUSEKEY_MAX_SPEED 7 +#define MOUSEKEY_WHEEL_DELAY 0 + +#define DIODE_DIRECTION ROW2COL + +/* Locking resynchronize hack */ +#define LOCKING_RESYNC_ENABLE + +#define MATRIX_ROW_PINS { B1, B0, A7, A6, A5, B7 } +#define MATRIX_COL_PINS { B10, B12, B13, B14, B15, A8, A10 } + +#define HAL_USE_SERIAL TRUE +#define SPLIT_HAND_PIN B9 +#define SOFT_SERIAL_PIN A9 +#define SERIAL_USART_DRIVER SD1 +#define SERIAL_USART_TX_PAL_MODE 7 diff --git a/keyboards/phoenix/halconf.h b/keyboards/phoenix/halconf.h new file mode 100644 index 00000000000..a8db392aaa6 --- /dev/null +++ b/keyboards/phoenix/halconf.h @@ -0,0 +1,525 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_0_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR FALSE +#endif + + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT TRUE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/keyboards/phoenix/info.json b/keyboards/phoenix/info.json new file mode 100644 index 00000000000..f1275b9de61 --- /dev/null +++ b/keyboards/phoenix/info.json @@ -0,0 +1,58 @@ +{ + "keyboard_name": "Phoenix", + "url": "ergokb.tw", + "maintainer": "ErgoKB via lschyi", + "manufacturer": "ErgoKB", + "width": 17, + "height": 8, + + "layouts": { + "LAYOUT_ergodox": { + "layout": [ + {"x":0, "y":0.375, "w":1.5}, {"x":1.5, "y":0.375}, {"x":2.5, "y":0.125}, {"x":3.5, "y":0}, {"x":4.5, "y":0.125}, {"x":5.5, "y":0.25}, {"x":6.5, "y":0.25}, + {"x":0, "y":1.375, "w":1.5}, {"x":1.5, "y":1.375}, {"x":2.5, "y":1.125}, {"x":3.5, "y":1}, {"x":4.5, "y":1.125}, {"x":5.5, "y":1.25}, {"x":6.5, "y":1.25, "h":1.5}, + {"x":0, "y":2.375, "w":1.5}, {"x":1.5, "y":2.375}, {"x":2.5, "y":2.125}, {"x":3.5, "y":2}, {"x":4.5, "y":2.125}, {"x":5.5, "y":2.25}, + {"x":0, "y":3.375, "w":1.5}, {"x":1.5, "y":3.375}, {"x":2.5, "y":3.125}, {"x":3.5, "y":3}, {"x":4.5, "y":3.125}, {"x":5.5, "y":3.25}, {"x":6.5, "y":2.75, "h":1.5}, + {"x":0.5, "y":4.375}, {"x":1.5, "y":4.375}, {"x":2.5, "y":4.125}, {"x":3.5, "y":4}, {"x":4.5, "y":4.125}, + + {"x":6, "y":5}, {"x":7, "y":5}, + {"x":7, "y":6}, + {"x":5, "y":6, "h":2}, {"x":6, "y":6, "h":2}, {"x":7, "y":7}, + + + {"x":9.5, "y":0.25}, {"x":10.5, "y":0.25}, {"x":11.5, "y":0.125}, {"x":12.5, "y":0}, {"x":13.5, "y":0.125}, {"x":14.5, "y":0.375}, {"x":15.5, "y":0.375, "w":1.5}, + {"x":9.5, "y":1.25, "h":1.5}, {"x":10.5, "y":1.25}, {"x":11.5, "y":1.125}, {"x":12.5, "y":1}, {"x":13.5, "y":1.125}, {"x":14.5, "y":1.375}, {"x":15.5, "y":1.375, "w":1.5}, + {"x":10.5, "y":2.25}, {"x":11.5, "y":2.125}, {"x":12.5, "y":2}, {"x":13.5, "y":2.125}, {"x":14.5, "y":2.375}, {"x":15.5, "y":2.375, "w":1.5}, + {"x":9.5, "y":2.75, "h":1.5}, {"x":10.5, "y":3.25}, {"x":11.5, "y":3.125}, {"x":12.5, "y":3}, {"x":13.5, "y":3.125}, {"x":14.5, "y":3.375}, {"x":15.5, "y":3.375, "w":1.5}, + {"x":11.5, "y":4.125}, {"x":12.5, "y":4}, {"x":13.5, "y":4.125}, {"x":14.5, "y":4.375}, {"x":15.5, "y":4.375}, + + + {"x":9, "y":5}, {"x":10, "y":5}, + {"x":9, "y":6}, + {"x":9, "y":7}, {"x":10, "y":6, "h":2}, {"x":11, "y":6, "h":2} + ] + }, + "LAYOUT_ergodox_pretty": { + "layout": [ + {"x":0, "y":0.375, "w":1.5}, {"x":1.5, "y":0.375}, {"x":2.5, "y":0.125}, {"x":3.5, "y":0}, {"x":4.5, "y":0.125}, {"x":5.5, "y":0.25}, {"x":6.5, "y":0.25}, + {"x":9.5, "y":0.25}, {"x":10.5, "y":0.25}, {"x":11.5, "y":0.125}, {"x":12.5, "y":0}, {"x":13.5, "y":0.125}, {"x":14.5, "y":0.375}, {"x":15.5, "y":0.375, "w":1.5}, + + {"x":0, "y":1.375, "w":1.5}, {"x":1.5, "y":1.375}, {"x":2.5, "y":1.125}, {"x":3.5, "y":1}, {"x":4.5, "y":1.125}, {"x":5.5, "y":1.25}, {"x":6.5, "y":1.25, "h":1.5}, + {"x":9.5, "y":1.25, "h":1.5}, {"x":10.5, "y":1.25}, {"x":11.5, "y":1.125}, {"x":12.5, "y":1}, {"x":13.5, "y":1.125}, {"x":14.5, "y":1.375}, {"x":15.5, "y":1.375, "w":1.5}, + + {"x":0, "y":2.375, "w":1.5}, {"x":1.5, "y":2.375}, {"x":2.5, "y":2.125}, {"x":3.5, "y":2}, {"x":4.5, "y":2.125}, {"x":5.5, "y":2.25}, + {"x":10.5, "y":2.25}, {"x":11.5, "y":2.125}, {"x":12.5, "y":2}, {"x":13.5, "y":2.125}, {"x":14.5, "y":2.375}, {"x":15.5, "y":2.375, "w":1.5}, + + {"x":0, "y":3.375, "w":1.5}, {"x":1.5, "y":3.375}, {"x":2.5, "y":3.125}, {"x":3.5, "y":3}, {"x":4.5, "y":3.125}, {"x":5.5, "y":3.25}, {"x":6.5, "y":2.75, "h":1.5}, + {"x":9.5, "y":2.75, "h":1.5}, {"x":10.5, "y":3.25}, {"x":11.5, "y":3.125}, {"x":12.5, "y":3}, {"x":13.5, "y":3.125}, {"x":14.5, "y":3.375}, {"x":15.5, "y":3.375, "w":1.5}, + + {"x":0.5, "y":4.375}, {"x":1.5, "y":4.375}, {"x":2.5, "y":4.125}, {"x":3.5, "y":4}, {"x":4.5, "y":4.125}, + {"x":11.5, "y":4.125}, {"x":12.5, "y":4}, {"x":13.5, "y":4.125}, {"x":14.5, "y":4.375}, {"x":15.5, "y":4.375}, + + {"x":6, "y":5}, {"x":7, "y":5}, {"x":9, "y":5}, {"x":10, "y":5}, + {"x":7, "y":6}, {"x":9, "y":6}, + {"x":5, "y":6, "h":2}, {"x":6, "y":6, "h":2}, {"x":7, "y":7}, {"x":9, "y":7}, {"x":10, "y":6, "h":2}, {"x":11, "y":6, "h":2} + ] + } + } +} diff --git a/keyboards/phoenix/keymaps/default/keymap.c b/keyboards/phoenix/keymaps/default/keymap.c new file mode 100644 index 00000000000..909e1dbb605 --- /dev/null +++ b/keyboards/phoenix/keymaps/default/keymap.c @@ -0,0 +1,129 @@ +#include QMK_KEYBOARD_H + +enum layers { + BASE, // default layer + ARROW, // arrows + MOUSE, // mouse keys +}; + +const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { +/* Keymap 0: Basic layer + * + * ,--------------------------------------------------. ,--------------------------------------------------. + * | ESC | 1 | 2 | 3 | 4 | 5 | ~ | | EQL | 6 | 7 | 8 | 9 | 0 | DEL | + * |--------+------+------+------+------+-------------| |------+------+------+------+------+------+--------| + * | TAB | Q | W | E | R | T | LCTL | | EQL | Y | U | I | O | P | \ | + * |--------+------+------+------+------+------| | | |------+------+------+------+------+--------| + * | LCTL | A | S | D | F | G |------| |------| H | J | K | L | ; | ' | + * |--------+------+------+------+------+------| LSFT | | MIN |------+------+------+------+------+--------| + * | LShift | Z | X | C | V | B | | | | N | M | , | . | / | RShift | + * `--------+------+------+------+------+-------------' `-------------+------+------+------+------+--------' + * | MUTE |TG(2) | LSFT | LCTL | LALT | | EQL | MIN | [ | ] | TG(1) | + * `----------------------------------' `----------------------------------' + * ,-------------. ,---------------. + * | VOLD | VOL_U| | F10 | F12 | + * ,------|------|------| |------+--------+------. + * | | | LCTL | | F11 | | | + * | Space| LGUI |------| |------| MO(1) |Enter | + * | | | LSFT | | ESC | | | + * `--------------------' `----------------------' + */ +[BASE] = LAYOUT_ergodox( + KC_ESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_GRV, + KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_LCTL, + KC_LCTL, KC_A, KC_S, KC_D, KC_F, KC_G, + KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_LSFT, + KC_MUTE, TG(2), KC_LSFT, KC_LCTL, KC_LALT, + KC_VOLD, KC_VOLU, + KC_LCTL, + KC_SPC, KC_LGUI, KC_LSFT, + + KC_EQL, KC_6, KC_7, KC_8, KC_9, KC_0, KC_DEL, + KC_EQL, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_BSLS, + KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, + KC_MINS, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_RSFT, + KC_MINS, KC_EQL, KC_LBRC, KC_RBRC, TG(1), + KC_F10, KC_F12, + KC_F11, + KC_ESC, MO(1), KC_ENT), + +/* Keymap 1: Arrow layer + * + * ,--------------------------------------------------. ,--------------------------------------------------. + * | | | | | | | | | | | | | | | | + * |--------+------+------+------+------+-------------| |------+------+------+------+------+------+--------| + * | | | | | | | | | | | PgDn | PgUp | | [ | | + * |--------+------+------+------+------+------| | | |------+------+------+------+------+--------| + * | | | | | ~ | |------| |------| LEFT | DOWN | UP |RIGHT |Backsp| ] | + * |--------+------+------+------+------+------| | | |------+------+------+------+------+--------| + * | | | | | | | | | | | | | | | | + * `--------+------+------+------+------+-------------' `-------------+------+------+------+------+--------' + * | | | | | | | | | | | | + * `----------------------------------' `----------------------------------' + * ,-------------. ,---------------. + * | | | | | | + * ,------|------|------| |------+--------+------. + * | | | | | | | | + * | | |------| |------| | | + * | | | | | | | | + * `--------------------' `----------------------' + */ +[ARROW] = LAYOUT_ergodox( + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TILD, KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, + KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, + + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, KC_PGDN, KC_PGUP, KC_TRNS, KC_LBRC, KC_TRNS, + KC_LEFT, KC_DOWN, KC_UP, KC_RGHT, KC_BSPC, KC_RBRC, + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, + KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS), + +/* Keymap 2: Mouse layer + * + * ,--------------------------------------------------. ,--------------------------------------------------. + * | | | | | | | | | | | | | | | | + * |--------+------+------+------+------+-------------| |------+------+------+------+------+------+--------| + * | | | | | | | | | | | | | | | | + * |--------+------+------+------+------+------| | | |------+------+------+------+------+--------| + * | | | | | | |------| |------| | | | | | | + * |--------+------+------+------+------+------| | | |------+------+------+------+------+--------| + * | | | | | | | | | | | | WH_U | | | | + * `--------+------+------+------+------+-------------' `-------------+------+------+------+------+--------' + * | | | | | | | WH_L | WH_D | WH_R | | | + * `----------------------------------' `----------------------------------' + * ,-------------. ,---------------. + * | | | | | | + * ,------|------|------| |------+--------+------. + * | | | | | | | | + * | BTN1 | |------| |------| | | + * | | | | | | | | + * `--------------------' `----------------------' + */ +[MOUSE] = LAYOUT_ergodox( + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, + KC_TRNS, + KC_BTN1, KC_TRNS, KC_TRNS, + + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS, KC_MS_U, KC_TRNS, KC_TRNS, KC_TRNS, + KC_MS_L, KC_MS_D, KC_MS_R, KC_TRNS, KC_TRNS, + KC_TRNS, KC_TRNS, + KC_TRNS, + KC_TRNS, KC_TRNS, KC_TRNS), +}; diff --git a/keyboards/phoenix/mcuconf.h b/keyboards/phoenix/mcuconf.h new file mode 100644 index 00000000000..7758cf47688 --- /dev/null +++ b/keyboards/phoenix/mcuconf.h @@ -0,0 +1,253 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F4xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 25 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 4 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI16_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 15 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 6 +#define STM32_IRQ_EXTI20_PRIORITY 6 +#define STM32_IRQ_EXTI21_PRIORITY 15 +#define STM32_IRQ_EXTI22_PRIORITY 15 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI2 FALSE +#define STM32_I2S_USE_SPI3 FALSE +#define STM32_I2S_SPI2_IRQ_PRIORITY 10 +#define STM32_I2S_SPI3_IRQ_PRIORITY 10 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI3_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM9 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM9 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 TRUE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif /* MCUCONF_H */ diff --git a/keyboards/phoenix/phoenix.c b/keyboards/phoenix/phoenix.c new file mode 100644 index 00000000000..e79b35b1591 --- /dev/null +++ b/keyboards/phoenix/phoenix.c @@ -0,0 +1,85 @@ +#include "hal.h" +#include "usb_main.h" +#include "phoenix.h" + +void bootmagic_lite(void) { + matrix_scan(); + wait_ms(5); + matrix_scan(); + + if ((matrix_get_row(0) & 1) || (matrix_get_row(6) & 1)) { + palSetPadMode(GPIOB, 8, PAL_MODE_OUTPUT_PUSHPULL); + palSetPadMode(GPIOB, 5, PAL_MODE_OUTPUT_PUSHPULL); + palSetPadMode(GPIOB, 6, PAL_MODE_OUTPUT_PUSHPULL); + led1_off(); + led2_off(); + led3_off(); + + led3_on(); + wait_ms(50); + led2_on(); + wait_ms(50); + led1_on(); + wait_ms(50); + + led3_off(); + wait_ms(50); + led2_off(); + wait_ms(50); + led1_off(); + wait_ms(50); + + bootloader_jump(); + } +} + +void keyboard_pre_init_kb(void) { + palSetPadMode(GPIOB, 8, PAL_MODE_OUTPUT_PUSHPULL); + palSetPadMode(GPIOB, 5, PAL_MODE_OUTPUT_PUSHPULL); + palSetPadMode(GPIOB, 6, PAL_MODE_OUTPUT_PUSHPULL); + led1_off(); + led2_off(); + led3_off(); + + keyboard_pre_init_user(); +} + +void keyboard_post_init_kb(void) { + led1_on(); + wait_ms(50); + led2_on(); + wait_ms(50); + led3_on(); + wait_ms(50); + + led1_off(); + wait_ms(50); + led2_off(); + wait_ms(50); + led3_off(); + wait_ms(50); + + keyboard_post_init_user(); +} + +void manipulate_led(uint32_t led, bool on) { + switch (led) { + case 1: + on ? led1_on() : led1_off(); + case 2: + on ? led2_on() : led2_off(); + case 3: + on ? led3_on() : led3_off(); + } +} + + +layer_state_t layer_state_set_kb(uint32_t state) { + state = layer_state_set_user(state); + + uint8_t layer = get_highest_layer(state); + manipulate_led(1, layer & 1); + manipulate_led(2, layer >> 1 & 1); + manipulate_led(3, layer >> 2 & 1); + return state; +} diff --git a/keyboards/phoenix/phoenix.h b/keyboards/phoenix/phoenix.h new file mode 100644 index 00000000000..bd8e4a30ab4 --- /dev/null +++ b/keyboards/phoenix/phoenix.h @@ -0,0 +1,94 @@ +/* Copyright 2019 + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#pragma once + +#include "quantum.h" + +inline void led_pin_on(uint8_t pin) { palSetPad(GPIOB, pin); }; +inline void led_pin_off(uint8_t pin) { palClearPad(GPIOB, pin); }; + +inline void led1_on(void) { led_pin_on(8); }; +inline void led2_on(void) { led_pin_on(5); }; +inline void led3_on(void) { led_pin_on(6); }; + +inline void led1_off(void) { led_pin_off(8); }; +inline void led2_off(void) { led_pin_off(5); }; +inline void led3_off(void) { led_pin_off(6); }; + +#define LAYOUT_ergodox( \ + k00,k01,k02,k03,k04,k05,k06, \ + k10,k11,k12,k13,k14,k15,k16, \ + k20,k21,k22,k23,k24,k25, \ + k30,k31,k32,k33,k34,k35,k36, \ + k40,k41,k42,k43,k44, \ + k55,k56, \ + k54, \ + k53,k52,k51, \ + \ + k07,k08,k09,k0A,k0B,k0C,k0D, \ + k17,k18,k19,k1A,k1B,k1C,k1D, \ + k28,k29,k2A,k2B,k2C,k2D, \ + k37,k38,k39,k3A,k3B,k3C,k3D, \ + k49,k4A,k4B,k4C,k4D, \ + k57,k58, \ + k59, \ + k5C,k5B,k5A ) \ + \ + /* matrix positions */ \ + { \ + { k00, k01, k02, k03, k04, k05, k06 }, \ + { k10, k11, k12, k13, k14, k15, k16 }, \ + { k20, k21, k22, k23, k24, k25 }, \ + { k30, k31, k32, k33, k34, k35, k36 }, \ + { k40, k41, k42, k43, k44 }, \ + { k53, k52, k51, k55, k56, k54 }, \ + \ + { k0D, k0C, k0B, k0A, k09, k08, k07 }, \ + { k1D, k1C, k1B, k1A, k19, k18, k17 }, \ + { k2D, k2C, k2B, k2A, k29, k28 }, \ + { k3D, k3C, k3B, k3A, k39, k38, k37 }, \ + { k4D, k4C, k4B, k4A, k49 }, \ + { k5A, k5B, k5C, k58, k57, k59 }, \ + } + +/* ---------- LEFT HAND ----------- ---------- RIGHT HAND ---------- */ +#define LAYOUT_ergodox_pretty( \ + L00,L01,L02,L03,L04,L05,L06, R00,R01,R02,R03,R04,R05,R06, \ + L10,L11,L12,L13,L14,L15,L16, R10,R11,R12,R13,R14,R15,R16, \ + L20,L21,L22,L23,L24,L25, R21,R22,R23,R24,R25,R26, \ + L30,L31,L32,L33,L34,L35,L36, R30,R31,R32,R33,R34,R35,R36, \ + L40,L41,L42,L43,L44, R42,R43,R44,R45,R46, \ + L55,L56, R50,R51, \ + L54, R52, \ + L53,L52,L51, R55,R54,R53 ) \ + \ + /* matrix positions */ \ + { \ + { L00, L10, L02, L03, L04, L05, L06 },\ + { L10, L11, L12, L13, L14, L15, L16 },\ + { L20, L21, L22, L23, L24, L25 }, \ + { L30, L31, L32, L33, L34, L35, L36 },\ + { L40, L41, L42, L43, L44 }, \ + { L53, L52, L51, L55, L56, L54 }, \ + \ + { R00, R01, R02, R03, R04, R05, R06 },\ + { R10, R11, R12, R13, R14, R15, R16 },\ + { R20, R21, R22, R23, R24, R25 }, \ + { R30, R31, R32, R33, R34, R35, R36 },\ + { R40, R41, R42, R43, R44 }, \ + { R53, R54, R55, R51, R50, R52 }, \ + } diff --git a/keyboards/phoenix/readme.md b/keyboards/phoenix/readme.md new file mode 100644 index 00000000000..a39f52359b7 --- /dev/null +++ b/keyboards/phoenix/readme.md @@ -0,0 +1,15 @@ +# Phoenix + +![Phoenix](https://imgur.com/adJiuMHl.jpg) + +A reborn version of Ergodox with several improved features. [More info on ErgoKB](https://www.ergokb.tw/) + +* Keyboard Maintainer: [lschyi](https://github.com/lschyi) +* Hardware Supported: Phoenix Mechanical Keyboard PCB +* Hardware Availability: [ErgoKB](https://www.ergokb.tw/products/phoenix/) + +Make example for this keyboard (after setting up your build environment): + + make phoenix:default + +See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs). diff --git a/keyboards/phoenix/rules.mk b/keyboards/phoenix/rules.mk new file mode 100644 index 00000000000..6c6c8446ab6 --- /dev/null +++ b/keyboards/phoenix/rules.mk @@ -0,0 +1,48 @@ +# Build Options +# change yes to no to disable +# +BOOTMAGIC_ENABLE = lite # Virtual DIP switch configuration +MOUSEKEY_ENABLE = yes # Mouse keys +EXTRAKEY_ENABLE = yes # Audio control and System control +CONSOLE_ENABLE = no # Console for debug +COMMAND_ENABLE = no # Commands for debug and configuration +SLEEP_LED_ENABLE = no # Breathing sleep LED during USB suspend, do not enable SLEEP_LED_ENABLE. it uses the same timer as BACKLIGHT_ENABLE +NKRO_ENABLE = yes # USB Nkey Rollover, if this doesn't work, see here: https://github.com/tmk/tmk_keyboard/wiki/FAQ#nkro-doesnt-work +BACKLIGHT_ENABLE = no # Enable keyboard backlight functionality +RGBLIGHT_ENABLE = no # Enable keyboard RGB underglow +BLUETOOTH_ENABLE = no # Enable Bluetooth +AUDIO_ENABLE = no # Audio output +STENO_ENABLE = no +SPLIT_KEYBOARD = yes +SERIAL_DRIVER = usart +KEYBOARD_SHARED_EP = yes + +## chip/board settings +# the next two should match the directories in +# /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) +MCU_FAMILY = STM32 +MCU_SERIES = STM32F4xx +# linker script to use +# it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ +# or /ld/ +MCU_LDSCRIPT = STM32F401xC +# startup code to use +# is should exist in /os/common/ports/ARMCMx/compilers/GCC/mk/ +MCU_STARTUP = stm32f4xx +# it should exist either in /os/hal/boards/ +# or /boards +BOARD = BLACKPILL_STM32_F401 +# Cortex version +# Teensy LC is cortex-m0; Teensy 3.x are cortex-m4 +MCU = cortex-m4 +# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 +ARMV = 7 +USE_FPU = yes +# Address of the booloader in system memory +STM32_BOOTLOADER_ADDRESS = 0x1FFF0000 + +# Options to pass to dfu-util when flashing +DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave +DFU_SUFFIX_ARGS = -v 0483 -p df11 + +OPT_DEFS += -DSTM32_DMA_REQUIRED=TRUE